drivers/video/rockchip/hdmi/rockchip-hdmi.h

   1 #ifndef __ROCKCHIP_HDMI_H__
   2 #define __ROCKCHIP_HDMI_H__
   3
   4 #include <linux/fb.h>
   5 #include <linux/rk_fb.h>
   6 #include <linux/display-sys.h>
   7 #ifdef CONFIG_SWITCH
   8 #include <linux/switch.h>
   9 #endif
  10 #include <sound/pcm_params.h>
  11
  12 #define HDMI_VIDEO_NORMAL                               0
  13 #define HDMI_VIDEO_DMT                                  BIT(9)
  14 #define HDMI_VIDEO_YUV420                               BIT(10)
  15 #define HDMI_VIDEO_DISCRETE_VR                          BIT(11)
  16 #define HDMI_VIC_MASK                                   (0xFF)
  17 #define HDMI_TYPE_MASK                                  (0xFF << 8)
  18 #define HDMI_MAX_ID                                     4
  19
  20 #define HDMI_UBOOT_NOT_INIT                             BIT(16)
  21 #define HDMI_UBOOT_VIC_MASK                             0xFFFF
  22
  23 /* HDMI video information code according CEA-861-F */
  24 enum hdmi_video_information_code {
  25         HDMI_640X480P_60HZ = 1,
  26         HDMI_720X480P_60HZ_4_3,
  27         HDMI_720X480P_60HZ_16_9,
  28         HDMI_1280X720P_60HZ,
  29         HDMI_1920X1080I_60HZ,           /*5*/
  30         HDMI_720X480I_60HZ_4_3,
  31         HDMI_720X480I_60HZ_16_9,
  32         HDMI_720X240P_60HZ_4_3,
  33         HDMI_720X240P_60HZ_16_9,
  34         HDMI_2880X480I_60HZ_4_3,        /*10*/
  35         HDMI_2880X480I_60HZ_16_9,
  36         HDMI_2880X240P_60HZ_4_3,
  37         HDMI_2880X240P_60HZ_16_9,
  38         HDMI_1440X480P_60HZ_4_3,
  39         HDMI_1440X480P_60HZ_16_9,       /*15*/
  40         HDMI_1920X1080P_60HZ,
  41         HDMI_720X576P_50HZ_4_3,
  42         HDMI_720X576P_50HZ_16_9,
  43         HDMI_1280X720P_50HZ,
  44         HDMI_1920X1080I_50HZ,           /*20*/
  45         HDMI_720X576I_50HZ_4_3,
  46         HDMI_720X576I_50HZ_16_9,
  47         HDMI_720X288P_50HZ_4_3,
  48         HDMI_720X288P_50HZ_16_9,
  49         HDMI_2880X576I_50HZ_4_3,        /*25*/
  50         HDMI_2880X576I_50HZ_16_9,
  51         HDMI_2880X288P_50HZ_4_3,
  52         HDMI_2880X288P_50HZ_16_9,
  53         HDMI_1440X576P_50HZ_4_3,
  54         HDMI_1440X576P_50HZ_16_9,       /*30*/
  55         HDMI_1920X1080P_50HZ,
  56         HDMI_1920X1080P_24HZ,
  57         HDMI_1920X1080P_25HZ,
  58         HDMI_1920X1080P_30HZ,
  59         HDMI_2880X480P_60HZ_4_3,        /*35*/
  60         HDMI_2880X480P_60HZ_16_9,
  61         HDMI_2880X576P_50HZ_4_3,
  62         HDMI_2880X576P_50HZ_16_9,
  63         HDMI_1920X1080I_50HZ_1250,      /* V Line 1250 total*/
  64         HDMI_1920X1080I_100HZ,          /*40*/
  65         HDMI_1280X720P_100HZ,
  66         HDMI_720X576P_100HZ_4_3,
  67         HDMI_720X576P_100HZ_16_9,
  68         HDMI_720X576I_100HZ_4_3,
  69         HDMI_720X576I_100HZ_16_9,       /*45*/
  70         HDMI_1920X1080I_120HZ,
  71         HDMI_1280X720P_120HZ,
  72         HDMI_720X480P_120HZ_4_3,
  73         HDMI_720X480P_120HZ_16_9,
  74         HDMI_720X480I_120HZ_4_3,        /*50*/
  75         HDMI_720X480I_120HZ_16_9,
  76         HDMI_720X576P_200HZ_4_3,
  77         HDMI_720X576P_200HZ_16_9,
  78         HDMI_720X576I_200HZ_4_3,
  79         HDMI_720X576I_200HZ_16_9,       /*55*/
  80         HDMI_720X480P_240HZ_4_3,
  81         HDMI_720X480P_240HZ_16_9,
  82         HDMI_720X480I_240HZ_4_3,
  83         HDMI_720X480I_240HZ_16_9,
  84         HDMI_1280X720P_24HZ,            /*60*/
  85         HDMI_1280X720P_25HZ,
  86         HDMI_1280X720P_30HZ,
  87         HDMI_1920X1080P_120HZ,
  88         HDMI_1920X1080P_100HZ,
  89         HDMI_1280X720P_24HZ_21_9,       /*65*/
  90         HDMI_1280X720P_25HZ_21_9,
  91         HDMI_1280X720P_30HZ_21_9,
  92         HDMI_1280X720P_50HZ_21_9,
  93         HDMI_1280X720P_60HZ_21_9,
  94         HDMI_1280X720P_100HZ_21_9,      /*70*/
  95         HDMI_1280X720P_120HZ_21_9,
  96         HDMI_1920X1080P_24HZ_21_9,
  97         HDMI_1920X1080P_25HZ_21_9,
  98         HDMI_1920X1080P_30HZ_21_9,
  99         HDMI_1920X1080P_50HZ_21_9,      /*75*/
 100         HDMI_1920X1080P_60HZ_21_9,
 101         HDMI_1920X1080P_100HZ_21_9,
 102         HDMI_1920X1080P_120HZ_21_9,
 103         HDMI_1680X720P_24HZ,
 104         HDMI_1680X720P_25HZ,            /*80*/
 105         HDMI_1680X720P_30HZ,
 106         HDMI_1680X720P_50HZ,
 107         HDMI_1680X720P_60HZ,
 108         HDMI_1680X720P_100HZ,
 109         HDMI_1680X720P_120HZ,           /*85*/
 110         HDMI_2560X1080P_24HZ,
 111         HDMI_2560X1080P_25HZ,
 112         HDMI_2560X1080P_30HZ,
 113         HDMI_2560X1080P_50HZ,
 114         HDMI_2560X1080P_60HZ,           /*90*/
 115         HDMI_2560X1080P_100HZ,
 116         HDMI_2560X1080P_120HZ,
 117         HDMI_3840X2160P_24HZ,
 118         HDMI_3840X2160P_25HZ,
 119         HDMI_3840X2160P_30HZ,           /*95*/
 120         HDMI_3840X2160P_50HZ,
 121         HDMI_3840X2160P_60HZ,
 122         HDMI_4096X2160P_24HZ,
 123         HDMI_4096X2160P_25HZ,
 124         HDMI_4096X2160P_30HZ,           /*100*/
 125         HDMI_4096X2160P_50HZ,
 126         HDMI_4096X2160P_60HZ,
 127         HDMI_3840X2160P_24HZ_21_9,
 128         HDMI_3840X2160P_25HZ_21_9,
 129         HDMI_3840X2160P_30HZ_21_9,      /*105*/
 130         HDMI_3840X2160P_50HZ_21_9,
 131         HDMI_3840X2160P_60HZ_21_9,
 132 };
 133
 134 /* HDMI Extended Resolution */
 135 enum {
 136         HDMI_VIC_4KX2K_30HZ = 1,
 137         HDMI_VIC_4KX2K_25HZ,
 138         HDMI_VIC_4KX2K_24HZ,
 139         HDMI_VIC_4KX2K_24HZ_SMPTE
 140 };
 141
 142 /* HDMI Video Format */
 143 enum {
 144         HDMI_VIDEO_FORMAT_NORMAL = 0,
 145         HDMI_VIDEO_FORMAT_4KX2K,
 146         HDMI_VIDEO_FORMAT_3D,
 147 };
 148
 149 /* HDMI 3D type */
 150 enum {
 151         HDMI_3D_NONE = -1,
 152         HDMI_3D_FRAME_PACKING = 0,
 153         HDMI_3D_TOP_BOOTOM = 6,
 154         HDMI_3D_SIDE_BY_SIDE_HALF = 8,
 155 };
 156
 157 /* HDMI Video Data Color Mode */
 158 enum hdmi_video_color_mode {
 159         HDMI_COLOR_AUTO = 0,
 160         HDMI_COLOR_RGB_0_255,
 161         HDMI_COLOR_RGB_16_235,
 162         HDMI_COLOR_YCBCR444,
 163         HDMI_COLOR_YCBCR422,
 164         HDMI_COLOR_YCBCR420
 165 };
 166
 167 /* HDMI Video Data Color Depth */
 168 enum hdmi_deep_color {
 169         HDMI_DEPP_COLOR_AUTO = 0,
 170         HDMI_DEEP_COLOR_Y444 = 0x1,
 171         HDMI_DEEP_COLOR_30BITS = 0x2,
 172         HDMI_DEEP_COLOR_36BITS = 0x4,
 173         HDMI_DEEP_COLOR_48BITS = 0x8,
 174 };
 175
 176 enum hdmi_colorimetry {
 177         HDMI_COLORIMETRY_NO_DATA = 0,
 178         HDMI_COLORIMETRY_SMTPE_170M,
 179         HDMI_COLORIMETRY_ITU709,
 180         HDMI_COLORIMETRY_EXTEND_XVYCC_601,
 181         HDMI_COLORIMETRY_EXTEND_XVYCC_709,
 182         HDMI_COLORIMETRY_EXTEND_SYCC_601,
 183         HDMI_COLORIMETRY_EXTEND_ADOBE_YCC601,
 184         HDMI_COLORIMETRY_EXTEND_ADOBE_RGB,
 185         HDMI_COLORIMETRY_EXTEND_BT_2020_YCC_C, /*constant luminance*/
 186         HDMI_COLORIMETRY_EXTEND_BT_2020_YCC,
 187         HDMI_COLORIMETRY_EXTEND_BT_2020_RGB,
 188 };
 189
 190 /* HDMI Audio source */
 191 enum {
 192         HDMI_AUDIO_SRC_IIS = 0,
 193         HDMI_AUDIO_SRC_SPDIF
 194 };
 195
 196 /* HDMI Audio Type */
 197 enum hdmi_audio_type {
 198         HDMI_AUDIO_NLPCM = 0,
 199         HDMI_AUDIO_LPCM = 1,
 200         HDMI_AUDIO_AC3,
 201         HDMI_AUDIO_MPEG1,
 202         HDMI_AUDIO_MP3,
 203         HDMI_AUDIO_MPEG2,
 204         HDMI_AUDIO_AAC_LC,              /*AAC */
 205         HDMI_AUDIO_DTS,
 206         HDMI_AUDIO_ATARC,
 207         HDMI_AUDIO_DSD,                 /* One bit Audio */
 208         HDMI_AUDIO_E_AC3,
 209         HDMI_AUDIO_DTS_HD,
 210         HDMI_AUDIO_MLP,
 211         HDMI_AUDIO_DST,
 212         HDMI_AUDIO_WMA_PRO
 213 };
 214
 215 /* HDMI Audio Sample Rate */
 216 enum hdmi_audio_samplerate {
 217         HDMI_AUDIO_FS_32000  = 0x1,
 218         HDMI_AUDIO_FS_44100  = 0x2,
 219         HDMI_AUDIO_FS_48000  = 0x4,
 220         HDMI_AUDIO_FS_88200  = 0x8,
 221         HDMI_AUDIO_FS_96000  = 0x10,
 222         HDMI_AUDIO_FS_176400 = 0x20,
 223         HDMI_AUDIO_FS_192000 = 0x40
 224 };
 225
 226 /* HDMI Audio Word Length */
 227 enum hdmi_audio_word_length {
 228         HDMI_AUDIO_WORD_LENGTH_16bit = 0x1,
 229         HDMI_AUDIO_WORD_LENGTH_20bit = 0x2,
 230         HDMI_AUDIO_WORD_LENGTH_24bit = 0x4
 231 };
 232
 233 /* HDMI Hotplug Status */
 234 enum hdmi_hotpulg_status {
 235         HDMI_HPD_REMOVED = 0,   /* HDMI is disconnected */
 236         HDMI_HPD_INSERT,        /* HDMI is connected, but HDP is low
 237                                  * or TMDS link is not pull up to 3.3V.
 238                                  */
 239         HDMI_HPD_ACTIVED        /* HDMI is connected, all singnal
 240                                  * is normal
 241                                  */
 242 };
 243
 244 enum hdmi_mute_status {
 245         HDMI_AV_UNMUTE = 0,
 246         HDMI_VIDEO_MUTE = 0x1,
 247         HDMI_AUDIO_MUTE = 0x2,
 248 };
 249
 250 /* HDMI Error Code */
 251 enum hdmi_error_code {
 252         HDMI_ERROR_SUCCESS = 0,
 253         HDMI_ERROR_FALSE,
 254         HDMI_ERROR_I2C,
 255         HDMI_ERROR_EDID,
 256 };
 257
 258 /* HDMI Video Timing */
 259 struct hdmi_video_timing {
 260         struct fb_videomode mode;       /* Video timing*/
 261         unsigned int vic;               /* Video information code*/
 262         unsigned int vic_2nd;
 263         unsigned int pixelrepeat;       /* Video pixel repeat rate*/
 264         unsigned int interface;         /* Video input interface*/
 265 };
 266
 267 /* HDMI Video Parameters */
 268 struct hdmi_video {
 269         unsigned int vic;               /* Video information code*/
 270         unsigned int color_input;       /* Input video color mode*/
 271         unsigned int color_output;      /* Output video color mode*/
 272         unsigned int color_output_depth;/* Output video Color Depth*/
 273         unsigned int colorimetry;       /* Output Colorimetry */
 274         unsigned int sink_hdmi;         /* Output signal is DVI or HDMI*/
 275         unsigned int format_3d;         /* Output 3D mode*/
 276 };
 277
 278 /* HDMI Audio Parameters */
 279 struct hdmi_audio {
 280         u32     type;                   /*Audio type*/
 281         u32     channel;                /*Audio channel number*/
 282         u32     rate;                   /*Audio sampling rate*/
 283         u32     word_length;            /*Audio data word length*/
 284 };
 285
 286 #define HDMI_MAX_EDID_BLOCK             8
 287 /* HDMI EDID Information */
 288 struct hdmi_edid {
 289         unsigned char sink_hdmi;        /* HDMI display device flag */
 290         unsigned char ycbcr444;         /* Display device support YCbCr444 */
 291         unsigned char ycbcr422;         /* Display device support YCbCr422 */
 292         unsigned char ycbcr420;         /* Display device support YCbCr420 */
 293         unsigned char deepcolor;        /* bit3:DC_48bit; bit2:DC_36bit;
 294                                          * bit1:DC_30bit; bit0:DC_Y444;
 295                                          */
 296         unsigned char deepcolor_420;
 297         unsigned int  cecaddress;       /* CEC physical address */
 298         unsigned int  maxtmdsclock;     /* Max supported tmds clock */
 299         unsigned char fields_present;   /* bit7: latency
 300                                          * bit6: i_lantency
 301                                          * bit5: hdmi_video
 302                                          */
 303         unsigned char video_latency;
 304         unsigned char audio_latency;
 305         unsigned char interlaced_video_latency;
 306         unsigned char interlaced_audio_latency;
 307         /* for hdmi 2.0 */
 308         unsigned char hf_vsdb_version;
 309         unsigned char scdc_present;
 310         unsigned char rr_capable;
 311         unsigned char lte_340mcsc_scramble;
 312         unsigned char independent_view;
 313         unsigned char dual_view;
 314         unsigned char osd_disparity_3d;
 315
 316         unsigned int colorimetry;
 317         struct fb_monspecs      *specs; /*Device spec*/
 318         struct list_head modelist;      /*Device supported display mode list*/
 319         unsigned char baseaudio_support;
 320         struct hdmi_audio *audio;       /*Device supported audio info*/
 321         unsigned int  audio_num;        /*Device supported audio type number*/
 322
 323         unsigned int status;            /*EDID read status, success or failed*/
 324         char *raw[HDMI_MAX_EDID_BLOCK]; /*Raw EDID Data*/
 325 };
 326
 327 struct hdmi;
 328
 329 struct hdmi_ops {
 330         int (*enable)(struct hdmi *);
 331         int (*disable)(struct hdmi *);
 332         int (*getstatus)(struct hdmi *);
 333         int (*insert)(struct hdmi *);
 334         int (*remove)(struct hdmi *);
 335         int (*getedid)(struct hdmi *, int, unsigned char *);
 336         int (*setvideo)(struct hdmi *, struct hdmi_video *);
 337         int (*setaudio)(struct hdmi *, struct hdmi_audio *);
 338         int (*setmute)(struct hdmi *, int);
 339         int (*setvsi)(struct hdmi *, unsigned char, unsigned char);
 340         int (*setcec)(struct hdmi *);
 341         /* call back for hdcp operatoion */
 342         void (*hdcp_cb)(struct hdmi *);
 343         void (*hdcp_auth2nd)(struct hdmi *);
 344         void (*hdcp_irq_cb)(int);
 345         int (*hdcp_power_on_cb)(void);
 346         void (*hdcp_power_off_cb)(struct hdmi *);
 347 };
 348
 349 enum rk_hdmi_feature {
 350         SUPPORT_480I_576I       =       (1 << 0),
 351         SUPPORT_1080I           =       (1 << 1),
 352         SUPPORT_DEEP_10BIT      =       (1 << 2),
 353         SUPPORT_DEEP_12BIT      =       (1 << 3),
 354         SUPPORT_DEEP_16BIT      =       (1 << 4),
 355         SUPPORT_4K              =       (1 << 5),
 356         SUPPORT_4K_4096         =       (1 << 6),
 357         SUPPORT_TMDS_600M       =       (1 << 7),
 358         SUPPORT_YUV420          =       (1 << 8),
 359         SUPPORT_CEC             =       (1 << 9),
 360         SUPPORT_HDCP            =       (1 << 10),
 361         SUPPORT_HDCP2           =       (1 << 11),
 362         SUPPORT_YCBCR_INPUT     =       (1 << 12),
 363         SUPPORT_VESA_DMT        =       (1 << 13),
 364         SUPPORT_RK_DISCRETE_VR  =       (1 << 14)
 365 };
 366
 367 struct hdmi_property {
 368         char *name;
 369         int videosrc;
 370         int display;
 371         int feature;
 372         int defaultmode;
 373         void *priv;
 374 };
 375
 376 enum {
 377         HDMI_SOC_RK3036 = 0,
 378         HDMI_SOC_RK312X,
 379         HDMI_SOC_RK322X,
 380         HDMI_SOC_RK3288,
 381         HDMI_SOC_RK3366,
 382         HDMI_SOC_RK3368,
 383         HDMI_SOC_RK3399,
 384 };
 385
 386 /* HDMI Information */
 387 struct hdmi {
 388         int id;                                 /*HDMI id*/
 389         int soctype;
 390         struct device   *dev;                   /*HDMI device*/
 391         struct rk_lcdc_driver *lcdc;            /*HDMI linked lcdc*/
 392         struct rk_display_device *ddev;         /*Registered display device*/
 393         #ifdef CONFIG_SWITCH
 394         struct switch_dev       switchdev;      /*Registered switch device*/
 395         #endif
 396
 397         struct hdmi_property *property;
 398         struct hdmi_ops *ops;
 399
 400         struct mutex lock;                      /* mutex for hdmi operation */
 401         struct mutex pclk_lock;                 /* mutex for pclk operation */
 402         struct workqueue_struct *workqueue;
 403
 404         bool uboot;     /* if true, HDMI is initialized in uboot*/
 405
 406         int hotplug;    /* hot plug status*/
 407         int autoset;    /* if true, auto set hdmi output mode according EDID.*/
 408         int mute;       /* HDMI display status:
 409                          * 2 - mute audio,
 410                          * 1 - mute display;
 411                          * 0 - unmute
 412                          */
 413         int colordepth;                 /* Output color depth*/
 414         int colormode;                  /* Output color mode*/
 415         int colorimetry;                /* Output colorimetry */
 416         struct hdmi_edid edid;          /* EDID information*/
 417         int enable;                     /* Enable flag*/
 418         int sleep;                      /* Sleep flag*/
 419         int vic;                        /* HDMI output video information code*/
 420         int mode_3d;                    /* HDMI output video 3d mode*/
 421         struct hdmi_audio audio;        /* HDMI output audio information.*/
 422         struct hdmi_video video;        /* HDMI output video information.*/
 423         int xscale;
 424         int yscale;
 425 };
 426
 427 /* HDMI EDID Block Size */
 428 #define HDMI_EDID_BLOCK_SIZE    128
 429
 430 /* SCDC Registers */
 431 #define SCDC_SINK_VER           0x01    /* sink version         */
 432 #define SCDC_SOURCE_VER         0x02    /* source version       */
 433 #define SCDC_UPDATE_0           0x10    /* Update_0             */
 434 #define SCDC_UPDATE_1           0x11    /* Update_1             */
 435 #define SCDC_UPDATE_RESERVED    0x12    /* 0x12-0x1f - Reserved */
 436 #define SCDC_TMDS_CONFIG        0x20    /* TMDS_Config   */
 437 #define SCDC_SCRAMBLER_STAT     0x21    /* Scrambler_Status   */
 438 #define SCDC_CONFIG_0           0x30    /* Config_0           */
 439 #define SCDC_CONFIG_RESERVED    0x31    /* 0x31-0x3f - Reserved */
 440 #define SCDC_STATUS_FLAG_0      0x40    /* Status_Flag_0        */
 441 #define SCDC_STATUS_FLAG_1      0x41    /* Status_Flag_1        */
 442 #define SCDC_STATUS_RESERVED    0x42    /* 0x42-0x4f - Reserved */
 443 #define SCDC_ERR_DET_0_L        0x50    /* Err_Det_0_L          */
 444 #define SCDC_ERR_DET_0_H        0x51    /* Err_Det_0_H          */
 445 #define SCDC_ERR_DET_1_L        0x52    /* Err_Det_1_L          */
 446 #define SCDC_ERR_DET_1_H        0x53    /* Err_Det_1_H          */
 447 #define SCDC_ERR_DET_2_L        0x54    /* Err_Det_2_L          */
 448 #define SCDC_ERR_DET_2_H        0x55    /* Err_Det_2_H          */
 449 #define SCDC_ERR_DET_CHKSUM     0x56    /* Err_Det_Checksum     */
 450 #define SCDC_TEST_CFG_0         0xc0    /* Test_config_0        */
 451 #define SCDC_TEST_RESERVED      0xc1    /* 0xc1-0xcf            */
 452 #define SCDC_MAN_OUI_3RD        0xd0    /* Manufacturer IEEE OUI,
 453                                          * Third Octet
 454                                          */
 455 #define SCDC_MAN_OUI_2ND        0xd1    /* Manufacturer IEEE OUI,
 456                                          * Second Octet
 457                                          */
 458 #define SCDC_MAN_OUI_1ST        0xd2    /* Manufacturer IEEE OUI,
 459                                          * First Octet
 460                                          */
 461 #define SCDC_DEVICE_ID          0xd3    /* 0xd3-0xdd - Device ID            */
 462 #define SCDC_MAN_SPECIFIC       0xde    /* 0xde-0xff - ManufacturerSpecific */
 463
 464 /* Event source */
 465 #define HDMI_SRC_SHIFT          8
 466 #define HDMI_SYSFS_SRC          (0x1 << HDMI_SRC_SHIFT)
 467 #define HDMI_SUSPEND_SRC        (0x2 << HDMI_SRC_SHIFT)
 468 #define HDMI_IRQ_SRC            (0x4 << HDMI_SRC_SHIFT)
 469 #define HDMI_WORKQUEUE_SRC      (0x8 << HDMI_SRC_SHIFT)
 470
 471 /* Event */
 472 #define HDMI_ENABLE_CTL                 (HDMI_SYSFS_SRC         | 0)
 473 #define HDMI_DISABLE_CTL                (HDMI_SYSFS_SRC         | 1)
 474 #define HDMI_SUSPEND_CTL                (HDMI_SUSPEND_SRC       | 2)
 475 #define HDMI_RESUME_CTL                 (HDMI_SUSPEND_SRC       | 3)
 476 #define HDMI_HPD_CHANGE                 (HDMI_IRQ_SRC           | 4)
 477 #define HDMI_SET_VIDEO                  (HDMI_SYSFS_SRC         | 5)
 478 #define HDMI_SET_AUDIO                  (HDMI_SYSFS_SRC         | 6)
 479 #define HDMI_SET_3D                     (HDMI_SYSFS_SRC         | 7)
 480 #define HDMI_MUTE_AUDIO                 (HDMI_SYSFS_SRC         | 8)
 481 #define HDMI_UNMUTE_AUDIO               (HDMI_SYSFS_SRC         | 9)
 482 #define HDMI_SET_COLOR                  (HDMI_SYSFS_SRC         | 10)
 483 #define HDMI_ENABLE_HDCP                (HDMI_SYSFS_SRC         | 11)
 484 #define HDMI_HDCP_AUTH_2ND              (HDMI_IRQ_SRC           | 12)
 485
 486 #define HDMI_DEFAULT_SCALE              95
 487 #define HDMI_AUTO_CONFIG                false
 488
 489 /* HDMI default vide mode */
 490 #define HDMI_VIDEO_DEFAULT_MODE                 HDMI_1280X720P_60HZ
 491                                                 /*HDMI_1920X1080P_60HZ*/
 492 #define HDMI_VIDEO_DEFAULT_COLORMODE            HDMI_COLOR_AUTO
 493 #define HDMI_VIDEO_DEFAULT_COLORDEPTH           8
 494
 495 /* HDMI default audio parameter */
 496 #define HDMI_AUDIO_DEFAULT_TYPE                 HDMI_AUDIO_LPCM
 497 #define HDMI_AUDIO_DEFAULT_CHANNEL              2
 498 #define HDMI_AUDIO_DEFAULT_RATE                 HDMI_AUDIO_FS_44100
 499 #define HDMI_AUDIO_DEFAULT_WORDLENGTH   HDMI_AUDIO_WORD_LENGTH_16bit
 500
 501 #ifdef DEBUG
 502 #define DBG(format, ...) \
 503                 pr_info(format, ## __VA_ARGS__)
 504 #else
 505 #define DBG(format, ...)
 506 #endif
 507
 508 struct hdmi *rockchip_hdmi_register(struct hdmi_property *property,
 509                                     struct hdmi_ops *ops);
 510 void rockchip_hdmi_unregister(struct hdmi *hdmi);
 511 void hdmi_submit_work(struct hdmi *hdmi,
 512                       int event, int delay, int sync);
 513
 514 struct rk_display_device *hdmi_register_display_sysfs(struct hdmi *hdmi,
 515                                                       struct device *parent);
 516 void hdmi_unregister_display_sysfs(struct hdmi *hdmi);
 517
 518 int hdmi_edid_parse_base(unsigned char *buf,
 519                          int *extend_num, struct hdmi_edid *pedid);
 520 int hdmi_edid_parse_extensions(unsigned char *buf,
 521                                struct hdmi_edid *pedid);
 522
 523 void hdmi_init_modelist(struct hdmi *hdmi);
 524 int hdmi_set_lcdc(struct hdmi *hdmi);
 525 int hdmi_ouputmode_select(struct hdmi *hdmi, int edid_ok);
 526 int hdmi_add_vic(int vic, struct list_head *head);
 527 int hdmi_find_best_mode(struct hdmi *hdmi, int vic);
 528 int hdmi_videomode_to_vic(struct fb_videomode *vmode);
 529 const struct fb_videomode *hdmi_vic_to_videomode(int vic);
 530 const struct hdmi_video_timing *hdmi_vic2timing(int vic);
 531 int hdmi_config_audio(struct hdmi_audio *audio);
 532 int hdmi_get_hotplug(void);
 533 int snd_config_hdmi_audio(struct snd_pcm_hw_params *params);
 534 #endif