1 #include "rockchip-hdmi.h"
3 static const struct hdmi_video_timing hdmi_mode[] = {
6 .name = "720x480i@60Hz",
18 .vmode = FB_VMODE_INTERLACED,
21 .vic = HDMI_720X480I_60HZ_4_3,
22 .vic_2nd = HDMI_720X480I_60HZ_16_9,
24 .interface = OUT_P888,
28 .name = "720x576i@50Hz",
40 .vmode = FB_VMODE_INTERLACED,
43 .vic = HDMI_720X576I_50HZ_4_3,
44 .vic_2nd = HDMI_720X576I_50HZ_16_9,
46 .interface = OUT_P888,
50 .name = "720x480p@60Hz",
65 .vic = HDMI_720X480P_60HZ_4_3,
66 .vic_2nd = HDMI_720X480P_60HZ_16_9,
68 .interface = OUT_P888,
72 .name = "720x576p@50Hz",
87 .vic = HDMI_720X576P_50HZ_4_3,
88 .vic_2nd = HDMI_720X576P_50HZ_16_9,
90 .interface = OUT_P888,
94 .name = "1280x720p@24Hz",
100 .right_margin = 1760,
105 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
109 .vic = HDMI_1280X720P_24HZ,
110 .vic_2nd = HDMI_1280X720P_24HZ_21_9,
112 .interface = OUT_P888,
116 .name = "1280x720p@25Hz",
120 .pixclock = 74250000,
122 .right_margin = 2420,
127 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
131 .vic = HDMI_1280X720P_25HZ,
132 .vic_2nd = HDMI_1280X720P_25HZ_21_9,
134 .interface = OUT_P888,
138 .name = "1280x720p@30Hz",
142 .pixclock = 74250000,
144 .right_margin = 1760,
149 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
153 .vic = HDMI_1280X720P_30HZ,
154 .vic_2nd = HDMI_1280X720P_30HZ_21_9,
156 .interface = OUT_P888,
160 .name = "1280x720p@50Hz",
164 .pixclock = 74250000,
171 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
175 .vic = HDMI_1280X720P_50HZ,
176 .vic_2nd = HDMI_1280X720P_50HZ_21_9,
178 .interface = OUT_P888,
182 .name = "1280x720p@60Hz",
186 .pixclock = 74250000,
193 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
197 .vic = HDMI_1280X720P_60HZ,
198 .vic_2nd = HDMI_1280X720P_60HZ_21_9,
200 .interface = OUT_P888,
204 .name = "1920x1080i@50Hz",
208 .pixclock = 74250000,
215 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
216 .vmode = FB_VMODE_INTERLACED,
219 .vic = HDMI_1920X1080I_50HZ,
222 .interface = OUT_P888,
226 .name = "1920x1080i@60Hz",
230 .pixclock = 74250000,
237 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
238 .vmode = FB_VMODE_INTERLACED,
241 .vic = HDMI_1920X1080I_60HZ,
244 .interface = OUT_P888,
248 .name = "1920x1080p@24Hz",
252 .pixclock = 74250000,
259 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
263 .vic = HDMI_1920X1080P_24HZ,
264 .vic_2nd = HDMI_1920X1080P_24HZ_21_9,
266 .interface = OUT_P888,
270 .name = "1920x1080p@25Hz",
274 .pixclock = 74250000,
281 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
285 .vic = HDMI_1920X1080P_25HZ,
286 .vic_2nd = HDMI_1920X1080P_25HZ_21_9,
288 .interface = OUT_P888,
292 .name = "1920x1080p@30Hz",
296 .pixclock = 74250000,
303 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
307 .vic = HDMI_1920X1080P_30HZ,
308 .vic_2nd = HDMI_1920X1080P_30HZ_21_9,
310 .interface = OUT_P888,
314 .name = "1920x1080p@50Hz",
318 .pixclock = 148500000,
325 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
329 .vic = HDMI_1920X1080P_50HZ,
330 .vic_2nd = HDMI_1920X1080P_50HZ_21_9,
332 .interface = OUT_P888,
336 .name = "1920x1080p@60Hz",
340 .pixclock = 148500000,
347 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
351 .vic = HDMI_1920X1080P_60HZ,
352 .vic_2nd = HDMI_1920X1080P_60HZ_21_9,
354 .interface = OUT_P888,
358 .name = "3840x2160p@24Hz",
362 .pixclock = 297000000,
364 .right_margin = 1276,
369 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
373 .vic = HDMI_3840X2160P_24HZ,
374 .vic_2nd = HDMI_3840X2160P_24HZ_21_9,
376 .interface = OUT_P888,
380 .name = "3840x2160p@25Hz",
384 .pixclock = 297000000,
386 .right_margin = 1056,
391 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
395 .vic = HDMI_3840X2160P_25HZ,
396 .vic_2nd = HDMI_3840X2160P_25HZ_21_9,
398 .interface = OUT_P888,
402 .name = "3840x2160p@30Hz",
406 .pixclock = 297000000,
413 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
417 .vic = HDMI_3840X2160P_30HZ,
418 .vic_2nd = HDMI_3840X2160P_30HZ_21_9,
420 .interface = OUT_P888,
424 .name = "4096x2160p@24Hz",
428 .pixclock = 297000000,
430 .right_margin = 1020,
435 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
439 .vic = HDMI_4096X2160P_24HZ,
442 .interface = OUT_P888,
446 .name = "4096x2160p@25Hz",
450 .pixclock = 297000000,
457 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
461 .vic = HDMI_4096X2160P_25HZ,
464 .interface = OUT_P888,
468 .name = "4096x2160p@30Hz",
472 .pixclock = 297000000,
479 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
483 .vic = HDMI_4096X2160P_30HZ,
486 .interface = OUT_P888,
490 .name = "3840x2160p@50Hz",
494 .pixclock = 594000000,
496 .right_margin = 1056,
501 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
505 .vic = HDMI_3840X2160P_50HZ,
506 .vic_2nd = HDMI_3840X2160P_50HZ_21_9,
508 .interface = OUT_P888,
512 .name = "3840x2160p@60Hz",
516 .pixclock = 594000000,
523 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
527 .vic = HDMI_3840X2160P_60HZ,
528 .vic_2nd = HDMI_3840X2160P_60HZ_21_9,
530 .interface = OUT_P888,
534 .name = "4096x2160p@50Hz",
538 .pixclock = 594000000,
545 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
549 .vic = HDMI_4096X2160P_50HZ,
552 .interface = OUT_P888,
556 .name = "4096x2160p@60Hz",
560 .pixclock = 594000000,
567 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
571 .vic = HDMI_4096X2160P_60HZ,
574 .interface = OUT_P888,
578 .name = "800x600p@60Hz",
582 .pixclock = 40000000,
589 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
593 .vic = HDMI_VIDEO_DMT | 1,
596 .interface = OUT_P888,
600 .name = "1024x768p@60Hz",
604 .pixclock = 65000000,
615 .vic = HDMI_VIDEO_DMT | 2,
618 .interface = OUT_P888,
622 .name = "1280x960p@60Hz",
626 .pixclock = 108000000,
633 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
637 .vic = HDMI_VIDEO_DMT | 3,
640 .interface = OUT_P888,
644 .name = "1280x1024p@60Hz",
648 .pixclock = 108000000,
655 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
659 .vic = HDMI_VIDEO_DMT | 4,
662 .interface = OUT_P888,
666 .name = "1360x768p@60Hz",
670 .pixclock = 85500000,
677 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
681 .vic = HDMI_VIDEO_DMT | 5,
684 .interface = OUT_P888,
688 .name = "1366x768p@60Hz",
692 .pixclock = 85500000,
699 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
703 .vic = HDMI_VIDEO_DMT | 6,
706 .interface = OUT_P888,
710 .name = "1440x900p@60Hz",
714 .pixclock = 106500000,
721 .sync = FB_SYNC_VERT_HIGH_ACT,
725 .vic = HDMI_VIDEO_DMT | 7,
728 .interface = OUT_P888,
732 .name = "1600x900p@60Hz",
736 .pixclock = 108000000,
743 .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
747 .vic = HDMI_VIDEO_DMT | 8,
750 .interface = OUT_P888,
754 .name = "1680x1050@60Hz",
758 .pixclock = 146250000,
765 .sync = FB_SYNC_VERT_HIGH_ACT,
769 .vic = HDMI_VIDEO_DMT | 9,
772 .interface = OUT_P888,
776 .name = "1440x1280@60Hz",
780 .pixclock = 148500000,
791 .vic = HDMI_VIDEO_DISCRETE_VR | 1,
794 .interface = OUT_P888,
799 .name = "2160x1200@75Hz",
803 .pixclock = 245000000,
814 .vic = HDMI_VIDEO_DISCRETE_VR | 3,
817 .interface = OUT_P888,
822 .name = "2880x1440@75Hz",
826 .pixclock = 340000000,
837 .vic = HDMI_VIDEO_DISCRETE_VR | 4,
840 .interface = OUT_P888,
845 .name = "1440x2560@60Hz",
849 .pixclock = 268500000,
860 .vic = HDMI_VIDEO_DISCRETE_VR | 5,
863 .interface = OUT_P888,
867 static int hdmi_set_info(struct rk_screen *screen, struct hdmi *hdmi)
870 struct fb_videomode *mode;
872 if (!screen || !hdmi)
873 return HDMI_ERROR_FALSE;
876 hdmi->vic = hdmi->property->defaultmode;
878 if ((hdmi->vic & HDMI_VIDEO_DMT) || (hdmi->vic & HDMI_VIDEO_DISCRETE_VR))
881 vic = hdmi->vic & HDMI_VIC_MASK;
882 for (i = 0; i < ARRAY_SIZE(hdmi_mode); i++) {
883 if (hdmi_mode[i].vic == vic ||
884 hdmi_mode[i].vic_2nd == vic)
887 if (i == ARRAY_SIZE(hdmi_mode))
888 return HDMI_ERROR_FALSE;
890 memset(screen, 0, sizeof(struct rk_screen));
892 /* screen type & face */
893 screen->type = SCREEN_HDMI;
894 if (hdmi->video.color_input == HDMI_COLOR_RGB_0_255)
895 screen->color_mode = COLOR_RGB;
897 screen->color_mode = COLOR_YCBCR;
898 if (hdmi->vic & HDMI_VIDEO_YUV420) {
899 if (hdmi->video.color_output_depth == 10)
900 screen->face = OUT_YUV_420_10BIT;
902 screen->face = OUT_YUV_420;
904 if (hdmi->video.color_output_depth == 10)
905 screen->face = OUT_P101010;
907 screen->face = hdmi_mode[i].interface;
909 screen->pixelrepeat = hdmi_mode[i].pixelrepeat - 1;
910 mode = (struct fb_videomode *)&hdmi_mode[i].mode;
912 screen->mode = *mode;
913 if (hdmi->video.format_3d == HDMI_3D_FRAME_PACKING) {
914 screen->mode.pixclock = 2 * mode->pixclock;
915 if (mode->vmode == 0) {
916 screen->mode.yres = 2 * mode->yres +
921 screen->mode.yres = 2 * mode->yres +
922 3 * (mode->upper_margin +
924 mode->vsync_len) + 2;
925 screen->mode.vmode = 0;
929 if (FB_SYNC_HOR_HIGH_ACT & mode->sync)
930 screen->pin_hsync = 1;
932 screen->pin_hsync = 0;
933 if (FB_SYNC_VERT_HIGH_ACT & mode->sync)
934 screen->pin_vsync = 1;
936 screen->pin_vsync = 0;
939 screen->pin_dclk = 1;
942 if (hdmi->soctype > HDMI_SOC_RK312X &&
943 screen->color_mode > COLOR_RGB &&
944 (screen->face == OUT_P888 ||
945 screen->face == OUT_P101010))
951 screen->swap_delta = 0;
952 screen->swap_dumy = 0;
954 /* Operation function*/
956 screen->standby = NULL;
958 screen->overscan.left = hdmi->xscale;
959 screen->overscan.top = hdmi->yscale;
960 screen->overscan.right = hdmi->xscale;
961 screen->overscan.bottom = hdmi->yscale;
966 * hdmi_find_best_mode: find the video mode nearest to input vic
971 * If vic is zero, return the high resolution video mode vic.
973 int hdmi_find_best_mode(struct hdmi *hdmi, int vic)
975 struct list_head *pos, *head = &hdmi->edid.modelist;
976 struct display_modelist *modelist = NULL;
980 list_for_each(pos, head) {
983 struct display_modelist, list);
984 if (modelist->vic == vic) {
990 if ((!vic || !found) && head->next != head) {
991 /* If parse edid error, we select default mode; */
992 if (hdmi->edid.specs &&
993 hdmi->edid.specs->modedb_len)
994 modelist = list_entry(head->next,
995 struct display_modelist, list);
997 return hdmi->property->defaultmode;
1001 return modelist->vic;
1007 * hdmi_set_lcdc: switch lcdc mode to required video mode
1013 int hdmi_set_lcdc(struct hdmi *hdmi)
1016 struct rk_screen screen;
1018 rc = hdmi_set_info(&screen, hdmi);
1020 rk_fb_switch_screen(&screen, 1, hdmi->lcdc->id);
1025 * hdmi_videomode_compare - compare 2 videomodes
1026 * @mode1: first videomode
1027 * @mode2: second videomode
1030 * 1 if mode1 > mode2, 0 if mode1 = mode2, -1 mode1 < mode2
1032 static int hdmi_videomode_compare(const struct fb_videomode *mode1,
1033 const struct fb_videomode *mode2)
1035 if (mode1->xres > mode2->xres)
1038 if (mode1->xres == mode2->xres) {
1039 if (mode1->yres > mode2->yres)
1041 if (mode1->yres == mode2->yres) {
1042 if (mode1->vmode < mode2->vmode)
1044 if (mode1->pixclock > mode2->pixclock)
1046 if (mode1->pixclock == mode2->pixclock) {
1047 if (mode1->refresh > mode2->refresh)
1049 if (mode1->refresh == mode2->refresh) {
1050 if (mode2->flag > mode1->flag)
1052 if (mode2->flag < mode1->flag)
1054 if (mode2->vmode > mode1->vmode)
1056 if (mode2->vmode == mode1->vmode)
1066 * hdmi_add_vic - add entry to modelist according vic
1067 * @vic: vic to be added
1068 * @head: struct list_head of modelist
1071 * Will only add unmatched mode entries
1073 int hdmi_add_vic(int vic, struct list_head *head)
1075 struct list_head *pos;
1076 struct display_modelist *modelist;
1079 /*pr_info("%s vic %d\n", __FUNCTION__, vic);*/
1083 list_for_each(pos, head) {
1084 modelist = list_entry(pos, struct display_modelist, list);
1092 modelist = kmalloc(sizeof(*modelist),
1097 memset(modelist, 0, sizeof(struct display_modelist));
1098 modelist->vic = vic;
1099 list_add_tail(&modelist->list, head);
1105 * hdmi_add_videomode: adds videomode entry to modelist
1106 * @mode: videomode to be added
1107 * @head: struct list_head of modelist
1110 * Will only add unmatched mode entries
1112 static int hdmi_add_videomode(const struct fb_videomode *mode,
1113 struct list_head *head)
1115 struct list_head *pos;
1116 struct display_modelist *modelist, *modelist_new;
1117 struct fb_videomode *m;
1120 for (i = 0; i < ARRAY_SIZE(hdmi_mode); i++) {
1121 m = (struct fb_videomode *)&hdmi_mode[i].mode;
1122 if (fb_mode_is_equal(m, mode)) {
1129 list_for_each(pos, head) {
1130 modelist = list_entry(pos,
1131 struct display_modelist, list);
1132 m = &modelist->mode;
1133 if (fb_mode_is_equal(m, mode))
1135 else if (hdmi_videomode_compare(m, mode) == -1)
1139 modelist_new = kmalloc(sizeof(*modelist_new), GFP_KERNEL);
1142 memset(modelist_new, 0, sizeof(struct display_modelist));
1143 modelist_new->mode = hdmi_mode[i].mode;
1144 modelist_new->vic = hdmi_mode[i].vic;
1145 list_add_tail(&modelist_new->list, pos);
1152 * hdmi_sort_modelist: sort modelist of edid
1153 * @edid: edid to be sort
1155 static void hdmi_sort_modelist(struct hdmi_edid *edid, int feature)
1157 struct list_head *pos, *pos_new;
1158 struct list_head head_new, *head = &edid->modelist;
1159 struct display_modelist *modelist, *modelist_new, *modelist_n;
1160 struct fb_videomode *m, *m_new;
1161 int i, compare, vic;
1163 INIT_LIST_HEAD(&head_new);
1164 list_for_each(pos, head) {
1165 modelist = list_entry(pos, struct display_modelist, list);
1166 /*pr_info("%s vic %d\n", __function__, modelist->vic);*/
1167 for (i = 0; i < ARRAY_SIZE(hdmi_mode); i++) {
1168 if ((modelist->vic & HDMI_VIDEO_DMT) || (modelist->vic & HDMI_VIDEO_DISCRETE_VR)) {
1169 if (feature & (SUPPORT_VESA_DMT | SUPPORT_RK_DISCRETE_VR))
1170 vic = modelist->vic;
1174 vic = modelist->vic & HDMI_VIC_MASK;
1176 if (vic == hdmi_mode[i].vic ||
1177 vic == hdmi_mode[i].vic_2nd) {
1178 if ((feature & SUPPORT_4K) == 0 &&
1179 hdmi_mode[i].mode.xres >= 3840)
1181 if ((feature & SUPPORT_4K_4096) == 0 &&
1182 hdmi_mode[i].mode.xres == 4096)
1184 if ((feature & SUPPORT_TMDS_600M) == 0 &&
1185 !(modelist->vic & HDMI_VIDEO_YUV420) &&
1186 hdmi_mode[i].mode.pixclock > 340000000)
1188 if ((modelist->vic & HDMI_VIDEO_YUV420) &&
1189 (feature & SUPPORT_YUV420) == 0)
1191 if ((feature & SUPPORT_1080I) == 0 &&
1192 hdmi_mode[i].mode.xres == 1920 &&
1193 (hdmi_mode[i].mode.vmode &
1194 FB_VMODE_INTERLACED))
1196 if ((feature & SUPPORT_480I_576I) == 0 &&
1197 hdmi_mode[i].mode.xres == 720 &&
1198 hdmi_mode[i].mode.vmode &
1199 FB_VMODE_INTERLACED)
1201 modelist->mode = hdmi_mode[i].mode;
1202 if (modelist->vic & HDMI_VIDEO_YUV420)
1203 modelist->mode.flag = 1;
1206 m = (struct fb_videomode *)&modelist->mode;
1207 list_for_each(pos_new, &head_new) {
1210 struct display_modelist,
1212 m_new = &modelist_new->mode;
1214 hdmi_videomode_compare(m, m_new);
1220 kmalloc(sizeof(*modelist_n),
1224 *modelist_n = *modelist;
1225 list_add_tail(&modelist_n->list,
1232 fb_destroy_modelist(head);
1233 if (head_new.next == &head_new) {
1234 pr_info("There is no available video mode in EDID.\n");
1235 INIT_LIST_HEAD(&edid->modelist);
1237 edid->modelist = head_new;
1238 edid->modelist.prev->next = &edid->modelist;
1239 edid->modelist.next->prev = &edid->modelist;
1244 * hdmi_ouputmode_select - select hdmi transmitter output mode: hdmi or dvi?
1245 * @hdmi: handle of hdmi
1246 * @edid_ok: get EDID data success or not, HDMI_ERROR_SUCCESS means success.
1248 int hdmi_ouputmode_select(struct hdmi *hdmi, int edid_ok)
1250 struct list_head *head = &hdmi->edid.modelist;
1251 struct fb_monspecs *specs = hdmi->edid.specs;
1252 struct fb_videomode *modedb = NULL, *mode = NULL;
1253 int i, pixclock, feature = hdmi->property->feature;
1255 if (edid_ok != HDMI_ERROR_SUCCESS) {
1256 dev_err(hdmi->dev, "warning: EDID error, assume sink as HDMI !!!!");
1257 hdmi->edid.status = -1;
1258 hdmi->edid.sink_hdmi = 1;
1259 hdmi->edid.baseaudio_support = 1;
1260 hdmi->edid.ycbcr444 = 0;
1261 hdmi->edid.ycbcr422 = 0;
1264 if (head->next == head) {
1266 "warning: no CEA video mode parsed from EDID !!!!\n");
1267 /* If EDID get error, list all system supported mode.
1268 * If output mode is set to DVI and EDID is ok, check
1269 * the output timing.
1271 if (hdmi->edid.sink_hdmi == 0 && specs && specs->modedb_len) {
1272 /* Get max resolution timing */
1273 modedb = &specs->modedb[0];
1274 for (i = 0; i < specs->modedb_len; i++) {
1275 if (specs->modedb[i].xres > modedb->xres)
1276 modedb = &specs->modedb[i];
1277 else if (specs->modedb[i].xres ==
1279 specs->modedb[i].yres > modedb->yres)
1280 modedb = &specs->modedb[i];
1282 /* For some monitor, the max pixclock read from EDID
1283 * is smaller than the clock of max resolution mode
1284 * supported. We fix it.
1286 pixclock = PICOS2KHZ(modedb->pixclock);
1290 if (pixclock == 148250000)
1291 pixclock = 148500000;
1292 if (pixclock > specs->dclkmax)
1293 specs->dclkmax = pixclock;
1296 for (i = 0; i < ARRAY_SIZE(hdmi_mode); i++) {
1297 mode = (struct fb_videomode *)&hdmi_mode[i].mode;
1299 if ((mode->pixclock < specs->dclkmin) ||
1300 (mode->pixclock > specs->dclkmax) ||
1301 (mode->refresh < specs->vfmin) ||
1302 (mode->refresh > specs->vfmax) ||
1303 (mode->xres > modedb->xres) ||
1304 (mode->yres > modedb->yres))
1307 /* If there is no valid information in EDID,
1308 * just list common hdmi foramt.
1310 if (mode->xres > 3840 ||
1311 mode->refresh < 50 ||
1312 (mode->vmode & FB_VMODE_INTERLACED) ||
1313 hdmi_mode[i].vic & HDMI_VIDEO_DMT ||
1314 hdmi_mode[i].vic & HDMI_VIDEO_DISCRETE_VR)
1317 if ((feature & SUPPORT_TMDS_600M) == 0 &&
1318 mode->pixclock > 340000000)
1320 if ((feature & SUPPORT_4K) == 0 &&
1323 if ((feature & SUPPORT_4K_4096) == 0 &&
1326 if ((feature & SUPPORT_1080I) == 0 &&
1327 mode->xres == 1920 &&
1328 (mode->vmode & FB_VMODE_INTERLACED))
1330 if ((feature & SUPPORT_480I_576I) == 0 &&
1331 mode->xres == 720 &&
1332 (mode->vmode & FB_VMODE_INTERLACED))
1334 hdmi_add_videomode(mode, head);
1337 /* There are some video mode is not defined in EDID extend
1338 * block, so we need to check first block data.
1340 if (specs && specs->modedb_len) {
1341 for (i = 0; i < specs->modedb_len; i++) {
1342 modedb = &specs->modedb[i];
1343 pixclock = hdmi_videomode_to_vic(modedb);
1345 hdmi_add_vic(pixclock, head);
1348 hdmi_sort_modelist(&hdmi->edid, hdmi->property->feature);
1351 return HDMI_ERROR_SUCCESS;
1355 * hdmi_videomode_to_vic: transverse video mode to vic
1356 * @vmode: videomode to transverse
1359 int hdmi_videomode_to_vic(struct fb_videomode *vmode)
1361 struct fb_videomode *mode;
1362 unsigned int vic = 0;
1365 for (i = 0; i < ARRAY_SIZE(hdmi_mode); i++) {
1366 mode = (struct fb_videomode *)&hdmi_mode[i].mode;
1367 if (vmode->vmode == mode->vmode &&
1368 vmode->refresh == mode->refresh &&
1369 vmode->xres == mode->xres &&
1370 vmode->yres == mode->yres &&
1371 vmode->left_margin == mode->left_margin &&
1372 vmode->right_margin == mode->right_margin &&
1373 vmode->upper_margin == mode->upper_margin &&
1374 vmode->lower_margin == mode->lower_margin &&
1375 vmode->hsync_len == mode->hsync_len &&
1376 vmode->vsync_len == mode->vsync_len) {
1377 vic = hdmi_mode[i].vic;
1385 * hdmi_vic2timing: transverse vic mode to video timing
1386 * @vmode: vic to transverse
1389 const struct hdmi_video_timing *hdmi_vic2timing(int vic)
1396 for (i = 0; i < ARRAY_SIZE(hdmi_mode); i++) {
1397 if (hdmi_mode[i].vic == vic || hdmi_mode[i].vic_2nd == vic)
1398 return &hdmi_mode[i];
1404 * hdmi_vic_to_videomode: transverse vic mode to video mode
1405 * @vmode: vic to transverse
1408 const struct fb_videomode *hdmi_vic_to_videomode(int vic)
1414 else if ((vic & HDMI_VIDEO_DMT) || (vic & HDMI_VIDEO_DISCRETE_VR))
1417 vid = vic & HDMI_VIC_MASK;
1418 for (i = 0; i < ARRAY_SIZE(hdmi_mode); i++) {
1419 if (hdmi_mode[i].vic == vid ||
1420 hdmi_mode[i].vic_2nd == vid)
1421 return &hdmi_mode[i].mode;
1427 * hdmi_init_modelist: initial hdmi mode list
1433 void hdmi_init_modelist(struct hdmi *hdmi)
1436 struct list_head *head = &hdmi->edid.modelist;
1438 feature = hdmi->property->feature;
1439 INIT_LIST_HEAD(&hdmi->edid.modelist);
1440 for (i = 0; i < ARRAY_SIZE(hdmi_mode); i++) {
1441 if ((hdmi_mode[i].vic & HDMI_VIDEO_DMT) || (hdmi_mode[i].vic & HDMI_VIDEO_DISCRETE_VR))
1443 if ((feature & SUPPORT_TMDS_600M) == 0 &&
1444 hdmi_mode[i].mode.pixclock > 340000000)
1446 if ((feature & SUPPORT_4K) == 0 &&
1447 hdmi_mode[i].mode.xres >= 3840)
1449 if ((feature & SUPPORT_4K_4096) == 0 &&
1450 hdmi_mode[i].mode.xres == 4096)
1452 if ((feature & SUPPORT_1080I) == 0 &&
1453 hdmi_mode[i].mode.xres == 1920 &&
1454 (hdmi_mode[i].mode.vmode & FB_VMODE_INTERLACED))
1456 if ((feature & SUPPORT_480I_576I) == 0 &&
1457 hdmi_mode[i].mode.xres == 720 &&
1458 (hdmi_mode[i].mode.vmode & FB_VMODE_INTERLACED))
1460 hdmi_add_videomode(&hdmi_mode[i].mode, head);