drivers/video/rockchip/hdmi/rockchip-hdmi-edid.c

   1 #include "rockchip-hdmi.h"
   2 #include "../../edid.h"
   3
   4 #ifdef EDIDDEBUG
   5 #define EDBG    DBG
   6 #else
   7 #define EDBG(format, ...)
   8 #endif
   9
  10 enum {
  11         E_HDMI_EDID_SUCCESS = 0,
  12         E_HDMI_EDID_PARAM,
  13         E_HDMI_EDID_HEAD,
  14         E_HDMI_EDID_CHECKSUM,
  15         E_HDMI_EDID_VERSION,
  16         E_HDMI_EDID_UNKOWNDATA,
  17         E_HDMI_EDID_NOMEMORY
  18 };
  19
  20 static int hdmi_edid_checksum(unsigned char *buf)
  21 {
  22         int i;
  23         int checksum = 0;
  24
  25         for (i = 0; i < HDMI_EDID_BLOCK_SIZE; i++)
  26                 checksum += buf[i];
  27
  28         checksum &= 0xff;
  29
  30         if (checksum == 0)
  31                 return E_HDMI_EDID_SUCCESS;
  32         else
  33                 return E_HDMI_EDID_CHECKSUM;
  34 }
  35
  36 /*
  37  *      @Des    Parse Detail Timing Descriptor.
  38  *      @Param  buf     :       pointer to DTD data.
  39  *      @Param  pvic:   VIC of DTD descripted.
  40  */
  41 static int hdmi_edid_parse_dtd(unsigned char *block, struct fb_videomode *mode)
  42 {
  43         mode->xres = H_ACTIVE;
  44         mode->yres = V_ACTIVE;
  45         mode->pixclock = PIXEL_CLOCK;
  46         mode->right_margin = H_SYNC_OFFSET;
  47         mode->left_margin = (H_ACTIVE + H_BLANKING) -
  48                 (H_ACTIVE + H_SYNC_OFFSET + H_SYNC_WIDTH);
  49         mode->upper_margin = V_BLANKING - V_SYNC_OFFSET -
  50                 V_SYNC_WIDTH;
  51         mode->lower_margin = V_SYNC_OFFSET;
  52         mode->hsync_len = H_SYNC_WIDTH;
  53         mode->vsync_len = V_SYNC_WIDTH;
  54         if (HSYNC_POSITIVE)
  55                 mode->sync |= FB_SYNC_HOR_HIGH_ACT;
  56         if (VSYNC_POSITIVE)
  57                 mode->sync |= FB_SYNC_VERT_HIGH_ACT;
  58         mode->refresh = PIXEL_CLOCK/((H_ACTIVE + H_BLANKING) *
  59                                      (V_ACTIVE + V_BLANKING));
  60         if (INTERLACED) {
  61                 mode->yres *= 2;
  62                 mode->upper_margin *= 2;
  63                 mode->lower_margin *= 2;
  64                 mode->vsync_len *= 2;
  65                 mode->vmode |= FB_VMODE_INTERLACED;
  66         }
  67         mode->flag = FB_MODE_IS_DETAILED;
  68
  69         EDBG("<<<<<<<<Detailed Time>>>>>>>>>\n");
  70         EDBG("%d KHz Refresh %d Hz",
  71              PIXEL_CLOCK/1000, mode->refresh);
  72         EDBG("%d %d %d %d ", H_ACTIVE, H_ACTIVE + H_SYNC_OFFSET,
  73              H_ACTIVE + H_SYNC_OFFSET + H_SYNC_WIDTH, H_ACTIVE + H_BLANKING);
  74         EDBG("%d %d %d %d ", V_ACTIVE, V_ACTIVE + V_SYNC_OFFSET,
  75              V_ACTIVE + V_SYNC_OFFSET + V_SYNC_WIDTH, V_ACTIVE + V_BLANKING);
  76         EDBG("%sHSync %sVSync\n\n", (HSYNC_POSITIVE) ? "+" : "-",
  77              (VSYNC_POSITIVE) ? "+" : "-");
  78         return E_HDMI_EDID_SUCCESS;
  79 }
  80
  81 int hdmi_edid_parse_base(unsigned char *buf,
  82                          int *extend_num, struct hdmi_edid *pedid)
  83 {
  84         int rc = E_HDMI_EDID_SUCCESS;
  85
  86         if (buf == NULL || extend_num == NULL)
  87                 return E_HDMI_EDID_PARAM;
  88
  89         *extend_num = buf[0x7e];
  90         #ifdef DEBUG
  91         EDBG("[EDID] extend block num is %d\n", buf[0x7e]);
  92         #endif
  93
  94         /* Check first 8 byte to ensure it is an edid base block. */
  95         if (buf[0] != 0x00 ||
  96             buf[1] != 0xFF ||
  97             buf[2] != 0xFF ||
  98             buf[3] != 0xFF ||
  99             buf[4] != 0xFF ||
 100             buf[5] != 0xFF ||
 101             buf[6] != 0xFF ||
 102             buf[7] != 0x00) {
 103                 pr_err("[EDID] check header error\n");
 104                 rc = E_HDMI_EDID_HEAD;
 105                 goto out;
 106         }
 107
 108         /* Checksum */
 109         rc = hdmi_edid_checksum(buf);
 110         if (rc != E_HDMI_EDID_SUCCESS) {
 111                 pr_err("[EDID] base block checksum error\n");
 112                 rc = E_HDMI_EDID_CHECKSUM;
 113                 goto out;
 114         }
 115
 116         pedid->specs = kzalloc(sizeof(*pedid->specs), GFP_KERNEL);
 117         if (pedid->specs == NULL)
 118                 return E_HDMI_EDID_NOMEMORY;
 119
 120         fb_edid_to_monspecs(buf, pedid->specs);
 121
 122 out:
 123         /* For some sink, edid checksum is failed because several
 124          * byte is wrong. To fix this case, we think it is a good
 125          * edid if 1 <= *extend_num <= 4.
 126          */
 127         if ((rc != E_HDMI_EDID_SUCCESS) &&
 128             (*extend_num < 1 || *extend_num > 4))
 129                 return rc;
 130         else
 131                 return E_HDMI_EDID_SUCCESS;
 132 }
 133
 134 /* Parse CEA Short Video Descriptor */
 135 static int hdmi_edid_get_cea_svd(unsigned char *buf, struct hdmi_edid *pedid)
 136 {
 137         int count, i, vic;
 138
 139         count = buf[0] & 0x1F;
 140         for (i = 0; i < count; i++) {
 141                 EDBG("[CEA] %02x VID %d native %d\n",
 142                      buf[1 + i], buf[1 + i] & 0x7f, buf[1 + i] >> 7);
 143                 vic = buf[1 + i] & 0x7f;
 144                 hdmi_add_vic(vic, &pedid->modelist);
 145         }
 146         return 0;
 147 }
 148
 149 /* Parse CEA Short Audio Descriptor */
 150 static int hdmi_edid_parse_cea_sad(unsigned char *buf, struct hdmi_edid *pedid)
 151 {
 152         int i, count;
 153
 154         count = buf[0] & 0x1F;
 155         pedid->audio = kmalloc((count/3)*sizeof(struct hdmi_audio), GFP_KERNEL);
 156         if (pedid->audio == NULL)
 157                 return E_HDMI_EDID_NOMEMORY;
 158
 159         pedid->audio_num = count/3;
 160         for (i = 0; i < pedid->audio_num; i++) {
 161                 pedid->audio[i].type = (buf[1 + i*3] >> 3) & 0x0F;
 162                 pedid->audio[i].channel = (buf[1 + i*3] & 0x07) + 1;
 163                 pedid->audio[i].rate = buf[1 + i*3 + 1];
 164                 if (pedid->audio[i].type == HDMI_AUDIO_LPCM)
 165                         pedid->audio[i].word_length = buf[1 + i*3 + 2];
 166         }
 167         return E_HDMI_EDID_SUCCESS;
 168 }
 169
 170 static int hdmi_edid_parse_3dinfo(unsigned char *buf, struct list_head *head)
 171 {
 172         int i, j, len = 0, format_3d, vic_mask;
 173         unsigned char offset = 2, vic_2d, structure_3d;
 174         struct list_head *pos;
 175         struct display_modelist *modelist;
 176
 177         if (buf[1] & 0xe0) {
 178                 len = (buf[1] & 0xe0) >> 5;
 179                 for (i = 0; i < len; i++) {
 180                         if (buf[offset]) {
 181                                 vic_2d = (buf[offset] == 4) ?
 182                                          98 : (96 - buf[offset]);
 183                                 hdmi_add_vic(vic_2d, head);
 184                         }
 185                         offset++;
 186                 }
 187         }
 188
 189         if (buf[0] & 0x80) {
 190                 /* 3d supported */
 191                 len += (buf[1] & 0x1F) + 2;
 192                 if (((buf[0] & 0x60) == 0x40) || ((buf[0] & 0x60) == 0x20)) {
 193                         format_3d = buf[offset++] << 8;
 194                         format_3d |= buf[offset++];
 195                         if ((buf[0] & 0x60) == 0x20) {
 196                                 vic_mask = 0xFFFF;
 197                         } else {
 198                                 vic_mask  = buf[offset++] << 8;
 199                                 vic_mask |= buf[offset++];
 200                         }
 201                 } else {
 202                         format_3d = 0;
 203                         vic_mask = 0;
 204                 }
 205
 206                 for (i = 0; i < 16; i++) {
 207                         if (vic_mask & (1 << i)) {
 208                                 j = 0;
 209                                 for (pos = (head)->next; pos != (head);
 210                                         pos = pos->next) {
 211                                         if (j++ == i) {
 212                                                 modelist =
 213                         list_entry(pos, struct display_modelist, list);
 214                                                 modelist->format_3d = format_3d;
 215                                                 break;
 216                                         }
 217                                 }
 218                         }
 219                 }
 220                 while (offset < len) {
 221                         vic_2d = (buf[offset] & 0xF0) >> 4;
 222                         structure_3d = (buf[offset++] & 0x0F);
 223                         j = 0;
 224                         for (pos = (head)->next; pos != (head);
 225                                 pos = pos->next) {
 226                                 j++;
 227                                 if (j == vic_2d) {
 228                                         modelist =
 229                                 list_entry(pos, struct display_modelist, list);
 230                                         modelist->format_3d |=
 231                                                 (1 << structure_3d);
 232                                         if (structure_3d & 0x08)
 233                                                 modelist->detail_3d =
 234                                                 (buf[offset++] & 0xF0) >> 4;
 235                                         break;
 236                                 }
 237                         }
 238                 }
 239                 /* mandatory formats */
 240                 for (pos = (head)->next; pos != (head); pos = pos->next) {
 241                         modelist = list_entry(pos,
 242                                               struct display_modelist,
 243                                               list);
 244                         if (modelist->vic == HDMI_1920X1080P_24HZ ||
 245                             modelist->vic == HDMI_1280X720P_60HZ ||
 246                             modelist->vic == HDMI_1280X720P_50HZ) {
 247                                 modelist->format_3d |=
 248                                         (1 << HDMI_3D_FRAME_PACKING) |
 249                                         (1 << HDMI_3D_TOP_BOOTOM);
 250                         } else if (modelist->vic == HDMI_1920X1080I_60HZ ||
 251                                    modelist->vic == HDMI_1920X1080I_50HZ) {
 252                                 modelist->format_3d |=
 253                                         (1 << HDMI_3D_SIDE_BY_SIDE_HALF);
 254                         }
 255                 }
 256         }
 257
 258         return 0;
 259 }
 260 static int hdmi_edmi_parse_vsdb(unsigned char *buf, struct hdmi_edid *pedid,
 261                                 int cur_offset, int IEEEOUI)
 262 {
 263         int count, buf_offset;
 264
 265         count = buf[cur_offset] & 0x1F;
 266         switch (IEEEOUI) {
 267         case 0x0c03:
 268                 pedid->sink_hdmi = 1;
 269                 pedid->cecaddress = buf[cur_offset + 5];
 270                 pedid->cecaddress |= buf[cur_offset + 4] << 8;
 271                 EDBG("[CEA] CEC Physical addres is 0x%08x.\n",
 272                      pedid->cecaddress);
 273                 if (count > 6)
 274                         pedid->deepcolor = (buf[cur_offset + 6] >> 3) & 0x0F;
 275                 if (count > 7) {
 276                         pedid->maxtmdsclock = buf[cur_offset + 7] * 5000000;
 277                         EDBG("[CEA] maxtmdsclock is %d.\n",
 278                              pedid->maxtmdsclock);
 279                 }
 280                 if (count > 8) {
 281                         pedid->fields_present = buf[cur_offset + 8];
 282                         EDBG("[CEA] fields_present is 0x%02x.\n",
 283                              pedid->fields_present);
 284                 }
 285                 buf_offset = cur_offset + 9;
 286                 if (pedid->fields_present & 0x80) {
 287                         pedid->video_latency = buf[buf_offset++];
 288                         pedid->audio_latency = buf[buf_offset++];
 289                 }
 290                 if (pedid->fields_present & 0x40) {
 291                         pedid->interlaced_video_latency = buf[buf_offset++];
 292                         pedid->interlaced_audio_latency = buf[buf_offset++];
 293                 }
 294                 if (pedid->fields_present & 0x20) {
 295                         hdmi_edid_parse_3dinfo(buf + buf_offset,
 296                                                &pedid->modelist);
 297                 }
 298                 break;
 299         case 0xc45dd8:
 300                 pedid->sink_hdmi = 1;
 301                 pedid->hf_vsdb_version = buf[cur_offset + 4];
 302                 switch (pedid->hf_vsdb_version) {
 303                 case 1:/*compliant with HDMI Specification 2.0*/
 304                         pedid->maxtmdsclock =
 305                                 buf[cur_offset + 5] * 5000000;
 306                         EDBG("[CEA] maxtmdsclock is %d.\n",
 307                              pedid->maxtmdsclock);
 308                         pedid->scdc_present = buf[cur_offset+6] >> 7;
 309                         pedid->rr_capable =
 310                                 (buf[cur_offset+6]&0x40) >> 6;
 311                         pedid->lte_340mcsc_scramble =
 312                                 (buf[cur_offset+6]&0x08) >> 3;
 313                         pedid->independent_view =
 314                                 (buf[cur_offset+6]&0x04) >> 2;
 315                         pedid->dual_view =
 316                                 (buf[cur_offset+6]&0x02) >> 1;
 317                         pedid->osd_disparity_3d =
 318                                 buf[cur_offset+6] & 0x01;
 319                         pedid->deepcolor_420 =
 320                                 (buf[cur_offset+7] & 0x7) << 1;
 321                         break;
 322                 default:
 323                         pr_info("hf_vsdb_version = %d\n",
 324                                 pedid->hf_vsdb_version);
 325                         break;
 326                 }
 327                 break;
 328         default:
 329                 pr_info("IEEOUT = 0x%x\n", IEEEOUI);
 330                 break;
 331         }
 332         return 0;
 333 }
 334
 335 static void hdmi_edid_parse_yuv420cmdb(unsigned char *buf, int count,
 336                                        struct list_head *head)
 337 {
 338         struct list_head *pos;
 339         struct display_modelist *modelist;
 340         int i, j, yuv420_mask, vic;
 341
 342         for (i = 0; i < count - 1; i++) {
 343                 EDBG("vic which support yuv420 mode is %x\n", buf[i]);
 344                 yuv420_mask |= buf[i] << (8 * i);
 345         }
 346         for (i = 0; i < 32; i++) {
 347                 if (yuv420_mask & (1 << i)) {
 348                         j = 0;
 349                         for (pos = head->next; pos != (head); pos = pos->next) {
 350                                 if (j++ == i) {
 351                                         modelist =
 352                                 list_entry(pos, struct display_modelist, list);
 353                                         vic = modelist->vic |
 354                                               HDMI_VIDEO_YUV420;
 355                                         hdmi_add_vic(vic, head);
 356                                         break;
 357                                 }
 358                         }
 359                 }
 360         }
 361 }
 362
 363 /* Parse CEA 861 Serial Extension. */
 364 static int hdmi_edid_parse_extensions_cea(unsigned char *buf,
 365                                           struct hdmi_edid *pedid)
 366 {
 367         unsigned int ddc_offset, native_dtd_num, cur_offset = 4;
 368         unsigned int tag, IEEEOUI = 0, count, i;
 369
 370         if (buf == NULL)
 371                 return E_HDMI_EDID_PARAM;
 372
 373         /* Check ces extension version */
 374         if (buf[1] != 3) {
 375                 pr_err("[CEA] error version.\n");
 376                 return E_HDMI_EDID_VERSION;
 377         }
 378
 379         ddc_offset = buf[2];
 380         pedid->baseaudio_support = (buf[3] >> 6) & 0x01;
 381         pedid->ycbcr444 = (buf[3] >> 5) & 0x01;
 382         pedid->ycbcr422 = (buf[3] >> 4) & 0x01;
 383         native_dtd_num = buf[3] & 0x0F;
 384         /* Parse data block */
 385         while (cur_offset < ddc_offset) {
 386                 tag = buf[cur_offset] >> 5;
 387                 count = buf[cur_offset] & 0x1F;
 388                 switch (tag) {
 389                 case 0x02:      /* Video Data Block */
 390                         EDBG("[CEA] Video Data Block.\n");
 391                         hdmi_edid_get_cea_svd(buf + cur_offset, pedid);
 392                         break;
 393                 case 0x01:      /* Audio Data Block */
 394                         EDBG("[CEA] Audio Data Block.\n");
 395                         hdmi_edid_parse_cea_sad(buf + cur_offset, pedid);
 396                         break;
 397                 case 0x04:      /* Speaker Allocation Data Block */
 398                         EDBG("[CEA] Speaker Allocatio Data Block.\n");
 399                         break;
 400                 case 0x03:      /* Vendor Specific Data Block */
 401                         EDBG("[CEA] Vendor Specific Data Block.\n");
 402
 403                         IEEEOUI = buf[cur_offset + 3];
 404                         IEEEOUI <<= 8;
 405                         IEEEOUI += buf[cur_offset + 2];
 406                         IEEEOUI <<= 8;
 407                         IEEEOUI += buf[cur_offset + 1];
 408                         EDBG("[CEA] IEEEOUI is 0x%08x.\n", IEEEOUI);
 409
 410                         hdmi_edmi_parse_vsdb(buf, pedid,
 411                                              cur_offset, IEEEOUI);
 412                         break;
 413                 case 0x05:      /* VESA DTC Data Block */
 414                         EDBG("[CEA] VESA DTC Data Block.\n");
 415                         break;
 416                 case 0x07:      /* Use Extended Tag */
 417                         EDBG("[CEA] Use Extended Tag Data Block %02x.\n",
 418                              buf[cur_offset + 1]);
 419                         switch (buf[cur_offset + 1]) {
 420                         case 0x00:
 421                                 EDBG("[CEA] Video Capability Data Block\n");
 422                                 EDBG("value is %02x\n", buf[cur_offset + 2]);
 423                                 break;
 424                         case 0x05:
 425                                 EDBG("[CEA] Colorimetry Data Block\n");
 426                                 EDBG("value is %02x\n", buf[cur_offset + 2]);
 427                                 pedid->colorimetry = buf[cur_offset + 2];
 428                                 break;
 429                         case 0x0e:
 430                                 EDBG("[CEA] YCBCR 4:2:0 Video Data Block\n");
 431                                 for (i = 0; i < count - 1; i++) {
 432                                         EDBG("mode is %d\n",
 433                                              buf[cur_offset + 2 + i]);
 434                                         pedid->ycbcr420 = 1;
 435                                         IEEEOUI = buf[cur_offset + 2 + i] |
 436                                                   HDMI_VIDEO_YUV420;
 437                                         hdmi_add_vic(IEEEOUI,
 438                                                      &pedid->modelist);
 439                                 }
 440                                 break;
 441                         case 0x0f:
 442                                 EDBG("[CEA] YCBCR 4:2:0 Capability Map Data\n");
 443                                 hdmi_edid_parse_yuv420cmdb(&buf[cur_offset+2],
 444                                                            count,
 445                                                            &pedid->modelist);
 446                                 pedid->ycbcr420 = 1;
 447                                 break;
 448                         }
 449                         break;
 450                 default:
 451                         pr_err("[CEA] unkowned data block tag.\n");
 452                         break;
 453                 }
 454                 cur_offset += (buf[cur_offset] & 0x1F) + 1;
 455         }
 456 #if 1
 457 {
 458         /* Parse DTD */
 459         struct fb_videomode *vmode =
 460                 kmalloc(sizeof(struct fb_videomode), GFP_KERNEL);
 461
 462         if (vmode == NULL)
 463                 return E_HDMI_EDID_SUCCESS;
 464         while (ddc_offset < HDMI_EDID_BLOCK_SIZE - 2) {
 465                 if (!buf[ddc_offset] && !buf[ddc_offset + 1])
 466                         break;
 467                 memset(vmode, 0, sizeof(struct fb_videomode));
 468                 hdmi_edid_parse_dtd(buf + ddc_offset, vmode);
 469                 hdmi_add_vic(hdmi_videomode_to_vic(vmode), &pedid->modelist);
 470                 ddc_offset += 18;
 471         }
 472         kfree(vmode);
 473 }
 474 #endif
 475         return E_HDMI_EDID_SUCCESS;
 476 }
 477
 478 int hdmi_edid_parse_extensions(unsigned char *buf, struct hdmi_edid *pedid)
 479 {
 480         int rc;
 481
 482         if (buf == NULL || pedid == NULL)
 483                 return E_HDMI_EDID_PARAM;
 484
 485         /* Checksum */
 486         rc = hdmi_edid_checksum(buf);
 487         if (rc != E_HDMI_EDID_SUCCESS) {
 488                 pr_err("[EDID] extensions block checksum error\n");
 489                 return E_HDMI_EDID_CHECKSUM;
 490         }
 491
 492         switch (buf[0]) {
 493         case 0xF0:
 494                 EDBG("[EDID-EXTEND] Iextensions block map.\n");
 495                 break;
 496         case 0x02:
 497                 EDBG("[EDID-EXTEND] CEA 861 Series Extension.\n");
 498                 hdmi_edid_parse_extensions_cea(buf, pedid);
 499                 break;
 500         case 0x10:
 501                 EDBG("[EDID-EXTEND] Video Timing Block Extension.\n");
 502                 break;
 503         case 0x40:
 504                 EDBG("[EDID-EXTEND] Display Information Extension.\n");
 505                 break;
 506         case 0x50:
 507                 EDBG("[EDID-EXTEND] Localized String Extension.\n");
 508                 break;
 509         case 0x60:
 510                 EDBG("[EDID-EXTEND] Digital Packet Video Link Extension.\n");
 511                 break;
 512         default:
 513                 pr_err("[EDID-EXTEND] Unkowned Extension.\n");
 514                 return E_HDMI_EDID_UNKOWNDATA;
 515         }
 516
 517         return E_HDMI_EDID_SUCCESS;
 518 }