drivers/video/rockchip/chips/rk30_lcdc.c

   1 /*
   2  * drivers/video/rockchip/chips/rk30_lcdc.c
   3  *
   4  * Copyright (C) 2012 ROCKCHIP, Inc.
   5  *Author:yzq<yzq@rock-chips.com>
   6  *      yxj<yxj@rock-chips.com>
   7  *This software is licensed under the terms of the GNU General Public
   8  * License version 2, as published by the Free Software Foundation, and
   9  * may be copied, distributed, and modified under those terms.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  */
  17
  18 #include <linux/module.h>
  19 #include <linux/kernel.h>
  20 #include <linux/errno.h>
  21 #include <linux/string.h>
  22 #include <linux/mm.h>
  23 #include <linux/slab.h>
  24 #include <linux/device.h>
  25 #include <linux/delay.h>
  26 #include <linux/init.h>
  27 #include <linux/interrupt.h>
  28 #include <linux/platform_device.h>
  29 #include <linux/clk.h>
  30 #include <linux/earlysuspend.h>
  31 #include <asm/div64.h>
  32 #include <asm/uaccess.h>
  33 #include "rk30_lcdc.h"
  34
  35
  36
  37
  38
  39
  40 static int dbg_thresd = 0;
  41 module_param(dbg_thresd, int, S_IRUGO|S_IWUSR);
  42 #define DBG(level,x...) do { if(unlikely(dbg_thresd > level)) printk(KERN_INFO x); } while (0)
  43
  44
  45 static int init_rk30_lcdc(struct rk_lcdc_device_driver *dev_drv)
  46 {
  47         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
  48         if(lcdc_dev->id == 0) //lcdc0
  49         {
  50                 lcdc_dev->pd = clk_get(NULL,"pd_lcdc0");
  51                 lcdc_dev->hclk = clk_get(NULL,"hclk_lcdc0");
  52                 lcdc_dev->aclk = clk_get(NULL,"aclk_lcdc0");
  53                 lcdc_dev->dclk = clk_get(NULL,"dclk_lcdc0");
  54         }
  55         else if(lcdc_dev->id == 1)
  56         {
  57                 lcdc_dev->pd = clk_get(NULL,"pd_lcdc1");
  58                 lcdc_dev->hclk = clk_get(NULL,"hclk_lcdc1");
  59                 lcdc_dev->aclk = clk_get(NULL,"aclk_lcdc1");
  60                 lcdc_dev->dclk = clk_get(NULL,"dclk_lcdc1");
  61         }
  62         else
  63         {
  64                 printk(KERN_ERR "invalid lcdc device!\n");
  65                 return -EINVAL;
  66         }
  67         if (IS_ERR(lcdc_dev->pd) || (IS_ERR(lcdc_dev->aclk)) ||(IS_ERR(lcdc_dev->dclk)) || (IS_ERR(lcdc_dev->hclk)))
  68         {
  69                 printk(KERN_ERR "failed to get lcdc%d clk source\n",lcdc_dev->id);
  70         }
  71         clk_enable(lcdc_dev->pd);
  72         clk_enable(lcdc_dev->hclk);  //enable aclk and hclk for register config
  73         clk_enable(lcdc_dev->aclk);
  74         lcdc_dev->clk_on = 1;
  75         LcdMskReg(lcdc_dev,SYS_CTRL0,m_HWC_CHANNEL_ID | m_WIN2_CHANNEL_ID | m_WIN1_CBR_CHANNEL_ID |
  76                 m_WIN1_YRGB_CHANNEL_ID | m_WIN0_CBR_CHANNEL1_ID | m_WIN0_YRGB_CHANNEL1_ID |
  77                 m_WIN0_CBR_CHANNEL0_ID | m_WIN0_YRGB_CHANNEL0_ID,v_HWC_CHANNEL_ID(7) |
  78                 v_WIN2_CHANNEL_ID(6) | v_WIN1_CBR_CHANNEL_ID(5) | v_WIN1_YRGB_CHANNEL_ID(4) |
  79                 v_WIN0_CBR_CHANNEL1_ID(3) | v_WIN0_YRGB_CHANNEL1_ID(2) | v_WIN0_CBR_CHANNEL0_ID(1) |
  80                 v_WIN0_YRGB_CHANNEL0_ID(0));                    //channel id ,just use default value
  81         LcdSetBit(lcdc_dev,DSP_CTRL0, m_LCDC_AXICLK_AUTO_ENABLE);//eanble axi-clk auto gating for low power
  82         LcdMskReg(lcdc_dev,INT_STATUS,m_FRM_START_INT_CLEAR | m_BUS_ERR_INT_CLEAR | m_LINE_FLAG_INT_EN |
  83               m_FRM_START_INT_EN | m_HOR_START_INT_EN,v_FRM_START_INT_CLEAR(1) | v_BUS_ERR_INT_CLEAR(0) |
  84               v_LINE_FLAG_INT_EN(0) | v_FRM_START_INT_EN(0) | v_HOR_START_INT_EN(0));  //enable frame start interrupt for sync
  85         LCDC_REG_CFG_DONE();  // write any value to  REG_CFG_DONE let config become effective
  86         return 0;
  87 }
  88
  89 static int rk30_lcdc_deinit(struct rk30_lcdc_device *lcdc_dev)
  90 {
  91         spin_lock(&lcdc_dev->reg_lock);
  92         if(likely(lcdc_dev->clk_on))
  93         {
  94                 lcdc_dev->clk_on = 0;
  95                 LcdMskReg(lcdc_dev, INT_STATUS, m_FRM_START_INT_CLEAR, v_FRM_START_INT_CLEAR(1));
  96                 LcdMskReg(lcdc_dev, INT_STATUS, m_HOR_START_INT_EN | m_FRM_START_INT_EN |
  97                         m_LINE_FLAG_INT_EN | m_BUS_ERR_INT_EN,v_HOR_START_INT_EN(0) | v_FRM_START_INT_EN(0) |
  98                         v_LINE_FLAG_INT_EN(0) | v_BUS_ERR_INT_EN(0));  //disable all lcdc interrupt
  99                 LcdSetBit(lcdc_dev,SYS_CTRL0,m_LCDC_STANDBY);
 100                 LCDC_REG_CFG_DONE();
 101                 spin_unlock(&lcdc_dev->reg_lock);
 102         }
 103         else   //clk already disabled
 104         {
 105                 spin_unlock(&lcdc_dev->reg_lock);
 106                 return 0;
 107         }
 108         mdelay(1);
 109
 110         return 0;
 111 }
 112
 113 static int rk30_load_screen(struct rk_lcdc_device_driver *dev_drv, bool initscreen)
 114 {
 115         int ret = -EINVAL;
 116         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
 117         rk_screen *screen = lcdc_dev->screen;
 118         u64 ft;
 119         int fps;
 120         u16 face;
 121         u16 mcu_total, mcu_rwstart, mcu_csstart, mcu_rwend, mcu_csend;
 122         u16 right_margin = screen->right_margin;
 123         u16 lower_margin = screen->lower_margin;
 124         u16 x_res = screen->x_res, y_res = screen->y_res;
 125
 126         // set the rgb or mcu
 127         spin_lock(&lcdc_dev->reg_lock);
 128         if(likely(lcdc_dev->clk_on))
 129         {
 130                 if(screen->type==SCREEN_MCU)
 131                 {
 132                         LcdMskReg(lcdc_dev, MCU_CTRL, m_MCU_OUTPUT_SELECT,v_MCU_OUTPUT_SELECT(1));
 133                         // set out format and mcu timing
 134                         mcu_total  = (screen->mcu_wrperiod*150*1000)/1000000;
 135                         if(mcu_total>31)
 136                                 mcu_total = 31;
 137                         if(mcu_total<3)
 138                                 mcu_total = 3;
 139                         mcu_rwstart = (mcu_total+1)/4 - 1;
 140                         mcu_rwend = ((mcu_total+1)*3)/4 - 1;
 141                         mcu_csstart = (mcu_rwstart>2) ? (mcu_rwstart-3) : (0);
 142                         mcu_csend = (mcu_rwend>15) ? (mcu_rwend-1) : (mcu_rwend);
 143
 144                         //DBG(1,">> mcu_total=%d, mcu_rwstart=%d, mcu_csstart=%d, mcu_rwend=%d, mcu_csend=%d \n",
 145                         //      mcu_total, mcu_rwstart, mcu_csstart, mcu_rwend, mcu_csend);
 146
 147                         // set horizontal & vertical out timing
 148
 149                         right_margin = x_res/6;
 150                         screen->pixclock = 150000000; //mcu fix to 150 MHz
 151                         LcdMskReg(lcdc_dev, MCU_CTRL,m_MCU_CS_ST | m_MCU_CS_END| m_MCU_RW_ST | m_MCU_RW_END |
 152                                 m_MCU_WRITE_PERIOD | m_MCU_HOLDMODE_SELECT | m_MCU_HOLDMODE_FRAME_ST,
 153                                 v_MCU_CS_ST(mcu_csstart) | v_MCU_CS_END(mcu_csend) | v_MCU_RW_ST(mcu_rwstart) |
 154                                 v_MCU_RW_END(mcu_rwend) |  v_MCU_WRITE_PERIOD(mcu_total) |
 155                                 v_MCU_HOLDMODE_SELECT((SCREEN_MCU==screen->type)?(1):(0)) | v_MCU_HOLDMODE_FRAME_ST(0));
 156
 157                 }
 158
 159                 switch (screen->face)
 160                 {
 161                         case OUT_P565:
 162                                 face = OUT_P565;
 163                                 LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE, v_DITHER_DOWN_EN(1) | v_DITHER_DOWN_MODE(0));
 164                                 break;
 165                         case OUT_P666:
 166                                 face = OUT_P666;
 167                                 LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE, v_DITHER_DOWN_EN(1) | v_DITHER_DOWN_MODE(1));
 168                                 break;
 169                         case OUT_D888_P565:
 170                                 face = OUT_P888;
 171                                 LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE, v_DITHER_DOWN_EN(1) | v_DITHER_DOWN_MODE(0));
 172                                 break;
 173                         case OUT_D888_P666:
 174                                 face = OUT_P888;
 175                                 LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE, v_DITHER_DOWN_EN(1) | v_DITHER_DOWN_MODE(1));
 176                                 break;
 177                         case OUT_P888:
 178                                 face = OUT_P888;
 179                                 LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_UP_EN, v_DITHER_UP_EN(1));
 180                                 LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE, v_DITHER_DOWN_EN(0) | v_DITHER_DOWN_MODE(0));
 181                                 break;
 182                         default:
 183                                 LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_UP_EN, v_DITHER_UP_EN(0));
 184                                 LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE, v_DITHER_DOWN_EN(0) | v_DITHER_DOWN_MODE(0));
 185                                 face = screen->face;
 186                                 break;
 187                 }
 188
 189                 //use default overlay,set vsyn hsync den dclk polarity
 190                 LcdMskReg(lcdc_dev, DSP_CTRL0,m_DISPLAY_FORMAT | m_HSYNC_POLARITY | m_VSYNC_POLARITY |
 191                         m_DEN_POLARITY |m_DCLK_POLARITY,v_DISPLAY_FORMAT(face) |
 192                         v_HSYNC_POLARITY(screen->pin_hsync) | v_VSYNC_POLARITY(screen->pin_vsync) |
 193                         v_DEN_POLARITY(screen->pin_den) | v_DCLK_POLARITY(screen->pin_dclk));
 194
 195                 //set background color to black,set swap according to the screen panel,disable blank mode
 196                 LcdMskReg(lcdc_dev, DSP_CTRL1, m_BG_COLOR | m_OUTPUT_RB_SWAP | m_OUTPUT_RG_SWAP | m_DELTA_SWAP |
 197                         m_DUMMY_SWAP | m_BLANK_MODE,v_BG_COLOR(0x000000) | v_OUTPUT_RB_SWAP(screen->swap_rb) |
 198                         v_OUTPUT_RG_SWAP(screen->swap_rg) | v_DELTA_SWAP(screen->swap_delta) | v_DUMMY_SWAP(screen->swap_dumy) |
 199                         v_BLACK_MODE(0));
 200
 201
 202                 LcdWrReg(lcdc_dev, DSP_HTOTAL_HS_END,v_HSYNC(screen->hsync_len) |
 203                      v_HORPRD(screen->hsync_len + screen->left_margin + x_res + right_margin));
 204                 LcdWrReg(lcdc_dev, DSP_HACT_ST_END, v_HAEP(screen->hsync_len + screen->left_margin + x_res) |
 205                      v_HASP(screen->hsync_len + screen->left_margin));
 206
 207                 LcdWrReg(lcdc_dev, DSP_VTOTAL_VS_END, v_VSYNC(screen->vsync_len) |
 208                       v_VERPRD(screen->vsync_len + screen->upper_margin + y_res + lower_margin));
 209                 LcdWrReg(lcdc_dev, DSP_VACT_ST_END,  v_VAEP(screen->vsync_len + screen->upper_margin+y_res)|
 210                       v_VASP(screen->vsync_len + screen->upper_margin));
 211                 // let above to take effect
 212                 LCDC_REG_CFG_DONE();
 213         }
 214         spin_unlock(&lcdc_dev->reg_lock);
 215
 216         ret = clk_set_rate(lcdc_dev->dclk, screen->pixclock);
 217         if(ret)
 218         {
 219                 printk(KERN_ERR ">>>>>> set lcdc%d dclk failed\n",lcdc_dev->id);
 220         }
 221         lcdc_dev->driver.pixclock = lcdc_dev->pixclock = div_u64(1000000000000llu, clk_get_rate(lcdc_dev->dclk));
 222         clk_enable(lcdc_dev->dclk);
 223
 224         ft = (u64)(screen->upper_margin + screen->lower_margin + screen->y_res +screen->vsync_len)*
 225                 (screen->left_margin + screen->right_margin + screen->x_res + screen->hsync_len)*
 226                 (dev_drv->pixclock);       // one frame time ,(pico seconds)
 227         fps = div64_u64(1000000000000llu,ft);
 228         screen->ft = 1000/fps;
 229         printk("%s: dclk:%lu>>fps:%d ",lcdc_dev->driver.name,clk_get_rate(lcdc_dev->dclk),fps);
 230
 231         if(screen->init)
 232         {
 233                 screen->init();
 234         }
 235
 236         printk("%s for lcdc%d ok!\n",__func__,lcdc_dev->id);
 237         return 0;
 238 }
 239
 240 static int mcu_refresh(struct rk30_lcdc_device *lcdc_dev)
 241 {
 242
 243     return 0;
 244 }
 245
 246
 247
 248 //enable layer,open:1,enable;0 disable
 249 static int win0_open(struct rk30_lcdc_device *lcdc_dev,bool open)
 250 {
 251
 252         spin_lock(&lcdc_dev->reg_lock);
 253         if(likely(lcdc_dev->clk_on))
 254         {
 255                 if(open)
 256                 {
 257                         if(!lcdc_dev->atv_layer_cnt)
 258                         {
 259                                 LcdMskReg(lcdc_dev, SYS_CTRL0,m_LCDC_STANDBY,v_LCDC_STANDBY(0));
 260                         }
 261                         lcdc_dev->atv_layer_cnt++;
 262                 }
 263                 else
 264                 {
 265                         lcdc_dev->atv_layer_cnt--;
 266                 }
 267                 lcdc_dev->driver.layer_par[0]->state = open;
 268
 269                 LcdMskReg(lcdc_dev, SYS_CTRL1, m_W0_EN, v_W0_EN(open));
 270                 if(!lcdc_dev->atv_layer_cnt)  //if no layer used,disable lcdc
 271                 {
 272                         LcdMskReg(lcdc_dev, SYS_CTRL0,m_LCDC_STANDBY,v_LCDC_STANDBY(1));
 273                 }
 274                 LCDC_REG_CFG_DONE();
 275         }
 276         spin_unlock(&lcdc_dev->reg_lock);
 277         printk(KERN_INFO "lcdc%d win0 %s\n",lcdc_dev->id,open?"open":"closed");
 278         return 0;
 279 }
 280 static int win1_open(struct rk30_lcdc_device *lcdc_dev,bool open)
 281 {
 282         spin_lock(&lcdc_dev->reg_lock);
 283         if(likely(lcdc_dev->clk_on))
 284         {
 285                 if(open)
 286                 {
 287                         if(!lcdc_dev->atv_layer_cnt)
 288                         {
 289                                 printk("lcdc%d wakeup from stanby\n",lcdc_dev->id);
 290                                 LcdMskReg(lcdc_dev, SYS_CTRL0,m_LCDC_STANDBY,v_LCDC_STANDBY(0));
 291                         }
 292                         lcdc_dev->atv_layer_cnt++;
 293                 }
 294                 else
 295                 {
 296                         lcdc_dev->atv_layer_cnt--;
 297                 }
 298                 lcdc_dev->driver.layer_par[1]->state = open;
 299
 300                 LcdMskReg(lcdc_dev, SYS_CTRL1, m_W1_EN, v_W1_EN(open));
 301                 if(!lcdc_dev->atv_layer_cnt)  //if no layer used,disable lcdc
 302                 {
 303                         printk(KERN_INFO "no layer of lcdc%d is used,go to standby!",lcdc_dev->id);
 304                         LcdMskReg(lcdc_dev, SYS_CTRL0,m_LCDC_STANDBY,v_LCDC_STANDBY(1));
 305                 }
 306                 LCDC_REG_CFG_DONE();
 307         }
 308         spin_unlock(&lcdc_dev->reg_lock);
 309         printk(KERN_INFO "lcdc%d win1 %s\n",lcdc_dev->id,open?"open":"closed");
 310         return 0;
 311 }
 312
 313
 314 static int rk30_lcdc_blank(struct rk_lcdc_device_driver*lcdc_drv,int layer_id,int blank_mode)
 315 {
 316         struct rk30_lcdc_device * lcdc_dev = container_of(lcdc_drv,struct rk30_lcdc_device ,driver);
 317
 318         printk(KERN_INFO "%s>>>>>%d\n",__func__, blank_mode);
 319
 320         spin_lock(&lcdc_dev->reg_lock);
 321         if(likely(lcdc_dev->clk_on))
 322         {
 323                 switch(blank_mode)
 324                 {
 325                         case FB_BLANK_UNBLANK:
 326                                 LcdMskReg(lcdc_dev,DSP_CTRL1,m_BLANK_MODE ,v_BLANK_MODE(0));
 327                                 break;
 328                         case FB_BLANK_NORMAL:
 329                                 LcdMskReg(lcdc_dev,DSP_CTRL1,m_BLANK_MODE ,v_BLANK_MODE(1));
 330                                 break;
 331                         default:
 332                                 LcdMskReg(lcdc_dev,DSP_CTRL1,m_BLANK_MODE ,v_BLANK_MODE(1));
 333                                 break;
 334                 }
 335                 LCDC_REG_CFG_DONE();
 336         }
 337         spin_unlock(&lcdc_dev->reg_lock);
 338
 339         return 0;
 340 }
 341
 342 static  int win0_display(struct rk30_lcdc_device *lcdc_dev,struct layer_par *par )
 343 {
 344         u32 y_addr;
 345         u32 uv_addr;
 346         y_addr = par->smem_start + par->y_offset;
 347         uv_addr = par->cbr_start + par->c_offset;
 348         DBG(2,KERN_INFO "lcdc%d>>%s:y_addr:0x%x>>uv_addr:0x%x\n",lcdc_dev->id,__func__,y_addr,uv_addr);
 349
 350         spin_lock(&lcdc_dev->reg_lock);
 351         if(likely(lcdc_dev->clk_on))
 352         {
 353                 LcdWrReg(lcdc_dev, WIN0_YRGB_MST0, y_addr);
 354                 LcdWrReg(lcdc_dev, WIN0_CBR_MST0, uv_addr);
 355                 LCDC_REG_CFG_DONE();
 356         }
 357         spin_unlock(&lcdc_dev->reg_lock);
 358
 359         return 0;
 360
 361 }
 362
 363 static  int win1_display(struct rk30_lcdc_device *lcdc_dev,struct layer_par *par )
 364 {
 365         u32 y_addr;
 366         u32 uv_addr;
 367         y_addr = par->smem_start + par->y_offset;
 368         uv_addr = par->cbr_start + par->c_offset;
 369         DBG(2,KERN_INFO "lcdc%d>>%s>>y_addr:0x%x>>uv_addr:0x%x\n",lcdc_dev->id,__func__,y_addr,uv_addr);
 370
 371         spin_lock(&lcdc_dev->reg_lock);
 372         if(likely(lcdc_dev->clk_on))
 373         {
 374                 LcdWrReg(lcdc_dev, WIN1_YRGB_MST, y_addr);
 375                 LcdWrReg(lcdc_dev, WIN1_CBR_MST, uv_addr);
 376                 LCDC_REG_CFG_DONE();
 377         }
 378         spin_unlock(&lcdc_dev->reg_lock);
 379
 380         return 0;
 381 }
 382
 383 static  int win0_set_par(struct rk30_lcdc_device *lcdc_dev,rk_screen *screen,
 384         struct layer_par *par )
 385 {
 386         u32 xact, yact, xvir, yvir, xpos, ypos;
 387         u32 ScaleYrgbX = 0x1000;
 388         u32 ScaleYrgbY = 0x1000;
 389         u32 ScaleCbrX = 0x1000;
 390         u32 ScaleCbrY = 0x1000;
 391
 392         xact = par->xact;                           //active (origin) picture window width/height
 393         yact = par->yact;
 394         xvir = par->xvir;                          // virtual resolution
 395         yvir = par->yvir;
 396         xpos = par->xpos+screen->left_margin + screen->hsync_len;
 397         ypos = par->ypos+screen->upper_margin + screen->vsync_len;
 398
 399
 400         ScaleYrgbX = CalScale(xact, par->xsize); //both RGB and yuv need this two factor
 401         ScaleYrgbY = CalScale(yact, par->ysize);
 402         switch (par->format)
 403         {
 404                 case YUV422:// yuv422
 405                         ScaleCbrX = CalScale((xact/2), par->xsize);
 406                         ScaleCbrY = CalScale(yact, par->ysize);
 407                         break;
 408                 case YUV420: // yuv420
 409                         ScaleCbrX = CalScale(xact/2, par->xsize);
 410                         ScaleCbrY = CalScale(yact/2, par->ysize);
 411                         break;
 412                 case YUV444:// yuv444
 413                         ScaleCbrX = CalScale(xact, par->xsize);
 414                         ScaleCbrY = CalScale(yact, par->ysize);
 415                         break;
 416                 default:
 417                    break;
 418         }
 419
 420         DBG(1,"%s for lcdc%d>>format:%d>>>xact:%d>>yact:%d>>xsize:%d>>ysize:%d>>xvir:%d>>yvir:%d>>xpos:%d>>ypos:%d>>\n",
 421                 __func__,lcdc_dev->id,par->format,xact,yact,par->xsize,par->ysize,xvir,yvir,xpos,ypos);
 422
 423         spin_lock(&lcdc_dev->reg_lock);
 424         if(likely(lcdc_dev->clk_on))
 425         {
 426                 LcdWrReg(lcdc_dev, WIN0_SCL_FACTOR_YRGB, v_X_SCL_FACTOR(ScaleYrgbX) | v_Y_SCL_FACTOR(ScaleYrgbY));
 427                 LcdWrReg(lcdc_dev, WIN0_SCL_FACTOR_CBR,v_X_SCL_FACTOR(ScaleCbrX)| v_Y_SCL_FACTOR(ScaleCbrY));
 428                 LcdMskReg(lcdc_dev, SYS_CTRL1, m_W0_FORMAT, v_W0_FORMAT(par->format));          //(inf->video_mode==0)
 429                 LcdWrReg(lcdc_dev, WIN0_ACT_INFO,v_ACT_WIDTH(xact) | v_ACT_HEIGHT(yact));
 430                 LcdWrReg(lcdc_dev, WIN0_DSP_ST, v_DSP_STX(xpos) | v_DSP_STY(ypos));
 431                 LcdWrReg(lcdc_dev, WIN0_DSP_INFO, v_DSP_WIDTH(par->xsize)| v_DSP_HEIGHT(par->ysize));
 432                 LcdMskReg(lcdc_dev, WIN0_COLOR_KEY_CTRL, m_COLORKEY_EN | m_KEYCOLOR,
 433                         v_COLORKEY_EN(1) | v_KEYCOLOR(0));
 434                 switch(par->format)
 435                 {
 436                         case ARGB888:
 437                                 LcdWrReg(lcdc_dev, WIN0_VIR,v_ARGB888_VIRWIDTH(xvir));
 438                                 //LcdMskReg(lcdc_dev,SYS_CTRL1,m_W0_RGB_RB_SWAP,v_W1_RGB_RB_SWAP(1));
 439                                 break;
 440                         case RGB888:  //rgb888
 441                                 LcdWrReg(lcdc_dev, WIN0_VIR,v_RGB888_VIRWIDTH(xvir));
 442                                 //LcdMskReg(lcdc_dev,SYS_CTRL1,m_W0_RGB_RB_SWAP,v_W0_RGB_RB_SWAP(1));
 443                                 break;
 444                         case RGB565:  //rgb565
 445                                 LcdWrReg(lcdc_dev, WIN0_VIR,v_RGB565_VIRWIDTH(xvir));
 446                                 break;
 447                         case YUV422:
 448                         case YUV420:
 449                                 LcdWrReg(lcdc_dev, WIN0_VIR,v_YUV_VIRWIDTH(xvir));
 450                                 break;
 451                         default:
 452                                 LcdWrReg(lcdc_dev, WIN0_VIR,v_RGB888_VIRWIDTH(xvir));
 453                                 break;
 454                 }
 455
 456                 LCDC_REG_CFG_DONE();
 457         }
 458         spin_unlock(&lcdc_dev->reg_lock);
 459
 460     return 0;
 461
 462 }
 463
 464 static int win1_set_par(struct rk30_lcdc_device *lcdc_dev,rk_screen *screen,
 465         struct layer_par *par )
 466 {
 467         u32 xact, yact, xvir, yvir, xpos, ypos;
 468         u32 ScaleYrgbX = 0x1000;
 469         u32 ScaleYrgbY = 0x1000;
 470         u32 ScaleCbrX = 0x1000;
 471         u32 ScaleCbrY = 0x1000;
 472
 473         xact = par->xact;
 474         yact = par->yact;
 475         xvir = par->xvir;
 476         yvir = par->yvir;
 477         xpos = par->xpos+screen->left_margin + screen->hsync_len;
 478         ypos = par->ypos+screen->upper_margin + screen->vsync_len;
 479
 480         ScaleYrgbX = CalScale(xact, par->xsize);
 481         ScaleYrgbY = CalScale(yact, par->ysize);
 482         DBG(1,"%s for lcdc%d>>format:%d>>>xact:%d>>yact:%d>>xsize:%d>>ysize:%d>>xvir:%d>>yvir:%d>>xpos:%d>>ypos:%d>>\n",
 483                 __func__,lcdc_dev->id,par->format,xact,yact,par->xsize,par->ysize,xvir,yvir,xpos,ypos);
 484
 485
 486         spin_lock(&lcdc_dev->reg_lock);
 487         if(likely(lcdc_dev->clk_on))
 488         {
 489                 switch (par->format)
 490                 {
 491                         case YUV422:// yuv422
 492                                 ScaleCbrX = CalScale((xact/2), par->xsize);
 493                                 ScaleCbrY = CalScale(yact, par->ysize);
 494                                 break;
 495                         case YUV420: // yuv420
 496                                 ScaleCbrX = CalScale(xact/2, par->xsize);
 497                                 ScaleCbrY = CalScale(yact/2, par->ysize);
 498                                 break;
 499                         case YUV444:// yuv444
 500                                 ScaleCbrX = CalScale(xact, par->xsize);
 501                                 ScaleCbrY = CalScale(yact, par->ysize);
 502                                 break;
 503                         default:
 504                                 break;
 505                 }
 506
 507                 LcdWrReg(lcdc_dev, WIN1_SCL_FACTOR_YRGB, v_X_SCL_FACTOR(ScaleYrgbX) | v_Y_SCL_FACTOR(ScaleYrgbY));
 508                 LcdWrReg(lcdc_dev, WIN1_SCL_FACTOR_CBR,  v_X_SCL_FACTOR(ScaleCbrX) | v_Y_SCL_FACTOR(ScaleCbrY));
 509                 LcdMskReg(lcdc_dev,SYS_CTRL1, m_W1_FORMAT, v_W1_FORMAT(par->format));
 510                 LcdWrReg(lcdc_dev, WIN1_ACT_INFO,v_ACT_WIDTH(xact) | v_ACT_HEIGHT(yact));
 511                 LcdWrReg(lcdc_dev, WIN1_DSP_ST,v_DSP_STX(xpos) | v_DSP_STY(ypos));
 512                 LcdWrReg(lcdc_dev, WIN1_DSP_INFO,v_DSP_WIDTH(par->xsize) | v_DSP_HEIGHT(par->ysize));
 513                 // enable win1 color key and set the color to black(rgb=0)
 514                 LcdMskReg(lcdc_dev, WIN1_COLOR_KEY_CTRL, m_COLORKEY_EN | m_KEYCOLOR,v_COLORKEY_EN(1) | v_KEYCOLOR(0));
 515                 switch(par->format)
 516                 {
 517                         case ARGB888:
 518                                 LcdWrReg(lcdc_dev, WIN1_VIR,v_ARGB888_VIRWIDTH(xvir));
 519                                 //LcdMskReg(lcdc_dev,SYS_CTRL1,m_W1_RGB_RB_SWAP,v_W1_RGB_RB_SWAP(1));
 520                                 break;
 521                         case RGB888:  //rgb888
 522                                 LcdWrReg(lcdc_dev, WIN1_VIR,v_RGB888_VIRWIDTH(xvir));
 523                                 // LcdMskReg(lcdc_dev,SYS_CTRL1,m_W1_RGB_RB_SWAP,v_W1_RGB_RB_SWAP(1));
 524                                 break;
 525                         case RGB565:  //rgb565
 526                                 LcdWrReg(lcdc_dev, WIN1_VIR,v_RGB565_VIRWIDTH(xvir));
 527                                 break;
 528                         case YUV422:
 529                         case YUV420:
 530                                 LcdWrReg(lcdc_dev, WIN1_VIR,v_YUV_VIRWIDTH(xvir));
 531                                 break;
 532                         default:
 533                                 LcdWrReg(lcdc_dev, WIN1_VIR,v_RGB888_VIRWIDTH(xvir));
 534                                 break;
 535                 }
 536
 537                 LCDC_REG_CFG_DONE();
 538         }
 539         spin_unlock(&lcdc_dev->reg_lock);
 540     return 0;
 541 }
 542
 543 static int rk30_lcdc_open(struct rk_lcdc_device_driver *dev_drv,int layer_id,bool open)
 544 {
 545         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
 546         if(layer_id == 0)
 547         {
 548                 win0_open(lcdc_dev,open);
 549         }
 550         else if(layer_id == 1)
 551         {
 552                 win1_open(lcdc_dev,open);
 553         }
 554
 555         return 0;
 556 }
 557
 558 static int rk30_lcdc_set_par(struct rk_lcdc_device_driver *dev_drv,int layer_id)
 559 {
 560         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
 561         struct layer_par *par = NULL;
 562         rk_screen *screen = lcdc_dev->screen;
 563         if(!screen)
 564         {
 565                 printk(KERN_ERR "screen is null!\n");
 566                 return -ENOENT;
 567         }
 568         if(layer_id==0)
 569         {
 570                 par = dev_drv->layer_par[0];
 571                 win0_set_par(lcdc_dev,screen,par);
 572         }
 573         else if(layer_id==1)
 574         {
 575                 par = dev_drv->layer_par[1];
 576                 win1_set_par(lcdc_dev,screen,par);
 577         }
 578
 579         return 0;
 580 }
 581
 582 int rk30_lcdc_pan_display(struct rk_lcdc_device_driver * dev_drv,int layer_id)
 583 {
 584         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
 585         struct layer_par *par = NULL;
 586         rk_screen *screen = lcdc_dev->screen;
 587         unsigned long flags;
 588         int timeout;
 589         if(!screen)
 590         {
 591                 printk(KERN_ERR "screen is null!\n");
 592                 return -ENOENT;
 593         }
 594         if(layer_id==0)
 595         {
 596                 par = dev_drv->layer_par[0];
 597                 win0_display(lcdc_dev,par);
 598         }
 599         else if(layer_id==1)
 600         {
 601                 par = dev_drv->layer_par[1];
 602                 win1_display(lcdc_dev,par);
 603         }
 604         if((dev_drv->first_frame))  //this is the first frame of the system ,enable frame start interrupt
 605         {
 606                 dev_drv->first_frame = 0;
 607                 LcdMskReg(lcdc_dev,INT_STATUS,m_FRM_START_INT_CLEAR |m_FRM_START_INT_EN ,
 608                           v_FRM_START_INT_CLEAR(1) | v_FRM_START_INT_EN(1));
 609                 LCDC_REG_CFG_DONE();  // write any value to  REG_CFG_DONE let config become effective
 610
 611         }
 612
 613         if(dev_drv->num_buf < 3) //3buffer ,no need to  wait for sysn
 614         {
 615                 spin_lock_irqsave(&dev_drv->cpl_lock,flags);
 616                 init_completion(&dev_drv->frame_done);
 617                 spin_unlock_irqrestore(&dev_drv->cpl_lock,flags);
 618                 timeout = wait_for_completion_timeout(&dev_drv->frame_done,msecs_to_jiffies(dev_drv->screen->ft+5));
 619                 if(!timeout&&(!dev_drv->frame_done.done))
 620                 {
 621                         printk(KERN_ERR "wait for new frame start time out!\n");
 622                         return -ETIMEDOUT;
 623                 }
 624         }
 625
 626         return 0;
 627 }
 628
 629 int rk30_lcdc_ioctl(struct rk_lcdc_device_driver * dev_drv,unsigned int cmd, unsigned long arg,int layer_id)
 630 {
 631         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
 632         u32 panel_size[2];
 633         void __user *argp = (void __user *)arg;
 634         int ret = 0;
 635         switch(cmd)
 636         {
 637                 case FBIOGET_PANEL_SIZE:    //get panel size
 638                         panel_size[0] = lcdc_dev->screen->x_res;
 639                         panel_size[1] = lcdc_dev->screen->y_res;
 640                         if(copy_to_user(argp, panel_size, 8))
 641                                 return -EFAULT;
 642                         break;
 643                 default:
 644                         break;
 645         }
 646
 647         return ret;
 648 }
 649 static int rk30_lcdc_get_layer_state(struct rk_lcdc_device_driver *dev_drv,int layer_id)
 650 {
 651         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
 652         struct layer_par *par = dev_drv->layer_par[layer_id];
 653
 654         spin_lock(&lcdc_dev->reg_lock);
 655         if(lcdc_dev->clk_on)
 656         {
 657                 if(layer_id == 0)
 658                 {
 659                         par->state = LcdReadBit(lcdc_dev,SYS_CTRL1,m_W0_EN);
 660                 }
 661                 else if( layer_id == 1)
 662                 {
 663                         par->state = LcdReadBit(lcdc_dev,SYS_CTRL1,m_W1_EN);
 664                 }
 665         }
 666         spin_unlock(&lcdc_dev->reg_lock);
 667
 668         return par->state;
 669
 670 }
 671
 672 /***********************************
 673 overlay manager
 674 swap:1 win0 on the top of win1
 675         0 win1 on the top of win0
 676 set  : 1 set overlay
 677         0 get overlay state
 678 ************************************/
 679 static int rk30_lcdc_ovl_mgr(struct rk_lcdc_device_driver *dev_drv,int swap,bool set)
 680 {
 681         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
 682         int ovl;
 683         spin_lock(&lcdc_dev->reg_lock);
 684         if(lcdc_dev->clk_on)
 685         {
 686                 if(set)  //set overlay
 687                 {
 688                         LcdMskReg(lcdc_dev,DSP_CTRL0,m_W0W1_POSITION_SWAP,v_W0W1_POSITION_SWAP(swap));
 689                         LcdWrReg(lcdc_dev, REG_CFG_DONE, 0x01);
 690                         LCDC_REG_CFG_DONE();
 691                         ovl = swap;
 692                 }
 693                 else  //get overlay
 694                 {
 695                         ovl = LcdReadBit(lcdc_dev,DSP_CTRL0,m_W0W1_POSITION_SWAP);
 696                 }
 697         }
 698         else
 699         {
 700                 ovl = -EPERM;
 701         }
 702         spin_unlock(&lcdc_dev->reg_lock);
 703
 704         return ovl;
 705 }
 706 static int rk30_lcdc_get_disp_info(struct rk_lcdc_device_driver *dev_drv,int layer_id)
 707 {
 708         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
 709         return 0;
 710 }
 711
 712
 713 /*******************************************
 714 lcdc fps manager,set or get lcdc fps
 715 set:0 get
 716      1 set
 717 ********************************************/
 718 static int rk30_lcdc_fps_mgr(struct rk_lcdc_device_driver *dev_drv,int fps,bool set)
 719 {
 720         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
 721         rk_screen * screen = dev_drv->screen;
 722         u64 ft = 0;
 723         u32 dotclk;
 724         int ret;
 725
 726         if(set)
 727         {
 728                 ft = div_u64(1000000000000llu,fps);
 729                 dev_drv->pixclock = div_u64(ft,(screen->upper_margin + screen->lower_margin + screen->y_res +screen->vsync_len)*
 730                                 (screen->left_margin + screen->right_margin + screen->x_res + screen->hsync_len));
 731                 dotclk = div_u64(1000000000000llu,dev_drv->pixclock);
 732                 ret = clk_set_rate(lcdc_dev->dclk, dotclk);
 733                 if(ret)
 734                 {
 735                         printk(KERN_ERR ">>>>>> set lcdc%d dclk failed\n",lcdc_dev->id);
 736                 }
 737                 dev_drv->pixclock = lcdc_dev->pixclock = div_u64(1000000000000llu, clk_get_rate(lcdc_dev->dclk));
 738
 739         }
 740
 741         ft = (u64)(screen->upper_margin + screen->lower_margin + screen->y_res +screen->vsync_len)*
 742         (screen->left_margin + screen->right_margin + screen->x_res + screen->hsync_len)*
 743         (dev_drv->pixclock);       // one frame time ,(pico seconds)
 744         fps = div64_u64(1000000000000llu,ft);
 745         screen->ft = 1000/fps ;  //one frame time in ms
 746         return fps;
 747 }
 748 int rk30_lcdc_early_suspend(struct rk_lcdc_device_driver *dev_drv)
 749 {
 750         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
 751
 752         spin_lock(&lcdc_dev->reg_lock);
 753         if(likely(lcdc_dev->clk_on))
 754         {
 755                 lcdc_dev->clk_on = 0;
 756                 LcdMskReg(lcdc_dev, INT_STATUS, m_FRM_START_INT_CLEAR, v_FRM_START_INT_CLEAR(1));
 757                 LcdMskReg(lcdc_dev, SYS_CTRL0,m_LCDC_STANDBY,v_LCDC_STANDBY(1));
 758                 LCDC_REG_CFG_DONE();
 759                 spin_unlock(&lcdc_dev->reg_lock);
 760         }
 761         else  //clk already disabled
 762         {
 763                 spin_unlock(&lcdc_dev->reg_lock);
 764                 return 0;
 765         }
 766
 767
 768         mdelay(1);
 769         clk_disable(lcdc_dev->dclk);
 770         clk_disable(lcdc_dev->hclk);
 771         clk_disable(lcdc_dev->aclk);
 772         clk_disable(lcdc_dev->pd);
 773
 774         return 0;
 775 }
 776
 777
 778 int rk30_lcdc_early_resume(struct rk_lcdc_device_driver *dev_drv)
 779 {
 780         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
 781
 782         if(!lcdc_dev->clk_on)
 783         {
 784                 clk_enable(lcdc_dev->pd);
 785                 clk_enable(lcdc_dev->hclk);
 786                 clk_enable(lcdc_dev->dclk);
 787                 clk_enable(lcdc_dev->aclk);
 788         }
 789         memcpy((u8*)lcdc_dev->preg, (u8*)&lcdc_dev->regbak, 0xc4);  //resume reg
 790
 791         spin_lock(&lcdc_dev->reg_lock);
 792         if(lcdc_dev->atv_layer_cnt)
 793         {
 794                 LcdMskReg(lcdc_dev, SYS_CTRL0,m_LCDC_STANDBY,v_LCDC_STANDBY(0));
 795                 LCDC_REG_CFG_DONE();
 796         }
 797         lcdc_dev->clk_on = 1;
 798         spin_unlock(&lcdc_dev->reg_lock);
 799
 800         return 0;
 801 }
 802 static irqreturn_t rk30_lcdc_isr(int irq, void *dev_id)
 803 {
 804         struct rk30_lcdc_device *lcdc_dev = (struct rk30_lcdc_device *)dev_id;
 805
 806         LcdMskReg(lcdc_dev, INT_STATUS, m_FRM_START_INT_CLEAR, v_FRM_START_INT_CLEAR(1));
 807         LCDC_REG_CFG_DONE();
 808         //LcdMskReg(lcdc_dev, INT_STATUS, m_LINE_FLAG_INT_CLEAR, v_LINE_FLAG_INT_CLEAR(1));
 809
 810         if(lcdc_dev->driver.num_buf < 3)  //three buffer ,no need to wait for sync
 811         {
 812                 spin_lock(&(lcdc_dev->driver.cpl_lock));
 813                 complete(&(lcdc_dev->driver.frame_done));
 814                 spin_unlock(&(lcdc_dev->driver.cpl_lock));
 815         }
 816         return IRQ_HANDLED;
 817 }
 818
 819 static struct layer_par lcdc_layer[] = {
 820         [0] = {
 821                 .name           = "win0",
 822                 .id             = 0,
 823                 .support_3d     = true,
 824         },
 825         [1] = {
 826                 .name           = "win1",
 827                 .id             = 1,
 828                 .support_3d     = false,
 829         },
 830 };
 831
 832 static struct rk_lcdc_device_driver lcdc_driver = {
 833         .name                   = "lcdc",
 834         .def_layer_par          = lcdc_layer,
 835         .num_layer              = ARRAY_SIZE(lcdc_layer),
 836         .open                   = rk30_lcdc_open,
 837         .init_lcdc              = init_rk30_lcdc,
 838         .ioctl                  = rk30_lcdc_ioctl,
 839         .suspend                = rk30_lcdc_early_suspend,
 840         .resume                 = rk30_lcdc_early_resume,
 841         .set_par                = rk30_lcdc_set_par,
 842         .blank                  = rk30_lcdc_blank,
 843         .pan_display            = rk30_lcdc_pan_display,
 844         .load_screen            = rk30_load_screen,
 845         .get_layer_state        = rk30_lcdc_get_layer_state,
 846         .ovl_mgr                = rk30_lcdc_ovl_mgr,
 847         .get_disp_info          = rk30_lcdc_get_disp_info,
 848         .fps_mgr                = rk30_lcdc_fps_mgr,
 849 };
 850 #ifdef CONFIG_PM
 851 static int rk30_lcdc_suspend(struct platform_device *pdev, pm_message_t state)
 852 {
 853         return 0;
 854 }
 855
 856 static int rk30_lcdc_resume(struct platform_device *pdev)
 857 {
 858         return 0;
 859 }
 860
 861 #else
 862 #define rk30_lcdc_suspend NULL
 863 #define rk30_lcdc_resume NULL
 864 #endif
 865
 866 static int __devinit rk30_lcdc_probe (struct platform_device *pdev)
 867 {
 868         struct rk30_lcdc_device *lcdc_dev=NULL;
 869         rk_screen *screen;
 870         struct rk29fb_info *screen_ctr_info;
 871         struct resource *res = NULL;
 872         struct resource *mem;
 873         int ret = 0;
 874
 875         /*************Malloc rk30lcdc_inf and set it to pdev for drvdata**********/
 876         lcdc_dev = kzalloc(sizeof(struct rk30_lcdc_device), GFP_KERNEL);
 877         if(!lcdc_dev)
 878         {
 879                 dev_err(&pdev->dev, ">>rk30 lcdc device kmalloc fail!");
 880                 return -ENOMEM;
 881         }
 882         platform_set_drvdata(pdev, lcdc_dev);
 883         lcdc_dev->id = pdev->id;
 884         screen_ctr_info = (struct rk29fb_info * )pdev->dev.platform_data;
 885         screen =  kzalloc(sizeof(rk_screen), GFP_KERNEL);
 886         if(!screen)
 887         {
 888                 dev_err(&pdev->dev, ">>rk30 lcdc screen kmalloc fail!");
 889                 ret =  -ENOMEM;
 890                 goto err0;
 891         }
 892         else
 893         {
 894                 lcdc_dev->screen = screen;
 895         }
 896         /****************get lcdc0 reg  *************************/
 897         res = platform_get_resource(pdev, IORESOURCE_MEM,0);
 898         if (res == NULL)
 899         {
 900                 dev_err(&pdev->dev, "failed to get io resource for lcdc%d \n",lcdc_dev->id);
 901                 ret = -ENOENT;
 902                 goto err1;
 903         }
 904         lcdc_dev->reg_phy_base = res->start;
 905         lcdc_dev->len = resource_size(res);
 906         mem = request_mem_region(lcdc_dev->reg_phy_base, resource_size(res), pdev->name);
 907         if (mem == NULL)
 908         {
 909                 dev_err(&pdev->dev, "failed to request mem region for lcdc%d\n",lcdc_dev->id);
 910                 ret = -ENOENT;
 911                 goto err1;
 912         }
 913         lcdc_dev->reg_vir_base = ioremap(lcdc_dev->reg_phy_base,  resource_size(res));
 914         if (lcdc_dev->reg_vir_base == NULL)
 915         {
 916                 dev_err(&pdev->dev, "cannot map IO\n");
 917                 ret = -ENXIO;
 918                 goto err2;
 919         }
 920
 921         lcdc_dev->preg = (LCDC_REG*)lcdc_dev->reg_vir_base;
 922         printk("lcdc%d:reg_phy_base = 0x%08x,reg_vir_base:0x%p\n",pdev->id,lcdc_dev->reg_phy_base, lcdc_dev->preg);
 923         lcdc_dev->driver.dev=&pdev->dev;
 924         lcdc_dev->driver.screen = screen;
 925         lcdc_dev->driver.screen_ctr_info = screen_ctr_info;
 926         spin_lock_init(&lcdc_dev->reg_lock);
 927         lcdc_dev->irq = platform_get_irq(pdev, 0);
 928         if(lcdc_dev->irq < 0)
 929         {
 930                 dev_err(&pdev->dev, "cannot find IRQ\n");
 931                 goto err3;
 932         }
 933         ret = request_irq(lcdc_dev->irq, rk30_lcdc_isr, IRQF_DISABLED,dev_name(&pdev->dev),lcdc_dev);
 934         if (ret)
 935         {
 936                dev_err(&pdev->dev, "cannot requeset irq %d - err %d\n", lcdc_dev->irq, ret);
 937                ret = -EBUSY;
 938                goto err3;
 939         }
 940         ret = rk_fb_register(&(lcdc_dev->driver),&lcdc_driver,lcdc_dev->id);
 941         if(ret < 0)
 942         {
 943                 printk(KERN_ERR "register fb for lcdc%d failed!\n",lcdc_dev->id);
 944                 goto err4;
 945         }
 946         printk("rk30 lcdc%d probe ok!\n",lcdc_dev->id);
 947
 948         return 0;
 949
 950 err4:
 951         free_irq(lcdc_dev->irq,lcdc_dev);
 952 err3:
 953         iounmap(lcdc_dev->reg_vir_base);
 954 err2:
 955         release_mem_region(lcdc_dev->reg_phy_base,resource_size(res));
 956 err1:
 957         kfree(screen);
 958 err0:
 959         platform_set_drvdata(pdev, NULL);
 960         kfree(lcdc_dev);
 961         return ret;
 962
 963 }
 964 static int __devexit rk30_lcdc_remove(struct platform_device *pdev)
 965 {
 966         struct rk30_lcdc_device *lcdc_dev = platform_get_drvdata(pdev);
 967         rk_fb_unregister(&(lcdc_dev->driver));
 968         rk30_lcdc_deinit(lcdc_dev);
 969         iounmap(lcdc_dev->reg_vir_base);
 970         release_mem_region(lcdc_dev->reg_phy_base,lcdc_dev->len);
 971         kfree(lcdc_dev->screen);
 972         kfree(lcdc_dev);
 973         return 0;
 974 }
 975
 976 static void rk30_lcdc_shutdown(struct platform_device *pdev)
 977 {
 978         struct rk30_lcdc_device *lcdc_dev = platform_get_drvdata(pdev);
 979         rk_fb_unregister(&(lcdc_dev->driver));
 980         rk30_lcdc_deinit(lcdc_dev);
 981         /*iounmap(lcdc_dev->reg_vir_base);
 982         release_mem_region(lcdc_dev->reg_phy_base,lcdc_dev->len);
 983         kfree(lcdc_dev->screen);
 984         kfree(lcdc_dev);*/
 985 }
 986
 987
 988 static struct platform_driver rk30lcdc_driver = {
 989         .probe          = rk30_lcdc_probe,
 990         .remove         = __devexit_p(rk30_lcdc_remove),
 991         .driver         = {
 992                 .name   = "rk30-lcdc",
 993                 .owner  = THIS_MODULE,
 994         },
 995         .suspend        = rk30_lcdc_suspend,
 996         .resume         = rk30_lcdc_resume,
 997         .shutdown   = rk30_lcdc_shutdown,
 998 };
 999
1000 static int __init rk30_lcdc_init(void)
1001 {
1002     return platform_driver_register(&rk30lcdc_driver);
1003 }
1004
1005 static void __exit rk30_lcdc_exit(void)
1006 {
1007     platform_driver_unregister(&rk30lcdc_driver);
1008 }
1009
1010
1011
1012 fs_initcall(rk30_lcdc_init);
1013 module_exit(rk30_lcdc_exit);
1014
1015
1016