cgroup: superblock can't be released with active dentries
[firefly-linux-kernel-4.4.55.git] / drivers / video / omap2 / dss / sdi.c
1 /*
2  * linux/drivers/video/omap2/dss/sdi.c
3  *
4  * Copyright (C) 2009 Nokia Corporation
5  * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
6  *
7  * This program is free software; you can redistribute it and/or modify it
8  * under the terms of the GNU General Public License version 2 as published by
9  * the Free Software Foundation.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along with
17  * this program.  If not, see <http://www.gnu.org/licenses/>.
18  */
19
20 #define DSS_SUBSYS_NAME "SDI"
21
22 #include <linux/kernel.h>
23 #include <linux/delay.h>
24 #include <linux/err.h>
25 #include <linux/regulator/consumer.h>
26 #include <linux/export.h>
27
28 #include <video/omapdss.h>
29 #include "dss.h"
30
31 static struct {
32         bool update_enabled;
33         struct regulator *vdds_sdi_reg;
34 } sdi;
35
36 static void sdi_basic_init(struct omap_dss_device *dssdev)
37
38 {
39         dispc_mgr_set_io_pad_mode(DSS_IO_PAD_MODE_BYPASS);
40         dispc_mgr_enable_stallmode(dssdev->manager->id, false);
41
42         dispc_mgr_set_lcd_display_type(dssdev->manager->id,
43                         OMAP_DSS_LCD_DISPLAY_TFT);
44
45         dispc_mgr_set_tft_data_lines(dssdev->manager->id, 24);
46         dispc_lcd_enable_signal_polarity(1);
47 }
48
49 int omapdss_sdi_display_enable(struct omap_dss_device *dssdev)
50 {
51         struct omap_video_timings *t = &dssdev->panel.timings;
52         struct dss_clock_info dss_cinfo;
53         struct dispc_clock_info dispc_cinfo;
54         u16 lck_div, pck_div;
55         unsigned long fck;
56         unsigned long pck;
57         int r;
58
59         if (dssdev->manager == NULL) {
60                 DSSERR("failed to enable display: no manager\n");
61                 return -ENODEV;
62         }
63
64         r = omap_dss_start_device(dssdev);
65         if (r) {
66                 DSSERR("failed to start device\n");
67                 goto err_start_dev;
68         }
69
70         r = regulator_enable(sdi.vdds_sdi_reg);
71         if (r)
72                 goto err_reg_enable;
73
74         r = dss_runtime_get();
75         if (r)
76                 goto err_get_dss;
77
78         r = dispc_runtime_get();
79         if (r)
80                 goto err_get_dispc;
81
82         sdi_basic_init(dssdev);
83
84         /* 15.5.9.1.2 */
85         dssdev->panel.config |= OMAP_DSS_LCD_RF | OMAP_DSS_LCD_ONOFF;
86
87         dispc_mgr_set_pol_freq(dssdev->manager->id, dssdev->panel.config,
88                         dssdev->panel.acbi, dssdev->panel.acb);
89
90         r = dss_calc_clock_div(1, t->pixel_clock * 1000,
91                         &dss_cinfo, &dispc_cinfo);
92         if (r)
93                 goto err_calc_clock_div;
94
95         fck = dss_cinfo.fck;
96         lck_div = dispc_cinfo.lck_div;
97         pck_div = dispc_cinfo.pck_div;
98
99         pck = fck / lck_div / pck_div / 1000;
100
101         if (pck != t->pixel_clock) {
102                 DSSWARN("Could not find exact pixel clock. Requested %d kHz, "
103                                 "got %lu kHz\n",
104                                 t->pixel_clock, pck);
105
106                 t->pixel_clock = pck;
107         }
108
109
110         dispc_mgr_set_lcd_timings(dssdev->manager->id, t);
111
112         r = dss_set_clock_div(&dss_cinfo);
113         if (r)
114                 goto err_set_dss_clock_div;
115
116         r = dispc_mgr_set_clock_div(dssdev->manager->id, &dispc_cinfo);
117         if (r)
118                 goto err_set_dispc_clock_div;
119
120         dss_sdi_init(dssdev->phy.sdi.datapairs);
121         r = dss_sdi_enable();
122         if (r)
123                 goto err_sdi_enable;
124         mdelay(2);
125
126         r = dss_mgr_enable(dssdev->manager);
127         if (r)
128                 goto err_mgr_enable;
129
130         return 0;
131
132 err_mgr_enable:
133         dss_sdi_disable();
134 err_sdi_enable:
135 err_set_dispc_clock_div:
136 err_set_dss_clock_div:
137 err_calc_clock_div:
138         dispc_runtime_put();
139 err_get_dispc:
140         dss_runtime_put();
141 err_get_dss:
142         regulator_disable(sdi.vdds_sdi_reg);
143 err_reg_enable:
144         omap_dss_stop_device(dssdev);
145 err_start_dev:
146         return r;
147 }
148 EXPORT_SYMBOL(omapdss_sdi_display_enable);
149
150 void omapdss_sdi_display_disable(struct omap_dss_device *dssdev)
151 {
152         dss_mgr_disable(dssdev->manager);
153
154         dss_sdi_disable();
155
156         dispc_runtime_put();
157         dss_runtime_put();
158
159         regulator_disable(sdi.vdds_sdi_reg);
160
161         omap_dss_stop_device(dssdev);
162 }
163 EXPORT_SYMBOL(omapdss_sdi_display_disable);
164
165 int sdi_init_display(struct omap_dss_device *dssdev)
166 {
167         DSSDBG("SDI init\n");
168
169         if (sdi.vdds_sdi_reg == NULL) {
170                 struct regulator *vdds_sdi;
171
172                 vdds_sdi = dss_get_vdds_sdi();
173
174                 if (IS_ERR(vdds_sdi)) {
175                         DSSERR("can't get VDDS_SDI regulator\n");
176                         return PTR_ERR(vdds_sdi);
177                 }
178
179                 sdi.vdds_sdi_reg = vdds_sdi;
180         }
181
182         return 0;
183 }
184
185 int sdi_init(void)
186 {
187         return 0;
188 }
189
190 void sdi_exit(void)
191 {
192 }