2 * linux/drivers/video/omap2/dss/rfbi.c
4 * Copyright (C) 2009 Nokia Corporation
5 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
7 * Some code and ideas taken from drivers/video/omap/ driver
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License version 2 as published by
12 * the Free Software Foundation.
14 * This program is distributed in the hope that it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
19 * You should have received a copy of the GNU General Public License along with
20 * this program. If not, see <http://www.gnu.org/licenses/>.
23 #define DSS_SUBSYS_NAME "RFBI"
25 #include <linux/kernel.h>
26 #include <linux/dma-mapping.h>
27 #include <linux/export.h>
28 #include <linux/vmalloc.h>
29 #include <linux/clk.h>
31 #include <linux/delay.h>
32 #include <linux/kfifo.h>
33 #include <linux/ktime.h>
34 #include <linux/hrtimer.h>
35 #include <linux/seq_file.h>
36 #include <linux/semaphore.h>
37 #include <linux/platform_device.h>
38 #include <linux/pm_runtime.h>
40 #include <video/omapdss.h>
43 struct rfbi_reg { u16 idx; };
45 #define RFBI_REG(idx) ((const struct rfbi_reg) { idx })
47 #define RFBI_REVISION RFBI_REG(0x0000)
48 #define RFBI_SYSCONFIG RFBI_REG(0x0010)
49 #define RFBI_SYSSTATUS RFBI_REG(0x0014)
50 #define RFBI_CONTROL RFBI_REG(0x0040)
51 #define RFBI_PIXEL_CNT RFBI_REG(0x0044)
52 #define RFBI_LINE_NUMBER RFBI_REG(0x0048)
53 #define RFBI_CMD RFBI_REG(0x004c)
54 #define RFBI_PARAM RFBI_REG(0x0050)
55 #define RFBI_DATA RFBI_REG(0x0054)
56 #define RFBI_READ RFBI_REG(0x0058)
57 #define RFBI_STATUS RFBI_REG(0x005c)
59 #define RFBI_CONFIG(n) RFBI_REG(0x0060 + (n)*0x18)
60 #define RFBI_ONOFF_TIME(n) RFBI_REG(0x0064 + (n)*0x18)
61 #define RFBI_CYCLE_TIME(n) RFBI_REG(0x0068 + (n)*0x18)
62 #define RFBI_DATA_CYCLE1(n) RFBI_REG(0x006c + (n)*0x18)
63 #define RFBI_DATA_CYCLE2(n) RFBI_REG(0x0070 + (n)*0x18)
64 #define RFBI_DATA_CYCLE3(n) RFBI_REG(0x0074 + (n)*0x18)
66 #define RFBI_VSYNC_WIDTH RFBI_REG(0x0090)
67 #define RFBI_HSYNC_WIDTH RFBI_REG(0x0094)
69 #define REG_FLD_MOD(idx, val, start, end) \
70 rfbi_write_reg(idx, FLD_MOD(rfbi_read_reg(idx), val, start, end))
72 enum omap_rfbi_cycleformat {
73 OMAP_DSS_RFBI_CYCLEFORMAT_1_1 = 0,
74 OMAP_DSS_RFBI_CYCLEFORMAT_2_1 = 1,
75 OMAP_DSS_RFBI_CYCLEFORMAT_3_1 = 2,
76 OMAP_DSS_RFBI_CYCLEFORMAT_3_2 = 3,
79 enum omap_rfbi_datatype {
80 OMAP_DSS_RFBI_DATATYPE_12 = 0,
81 OMAP_DSS_RFBI_DATATYPE_16 = 1,
82 OMAP_DSS_RFBI_DATATYPE_18 = 2,
83 OMAP_DSS_RFBI_DATATYPE_24 = 3,
86 enum omap_rfbi_parallelmode {
87 OMAP_DSS_RFBI_PARALLELMODE_8 = 0,
88 OMAP_DSS_RFBI_PARALLELMODE_9 = 1,
89 OMAP_DSS_RFBI_PARALLELMODE_12 = 2,
90 OMAP_DSS_RFBI_PARALLELMODE_16 = 3,
93 static int rfbi_convert_timings(struct rfbi_timings *t);
94 static void rfbi_get_clk_info(u32 *clk_period, u32 *max_clk_div);
97 struct platform_device *pdev;
100 unsigned long l4_khz;
102 enum omap_rfbi_datatype datatype;
103 enum omap_rfbi_parallelmode parallelmode;
105 enum omap_rfbi_te_mode te_mode;
108 void (*framedone_callback)(void *data);
109 void *framedone_callback_data;
111 struct omap_dss_device *dssdev[2];
113 struct semaphore bus_lock;
116 static inline void rfbi_write_reg(const struct rfbi_reg idx, u32 val)
118 __raw_writel(val, rfbi.base + idx.idx);
121 static inline u32 rfbi_read_reg(const struct rfbi_reg idx)
123 return __raw_readl(rfbi.base + idx.idx);
126 static int rfbi_runtime_get(void)
130 DSSDBG("rfbi_runtime_get\n");
132 r = pm_runtime_get_sync(&rfbi.pdev->dev);
134 return r < 0 ? r : 0;
137 static void rfbi_runtime_put(void)
141 DSSDBG("rfbi_runtime_put\n");
143 r = pm_runtime_put_sync(&rfbi.pdev->dev);
144 WARN_ON(r < 0 && r != -ENOSYS);
147 void rfbi_bus_lock(void)
149 down(&rfbi.bus_lock);
151 EXPORT_SYMBOL(rfbi_bus_lock);
153 void rfbi_bus_unlock(void)
157 EXPORT_SYMBOL(rfbi_bus_unlock);
159 void omap_rfbi_write_command(const void *buf, u32 len)
161 switch (rfbi.parallelmode) {
162 case OMAP_DSS_RFBI_PARALLELMODE_8:
166 rfbi_write_reg(RFBI_CMD, *b++);
170 case OMAP_DSS_RFBI_PARALLELMODE_16:
174 for (; len; len -= 2)
175 rfbi_write_reg(RFBI_CMD, *w++);
179 case OMAP_DSS_RFBI_PARALLELMODE_9:
180 case OMAP_DSS_RFBI_PARALLELMODE_12:
185 EXPORT_SYMBOL(omap_rfbi_write_command);
187 void omap_rfbi_read_data(void *buf, u32 len)
189 switch (rfbi.parallelmode) {
190 case OMAP_DSS_RFBI_PARALLELMODE_8:
194 rfbi_write_reg(RFBI_READ, 0);
195 *b++ = rfbi_read_reg(RFBI_READ);
200 case OMAP_DSS_RFBI_PARALLELMODE_16:
204 for (; len; len -= 2) {
205 rfbi_write_reg(RFBI_READ, 0);
206 *w++ = rfbi_read_reg(RFBI_READ);
211 case OMAP_DSS_RFBI_PARALLELMODE_9:
212 case OMAP_DSS_RFBI_PARALLELMODE_12:
217 EXPORT_SYMBOL(omap_rfbi_read_data);
219 void omap_rfbi_write_data(const void *buf, u32 len)
221 switch (rfbi.parallelmode) {
222 case OMAP_DSS_RFBI_PARALLELMODE_8:
226 rfbi_write_reg(RFBI_PARAM, *b++);
230 case OMAP_DSS_RFBI_PARALLELMODE_16:
234 for (; len; len -= 2)
235 rfbi_write_reg(RFBI_PARAM, *w++);
239 case OMAP_DSS_RFBI_PARALLELMODE_9:
240 case OMAP_DSS_RFBI_PARALLELMODE_12:
246 EXPORT_SYMBOL(omap_rfbi_write_data);
248 void omap_rfbi_write_pixels(const void __iomem *buf, int scr_width,
252 int start_offset = scr_width * y + x;
253 int horiz_offset = scr_width - w;
256 if (rfbi.datatype == OMAP_DSS_RFBI_DATATYPE_16 &&
257 rfbi.parallelmode == OMAP_DSS_RFBI_PARALLELMODE_8) {
258 const u16 __iomem *pd = buf;
262 for (i = 0; i < w; ++i) {
263 const u8 __iomem *b = (const u8 __iomem *)pd;
264 rfbi_write_reg(RFBI_PARAM, __raw_readb(b+1));
265 rfbi_write_reg(RFBI_PARAM, __raw_readb(b+0));
270 } else if (rfbi.datatype == OMAP_DSS_RFBI_DATATYPE_24 &&
271 rfbi.parallelmode == OMAP_DSS_RFBI_PARALLELMODE_8) {
272 const u32 __iomem *pd = buf;
276 for (i = 0; i < w; ++i) {
277 const u8 __iomem *b = (const u8 __iomem *)pd;
278 rfbi_write_reg(RFBI_PARAM, __raw_readb(b+2));
279 rfbi_write_reg(RFBI_PARAM, __raw_readb(b+1));
280 rfbi_write_reg(RFBI_PARAM, __raw_readb(b+0));
285 } else if (rfbi.datatype == OMAP_DSS_RFBI_DATATYPE_16 &&
286 rfbi.parallelmode == OMAP_DSS_RFBI_PARALLELMODE_16) {
287 const u16 __iomem *pd = buf;
291 for (i = 0; i < w; ++i) {
292 rfbi_write_reg(RFBI_PARAM, __raw_readw(pd));
301 EXPORT_SYMBOL(omap_rfbi_write_pixels);
303 static int rfbi_transfer_area(struct omap_dss_device *dssdev, u16 width,
304 u16 height, void (*callback)(void *data), void *data)
308 struct omap_video_timings timings = {
319 /*BUG_ON(callback == 0);*/
320 BUG_ON(rfbi.framedone_callback != NULL);
322 DSSDBG("rfbi_transfer_area %dx%d\n", width, height);
324 dss_mgr_set_timings(dssdev->manager, &timings);
326 r = dss_mgr_enable(dssdev->manager);
330 rfbi.framedone_callback = callback;
331 rfbi.framedone_callback_data = data;
333 rfbi_write_reg(RFBI_PIXEL_CNT, width * height);
335 l = rfbi_read_reg(RFBI_CONTROL);
336 l = FLD_MOD(l, 1, 0, 0); /* enable */
337 if (!rfbi.te_enabled)
338 l = FLD_MOD(l, 1, 4, 4); /* ITE */
340 rfbi_write_reg(RFBI_CONTROL, l);
345 static void framedone_callback(void *data, u32 mask)
347 void (*callback)(void *data);
349 DSSDBG("FRAMEDONE\n");
351 REG_FLD_MOD(RFBI_CONTROL, 0, 0, 0);
353 callback = rfbi.framedone_callback;
354 rfbi.framedone_callback = NULL;
356 if (callback != NULL)
357 callback(rfbi.framedone_callback_data);
361 static void rfbi_print_timings(void)
366 l = rfbi_read_reg(RFBI_CONFIG(0));
367 time = 1000000000 / rfbi.l4_khz;
371 DSSDBG("Tick time %u ps\n", time);
372 l = rfbi_read_reg(RFBI_ONOFF_TIME(0));
373 DSSDBG("CSONTIME %d, CSOFFTIME %d, WEONTIME %d, WEOFFTIME %d, "
374 "REONTIME %d, REOFFTIME %d\n",
375 l & 0x0f, (l >> 4) & 0x3f, (l >> 10) & 0x0f, (l >> 14) & 0x3f,
376 (l >> 20) & 0x0f, (l >> 24) & 0x3f);
378 l = rfbi_read_reg(RFBI_CYCLE_TIME(0));
379 DSSDBG("WECYCLETIME %d, RECYCLETIME %d, CSPULSEWIDTH %d, "
381 (l & 0x3f), (l >> 6) & 0x3f, (l >> 12) & 0x3f,
385 static void rfbi_print_timings(void) {}
391 static u32 extif_clk_period;
393 static inline unsigned long round_to_extif_ticks(unsigned long ps, int div)
395 int bus_tick = extif_clk_period * div;
396 return (ps + bus_tick - 1) / bus_tick * bus_tick;
399 static int calc_reg_timing(struct rfbi_timings *t, int div)
403 t->cs_on_time = round_to_extif_ticks(t->cs_on_time, div);
405 t->we_on_time = round_to_extif_ticks(t->we_on_time, div);
406 t->we_off_time = round_to_extif_ticks(t->we_off_time, div);
407 t->we_cycle_time = round_to_extif_ticks(t->we_cycle_time, div);
409 t->re_on_time = round_to_extif_ticks(t->re_on_time, div);
410 t->re_off_time = round_to_extif_ticks(t->re_off_time, div);
411 t->re_cycle_time = round_to_extif_ticks(t->re_cycle_time, div);
413 t->access_time = round_to_extif_ticks(t->access_time, div);
414 t->cs_off_time = round_to_extif_ticks(t->cs_off_time, div);
415 t->cs_pulse_width = round_to_extif_ticks(t->cs_pulse_width, div);
417 DSSDBG("[reg]cson %d csoff %d reon %d reoff %d\n",
418 t->cs_on_time, t->cs_off_time, t->re_on_time, t->re_off_time);
419 DSSDBG("[reg]weon %d weoff %d recyc %d wecyc %d\n",
420 t->we_on_time, t->we_off_time, t->re_cycle_time,
422 DSSDBG("[reg]rdaccess %d cspulse %d\n",
423 t->access_time, t->cs_pulse_width);
425 return rfbi_convert_timings(t);
428 static int calc_extif_timings(struct rfbi_timings *t)
433 rfbi_get_clk_info(&extif_clk_period, &max_clk_div);
434 for (div = 1; div <= max_clk_div; div++) {
435 if (calc_reg_timing(t, div) == 0)
439 if (div <= max_clk_div)
442 DSSERR("can't setup timings\n");
447 static void rfbi_set_timings(int rfbi_module, struct rfbi_timings *t)
452 r = calc_extif_timings(t);
454 DSSERR("Failed to calc timings\n");
457 BUG_ON(!t->converted);
459 rfbi_write_reg(RFBI_ONOFF_TIME(rfbi_module), t->tim[0]);
460 rfbi_write_reg(RFBI_CYCLE_TIME(rfbi_module), t->tim[1]);
462 /* TIMEGRANULARITY */
463 REG_FLD_MOD(RFBI_CONFIG(rfbi_module),
464 (t->tim[2] ? 1 : 0), 4, 4);
466 rfbi_print_timings();
469 static int ps_to_rfbi_ticks(int time, int div)
471 unsigned long tick_ps;
474 /* Calculate in picosecs to yield more exact results */
475 tick_ps = 1000000000 / (rfbi.l4_khz) * div;
477 ret = (time + tick_ps - 1) / tick_ps;
482 static void rfbi_get_clk_info(u32 *clk_period, u32 *max_clk_div)
484 *clk_period = 1000000000 / rfbi.l4_khz;
488 static int rfbi_convert_timings(struct rfbi_timings *t)
491 int reon, reoff, weon, weoff, cson, csoff, cs_pulse;
492 int actim, recyc, wecyc;
493 int div = t->clk_div;
495 if (div <= 0 || div > 2)
498 /* Make sure that after conversion it still holds that:
499 * weoff > weon, reoff > reon, recyc >= reoff, wecyc >= weoff,
500 * csoff > cson, csoff >= max(weoff, reoff), actim > reon
502 weon = ps_to_rfbi_ticks(t->we_on_time, div);
503 weoff = ps_to_rfbi_ticks(t->we_off_time, div);
511 reon = ps_to_rfbi_ticks(t->re_on_time, div);
512 reoff = ps_to_rfbi_ticks(t->re_off_time, div);
520 cson = ps_to_rfbi_ticks(t->cs_on_time, div);
521 csoff = ps_to_rfbi_ticks(t->cs_off_time, div);
524 if (csoff < max(weoff, reoff))
525 csoff = max(weoff, reoff);
540 actim = ps_to_rfbi_ticks(t->access_time, div);
546 wecyc = ps_to_rfbi_ticks(t->we_cycle_time, div);
552 recyc = ps_to_rfbi_ticks(t->re_cycle_time, div);
558 cs_pulse = ps_to_rfbi_ticks(t->cs_pulse_width, div);
576 /* xxx FIX module selection missing */
577 int omap_rfbi_setup_te(enum omap_rfbi_te_mode mode,
578 unsigned hs_pulse_time, unsigned vs_pulse_time,
579 int hs_pol_inv, int vs_pol_inv, int extif_div)
585 hs = ps_to_rfbi_ticks(hs_pulse_time, 1);
586 vs = ps_to_rfbi_ticks(vs_pulse_time, 1);
589 if (mode == OMAP_DSS_RFBI_TE_MODE_2)
591 else /* OMAP_DSS_RFBI_TE_MODE_1 */
598 DSSDBG("setup_te: mode %d hs %d vs %d hs_inv %d vs_inv %d\n",
599 mode, hs, vs, hs_pol_inv, vs_pol_inv);
601 rfbi_write_reg(RFBI_HSYNC_WIDTH, hs);
602 rfbi_write_reg(RFBI_VSYNC_WIDTH, vs);
604 l = rfbi_read_reg(RFBI_CONFIG(0));
616 EXPORT_SYMBOL(omap_rfbi_setup_te);
618 /* xxx FIX module selection missing */
619 int omap_rfbi_enable_te(bool enable, unsigned line)
623 DSSDBG("te %d line %d mode %d\n", enable, line, rfbi.te_mode);
624 if (line > (1 << 11) - 1)
627 l = rfbi_read_reg(RFBI_CONFIG(0));
631 l |= rfbi.te_mode << 2;
634 rfbi_write_reg(RFBI_CONFIG(0), l);
635 rfbi_write_reg(RFBI_LINE_NUMBER, line);
639 EXPORT_SYMBOL(omap_rfbi_enable_te);
641 static int rfbi_configure(int rfbi_module, int bpp, int lines)
644 int cycle1 = 0, cycle2 = 0, cycle3 = 0;
645 enum omap_rfbi_cycleformat cycleformat;
646 enum omap_rfbi_datatype datatype;
647 enum omap_rfbi_parallelmode parallelmode;
651 datatype = OMAP_DSS_RFBI_DATATYPE_12;
654 datatype = OMAP_DSS_RFBI_DATATYPE_16;
657 datatype = OMAP_DSS_RFBI_DATATYPE_18;
660 datatype = OMAP_DSS_RFBI_DATATYPE_24;
666 rfbi.datatype = datatype;
670 parallelmode = OMAP_DSS_RFBI_PARALLELMODE_8;
673 parallelmode = OMAP_DSS_RFBI_PARALLELMODE_9;
676 parallelmode = OMAP_DSS_RFBI_PARALLELMODE_12;
679 parallelmode = OMAP_DSS_RFBI_PARALLELMODE_16;
685 rfbi.parallelmode = parallelmode;
687 if ((bpp % lines) == 0) {
688 switch (bpp / lines) {
690 cycleformat = OMAP_DSS_RFBI_CYCLEFORMAT_1_1;
693 cycleformat = OMAP_DSS_RFBI_CYCLEFORMAT_2_1;
696 cycleformat = OMAP_DSS_RFBI_CYCLEFORMAT_3_1;
702 } else if ((2 * bpp % lines) == 0) {
703 if ((2 * bpp / lines) == 3)
704 cycleformat = OMAP_DSS_RFBI_CYCLEFORMAT_3_2;
714 switch (cycleformat) {
715 case OMAP_DSS_RFBI_CYCLEFORMAT_1_1:
719 case OMAP_DSS_RFBI_CYCLEFORMAT_2_1:
724 case OMAP_DSS_RFBI_CYCLEFORMAT_3_1:
730 case OMAP_DSS_RFBI_CYCLEFORMAT_3_2:
732 cycle2 = (lines / 2) | ((lines / 2) << 16);
733 cycle3 = (lines << 16);
737 REG_FLD_MOD(RFBI_CONTROL, 0, 3, 2); /* clear CS */
740 l |= FLD_VAL(parallelmode, 1, 0);
741 l |= FLD_VAL(0, 3, 2); /* TRIGGERMODE: ITE */
742 l |= FLD_VAL(0, 4, 4); /* TIMEGRANULARITY */
743 l |= FLD_VAL(datatype, 6, 5);
744 /* l |= FLD_VAL(2, 8, 7); */ /* L4FORMAT, 2pix/L4 */
745 l |= FLD_VAL(0, 8, 7); /* L4FORMAT, 1pix/L4 */
746 l |= FLD_VAL(cycleformat, 10, 9);
747 l |= FLD_VAL(0, 12, 11); /* UNUSEDBITS */
748 l |= FLD_VAL(0, 16, 16); /* A0POLARITY */
749 l |= FLD_VAL(0, 17, 17); /* REPOLARITY */
750 l |= FLD_VAL(0, 18, 18); /* WEPOLARITY */
751 l |= FLD_VAL(0, 19, 19); /* CSPOLARITY */
752 l |= FLD_VAL(1, 20, 20); /* TE_VSYNC_POLARITY */
753 l |= FLD_VAL(1, 21, 21); /* HSYNCPOLARITY */
754 rfbi_write_reg(RFBI_CONFIG(rfbi_module), l);
756 rfbi_write_reg(RFBI_DATA_CYCLE1(rfbi_module), cycle1);
757 rfbi_write_reg(RFBI_DATA_CYCLE2(rfbi_module), cycle2);
758 rfbi_write_reg(RFBI_DATA_CYCLE3(rfbi_module), cycle3);
761 l = rfbi_read_reg(RFBI_CONTROL);
762 l = FLD_MOD(l, rfbi_module+1, 3, 2); /* Select CSx */
763 l = FLD_MOD(l, 0, 1, 1); /* clear bypass */
764 rfbi_write_reg(RFBI_CONTROL, l);
767 DSSDBG("RFBI config: bpp %d, lines %d, cycles: 0x%x 0x%x 0x%x\n",
768 bpp, lines, cycle1, cycle2, cycle3);
773 int omap_rfbi_configure(struct omap_dss_device *dssdev, int pixel_size,
776 return rfbi_configure(dssdev->phy.rfbi.channel, pixel_size, data_lines);
778 EXPORT_SYMBOL(omap_rfbi_configure);
780 int omap_rfbi_prepare_update(struct omap_dss_device *dssdev,
781 u16 *x, u16 *y, u16 *w, u16 *h)
784 struct omap_video_timings timings = {
795 dssdev->driver->get_resolution(dssdev, &dw, &dh);
797 if (*x > dw || *y > dh)
809 if (*w == 0 || *h == 0)
812 dss_mgr_set_timings(dssdev->manager, &timings);
816 EXPORT_SYMBOL(omap_rfbi_prepare_update);
818 int omap_rfbi_update(struct omap_dss_device *dssdev,
819 u16 x, u16 y, u16 w, u16 h,
820 void (*callback)(void *), void *data)
824 r = rfbi_transfer_area(dssdev, w, h, callback, data);
828 EXPORT_SYMBOL(omap_rfbi_update);
830 static void rfbi_dump_regs(struct seq_file *s)
832 #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, rfbi_read_reg(r))
834 if (rfbi_runtime_get())
837 DUMPREG(RFBI_REVISION);
838 DUMPREG(RFBI_SYSCONFIG);
839 DUMPREG(RFBI_SYSSTATUS);
840 DUMPREG(RFBI_CONTROL);
841 DUMPREG(RFBI_PIXEL_CNT);
842 DUMPREG(RFBI_LINE_NUMBER);
847 DUMPREG(RFBI_STATUS);
849 DUMPREG(RFBI_CONFIG(0));
850 DUMPREG(RFBI_ONOFF_TIME(0));
851 DUMPREG(RFBI_CYCLE_TIME(0));
852 DUMPREG(RFBI_DATA_CYCLE1(0));
853 DUMPREG(RFBI_DATA_CYCLE2(0));
854 DUMPREG(RFBI_DATA_CYCLE3(0));
856 DUMPREG(RFBI_CONFIG(1));
857 DUMPREG(RFBI_ONOFF_TIME(1));
858 DUMPREG(RFBI_CYCLE_TIME(1));
859 DUMPREG(RFBI_DATA_CYCLE1(1));
860 DUMPREG(RFBI_DATA_CYCLE2(1));
861 DUMPREG(RFBI_DATA_CYCLE3(1));
863 DUMPREG(RFBI_VSYNC_WIDTH);
864 DUMPREG(RFBI_HSYNC_WIDTH);
870 static void rfbi_config_lcd_manager(struct omap_dss_device *dssdev)
872 struct dss_lcd_mgr_config mgr_config;
874 mgr_config.io_pad_mode = DSS_IO_PAD_MODE_RFBI;
876 mgr_config.stallmode = true;
877 /* Do we need fifohandcheck for RFBI? */
878 mgr_config.fifohandcheck = false;
880 mgr_config.video_port_width = dssdev->ctrl.pixel_size;
881 mgr_config.lcden_sig_polarity = 0;
883 dss_mgr_set_lcd_config(dssdev->manager, &mgr_config);
886 int omapdss_rfbi_display_enable(struct omap_dss_device *dssdev)
890 if (dssdev->manager == NULL) {
891 DSSERR("failed to enable display: no manager\n");
895 r = rfbi_runtime_get();
899 r = omap_dss_start_device(dssdev);
901 DSSERR("failed to start device\n");
905 r = omap_dispc_register_isr(framedone_callback, NULL,
906 DISPC_IRQ_FRAMEDONE);
908 DSSERR("can't get FRAMEDONE irq\n");
912 rfbi_config_lcd_manager(dssdev);
914 rfbi_configure(dssdev->phy.rfbi.channel,
915 dssdev->ctrl.pixel_size,
916 dssdev->phy.rfbi.data_lines);
918 rfbi_set_timings(dssdev->phy.rfbi.channel,
919 &dssdev->ctrl.rfbi_timings);
924 omap_dss_stop_device(dssdev);
929 EXPORT_SYMBOL(omapdss_rfbi_display_enable);
931 void omapdss_rfbi_display_disable(struct omap_dss_device *dssdev)
933 omap_dispc_unregister_isr(framedone_callback, NULL,
934 DISPC_IRQ_FRAMEDONE);
935 omap_dss_stop_device(dssdev);
939 EXPORT_SYMBOL(omapdss_rfbi_display_disable);
941 static int __init rfbi_init_display(struct omap_dss_device *dssdev)
943 rfbi.dssdev[dssdev->phy.rfbi.channel] = dssdev;
944 dssdev->caps = OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE;
948 static void __init rfbi_probe_pdata(struct platform_device *pdev)
950 struct omap_dss_board_info *pdata = pdev->dev.platform_data;
953 for (i = 0; i < pdata->num_devices; ++i) {
954 struct omap_dss_device *dssdev = pdata->devices[i];
956 if (dssdev->type != OMAP_DISPLAY_TYPE_DBI)
959 r = rfbi_init_display(dssdev);
961 DSSERR("device %s init failed: %d\n", dssdev->name, r);
965 r = omap_dss_register_device(dssdev, &pdev->dev, i);
967 DSSERR("device %s register failed: %d\n",
972 /* RFBI HW IP initialisation */
973 static int __init omap_rfbihw_probe(struct platform_device *pdev)
976 struct resource *rfbi_mem;
982 sema_init(&rfbi.bus_lock, 1);
984 rfbi_mem = platform_get_resource(rfbi.pdev, IORESOURCE_MEM, 0);
986 DSSERR("can't get IORESOURCE_MEM RFBI\n");
990 rfbi.base = devm_ioremap(&pdev->dev, rfbi_mem->start,
991 resource_size(rfbi_mem));
993 DSSERR("can't ioremap RFBI\n");
997 clk = clk_get(&pdev->dev, "ick");
999 DSSERR("can't get ick\n");
1000 return PTR_ERR(clk);
1003 rfbi.l4_khz = clk_get_rate(clk) / 1000;
1007 pm_runtime_enable(&pdev->dev);
1009 r = rfbi_runtime_get();
1011 goto err_runtime_get;
1015 rev = rfbi_read_reg(RFBI_REVISION);
1016 dev_dbg(&pdev->dev, "OMAP RFBI rev %d.%d\n",
1017 FLD_GET(rev, 7, 4), FLD_GET(rev, 3, 0));
1021 dss_debugfs_create_file("rfbi", rfbi_dump_regs);
1023 rfbi_probe_pdata(pdev);
1028 pm_runtime_disable(&pdev->dev);
1032 static int __exit omap_rfbihw_remove(struct platform_device *pdev)
1034 omap_dss_unregister_child_devices(&pdev->dev);
1035 pm_runtime_disable(&pdev->dev);
1039 static int rfbi_runtime_suspend(struct device *dev)
1041 dispc_runtime_put();
1046 static int rfbi_runtime_resume(struct device *dev)
1050 r = dispc_runtime_get();
1057 static const struct dev_pm_ops rfbi_pm_ops = {
1058 .runtime_suspend = rfbi_runtime_suspend,
1059 .runtime_resume = rfbi_runtime_resume,
1062 static struct platform_driver omap_rfbihw_driver = {
1063 .remove = __exit_p(omap_rfbihw_remove),
1065 .name = "omapdss_rfbi",
1066 .owner = THIS_MODULE,
1071 int __init rfbi_init_platform_driver(void)
1073 return platform_driver_probe(&omap_rfbihw_driver, omap_rfbihw_probe);
1076 void __exit rfbi_uninit_platform_driver(void)
1078 platform_driver_unregister(&omap_rfbihw_driver);