2 * linux/drivers/video/omap2/dss/dss.h
4 * Copyright (C) 2009 Nokia Corporation
5 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
7 * Some code and ideas taken from drivers/video/omap/ driver
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License version 2 as published by
12 * the Free Software Foundation.
14 * This program is distributed in the hope that it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
19 * You should have received a copy of the GNU General Public License along with
20 * this program. If not, see <http://www.gnu.org/licenses/>.
26 #ifdef CONFIG_OMAP2_DSS_DEBUG_SUPPORT
31 extern bool dss_debug;
32 #ifdef DSS_SUBSYS_NAME
33 #define DSSDBG(format, ...) \
35 printk(KERN_DEBUG "omapdss " DSS_SUBSYS_NAME ": " format, \
38 #define DSSDBG(format, ...) \
40 printk(KERN_DEBUG "omapdss: " format, ## __VA_ARGS__)
43 #ifdef DSS_SUBSYS_NAME
44 #define DSSDBGF(format, ...) \
46 printk(KERN_DEBUG "omapdss " DSS_SUBSYS_NAME \
47 ": %s(" format ")\n", \
51 #define DSSDBGF(format, ...) \
53 printk(KERN_DEBUG "omapdss: " \
54 ": %s(" format ")\n", \
60 #define DSSDBG(format, ...)
61 #define DSSDBGF(format, ...)
65 #ifdef DSS_SUBSYS_NAME
66 #define DSSERR(format, ...) \
67 printk(KERN_ERR "omapdss " DSS_SUBSYS_NAME " error: " format, \
70 #define DSSERR(format, ...) \
71 printk(KERN_ERR "omapdss error: " format, ## __VA_ARGS__)
74 #ifdef DSS_SUBSYS_NAME
75 #define DSSINFO(format, ...) \
76 printk(KERN_INFO "omapdss " DSS_SUBSYS_NAME ": " format, \
79 #define DSSINFO(format, ...) \
80 printk(KERN_INFO "omapdss: " format, ## __VA_ARGS__)
83 #ifdef DSS_SUBSYS_NAME
84 #define DSSWARN(format, ...) \
85 printk(KERN_WARNING "omapdss " DSS_SUBSYS_NAME ": " format, \
88 #define DSSWARN(format, ...) \
89 printk(KERN_WARNING "omapdss: " format, ## __VA_ARGS__)
92 /* OMAP TRM gives bitfields as start:end, where start is the higher bit
93 number. For example 7:0 */
94 #define FLD_MASK(start, end) (((1 << ((start) - (end) + 1)) - 1) << (end))
95 #define FLD_VAL(val, start, end) (((val) << (end)) & FLD_MASK(start, end))
96 #define FLD_GET(val, start, end) (((val) & FLD_MASK(start, end)) >> (end))
97 #define FLD_MOD(orig, val, start, end) \
98 (((orig) & ~FLD_MASK(start, end)) | FLD_VAL(val, start, end))
100 enum dss_io_pad_mode {
101 DSS_IO_PAD_MODE_RESET,
102 DSS_IO_PAD_MODE_RFBI,
103 DSS_IO_PAD_MODE_BYPASS,
106 enum dss_hdmi_venc_clk_source_select {
111 enum dss_dsi_content_type {
113 DSS_DSI_CONTENT_GENERIC,
116 struct dss_clock_info {
117 /* rates that we get with dividers below */
124 struct dispc_clock_info {
125 /* rates that we get with dividers below */
134 struct dsi_clock_info {
135 /* rates that we get with dividers below */
137 unsigned long clkin4ddr;
139 unsigned long dsi_pll_hsdiv_dispc_clk; /* OMAP3: DSI1_PLL_CLK
140 * OMAP4: PLLx_CLK1 */
141 unsigned long dsi_pll_hsdiv_dsi_clk; /* OMAP3: DSI2_PLL_CLK
142 * OMAP4: PLLx_CLK2 */
143 unsigned long lp_clk;
148 u16 regm_dispc; /* OMAP3: REGM3
150 u16 regm_dsi; /* OMAP3: REGM4
156 struct platform_device;
159 struct bus_type *dss_get_bus(void);
160 struct regulator *dss_get_vdds_dsi(void);
161 struct regulator *dss_get_vdds_sdi(void);
162 int dss_get_ctx_loss_count(struct device *dev);
163 int dss_dsi_enable_pads(int dsi_id, unsigned lane_mask);
164 void dss_dsi_disable_pads(int dsi_id, unsigned lane_mask);
165 int dss_set_min_bus_tput(struct device *dev, unsigned long tput);
166 int dss_debugfs_create_file(const char *name, void (*write)(struct seq_file *));
168 int omap_dss_register_device(struct omap_dss_device *dssdev,
169 struct device *parent, int disp_num);
170 void omap_dss_unregister_device(struct omap_dss_device *dssdev);
171 void omap_dss_unregister_child_devices(struct device *parent);
174 void dss_apply_init(void);
175 int dss_mgr_wait_for_go(struct omap_overlay_manager *mgr);
176 int dss_mgr_wait_for_go_ovl(struct omap_overlay *ovl);
177 void dss_mgr_start_update(struct omap_overlay_manager *mgr);
178 int omap_dss_mgr_apply(struct omap_overlay_manager *mgr);
180 int dss_mgr_enable(struct omap_overlay_manager *mgr);
181 void dss_mgr_disable(struct omap_overlay_manager *mgr);
182 int dss_mgr_set_info(struct omap_overlay_manager *mgr,
183 struct omap_overlay_manager_info *info);
184 void dss_mgr_get_info(struct omap_overlay_manager *mgr,
185 struct omap_overlay_manager_info *info);
186 int dss_mgr_set_device(struct omap_overlay_manager *mgr,
187 struct omap_dss_device *dssdev);
188 int dss_mgr_unset_device(struct omap_overlay_manager *mgr);
189 void dss_mgr_set_timings(struct omap_overlay_manager *mgr,
190 struct omap_video_timings *timings);
191 const struct omap_video_timings *dss_mgr_get_timings(struct omap_overlay_manager *mgr);
193 bool dss_ovl_is_enabled(struct omap_overlay *ovl);
194 int dss_ovl_enable(struct omap_overlay *ovl);
195 int dss_ovl_disable(struct omap_overlay *ovl);
196 int dss_ovl_set_info(struct omap_overlay *ovl,
197 struct omap_overlay_info *info);
198 void dss_ovl_get_info(struct omap_overlay *ovl,
199 struct omap_overlay_info *info);
200 int dss_ovl_set_manager(struct omap_overlay *ovl,
201 struct omap_overlay_manager *mgr);
202 int dss_ovl_unset_manager(struct omap_overlay *ovl);
205 int dss_suspend_all_devices(void);
206 int dss_resume_all_devices(void);
207 void dss_disable_all_devices(void);
209 void dss_init_device(struct platform_device *pdev,
210 struct omap_dss_device *dssdev);
211 void dss_uninit_device(struct platform_device *pdev,
212 struct omap_dss_device *dssdev);
213 bool dss_use_replication(struct omap_dss_device *dssdev,
214 enum omap_color_mode mode);
217 int dss_init_overlay_managers(struct platform_device *pdev);
218 void dss_uninit_overlay_managers(struct platform_device *pdev);
219 int dss_mgr_simple_check(struct omap_overlay_manager *mgr,
220 const struct omap_overlay_manager_info *info);
221 int dss_mgr_check_timings(struct omap_overlay_manager *mgr,
222 const struct omap_video_timings *timings);
223 int dss_mgr_check(struct omap_overlay_manager *mgr,
224 struct omap_overlay_manager_info *info,
225 const struct omap_video_timings *mgr_timings,
226 struct omap_overlay_info **overlay_infos);
229 void dss_init_overlays(struct platform_device *pdev);
230 void dss_uninit_overlays(struct platform_device *pdev);
231 void dss_overlay_setup_dispc_manager(struct omap_overlay_manager *mgr);
232 void dss_recheck_connections(struct omap_dss_device *dssdev, bool force);
233 int dss_ovl_simple_check(struct omap_overlay *ovl,
234 const struct omap_overlay_info *info);
235 int dss_ovl_check(struct omap_overlay *ovl, struct omap_overlay_info *info,
236 const struct omap_video_timings *mgr_timings);
239 int dss_init_platform_driver(void) __init;
240 void dss_uninit_platform_driver(void);
242 void dss_select_hdmi_venc_clk_source(enum dss_hdmi_venc_clk_source_select);
243 enum dss_hdmi_venc_clk_source_select dss_get_hdmi_venc_clk_source(void);
244 const char *dss_get_generic_clk_source_name(enum omap_dss_clk_source clk_src);
245 void dss_dump_clocks(struct seq_file *s);
247 #if defined(CONFIG_DEBUG_FS) && defined(CONFIG_OMAP2_DSS_DEBUG_SUPPORT)
248 void dss_debug_dump_clocks(struct seq_file *s);
251 void dss_sdi_init(u8 datapairs);
252 int dss_sdi_enable(void);
253 void dss_sdi_disable(void);
255 void dss_select_dispc_clk_source(enum omap_dss_clk_source clk_src);
256 void dss_select_dsi_clk_source(int dsi_module,
257 enum omap_dss_clk_source clk_src);
258 void dss_select_lcd_clk_source(enum omap_channel channel,
259 enum omap_dss_clk_source clk_src);
260 enum omap_dss_clk_source dss_get_dispc_clk_source(void);
261 enum omap_dss_clk_source dss_get_dsi_clk_source(int dsi_module);
262 enum omap_dss_clk_source dss_get_lcd_clk_source(enum omap_channel channel);
264 void dss_set_venc_output(enum omap_dss_venc_type type);
265 void dss_set_dac_pwrdn_bgz(bool enable);
267 unsigned long dss_get_dpll4_rate(void);
268 int dss_calc_clock_rates(struct dss_clock_info *cinfo);
269 int dss_set_clock_div(struct dss_clock_info *cinfo);
270 int dss_get_clock_div(struct dss_clock_info *cinfo);
271 int dss_calc_clock_div(bool is_tft, unsigned long req_pck,
272 struct dss_clock_info *dss_cinfo,
273 struct dispc_clock_info *dispc_cinfo);
276 int sdi_init_platform_driver(void) __init;
277 void sdi_uninit_platform_driver(void) __exit;
280 #ifdef CONFIG_OMAP2_DSS_DSI
283 struct file_operations;
285 int dsi_init_platform_driver(void) __init;
286 void dsi_uninit_platform_driver(void) __exit;
288 int dsi_runtime_get(struct platform_device *dsidev);
289 void dsi_runtime_put(struct platform_device *dsidev);
291 void dsi_dump_clocks(struct seq_file *s);
293 void dsi_irq_handler(void);
294 u8 dsi_get_pixel_size(enum omap_dss_dsi_pixel_format fmt);
296 unsigned long dsi_get_pll_hsdiv_dispc_rate(struct platform_device *dsidev);
297 int dsi_pll_set_clock_div(struct platform_device *dsidev,
298 struct dsi_clock_info *cinfo);
299 int dsi_pll_calc_clock_div_pck(struct platform_device *dsidev, bool is_tft,
300 unsigned long req_pck, struct dsi_clock_info *cinfo,
301 struct dispc_clock_info *dispc_cinfo);
302 int dsi_pll_init(struct platform_device *dsidev, bool enable_hsclk,
304 void dsi_pll_uninit(struct platform_device *dsidev, bool disconnect_lanes);
305 void dsi_wait_pll_hsdiv_dispc_active(struct platform_device *dsidev);
306 void dsi_wait_pll_hsdiv_dsi_active(struct platform_device *dsidev);
307 struct platform_device *dsi_get_dsidev_from_id(int module);
309 static inline int dsi_runtime_get(struct platform_device *dsidev)
313 static inline void dsi_runtime_put(struct platform_device *dsidev)
316 static inline u8 dsi_get_pixel_size(enum omap_dss_dsi_pixel_format fmt)
318 WARN("%s: DSI not compiled in, returning pixel_size as 0\n", __func__);
321 static inline unsigned long dsi_get_pll_hsdiv_dispc_rate(struct platform_device *dsidev)
323 WARN("%s: DSI not compiled in, returning rate as 0\n", __func__);
326 static inline int dsi_pll_set_clock_div(struct platform_device *dsidev,
327 struct dsi_clock_info *cinfo)
329 WARN("%s: DSI not compiled in\n", __func__);
332 static inline int dsi_pll_calc_clock_div_pck(struct platform_device *dsidev,
333 bool is_tft, unsigned long req_pck,
334 struct dsi_clock_info *dsi_cinfo,
335 struct dispc_clock_info *dispc_cinfo)
337 WARN("%s: DSI not compiled in\n", __func__);
340 static inline int dsi_pll_init(struct platform_device *dsidev,
341 bool enable_hsclk, bool enable_hsdiv)
343 WARN("%s: DSI not compiled in\n", __func__);
346 static inline void dsi_pll_uninit(struct platform_device *dsidev,
347 bool disconnect_lanes)
350 static inline void dsi_wait_pll_hsdiv_dispc_active(struct platform_device *dsidev)
353 static inline void dsi_wait_pll_hsdiv_dsi_active(struct platform_device *dsidev)
356 static inline struct platform_device *dsi_get_dsidev_from_id(int module)
358 WARN("%s: DSI not compiled in, returning platform device as NULL\n",
365 int dpi_init_platform_driver(void) __init;
366 void dpi_uninit_platform_driver(void) __exit;
369 int dispc_init_platform_driver(void) __init;
370 void dispc_uninit_platform_driver(void) __exit;
371 void dispc_dump_clocks(struct seq_file *s);
372 void dispc_irq_handler(void);
374 int dispc_runtime_get(void);
375 void dispc_runtime_put(void);
377 void dispc_enable_sidle(void);
378 void dispc_disable_sidle(void);
380 void dispc_lcd_enable_signal_polarity(bool act_high);
381 void dispc_lcd_enable_signal(bool enable);
382 void dispc_pck_free_enable(bool enable);
383 void dispc_enable_fifomerge(bool enable);
384 void dispc_enable_gamma_table(bool enable);
385 void dispc_set_loadmode(enum omap_dss_load_mode mode);
387 bool dispc_mgr_timings_ok(enum omap_channel channel,
388 const struct omap_video_timings *timings);
389 unsigned long dispc_fclk_rate(void);
390 void dispc_find_clk_divs(bool is_tft, unsigned long req_pck, unsigned long fck,
391 struct dispc_clock_info *cinfo);
392 int dispc_calc_clock_rates(unsigned long dispc_fclk_rate,
393 struct dispc_clock_info *cinfo);
396 void dispc_ovl_set_fifo_threshold(enum omap_plane plane, u32 low, u32 high);
397 void dispc_ovl_compute_fifo_thresholds(enum omap_plane plane,
398 u32 *fifo_low, u32 *fifo_high, bool use_fifomerge,
400 int dispc_ovl_setup(enum omap_plane plane, struct omap_overlay_info *oi,
401 bool ilace, bool replication,
402 const struct omap_video_timings *mgr_timings);
403 int dispc_ovl_enable(enum omap_plane plane, bool enable);
404 void dispc_ovl_set_channel_out(enum omap_plane plane,
405 enum omap_channel channel);
407 void dispc_mgr_enable_fifohandcheck(enum omap_channel channel, bool enable);
408 u32 dispc_mgr_get_vsync_irq(enum omap_channel channel);
409 u32 dispc_mgr_get_framedone_irq(enum omap_channel channel);
410 bool dispc_mgr_go_busy(enum omap_channel channel);
411 void dispc_mgr_go(enum omap_channel channel);
412 bool dispc_mgr_is_enabled(enum omap_channel channel);
413 void dispc_mgr_enable(enum omap_channel channel, bool enable);
414 bool dispc_mgr_is_channel_enabled(enum omap_channel channel);
415 void dispc_mgr_set_io_pad_mode(enum dss_io_pad_mode mode);
416 void dispc_mgr_enable_stallmode(enum omap_channel channel, bool enable);
417 void dispc_mgr_set_tft_data_lines(enum omap_channel channel, u8 data_lines);
418 void dispc_mgr_set_lcd_display_type(enum omap_channel channel,
419 enum omap_lcd_display_type type);
420 void dispc_mgr_set_timings(enum omap_channel channel,
421 struct omap_video_timings *timings);
422 void dispc_mgr_set_pol_freq(enum omap_channel channel,
423 enum omap_panel_config config, u8 acbi, u8 acb);
424 unsigned long dispc_mgr_lclk_rate(enum omap_channel channel);
425 unsigned long dispc_mgr_pclk_rate(enum omap_channel channel);
426 unsigned long dispc_core_clk_rate(void);
427 int dispc_mgr_set_clock_div(enum omap_channel channel,
428 struct dispc_clock_info *cinfo);
429 int dispc_mgr_get_clock_div(enum omap_channel channel,
430 struct dispc_clock_info *cinfo);
431 void dispc_mgr_setup(enum omap_channel channel,
432 struct omap_overlay_manager_info *info);
435 #ifdef CONFIG_OMAP2_DSS_VENC
436 int venc_init_platform_driver(void) __init;
437 void venc_uninit_platform_driver(void) __exit;
438 unsigned long venc_get_pixel_clock(void);
440 static inline unsigned long venc_get_pixel_clock(void)
442 WARN("%s: VENC not compiled in, returning pclk as 0\n", __func__);
448 #ifdef CONFIG_OMAP4_DSS_HDMI
449 int hdmi_init_platform_driver(void) __init;
450 void hdmi_uninit_platform_driver(void) __exit;
451 unsigned long hdmi_get_pixel_clock(void);
453 static inline unsigned long hdmi_get_pixel_clock(void)
455 WARN("%s: HDMI not compiled in, returning pclk as 0\n", __func__);
459 int omapdss_hdmi_display_enable(struct omap_dss_device *dssdev);
460 void omapdss_hdmi_display_disable(struct omap_dss_device *dssdev);
461 void omapdss_hdmi_display_set_timing(struct omap_dss_device *dssdev);
462 int omapdss_hdmi_display_check_timing(struct omap_dss_device *dssdev,
463 struct omap_video_timings *timings);
464 int omapdss_hdmi_read_edid(u8 *buf, int len);
465 bool omapdss_hdmi_detect(void);
466 int hdmi_panel_init(void);
467 void hdmi_panel_exit(void);
468 #ifdef CONFIG_OMAP4_DSS_HDMI_AUDIO
469 int hdmi_audio_enable(void);
470 void hdmi_audio_disable(void);
471 int hdmi_audio_start(void);
472 void hdmi_audio_stop(void);
473 bool hdmi_mode_has_audio(void);
474 int hdmi_audio_config(struct omap_dss_audio *audio);
478 int rfbi_init_platform_driver(void) __init;
479 void rfbi_uninit_platform_driver(void) __exit;
482 #ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
483 static inline void dss_collect_irq_stats(u32 irqstatus, unsigned *irq_arr)
486 for (b = 0; b < 32; ++b) {
487 if (irqstatus & (1 << b))