2 * linux/drivers/video/omap2/dss/dss.h
4 * Copyright (C) 2009 Nokia Corporation
5 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
7 * Some code and ideas taken from drivers/video/omap/ driver
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License version 2 as published by
12 * the Free Software Foundation.
14 * This program is distributed in the hope that it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
19 * You should have received a copy of the GNU General Public License along with
20 * this program. If not, see <http://www.gnu.org/licenses/>.
26 #include <linux/interrupt.h>
32 #ifdef DSS_SUBSYS_NAME
33 #define pr_fmt(fmt) DSS_SUBSYS_NAME ": " fmt
35 #define pr_fmt(fmt) fmt
38 #define DSSDBG(format, ...) \
39 pr_debug(format, ## __VA_ARGS__)
41 #ifdef DSS_SUBSYS_NAME
42 #define DSSERR(format, ...) \
43 printk(KERN_ERR "omapdss " DSS_SUBSYS_NAME " error: " format, \
46 #define DSSERR(format, ...) \
47 printk(KERN_ERR "omapdss error: " format, ## __VA_ARGS__)
50 #ifdef DSS_SUBSYS_NAME
51 #define DSSINFO(format, ...) \
52 printk(KERN_INFO "omapdss " DSS_SUBSYS_NAME ": " format, \
55 #define DSSINFO(format, ...) \
56 printk(KERN_INFO "omapdss: " format, ## __VA_ARGS__)
59 #ifdef DSS_SUBSYS_NAME
60 #define DSSWARN(format, ...) \
61 printk(KERN_WARNING "omapdss " DSS_SUBSYS_NAME ": " format, \
64 #define DSSWARN(format, ...) \
65 printk(KERN_WARNING "omapdss: " format, ## __VA_ARGS__)
68 /* OMAP TRM gives bitfields as start:end, where start is the higher bit
69 number. For example 7:0 */
70 #define FLD_MASK(start, end) (((1 << ((start) - (end) + 1)) - 1) << (end))
71 #define FLD_VAL(val, start, end) (((val) << (end)) & FLD_MASK(start, end))
72 #define FLD_GET(val, start, end) (((val) & FLD_MASK(start, end)) >> (end))
73 #define FLD_MOD(orig, val, start, end) \
74 (((orig) & ~FLD_MASK(start, end)) | FLD_VAL(val, start, end))
76 enum dss_io_pad_mode {
77 DSS_IO_PAD_MODE_RESET,
79 DSS_IO_PAD_MODE_BYPASS,
82 enum dss_hdmi_venc_clk_source_select {
87 enum dss_dsi_content_type {
89 DSS_DSI_CONTENT_GENERIC,
92 enum dss_writeback_channel {
103 struct dss_clock_info {
104 /* rates that we get with dividers below */
111 struct dispc_clock_info {
112 /* rates that we get with dividers below */
121 struct dsi_clock_info {
122 /* rates that we get with dividers below */
124 unsigned long clkin4ddr;
126 unsigned long dsi_pll_hsdiv_dispc_clk; /* OMAP3: DSI1_PLL_CLK
127 * OMAP4: PLLx_CLK1 */
128 unsigned long dsi_pll_hsdiv_dsi_clk; /* OMAP3: DSI2_PLL_CLK
129 * OMAP4: PLLx_CLK2 */
130 unsigned long lp_clk;
135 u16 regm_dispc; /* OMAP3: REGM3
137 u16 regm_dsi; /* OMAP3: REGM4
148 struct dss_lcd_mgr_config {
149 enum dss_io_pad_mode io_pad_mode;
154 struct dispc_clock_info clock_info;
156 int video_port_width;
158 int lcden_sig_polarity;
162 struct platform_device;
165 struct platform_device *dss_get_core_pdev(void);
166 struct bus_type *dss_get_bus(void);
167 struct regulator *dss_get_vdds_dsi(void);
168 struct regulator *dss_get_vdds_sdi(void);
169 int dss_dsi_enable_pads(int dsi_id, unsigned lane_mask);
170 void dss_dsi_disable_pads(int dsi_id, unsigned lane_mask);
171 int dss_set_min_bus_tput(struct device *dev, unsigned long tput);
172 int dss_debugfs_create_file(const char *name, void (*write)(struct seq_file *));
174 struct omap_dss_device *dss_alloc_and_init_device(struct device *parent);
175 int dss_add_device(struct omap_dss_device *dssdev);
176 void dss_unregister_device(struct omap_dss_device *dssdev);
177 void dss_unregister_child_devices(struct device *parent);
178 void dss_put_device(struct omap_dss_device *dssdev);
179 void dss_copy_device_pdata(struct omap_dss_device *dst,
180 const struct omap_dss_device *src);
183 void dss_register_output(struct omap_dss_output *out);
184 void dss_unregister_output(struct omap_dss_output *out);
187 int dss_suspend_all_devices(void);
188 int dss_resume_all_devices(void);
189 void dss_disable_all_devices(void);
191 int display_init_sysfs(struct platform_device *pdev,
192 struct omap_dss_device *dssdev);
193 void display_uninit_sysfs(struct platform_device *pdev,
194 struct omap_dss_device *dssdev);
197 int dss_init_overlay_managers(struct platform_device *pdev);
198 void dss_uninit_overlay_managers(struct platform_device *pdev);
199 int dss_mgr_simple_check(struct omap_overlay_manager *mgr,
200 const struct omap_overlay_manager_info *info);
201 int dss_mgr_check_timings(struct omap_overlay_manager *mgr,
202 const struct omap_video_timings *timings);
203 int dss_mgr_check(struct omap_overlay_manager *mgr,
204 struct omap_overlay_manager_info *info,
205 const struct omap_video_timings *mgr_timings,
206 const struct dss_lcd_mgr_config *config,
207 struct omap_overlay_info **overlay_infos);
209 static inline bool dss_mgr_is_lcd(enum omap_channel id)
211 if (id == OMAP_DSS_CHANNEL_LCD || id == OMAP_DSS_CHANNEL_LCD2 ||
212 id == OMAP_DSS_CHANNEL_LCD3)
218 int dss_manager_kobj_init(struct omap_overlay_manager *mgr,
219 struct platform_device *pdev);
220 void dss_manager_kobj_uninit(struct omap_overlay_manager *mgr);
223 void dss_init_overlays(struct platform_device *pdev);
224 void dss_uninit_overlays(struct platform_device *pdev);
225 void dss_overlay_setup_dispc_manager(struct omap_overlay_manager *mgr);
226 int dss_ovl_simple_check(struct omap_overlay *ovl,
227 const struct omap_overlay_info *info);
228 int dss_ovl_check(struct omap_overlay *ovl, struct omap_overlay_info *info,
229 const struct omap_video_timings *mgr_timings);
230 bool dss_ovl_use_replication(struct dss_lcd_mgr_config config,
231 enum omap_color_mode mode);
232 int dss_overlay_kobj_init(struct omap_overlay *ovl,
233 struct platform_device *pdev);
234 void dss_overlay_kobj_uninit(struct omap_overlay *ovl);
237 int dss_init_platform_driver(void) __init;
238 void dss_uninit_platform_driver(void);
240 unsigned long dss_get_dispc_clk_rate(void);
241 int dss_dpi_select_source(enum omap_channel channel);
242 void dss_select_hdmi_venc_clk_source(enum dss_hdmi_venc_clk_source_select);
243 enum dss_hdmi_venc_clk_source_select dss_get_hdmi_venc_clk_source(void);
244 const char *dss_get_generic_clk_source_name(enum omap_dss_clk_source clk_src);
245 void dss_dump_clocks(struct seq_file *s);
247 #if defined(CONFIG_OMAP2_DSS_DEBUGFS)
248 void dss_debug_dump_clocks(struct seq_file *s);
251 int dss_get_ctx_loss_count(void);
253 void dss_sdi_init(int datapairs);
254 int dss_sdi_enable(void);
255 void dss_sdi_disable(void);
257 void dss_select_dsi_clk_source(int dsi_module,
258 enum omap_dss_clk_source clk_src);
259 void dss_select_lcd_clk_source(enum omap_channel channel,
260 enum omap_dss_clk_source clk_src);
261 enum omap_dss_clk_source dss_get_dispc_clk_source(void);
262 enum omap_dss_clk_source dss_get_dsi_clk_source(int dsi_module);
263 enum omap_dss_clk_source dss_get_lcd_clk_source(enum omap_channel channel);
265 void dss_set_venc_output(enum omap_dss_venc_type type);
266 void dss_set_dac_pwrdn_bgz(bool enable);
268 unsigned long dss_get_dpll4_rate(void);
269 int dss_calc_clock_rates(struct dss_clock_info *cinfo);
270 int dss_set_clock_div(struct dss_clock_info *cinfo);
271 int dss_calc_clock_div(unsigned long req_pck, struct dss_clock_info *dss_cinfo,
272 struct dispc_clock_info *dispc_cinfo);
275 int sdi_init_platform_driver(void) __init;
276 void sdi_uninit_platform_driver(void) __exit;
279 #ifdef CONFIG_OMAP2_DSS_DSI
282 struct file_operations;
284 int dsi_init_platform_driver(void) __init;
285 void dsi_uninit_platform_driver(void) __exit;
287 int dsi_runtime_get(struct platform_device *dsidev);
288 void dsi_runtime_put(struct platform_device *dsidev);
290 void dsi_dump_clocks(struct seq_file *s);
292 void dsi_irq_handler(void);
293 u8 dsi_get_pixel_size(enum omap_dss_dsi_pixel_format fmt);
295 unsigned long dsi_get_pll_hsdiv_dispc_rate(struct platform_device *dsidev);
296 int dsi_pll_set_clock_div(struct platform_device *dsidev,
297 struct dsi_clock_info *cinfo);
298 int dsi_pll_calc_clock_div_pck(struct platform_device *dsidev,
299 unsigned long req_pck, struct dsi_clock_info *cinfo,
300 struct dispc_clock_info *dispc_cinfo);
301 int dsi_pll_init(struct platform_device *dsidev, bool enable_hsclk,
303 void dsi_pll_uninit(struct platform_device *dsidev, bool disconnect_lanes);
304 void dsi_wait_pll_hsdiv_dispc_active(struct platform_device *dsidev);
305 void dsi_wait_pll_hsdiv_dsi_active(struct platform_device *dsidev);
306 struct platform_device *dsi_get_dsidev_from_id(int module);
308 static inline int dsi_runtime_get(struct platform_device *dsidev)
312 static inline void dsi_runtime_put(struct platform_device *dsidev)
315 static inline u8 dsi_get_pixel_size(enum omap_dss_dsi_pixel_format fmt)
317 WARN("%s: DSI not compiled in, returning pixel_size as 0\n", __func__);
320 static inline unsigned long dsi_get_pll_hsdiv_dispc_rate(struct platform_device *dsidev)
322 WARN("%s: DSI not compiled in, returning rate as 0\n", __func__);
325 static inline int dsi_pll_set_clock_div(struct platform_device *dsidev,
326 struct dsi_clock_info *cinfo)
328 WARN("%s: DSI not compiled in\n", __func__);
331 static inline int dsi_pll_calc_clock_div_pck(struct platform_device *dsidev,
332 unsigned long req_pck,
333 struct dsi_clock_info *dsi_cinfo,
334 struct dispc_clock_info *dispc_cinfo)
336 WARN("%s: DSI not compiled in\n", __func__);
339 static inline int dsi_pll_init(struct platform_device *dsidev,
340 bool enable_hsclk, bool enable_hsdiv)
342 WARN("%s: DSI not compiled in\n", __func__);
345 static inline void dsi_pll_uninit(struct platform_device *dsidev,
346 bool disconnect_lanes)
349 static inline void dsi_wait_pll_hsdiv_dispc_active(struct platform_device *dsidev)
352 static inline void dsi_wait_pll_hsdiv_dsi_active(struct platform_device *dsidev)
355 static inline struct platform_device *dsi_get_dsidev_from_id(int module)
362 int dpi_init_platform_driver(void) __init;
363 void dpi_uninit_platform_driver(void) __exit;
366 int dispc_init_platform_driver(void) __init;
367 void dispc_uninit_platform_driver(void) __exit;
368 void dispc_dump_clocks(struct seq_file *s);
370 void dispc_enable_sidle(void);
371 void dispc_disable_sidle(void);
373 void dispc_lcd_enable_signal(bool enable);
374 void dispc_pck_free_enable(bool enable);
375 void dispc_enable_fifomerge(bool enable);
376 void dispc_enable_gamma_table(bool enable);
377 void dispc_set_loadmode(enum omap_dss_load_mode mode);
379 bool dispc_mgr_timings_ok(enum omap_channel channel,
380 const struct omap_video_timings *timings);
381 unsigned long dispc_fclk_rate(void);
382 void dispc_find_clk_divs(unsigned long req_pck, unsigned long fck,
383 struct dispc_clock_info *cinfo);
384 int dispc_calc_clock_rates(unsigned long dispc_fclk_rate,
385 struct dispc_clock_info *cinfo);
388 void dispc_ovl_set_fifo_threshold(enum omap_plane plane, u32 low, u32 high);
389 void dispc_ovl_compute_fifo_thresholds(enum omap_plane plane,
390 u32 *fifo_low, u32 *fifo_high, bool use_fifomerge,
393 unsigned long dispc_mgr_lclk_rate(enum omap_channel channel);
394 unsigned long dispc_mgr_pclk_rate(enum omap_channel channel);
395 unsigned long dispc_core_clk_rate(void);
396 void dispc_mgr_set_clock_div(enum omap_channel channel,
397 const struct dispc_clock_info *cinfo);
398 int dispc_mgr_get_clock_div(enum omap_channel channel,
399 struct dispc_clock_info *cinfo);
401 u32 dispc_wb_get_framedone_irq(void);
402 bool dispc_wb_go_busy(void);
403 void dispc_wb_go(void);
404 void dispc_wb_enable(bool enable);
405 bool dispc_wb_is_enabled(void);
406 void dispc_wb_set_channel_in(enum dss_writeback_channel channel);
407 int dispc_wb_setup(const struct omap_dss_writeback_info *wi,
408 bool mem_to_mem, const struct omap_video_timings *timings);
411 #ifdef CONFIG_OMAP2_DSS_VENC
412 int venc_init_platform_driver(void) __init;
413 void venc_uninit_platform_driver(void) __exit;
414 unsigned long venc_get_pixel_clock(void);
416 static inline unsigned long venc_get_pixel_clock(void)
418 WARN("%s: VENC not compiled in, returning pclk as 0\n", __func__);
422 int omapdss_venc_display_enable(struct omap_dss_device *dssdev);
423 void omapdss_venc_display_disable(struct omap_dss_device *dssdev);
424 void omapdss_venc_set_timings(struct omap_dss_device *dssdev,
425 struct omap_video_timings *timings);
426 int omapdss_venc_check_timings(struct omap_dss_device *dssdev,
427 struct omap_video_timings *timings);
428 u32 omapdss_venc_get_wss(struct omap_dss_device *dssdev);
429 int omapdss_venc_set_wss(struct omap_dss_device *dssdev, u32 wss);
430 void omapdss_venc_set_type(struct omap_dss_device *dssdev,
431 enum omap_dss_venc_type type);
432 void omapdss_venc_invert_vid_out_polarity(struct omap_dss_device *dssdev,
433 bool invert_polarity);
434 int venc_panel_init(void);
435 void venc_panel_exit(void);
438 #ifdef CONFIG_OMAP4_DSS_HDMI
439 int hdmi_init_platform_driver(void) __init;
440 void hdmi_uninit_platform_driver(void) __exit;
441 unsigned long hdmi_get_pixel_clock(void);
443 static inline unsigned long hdmi_get_pixel_clock(void)
445 WARN("%s: HDMI not compiled in, returning pclk as 0\n", __func__);
449 int omapdss_hdmi_display_enable(struct omap_dss_device *dssdev);
450 void omapdss_hdmi_display_disable(struct omap_dss_device *dssdev);
451 int omapdss_hdmi_core_enable(struct omap_dss_device *dssdev);
452 void omapdss_hdmi_core_disable(struct omap_dss_device *dssdev);
453 void omapdss_hdmi_display_set_timing(struct omap_dss_device *dssdev,
454 struct omap_video_timings *timings);
455 int omapdss_hdmi_display_check_timing(struct omap_dss_device *dssdev,
456 struct omap_video_timings *timings);
457 int omapdss_hdmi_read_edid(u8 *buf, int len);
458 bool omapdss_hdmi_detect(void);
459 int hdmi_panel_init(void);
460 void hdmi_panel_exit(void);
461 #ifdef CONFIG_OMAP4_DSS_HDMI_AUDIO
462 int hdmi_audio_enable(void);
463 void hdmi_audio_disable(void);
464 int hdmi_audio_start(void);
465 void hdmi_audio_stop(void);
466 bool hdmi_mode_has_audio(void);
467 int hdmi_audio_config(struct omap_dss_audio *audio);
471 int rfbi_init_platform_driver(void) __init;
472 void rfbi_uninit_platform_driver(void) __exit;
475 #ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
476 static inline void dss_collect_irq_stats(u32 irqstatus, unsigned *irq_arr)
479 for (b = 0; b < 32; ++b) {
480 if (irqstatus & (1 << b))