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[firefly-linux-kernel-4.4.55.git] / drivers / video / omap2 / dss / dpi.c
1 /*
2  * linux/drivers/video/omap2/dss/dpi.c
3  *
4  * Copyright (C) 2009 Nokia Corporation
5  * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
6  *
7  * Some code and ideas taken from drivers/video/omap/ driver
8  * by Imre Deak.
9  *
10  * This program is free software; you can redistribute it and/or modify it
11  * under the terms of the GNU General Public License version 2 as published by
12  * the Free Software Foundation.
13  *
14  * This program is distributed in the hope that it will be useful, but WITHOUT
15  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
17  * more details.
18  *
19  * You should have received a copy of the GNU General Public License along with
20  * this program.  If not, see <http://www.gnu.org/licenses/>.
21  */
22
23 #define DSS_SUBSYS_NAME "DPI"
24
25 #include <linux/kernel.h>
26 #include <linux/delay.h>
27 #include <linux/export.h>
28 #include <linux/err.h>
29 #include <linux/errno.h>
30 #include <linux/platform_device.h>
31 #include <linux/regulator/consumer.h>
32
33 #include <video/omapdss.h>
34 #include <plat/cpu.h>
35
36 #include "dss.h"
37
38 static struct {
39         struct regulator *vdds_dsi_reg;
40         struct platform_device *dsidev;
41 } dpi;
42
43 static struct platform_device *dpi_get_dsidev(enum omap_dss_clk_source clk)
44 {
45         int dsi_module;
46
47         dsi_module = clk == OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC ? 0 : 1;
48
49         return dsi_get_dsidev_from_id(dsi_module);
50 }
51
52 static bool dpi_use_dsi_pll(struct omap_dss_device *dssdev)
53 {
54         if (dssdev->clocks.dispc.dispc_fclk_src ==
55                         OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC ||
56                         dssdev->clocks.dispc.dispc_fclk_src ==
57                         OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC ||
58                         dssdev->clocks.dispc.channel.lcd_clk_src ==
59                         OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC ||
60                         dssdev->clocks.dispc.channel.lcd_clk_src ==
61                         OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC)
62                 return true;
63         else
64                 return false;
65 }
66
67 static int dpi_set_dsi_clk(struct omap_dss_device *dssdev, bool is_tft,
68                 unsigned long pck_req, unsigned long *fck, int *lck_div,
69                 int *pck_div)
70 {
71         struct dsi_clock_info dsi_cinfo;
72         struct dispc_clock_info dispc_cinfo;
73         int r;
74
75         r = dsi_pll_calc_clock_div_pck(dpi.dsidev, is_tft, pck_req,
76                         &dsi_cinfo, &dispc_cinfo);
77         if (r)
78                 return r;
79
80         r = dsi_pll_set_clock_div(dpi.dsidev, &dsi_cinfo);
81         if (r)
82                 return r;
83
84         dss_select_dispc_clk_source(dssdev->clocks.dispc.dispc_fclk_src);
85
86         r = dispc_mgr_set_clock_div(dssdev->manager->id, &dispc_cinfo);
87         if (r) {
88                 dss_select_dispc_clk_source(OMAP_DSS_CLK_SRC_FCK);
89                 return r;
90         }
91
92         *fck = dsi_cinfo.dsi_pll_hsdiv_dispc_clk;
93         *lck_div = dispc_cinfo.lck_div;
94         *pck_div = dispc_cinfo.pck_div;
95
96         return 0;
97 }
98
99 static int dpi_set_dispc_clk(struct omap_dss_device *dssdev, bool is_tft,
100                 unsigned long pck_req, unsigned long *fck, int *lck_div,
101                 int *pck_div)
102 {
103         struct dss_clock_info dss_cinfo;
104         struct dispc_clock_info dispc_cinfo;
105         int r;
106
107         r = dss_calc_clock_div(is_tft, pck_req, &dss_cinfo, &dispc_cinfo);
108         if (r)
109                 return r;
110
111         r = dss_set_clock_div(&dss_cinfo);
112         if (r)
113                 return r;
114
115         r = dispc_mgr_set_clock_div(dssdev->manager->id, &dispc_cinfo);
116         if (r)
117                 return r;
118
119         *fck = dss_cinfo.fck;
120         *lck_div = dispc_cinfo.lck_div;
121         *pck_div = dispc_cinfo.pck_div;
122
123         return 0;
124 }
125
126 static int dpi_set_mode(struct omap_dss_device *dssdev)
127 {
128         struct omap_video_timings *t = &dssdev->panel.timings;
129         int lck_div = 0, pck_div = 0;
130         unsigned long fck = 0;
131         unsigned long pck;
132         bool is_tft;
133         int r = 0;
134
135         dispc_mgr_set_pol_freq(dssdev->manager->id, dssdev->panel.config,
136                         dssdev->panel.acbi, dssdev->panel.acb);
137
138         is_tft = (dssdev->panel.config & OMAP_DSS_LCD_TFT) != 0;
139
140         if (dpi_use_dsi_pll(dssdev))
141                 r = dpi_set_dsi_clk(dssdev, is_tft, t->pixel_clock * 1000,
142                                 &fck, &lck_div, &pck_div);
143         else
144                 r = dpi_set_dispc_clk(dssdev, is_tft, t->pixel_clock * 1000,
145                                 &fck, &lck_div, &pck_div);
146         if (r)
147                 return r;
148
149         pck = fck / lck_div / pck_div / 1000;
150
151         if (pck != t->pixel_clock) {
152                 DSSWARN("Could not find exact pixel clock. "
153                                 "Requested %d kHz, got %lu kHz\n",
154                                 t->pixel_clock, pck);
155
156                 t->pixel_clock = pck;
157         }
158
159         dispc_mgr_set_lcd_timings(dssdev->manager->id, t);
160
161         return 0;
162 }
163
164 static void dpi_basic_init(struct omap_dss_device *dssdev)
165 {
166         bool is_tft;
167
168         is_tft = (dssdev->panel.config & OMAP_DSS_LCD_TFT) != 0;
169
170         dispc_mgr_set_io_pad_mode(DSS_IO_PAD_MODE_BYPASS);
171         dispc_mgr_enable_stallmode(dssdev->manager->id, false);
172
173         dispc_mgr_set_lcd_display_type(dssdev->manager->id, is_tft ?
174                         OMAP_DSS_LCD_DISPLAY_TFT : OMAP_DSS_LCD_DISPLAY_STN);
175         dispc_mgr_set_tft_data_lines(dssdev->manager->id,
176                         dssdev->phy.dpi.data_lines);
177 }
178
179 int omapdss_dpi_display_enable(struct omap_dss_device *dssdev)
180 {
181         int r;
182
183         if (dssdev->manager == NULL) {
184                 DSSERR("failed to enable display: no manager\n");
185                 return -ENODEV;
186         }
187
188         r = omap_dss_start_device(dssdev);
189         if (r) {
190                 DSSERR("failed to start device\n");
191                 goto err_start_dev;
192         }
193
194         if (cpu_is_omap34xx()) {
195                 r = regulator_enable(dpi.vdds_dsi_reg);
196                 if (r)
197                         goto err_reg_enable;
198         }
199
200         r = dss_runtime_get();
201         if (r)
202                 goto err_get_dss;
203
204         r = dispc_runtime_get();
205         if (r)
206                 goto err_get_dispc;
207
208         dpi_basic_init(dssdev);
209
210         if (dpi_use_dsi_pll(dssdev)) {
211                 r = dsi_runtime_get(dpi.dsidev);
212                 if (r)
213                         goto err_get_dsi;
214
215                 r = dsi_pll_init(dpi.dsidev, 0, 1);
216                 if (r)
217                         goto err_dsi_pll_init;
218         }
219
220         r = dpi_set_mode(dssdev);
221         if (r)
222                 goto err_set_mode;
223
224         mdelay(2);
225
226         dssdev->manager->enable(dssdev->manager);
227
228         return 0;
229
230 err_set_mode:
231         if (dpi_use_dsi_pll(dssdev))
232                 dsi_pll_uninit(dpi.dsidev, true);
233 err_dsi_pll_init:
234         if (dpi_use_dsi_pll(dssdev))
235                 dsi_runtime_put(dpi.dsidev);
236 err_get_dsi:
237         dispc_runtime_put();
238 err_get_dispc:
239         dss_runtime_put();
240 err_get_dss:
241         if (cpu_is_omap34xx())
242                 regulator_disable(dpi.vdds_dsi_reg);
243 err_reg_enable:
244         omap_dss_stop_device(dssdev);
245 err_start_dev:
246         return r;
247 }
248 EXPORT_SYMBOL(omapdss_dpi_display_enable);
249
250 void omapdss_dpi_display_disable(struct omap_dss_device *dssdev)
251 {
252         dssdev->manager->disable(dssdev->manager);
253
254         if (dpi_use_dsi_pll(dssdev)) {
255                 dss_select_dispc_clk_source(OMAP_DSS_CLK_SRC_FCK);
256                 dsi_pll_uninit(dpi.dsidev, true);
257                 dsi_runtime_put(dpi.dsidev);
258         }
259
260         dispc_runtime_put();
261         dss_runtime_put();
262
263         if (cpu_is_omap34xx())
264                 regulator_disable(dpi.vdds_dsi_reg);
265
266         omap_dss_stop_device(dssdev);
267 }
268 EXPORT_SYMBOL(omapdss_dpi_display_disable);
269
270 void dpi_set_timings(struct omap_dss_device *dssdev,
271                         struct omap_video_timings *timings)
272 {
273         int r;
274
275         DSSDBG("dpi_set_timings\n");
276         dssdev->panel.timings = *timings;
277         if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE) {
278                 r = dss_runtime_get();
279                 if (r)
280                         return;
281
282                 r = dispc_runtime_get();
283                 if (r) {
284                         dss_runtime_put();
285                         return;
286                 }
287
288                 dpi_set_mode(dssdev);
289                 dispc_mgr_go(dssdev->manager->id);
290
291                 dispc_runtime_put();
292                 dss_runtime_put();
293         }
294 }
295 EXPORT_SYMBOL(dpi_set_timings);
296
297 int dpi_check_timings(struct omap_dss_device *dssdev,
298                         struct omap_video_timings *timings)
299 {
300         bool is_tft;
301         int r;
302         int lck_div, pck_div;
303         unsigned long fck;
304         unsigned long pck;
305         struct dispc_clock_info dispc_cinfo;
306
307         if (!dispc_lcd_timings_ok(timings))
308                 return -EINVAL;
309
310         if (timings->pixel_clock == 0)
311                 return -EINVAL;
312
313         is_tft = (dssdev->panel.config & OMAP_DSS_LCD_TFT) != 0;
314
315         if (dpi_use_dsi_pll(dssdev)) {
316                 struct dsi_clock_info dsi_cinfo;
317                 r = dsi_pll_calc_clock_div_pck(dpi.dsidev, is_tft,
318                                 timings->pixel_clock * 1000,
319                                 &dsi_cinfo, &dispc_cinfo);
320
321                 if (r)
322                         return r;
323
324                 fck = dsi_cinfo.dsi_pll_hsdiv_dispc_clk;
325         } else {
326                 struct dss_clock_info dss_cinfo;
327                 r = dss_calc_clock_div(is_tft, timings->pixel_clock * 1000,
328                                 &dss_cinfo, &dispc_cinfo);
329
330                 if (r)
331                         return r;
332
333                 fck = dss_cinfo.fck;
334         }
335
336         lck_div = dispc_cinfo.lck_div;
337         pck_div = dispc_cinfo.pck_div;
338
339         pck = fck / lck_div / pck_div / 1000;
340
341         timings->pixel_clock = pck;
342
343         return 0;
344 }
345 EXPORT_SYMBOL(dpi_check_timings);
346
347 int dpi_init_display(struct omap_dss_device *dssdev)
348 {
349         DSSDBG("init_display\n");
350
351         if (cpu_is_omap34xx() && dpi.vdds_dsi_reg == NULL) {
352                 struct regulator *vdds_dsi;
353
354                 vdds_dsi = dss_get_vdds_dsi();
355
356                 if (IS_ERR(vdds_dsi)) {
357                         DSSERR("can't get VDDS_DSI regulator\n");
358                         return PTR_ERR(vdds_dsi);
359                 }
360
361                 dpi.vdds_dsi_reg = vdds_dsi;
362         }
363
364         if (dpi_use_dsi_pll(dssdev)) {
365                 enum omap_dss_clk_source dispc_fclk_src =
366                         dssdev->clocks.dispc.dispc_fclk_src;
367                 dpi.dsidev = dpi_get_dsidev(dispc_fclk_src);
368         }
369
370         return 0;
371 }
372
373 int dpi_init(void)
374 {
375         return 0;
376 }
377
378 void dpi_exit(void)
379 {
380 }
381