2 * HDMI interface DSS driver for TI's OMAP4 family of SoCs.
3 * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com/
5 * Mythri pk <mythripk@ti.com>
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
20 #define DSS_SUBSYS_NAME "HDMI"
22 #include <linux/kernel.h>
23 #include <linux/module.h>
24 #include <linux/err.h>
26 #include <linux/interrupt.h>
27 #include <linux/mutex.h>
28 #include <linux/delay.h>
29 #include <linux/string.h>
30 #include <linux/platform_device.h>
31 #include <linux/pm_runtime.h>
32 #include <linux/clk.h>
33 #include <linux/gpio.h>
34 #include <linux/regulator/consumer.h>
35 #include <video/omapdss.h>
37 #include "hdmi4_core.h"
39 #include "dss_features.h"
43 struct platform_device *pdev;
45 struct hdmi_wp_data wp;
46 struct hdmi_pll_data pll;
47 struct hdmi_phy_data phy;
48 struct hdmi_core_data core;
50 struct hdmi_config cfg;
53 struct regulator *vdda_hdmi_dac_reg;
57 struct omap_dss_device output;
60 static int hdmi_runtime_get(void)
64 DSSDBG("hdmi_runtime_get\n");
66 r = pm_runtime_get_sync(&hdmi.pdev->dev);
74 static void hdmi_runtime_put(void)
78 DSSDBG("hdmi_runtime_put\n");
80 r = pm_runtime_put_sync(&hdmi.pdev->dev);
81 WARN_ON(r < 0 && r != -ENOSYS);
84 static irqreturn_t hdmi_irq_handler(int irq, void *data)
86 struct hdmi_wp_data *wp = data;
89 irqstatus = hdmi_wp_get_irqstatus(wp);
90 hdmi_wp_set_irqstatus(wp, irqstatus);
92 if ((irqstatus & HDMI_IRQ_LINK_CONNECT) &&
93 irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
95 * If we get both connect and disconnect interrupts at the same
96 * time, turn off the PHY, clear interrupts, and restart, which
97 * raises connect interrupt if a cable is connected, or nothing
98 * if cable is not connected.
100 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF);
102 hdmi_wp_set_irqstatus(wp, HDMI_IRQ_LINK_CONNECT |
103 HDMI_IRQ_LINK_DISCONNECT);
105 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
106 } else if (irqstatus & HDMI_IRQ_LINK_CONNECT) {
107 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON);
108 } else if (irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
109 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
115 static int hdmi_init_regulator(void)
118 struct regulator *reg;
120 if (hdmi.vdda_hdmi_dac_reg != NULL)
123 reg = devm_regulator_get(&hdmi.pdev->dev, "vdda");
126 if (PTR_ERR(reg) != -EPROBE_DEFER)
127 DSSERR("can't get VDDA regulator\n");
131 if (regulator_can_change_voltage(reg)) {
132 r = regulator_set_voltage(reg, 1800000, 1800000);
134 devm_regulator_put(reg);
135 DSSWARN("can't set the regulator voltage\n");
140 hdmi.vdda_hdmi_dac_reg = reg;
145 static int hdmi_power_on_core(struct omap_dss_device *dssdev)
149 r = regulator_enable(hdmi.vdda_hdmi_dac_reg);
153 r = hdmi_runtime_get();
155 goto err_runtime_get;
157 /* Make selection of HDMI in DSS */
158 dss_select_hdmi_venc_clk_source(DSS_HDMI_M_PCLK);
160 hdmi.core_enabled = true;
165 regulator_disable(hdmi.vdda_hdmi_dac_reg);
170 static void hdmi_power_off_core(struct omap_dss_device *dssdev)
172 hdmi.core_enabled = false;
175 regulator_disable(hdmi.vdda_hdmi_dac_reg);
178 static int hdmi_power_on_full(struct omap_dss_device *dssdev)
181 struct omap_video_timings *p;
182 struct omap_overlay_manager *mgr = hdmi.output.manager;
184 struct hdmi_wp_data *wp = &hdmi.wp;
186 r = hdmi_power_on_core(dssdev);
190 /* disable and clear irqs */
191 hdmi_wp_clear_irqenable(wp, 0xffffffff);
192 hdmi_wp_set_irqstatus(wp, 0xffffffff);
194 p = &hdmi.cfg.timings;
196 DSSDBG("hdmi_power_on x_res= %d y_res = %d\n", p->x_res, p->y_res);
198 /* the functions below use kHz pixel clock. TODO: change to Hz */
199 phy = p->pixelclock / 1000;
201 hdmi_pll_compute(&hdmi.pll, clk_get_rate(hdmi.sys_clk), phy);
203 /* config the PLL and PHY hdmi_set_pll_pwrfirst */
204 r = hdmi_pll_enable(&hdmi.pll, &hdmi.wp);
206 DSSDBG("Failed to lock PLL\n");
210 r = hdmi_phy_configure(&hdmi.phy, &hdmi.cfg);
212 DSSDBG("Failed to configure PHY\n");
216 r = hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
220 hdmi4_configure(&hdmi.core, &hdmi.wp, &hdmi.cfg);
222 /* bypass TV gamma table */
223 dispc_enable_gamma_table(0);
226 dss_mgr_set_timings(mgr, p);
228 r = hdmi_wp_video_start(&hdmi.wp);
232 r = dss_mgr_enable(mgr);
236 hdmi_wp_set_irqenable(wp,
237 HDMI_IRQ_LINK_CONNECT | HDMI_IRQ_LINK_DISCONNECT);
242 hdmi_wp_video_stop(&hdmi.wp);
245 hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
247 hdmi_pll_disable(&hdmi.pll, &hdmi.wp);
249 hdmi_power_off_core(dssdev);
253 static void hdmi_power_off_full(struct omap_dss_device *dssdev)
255 struct omap_overlay_manager *mgr = hdmi.output.manager;
257 hdmi_wp_clear_irqenable(&hdmi.wp, 0xffffffff);
259 dss_mgr_disable(mgr);
261 hdmi_wp_video_stop(&hdmi.wp);
263 hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
265 hdmi_pll_disable(&hdmi.pll, &hdmi.wp);
267 hdmi_power_off_core(dssdev);
270 static int hdmi_display_check_timing(struct omap_dss_device *dssdev,
271 struct omap_video_timings *timings)
273 struct omap_dss_device *out = &hdmi.output;
275 if (!dispc_mgr_timings_ok(out->dispc_channel, timings))
281 static void hdmi_display_set_timing(struct omap_dss_device *dssdev,
282 struct omap_video_timings *timings)
284 mutex_lock(&hdmi.lock);
286 hdmi.cfg.timings = *timings;
288 dispc_set_tv_pclk(timings->pixelclock);
290 mutex_unlock(&hdmi.lock);
293 static void hdmi_display_get_timings(struct omap_dss_device *dssdev,
294 struct omap_video_timings *timings)
296 *timings = hdmi.cfg.timings;
299 static void hdmi_dump_regs(struct seq_file *s)
301 mutex_lock(&hdmi.lock);
303 if (hdmi_runtime_get()) {
304 mutex_unlock(&hdmi.lock);
308 hdmi_wp_dump(&hdmi.wp, s);
309 hdmi_pll_dump(&hdmi.pll, s);
310 hdmi_phy_dump(&hdmi.phy, s);
311 hdmi4_core_dump(&hdmi.core, s);
314 mutex_unlock(&hdmi.lock);
317 static int read_edid(u8 *buf, int len)
321 mutex_lock(&hdmi.lock);
323 r = hdmi_runtime_get();
326 r = hdmi4_read_edid(&hdmi.core, buf, len);
329 mutex_unlock(&hdmi.lock);
334 static int hdmi_display_enable(struct omap_dss_device *dssdev)
336 struct omap_dss_device *out = &hdmi.output;
339 DSSDBG("ENTER hdmi_display_enable\n");
341 mutex_lock(&hdmi.lock);
343 if (out == NULL || out->manager == NULL) {
344 DSSERR("failed to enable display: no output/manager\n");
349 r = hdmi_power_on_full(dssdev);
351 DSSERR("failed to power on device\n");
355 mutex_unlock(&hdmi.lock);
359 mutex_unlock(&hdmi.lock);
363 static void hdmi_display_disable(struct omap_dss_device *dssdev)
365 DSSDBG("Enter hdmi_display_disable\n");
367 mutex_lock(&hdmi.lock);
369 hdmi_power_off_full(dssdev);
371 mutex_unlock(&hdmi.lock);
374 static int hdmi_core_enable(struct omap_dss_device *dssdev)
378 DSSDBG("ENTER omapdss_hdmi_core_enable\n");
380 mutex_lock(&hdmi.lock);
382 r = hdmi_power_on_core(dssdev);
384 DSSERR("failed to power on device\n");
388 mutex_unlock(&hdmi.lock);
392 mutex_unlock(&hdmi.lock);
396 static void hdmi_core_disable(struct omap_dss_device *dssdev)
398 DSSDBG("Enter omapdss_hdmi_core_disable\n");
400 mutex_lock(&hdmi.lock);
402 hdmi_power_off_core(dssdev);
404 mutex_unlock(&hdmi.lock);
407 static int hdmi_get_clocks(struct platform_device *pdev)
411 clk = devm_clk_get(&pdev->dev, "sys_clk");
413 DSSERR("can't get sys_clk\n");
422 static int hdmi_connect(struct omap_dss_device *dssdev,
423 struct omap_dss_device *dst)
425 struct omap_overlay_manager *mgr;
428 r = hdmi_init_regulator();
432 mgr = omap_dss_get_overlay_manager(dssdev->dispc_channel);
436 r = dss_mgr_connect(mgr, dssdev);
440 r = omapdss_output_set_device(dssdev, dst);
442 DSSERR("failed to connect output to new device: %s\n",
444 dss_mgr_disconnect(mgr, dssdev);
451 static void hdmi_disconnect(struct omap_dss_device *dssdev,
452 struct omap_dss_device *dst)
454 WARN_ON(dst != dssdev->dst);
456 if (dst != dssdev->dst)
459 omapdss_output_unset_device(dssdev);
462 dss_mgr_disconnect(dssdev->manager, dssdev);
465 static int hdmi_read_edid(struct omap_dss_device *dssdev,
471 need_enable = hdmi.core_enabled == false;
474 r = hdmi_core_enable(dssdev);
479 r = read_edid(edid, len);
482 hdmi_core_disable(dssdev);
487 #if defined(CONFIG_OMAP4_DSS_HDMI_AUDIO)
488 static int hdmi_audio_enable(struct omap_dss_device *dssdev)
492 mutex_lock(&hdmi.lock);
494 if (!hdmi_mode_has_audio(hdmi.cfg.hdmi_dvi_mode)) {
499 r = hdmi_wp_audio_enable(&hdmi.wp, true);
503 mutex_unlock(&hdmi.lock);
507 mutex_unlock(&hdmi.lock);
511 static void hdmi_audio_disable(struct omap_dss_device *dssdev)
513 hdmi_wp_audio_enable(&hdmi.wp, false);
516 static int hdmi_audio_start(struct omap_dss_device *dssdev)
518 return hdmi4_audio_start(&hdmi.core, &hdmi.wp);
521 static void hdmi_audio_stop(struct omap_dss_device *dssdev)
523 hdmi4_audio_stop(&hdmi.core, &hdmi.wp);
526 static bool hdmi_audio_supported(struct omap_dss_device *dssdev)
530 mutex_lock(&hdmi.lock);
532 r = hdmi_mode_has_audio(hdmi.cfg.hdmi_dvi_mode);
534 mutex_unlock(&hdmi.lock);
538 static int hdmi_audio_config(struct omap_dss_device *dssdev,
539 struct omap_dss_audio *audio)
542 u32 pclk = hdmi.cfg.timings.pixelclock;
544 mutex_lock(&hdmi.lock);
546 if (!hdmi_mode_has_audio(hdmi.cfg.hdmi_dvi_mode)) {
551 r = hdmi4_audio_config(&hdmi.core, &hdmi.wp, audio, pclk);
555 mutex_unlock(&hdmi.lock);
559 mutex_unlock(&hdmi.lock);
563 static int hdmi_audio_enable(struct omap_dss_device *dssdev)
568 static void hdmi_audio_disable(struct omap_dss_device *dssdev)
572 static int hdmi_audio_start(struct omap_dss_device *dssdev)
577 static void hdmi_audio_stop(struct omap_dss_device *dssdev)
581 static bool hdmi_audio_supported(struct omap_dss_device *dssdev)
586 static int hdmi_audio_config(struct omap_dss_device *dssdev,
587 struct omap_dss_audio *audio)
593 static int hdmi_set_infoframe(struct omap_dss_device *dssdev,
594 const struct hdmi_avi_infoframe *avi)
596 hdmi.cfg.infoframe = *avi;
600 static int hdmi_set_hdmi_mode(struct omap_dss_device *dssdev,
603 hdmi.cfg.hdmi_dvi_mode = hdmi_mode ? HDMI_HDMI : HDMI_DVI;
607 static const struct omapdss_hdmi_ops hdmi_ops = {
608 .connect = hdmi_connect,
609 .disconnect = hdmi_disconnect,
611 .enable = hdmi_display_enable,
612 .disable = hdmi_display_disable,
614 .check_timings = hdmi_display_check_timing,
615 .set_timings = hdmi_display_set_timing,
616 .get_timings = hdmi_display_get_timings,
618 .read_edid = hdmi_read_edid,
619 .set_infoframe = hdmi_set_infoframe,
620 .set_hdmi_mode = hdmi_set_hdmi_mode,
622 .audio_enable = hdmi_audio_enable,
623 .audio_disable = hdmi_audio_disable,
624 .audio_start = hdmi_audio_start,
625 .audio_stop = hdmi_audio_stop,
626 .audio_supported = hdmi_audio_supported,
627 .audio_config = hdmi_audio_config,
630 static void hdmi_init_output(struct platform_device *pdev)
632 struct omap_dss_device *out = &hdmi.output;
634 out->dev = &pdev->dev;
635 out->id = OMAP_DSS_OUTPUT_HDMI;
636 out->output_type = OMAP_DISPLAY_TYPE_HDMI;
637 out->name = "hdmi.0";
638 out->dispc_channel = OMAP_DSS_CHANNEL_DIGIT;
639 out->ops.hdmi = &hdmi_ops;
640 out->owner = THIS_MODULE;
642 omapdss_register_output(out);
645 static void __exit hdmi_uninit_output(struct platform_device *pdev)
647 struct omap_dss_device *out = &hdmi.output;
649 omapdss_unregister_output(out);
652 static int hdmi_probe_of(struct platform_device *pdev)
654 struct device_node *node = pdev->dev.of_node;
655 struct device_node *ep;
658 ep = omapdss_of_get_first_endpoint(node);
662 r = hdmi_parse_lanes_of(pdev, ep, &hdmi.phy);
674 /* HDMI HW IP initialisation */
675 static int omapdss_hdmihw_probe(struct platform_device *pdev)
682 mutex_init(&hdmi.lock);
684 if (pdev->dev.of_node) {
685 r = hdmi_probe_of(pdev);
690 r = hdmi_wp_init(pdev, &hdmi.wp);
694 r = hdmi_pll_init(pdev, &hdmi.pll);
698 r = hdmi_phy_init(pdev, &hdmi.phy);
702 r = hdmi4_core_init(pdev, &hdmi.core);
706 r = hdmi_get_clocks(pdev);
708 DSSERR("can't get clocks\n");
712 irq = platform_get_irq(pdev, 0);
714 DSSERR("platform_get_irq failed\n");
718 r = devm_request_threaded_irq(&pdev->dev, irq,
719 NULL, hdmi_irq_handler,
720 IRQF_ONESHOT, "OMAP HDMI", &hdmi.wp);
722 DSSERR("HDMI IRQ request failed\n");
726 pm_runtime_enable(&pdev->dev);
728 hdmi_init_output(pdev);
730 dss_debugfs_create_file("hdmi", hdmi_dump_regs);
735 static int __exit omapdss_hdmihw_remove(struct platform_device *pdev)
737 hdmi_uninit_output(pdev);
739 pm_runtime_disable(&pdev->dev);
744 static int hdmi_runtime_suspend(struct device *dev)
746 clk_disable_unprepare(hdmi.sys_clk);
753 static int hdmi_runtime_resume(struct device *dev)
757 r = dispc_runtime_get();
761 clk_prepare_enable(hdmi.sys_clk);
766 static const struct dev_pm_ops hdmi_pm_ops = {
767 .runtime_suspend = hdmi_runtime_suspend,
768 .runtime_resume = hdmi_runtime_resume,
771 static const struct of_device_id hdmi_of_match[] = {
772 { .compatible = "ti,omap4-hdmi", },
776 static struct platform_driver omapdss_hdmihw_driver = {
777 .probe = omapdss_hdmihw_probe,
778 .remove = __exit_p(omapdss_hdmihw_remove),
780 .name = "omapdss_hdmi",
781 .owner = THIS_MODULE,
783 .of_match_table = hdmi_of_match,
787 int __init hdmi4_init_platform_driver(void)
789 return platform_driver_register(&omapdss_hdmihw_driver);
792 void __exit hdmi4_uninit_platform_driver(void)
794 platform_driver_unregister(&omapdss_hdmihw_driver);