drivers/video/amba-clcd.c

   1 /*
   2  *  linux/drivers/video/amba-clcd.c
   3  *
   4  * Copyright (C) 2001 ARM Limited, by David A Rusling
   5  * Updated to 2.5, Deep Blue Solutions Ltd.
   6  *
   7  * This file is subject to the terms and conditions of the GNU General Public
   8  * License.  See the file COPYING in the main directory of this archive
   9  * for more details.
  10  *
  11  *  ARM PrimeCell PL110 Color LCD Controller
  12  */
  13 #include <linux/module.h>
  14 #include <linux/kernel.h>
  15 #include <linux/errno.h>
  16 #include <linux/string.h>
  17 #include <linux/slab.h>
  18 #include <linux/delay.h>
  19 #include <linux/dma-mapping.h>
  20 #include <linux/memblock.h>
  21 #include <linux/mm.h>
  22 #include <linux/of.h>
  23 #include <linux/fb.h>
  24 #include <linux/init.h>
  25 #include <linux/ioport.h>
  26 #include <linux/list.h>
  27 #include <linux/amba/bus.h>
  28 #include <linux/amba/clcd.h>
  29 #include <linux/clk.h>
  30 #include <linux/hardirq.h>
  31
  32 #include <asm/sizes.h>
  33
  34 #define to_clcd(info)   container_of(info, struct clcd_fb, fb)
  35
  36 #ifdef CONFIG_ARM
  37 #define clcdfb_dma_alloc        dma_alloc_writecombine
  38 #define clcdfb_dma_free         dma_free_writecombine
  39 #define clcdfb_dma_mmap         dma_mmap_writecombine
  40 #else
  41 #define clcdfb_dma_alloc        dma_alloc_coherent
  42 #define clcdfb_dma_free         dma_free_coherent
  43 #define clcdfb_dma_mmap         dma_mmap_coherent
  44 #endif
  45
  46 /* This is limited to 16 characters when displayed by X startup */
  47 static const char *clcd_name = "CLCD FB";
  48
  49 /*
  50  * Unfortunately, the enable/disable functions may be called either from
  51  * process or IRQ context, and we _need_ to delay.  This is _not_ good.
  52  */
  53 static inline void clcdfb_sleep(unsigned int ms)
  54 {
  55         if (in_atomic()) {
  56                 mdelay(ms);
  57         } else {
  58                 msleep(ms);
  59         }
  60 }
  61
  62 static inline void clcdfb_set_start(struct clcd_fb *fb)
  63 {
  64         unsigned long ustart = fb->fb.fix.smem_start;
  65         unsigned long lstart;
  66
  67         ustart += fb->fb.var.yoffset * fb->fb.fix.line_length;
  68         lstart = ustart + fb->fb.var.yres * fb->fb.fix.line_length / 2;
  69
  70         writel(ustart, fb->regs + CLCD_UBAS);
  71         writel(lstart, fb->regs + CLCD_LBAS);
  72 }
  73
  74 static void clcdfb_disable(struct clcd_fb *fb)
  75 {
  76         u32 val;
  77
  78         if (fb->board->disable)
  79                 fb->board->disable(fb);
  80
  81         val = readl(fb->regs + fb->off_cntl);
  82         if (val & CNTL_LCDPWR) {
  83                 val &= ~CNTL_LCDPWR;
  84                 writel(val, fb->regs + fb->off_cntl);
  85
  86                 clcdfb_sleep(20);
  87         }
  88         if (val & CNTL_LCDEN) {
  89                 val &= ~CNTL_LCDEN;
  90                 writel(val, fb->regs + fb->off_cntl);
  91         }
  92
  93         /*
  94          * Disable CLCD clock source.
  95          */
  96         if (fb->clk_enabled) {
  97                 fb->clk_enabled = false;
  98                 clk_disable(fb->clk);
  99         }
 100 }
 101
 102 static void clcdfb_enable(struct clcd_fb *fb, u32 cntl)
 103 {
 104         /*
 105          * Enable the CLCD clock source.
 106          */
 107         if (!fb->clk_enabled) {
 108                 fb->clk_enabled = true;
 109                 clk_enable(fb->clk);
 110         }
 111
 112         /*
 113          * Bring up by first enabling..
 114          */
 115         cntl |= CNTL_LCDEN;
 116         writel(cntl, fb->regs + fb->off_cntl);
 117
 118         clcdfb_sleep(20);
 119
 120         /*
 121          * and now apply power.
 122          */
 123         cntl |= CNTL_LCDPWR;
 124         writel(cntl, fb->regs + fb->off_cntl);
 125
 126         /*
 127          * finally, enable the interface.
 128          */
 129         if (fb->board->enable)
 130                 fb->board->enable(fb);
 131 }
 132
 133 static int
 134 clcdfb_set_bitfields(struct clcd_fb *fb, struct fb_var_screeninfo *var)
 135 {
 136         u32 caps;
 137         int ret = 0;
 138
 139         if (fb->panel->caps && fb->board->caps)
 140                 caps = fb->panel->caps & fb->board->caps;
 141         else {
 142                 /* Old way of specifying what can be used */
 143                 caps = fb->panel->cntl & CNTL_BGR ?
 144                         CLCD_CAP_BGR : CLCD_CAP_RGB;
 145                 /* But mask out 444 modes as they weren't supported */
 146                 caps &= ~CLCD_CAP_444;
 147         }
 148
 149         /* Only TFT panels can do RGB888/BGR888 */
 150         if (!(fb->panel->cntl & CNTL_LCDTFT))
 151                 caps &= ~CLCD_CAP_888;
 152
 153         memset(&var->transp, 0, sizeof(var->transp));
 154
 155         var->red.msb_right = 0;
 156         var->green.msb_right = 0;
 157         var->blue.msb_right = 0;
 158
 159         switch (var->bits_per_pixel) {
 160         case 1:
 161         case 2:
 162         case 4:
 163         case 8:
 164                 /* If we can't do 5551, reject */
 165                 caps &= CLCD_CAP_5551;
 166                 if (!caps) {
 167                         ret = -EINVAL;
 168                         break;
 169                 }
 170
 171                 var->red.length         = var->bits_per_pixel;
 172                 var->red.offset         = 0;
 173                 var->green.length       = var->bits_per_pixel;
 174                 var->green.offset       = 0;
 175                 var->blue.length        = var->bits_per_pixel;
 176                 var->blue.offset        = 0;
 177                 break;
 178
 179         case 16:
 180                 /* If we can't do 444, 5551 or 565, reject */
 181                 if (!(caps & (CLCD_CAP_444 | CLCD_CAP_5551 | CLCD_CAP_565))) {
 182                         ret = -EINVAL;
 183                         break;
 184                 }
 185
 186                 /*
 187                  * Green length can be 4, 5 or 6 depending whether
 188                  * we're operating in 444, 5551 or 565 mode.
 189                  */
 190                 if (var->green.length == 4 && caps & CLCD_CAP_444)
 191                         caps &= CLCD_CAP_444;
 192                 if (var->green.length == 5 && caps & CLCD_CAP_5551)
 193                         caps &= CLCD_CAP_5551;
 194                 else if (var->green.length == 6 && caps & CLCD_CAP_565)
 195                         caps &= CLCD_CAP_565;
 196                 else {
 197                         /*
 198                          * PL110 officially only supports RGB555,
 199                          * but may be wired up to allow RGB565.
 200                          */
 201                         if (caps & CLCD_CAP_565) {
 202                                 var->green.length = 6;
 203                                 caps &= CLCD_CAP_565;
 204                         } else if (caps & CLCD_CAP_5551) {
 205                                 var->green.length = 5;
 206                                 caps &= CLCD_CAP_5551;
 207                         } else {
 208                                 var->green.length = 4;
 209                                 caps &= CLCD_CAP_444;
 210                         }
 211                 }
 212
 213                 if (var->green.length >= 5) {
 214                         var->red.length = 5;
 215                         var->blue.length = 5;
 216                 } else {
 217                         var->red.length = 4;
 218                         var->blue.length = 4;
 219                 }
 220                 break;
 221         case 32:
 222                 /* If we can't do 888, reject */
 223                 caps &= CLCD_CAP_888;
 224                 if (!caps) {
 225                         ret = -EINVAL;
 226                         break;
 227                 }
 228
 229                 var->red.length = 8;
 230                 var->green.length = 8;
 231                 var->blue.length = 8;
 232                 break;
 233         default:
 234                 ret = -EINVAL;
 235                 break;
 236         }
 237
 238         /*
 239          * >= 16bpp displays have separate colour component bitfields
 240          * encoded in the pixel data.  Calculate their position from
 241          * the bitfield length defined above.
 242          */
 243         if (ret == 0 && var->bits_per_pixel >= 16) {
 244                 bool bgr, rgb;
 245
 246                 bgr = caps & CLCD_CAP_BGR && var->blue.offset == 0;
 247                 rgb = caps & CLCD_CAP_RGB && var->red.offset == 0;
 248
 249                 if (!bgr && !rgb)
 250                         /*
 251                          * The requested format was not possible, try just
 252                          * our capabilities.  One of BGR or RGB must be
 253                          * supported.
 254                          */
 255                         bgr = caps & CLCD_CAP_BGR;
 256
 257                 if (bgr) {
 258                         var->blue.offset = 0;
 259                         var->green.offset = var->blue.offset + var->blue.length;
 260                         var->red.offset = var->green.offset + var->green.length;
 261                 } else {
 262                         var->red.offset = 0;
 263                         var->green.offset = var->red.offset + var->red.length;
 264                         var->blue.offset = var->green.offset + var->green.length;
 265                 }
 266         }
 267
 268         return ret;
 269 }
 270
 271 static int clcdfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
 272 {
 273         struct clcd_fb *fb = to_clcd(info);
 274         int ret = -EINVAL;
 275
 276         if (fb->board->check)
 277                 ret = fb->board->check(fb, var);
 278
 279         if (ret == 0 &&
 280             var->xres_virtual * var->bits_per_pixel / 8 *
 281             var->yres_virtual > fb->fb.fix.smem_len)
 282                 ret = -EINVAL;
 283
 284         if (ret == 0)
 285                 ret = clcdfb_set_bitfields(fb, var);
 286
 287         return ret;
 288 }
 289
 290 static int clcdfb_set_par(struct fb_info *info)
 291 {
 292         struct clcd_fb *fb = to_clcd(info);
 293         struct clcd_regs regs;
 294
 295         fb->fb.fix.line_length = fb->fb.var.xres_virtual *
 296                                  fb->fb.var.bits_per_pixel / 8;
 297
 298         if (fb->fb.var.bits_per_pixel <= 8)
 299                 fb->fb.fix.visual = FB_VISUAL_PSEUDOCOLOR;
 300         else
 301                 fb->fb.fix.visual = FB_VISUAL_TRUECOLOR;
 302
 303         fb->board->decode(fb, &regs);
 304
 305         clcdfb_disable(fb);
 306
 307         writel(regs.tim0, fb->regs + CLCD_TIM0);
 308         writel(regs.tim1, fb->regs + CLCD_TIM1);
 309         writel(regs.tim2, fb->regs + CLCD_TIM2);
 310         writel(regs.tim3, fb->regs + CLCD_TIM3);
 311
 312         clcdfb_set_start(fb);
 313
 314         clk_set_rate(fb->clk, (1000000000 / regs.pixclock) * 1000);
 315
 316         fb->clcd_cntl = regs.cntl;
 317
 318         clcdfb_enable(fb, regs.cntl);
 319
 320 #ifdef DEBUG
 321         printk(KERN_INFO
 322                "CLCD: Registers set to\n"
 323                "  %08x %08x %08x %08x\n"
 324                "  %08x %08x %08x %08x\n",
 325                 readl(fb->regs + CLCD_TIM0), readl(fb->regs + CLCD_TIM1),
 326                 readl(fb->regs + CLCD_TIM2), readl(fb->regs + CLCD_TIM3),
 327                 readl(fb->regs + CLCD_UBAS), readl(fb->regs + CLCD_LBAS),
 328                 readl(fb->regs + fb->off_ienb), readl(fb->regs + fb->off_cntl));
 329 #endif
 330
 331         return 0;
 332 }
 333
 334 static inline u32 convert_bitfield(int val, struct fb_bitfield *bf)
 335 {
 336         unsigned int mask = (1 << bf->length) - 1;
 337
 338         return (val >> (16 - bf->length) & mask) << bf->offset;
 339 }
 340
 341 /*
 342  *  Set a single color register. The values supplied have a 16 bit
 343  *  magnitude.  Return != 0 for invalid regno.
 344  */
 345 static int
 346 clcdfb_setcolreg(unsigned int regno, unsigned int red, unsigned int green,
 347                  unsigned int blue, unsigned int transp, struct fb_info *info)
 348 {
 349         struct clcd_fb *fb = to_clcd(info);
 350
 351         if (regno < 16)
 352                 fb->cmap[regno] = convert_bitfield(transp, &fb->fb.var.transp) |
 353                                   convert_bitfield(blue, &fb->fb.var.blue) |
 354                                   convert_bitfield(green, &fb->fb.var.green) |
 355                                   convert_bitfield(red, &fb->fb.var.red);
 356
 357         if (fb->fb.fix.visual == FB_VISUAL_PSEUDOCOLOR && regno < 256) {
 358                 int hw_reg = CLCD_PALETTE + ((regno * 2) & ~3);
 359                 u32 val, mask, newval;
 360
 361                 newval  = (red >> 11)  & 0x001f;
 362                 newval |= (green >> 6) & 0x03e0;
 363                 newval |= (blue >> 1)  & 0x7c00;
 364
 365                 /*
 366                  * 3.2.11: if we're configured for big endian
 367                  * byte order, the palette entries are swapped.
 368                  */
 369                 if (fb->clcd_cntl & CNTL_BEBO)
 370                         regno ^= 1;
 371
 372                 if (regno & 1) {
 373                         newval <<= 16;
 374                         mask = 0x0000ffff;
 375                 } else {
 376                         mask = 0xffff0000;
 377                 }
 378
 379                 val = readl(fb->regs + hw_reg) & mask;
 380                 writel(val | newval, fb->regs + hw_reg);
 381         }
 382
 383         return regno > 255;
 384 }
 385
 386 /*
 387  *  Blank the screen if blank_mode != 0, else unblank. If blank == NULL
 388  *  then the caller blanks by setting the CLUT (Color Look Up Table) to all
 389  *  black. Return 0 if blanking succeeded, != 0 if un-/blanking failed due
 390  *  to e.g. a video mode which doesn't support it. Implements VESA suspend
 391  *  and powerdown modes on hardware that supports disabling hsync/vsync:
 392  *    blank_mode == 2: suspend vsync
 393  *    blank_mode == 3: suspend hsync
 394  *    blank_mode == 4: powerdown
 395  */
 396 static int clcdfb_blank(int blank_mode, struct fb_info *info)
 397 {
 398         struct clcd_fb *fb = to_clcd(info);
 399
 400         if (blank_mode != 0) {
 401                 clcdfb_disable(fb);
 402         } else {
 403                 clcdfb_enable(fb, fb->clcd_cntl);
 404         }
 405         return 0;
 406 }
 407
 408 int clcdfb_mmap_dma(struct clcd_fb *fb, struct vm_area_struct *vma)
 409 {
 410         return clcdfb_dma_mmap(&fb->dev->dev, vma,
 411                                fb->fb.screen_base,
 412                                fb->fb.fix.smem_start,
 413                                fb->fb.fix.smem_len);
 414 }
 415
 416 int clcdfb_mmap_io(struct clcd_fb *fb, struct vm_area_struct *vma)
 417 {
 418         unsigned long user_count, count, pfn, off;
 419
 420         user_count      = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
 421         count           = PAGE_ALIGN(fb->fb.fix.smem_len) >> PAGE_SHIFT;
 422         pfn             = fb->fb.fix.smem_start >> PAGE_SHIFT;
 423         off             = vma->vm_pgoff;
 424
 425         vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
 426
 427         if (off < count && user_count <= (count - off))
 428                 return remap_pfn_range(vma, vma->vm_start, pfn + off,
 429                                        user_count << PAGE_SHIFT,
 430                                        vma->vm_page_prot);
 431
 432         return -ENXIO;
 433 }
 434
 435 void clcdfb_remove_dma(struct clcd_fb *fb)
 436 {
 437         clcdfb_dma_free(&fb->dev->dev, fb->fb.fix.smem_len,
 438                         fb->fb.screen_base, fb->fb.fix.smem_start);
 439 }
 440
 441 void clcdfb_remove_io(struct clcd_fb *fb)
 442 {
 443         iounmap(fb->fb.screen_base);
 444 }
 445
 446 static int clcdfb_mmap(struct fb_info *info,
 447                        struct vm_area_struct *vma)
 448 {
 449         struct clcd_fb *fb = to_clcd(info);
 450         unsigned long len, off = vma->vm_pgoff << PAGE_SHIFT;
 451         int ret = -EINVAL;
 452
 453         len = info->fix.smem_len;
 454
 455         if (off <= len && vma->vm_end - vma->vm_start <= len - off &&
 456             fb->board->mmap)
 457                 ret = fb->board->mmap(fb, vma);
 458
 459         return ret;
 460 }
 461
 462 static struct fb_ops clcdfb_ops = {
 463         .owner          = THIS_MODULE,
 464         .fb_check_var   = clcdfb_check_var,
 465         .fb_set_par     = clcdfb_set_par,
 466         .fb_setcolreg   = clcdfb_setcolreg,
 467         .fb_blank       = clcdfb_blank,
 468         .fb_fillrect    = cfb_fillrect,
 469         .fb_copyarea    = cfb_copyarea,
 470         .fb_imageblit   = cfb_imageblit,
 471         .fb_mmap        = clcdfb_mmap,
 472 };
 473
 474 static int clcdfb_register(struct clcd_fb *fb)
 475 {
 476         int ret;
 477
 478         /*
 479          * ARM PL111 always has IENB at 0x1c; it's only PL110
 480          * which is reversed on some platforms.
 481          */
 482         if (amba_manf(fb->dev) == 0x41 && amba_part(fb->dev) == 0x111) {
 483                 fb->off_ienb = CLCD_PL111_IENB;
 484                 fb->off_cntl = CLCD_PL111_CNTL;
 485         } else {
 486 #ifdef CONFIG_ARCH_VERSATILE
 487                 fb->off_ienb = CLCD_PL111_IENB;
 488                 fb->off_cntl = CLCD_PL111_CNTL;
 489 #else
 490                 fb->off_ienb = CLCD_PL110_IENB;
 491                 fb->off_cntl = CLCD_PL110_CNTL;
 492 #endif
 493         }
 494
 495         fb->clk = clk_get(&fb->dev->dev, NULL);
 496         if (IS_ERR(fb->clk)) {
 497                 ret = PTR_ERR(fb->clk);
 498                 goto out;
 499         }
 500
 501         ret = clk_prepare(fb->clk);
 502         if (ret)
 503                 goto free_clk;
 504
 505         fb->fb.device           = &fb->dev->dev;
 506
 507         fb->fb.fix.mmio_start   = fb->dev->res.start;
 508         fb->fb.fix.mmio_len     = resource_size(&fb->dev->res);
 509
 510         fb->regs = ioremap(fb->fb.fix.mmio_start, fb->fb.fix.mmio_len);
 511         if (!fb->regs) {
 512                 printk(KERN_ERR "CLCD: unable to remap registers\n");
 513                 ret = -ENOMEM;
 514                 goto clk_unprep;
 515         }
 516
 517         fb->fb.fbops            = &clcdfb_ops;
 518         fb->fb.flags            = FBINFO_FLAG_DEFAULT;
 519         fb->fb.pseudo_palette   = fb->cmap;
 520
 521         strncpy(fb->fb.fix.id, clcd_name, sizeof(fb->fb.fix.id));
 522         fb->fb.fix.type         = FB_TYPE_PACKED_PIXELS;
 523         fb->fb.fix.type_aux     = 0;
 524         fb->fb.fix.xpanstep     = 0;
 525         fb->fb.fix.ypanstep     = 0;
 526         fb->fb.fix.ywrapstep    = 0;
 527         fb->fb.fix.accel        = FB_ACCEL_NONE;
 528
 529         fb->fb.var.xres         = fb->panel->mode.xres;
 530         fb->fb.var.yres         = fb->panel->mode.yres;
 531         fb->fb.var.xres_virtual = fb->panel->mode.xres;
 532         fb->fb.var.yres_virtual = fb->panel->mode.yres;
 533         fb->fb.var.bits_per_pixel = fb->panel->bpp;
 534         fb->fb.var.grayscale    = fb->panel->grayscale;
 535         fb->fb.var.pixclock     = fb->panel->mode.pixclock;
 536         fb->fb.var.left_margin  = fb->panel->mode.left_margin;
 537         fb->fb.var.right_margin = fb->panel->mode.right_margin;
 538         fb->fb.var.upper_margin = fb->panel->mode.upper_margin;
 539         fb->fb.var.lower_margin = fb->panel->mode.lower_margin;
 540         fb->fb.var.hsync_len    = fb->panel->mode.hsync_len;
 541         fb->fb.var.vsync_len    = fb->panel->mode.vsync_len;
 542         fb->fb.var.sync         = fb->panel->mode.sync;
 543         fb->fb.var.vmode        = fb->panel->mode.vmode;
 544         fb->fb.var.activate     = FB_ACTIVATE_NOW;
 545         fb->fb.var.nonstd       = 0;
 546         fb->fb.var.height       = fb->panel->height;
 547         fb->fb.var.width        = fb->panel->width;
 548         fb->fb.var.accel_flags  = 0;
 549
 550         fb->fb.monspecs.hfmin   = 0;
 551         fb->fb.monspecs.hfmax   = 100000;
 552         fb->fb.monspecs.vfmin   = 0;
 553         fb->fb.monspecs.vfmax   = 400;
 554         fb->fb.monspecs.dclkmin = 1000000;
 555         fb->fb.monspecs.dclkmax = 100000000;
 556
 557         /*
 558          * Make sure that the bitfields are set appropriately.
 559          */
 560         clcdfb_set_bitfields(fb, &fb->fb.var);
 561
 562         /*
 563          * Allocate colourmap.
 564          */
 565         ret = fb_alloc_cmap(&fb->fb.cmap, 256, 0);
 566         if (ret)
 567                 goto unmap;
 568
 569         /*
 570          * Ensure interrupts are disabled.
 571          */
 572         writel(0, fb->regs + fb->off_ienb);
 573
 574         fb_set_var(&fb->fb, &fb->fb.var);
 575
 576         dev_info(&fb->dev->dev, "%s hardware, %s display\n",
 577                  fb->board->name, fb->panel->mode.name);
 578
 579         ret = register_framebuffer(&fb->fb);
 580         if (ret == 0)
 581                 goto out;
 582
 583         printk(KERN_ERR "CLCD: cannot register framebuffer (%d)\n", ret);
 584
 585         fb_dealloc_cmap(&fb->fb.cmap);
 586  unmap:
 587         iounmap(fb->regs);
 588  clk_unprep:
 589         clk_unprepare(fb->clk);
 590  free_clk:
 591         clk_put(fb->clk);
 592  out:
 593         return ret;
 594 }
 595
 596 struct string_lookup {
 597         const char *string;
 598         const u32       val;
 599 };
 600
 601 static struct string_lookup vmode_lookups[] = {
 602         { "FB_VMODE_NONINTERLACED", FB_VMODE_NONINTERLACED},
 603         { "FB_VMODE_INTERLACED",    FB_VMODE_INTERLACED},
 604         { "FB_VMODE_DOUBLE",        FB_VMODE_DOUBLE},
 605         { "FB_VMODE_ODD_FLD_FIRST", FB_VMODE_ODD_FLD_FIRST},
 606         { NULL, 0 },
 607 };
 608
 609 static struct string_lookup tim2_lookups[] = {
 610         { "TIM2_CLKSEL", TIM2_CLKSEL},
 611         { "TIM2_IVS",    TIM2_IVS},
 612         { "TIM2_IHS",    TIM2_IHS},
 613         { "TIM2_IPC",    TIM2_IPC},
 614         { "TIM2_IOE",    TIM2_IOE},
 615         { "TIM2_BCD",    TIM2_BCD},
 616         { NULL, 0},
 617 };
 618 static struct string_lookup cntl_lookups[] = {
 619         {"CNTL_LCDEN",        CNTL_LCDEN},
 620         {"CNTL_LCDBPP1",      CNTL_LCDBPP1},
 621         {"CNTL_LCDBPP2",      CNTL_LCDBPP2},
 622         {"CNTL_LCDBPP4",      CNTL_LCDBPP4},
 623         {"CNTL_LCDBPP8",      CNTL_LCDBPP8},
 624         {"CNTL_LCDBPP16",     CNTL_LCDBPP16},
 625         {"CNTL_LCDBPP16_565", CNTL_LCDBPP16_565},
 626         {"CNTL_LCDBPP16_444", CNTL_LCDBPP16_444},
 627         {"CNTL_LCDBPP24",     CNTL_LCDBPP24},
 628         {"CNTL_LCDBW",        CNTL_LCDBW},
 629         {"CNTL_LCDTFT",       CNTL_LCDTFT},
 630         {"CNTL_LCDMONO8",     CNTL_LCDMONO8},
 631         {"CNTL_LCDDUAL",      CNTL_LCDDUAL},
 632         {"CNTL_BGR",          CNTL_BGR},
 633         {"CNTL_BEBO",         CNTL_BEBO},
 634         {"CNTL_BEPO",         CNTL_BEPO},
 635         {"CNTL_LCDPWR",       CNTL_LCDPWR},
 636         {"CNTL_LCDVCOMP(1)",  CNTL_LCDVCOMP(1)},
 637         {"CNTL_LCDVCOMP(2)",  CNTL_LCDVCOMP(2)},
 638         {"CNTL_LCDVCOMP(3)",  CNTL_LCDVCOMP(3)},
 639         {"CNTL_LCDVCOMP(4)",  CNTL_LCDVCOMP(4)},
 640         {"CNTL_LCDVCOMP(5)",  CNTL_LCDVCOMP(5)},
 641         {"CNTL_LCDVCOMP(6)",  CNTL_LCDVCOMP(6)},
 642         {"CNTL_LCDVCOMP(7)",  CNTL_LCDVCOMP(7)},
 643         {"CNTL_LDMAFIFOTIME", CNTL_LDMAFIFOTIME},
 644         {"CNTL_WATERMARK",    CNTL_WATERMARK},
 645         { NULL, 0},
 646 };
 647 static struct string_lookup caps_lookups[] = {
 648         {"CLCD_CAP_RGB444",  CLCD_CAP_RGB444},
 649         {"CLCD_CAP_RGB5551", CLCD_CAP_RGB5551},
 650         {"CLCD_CAP_RGB565",  CLCD_CAP_RGB565},
 651         {"CLCD_CAP_RGB888",  CLCD_CAP_RGB888},
 652         {"CLCD_CAP_BGR444",  CLCD_CAP_BGR444},
 653         {"CLCD_CAP_BGR5551", CLCD_CAP_BGR5551},
 654         {"CLCD_CAP_BGR565",  CLCD_CAP_BGR565},
 655         {"CLCD_CAP_BGR888",  CLCD_CAP_BGR888},
 656         {"CLCD_CAP_444",     CLCD_CAP_444},
 657         {"CLCD_CAP_5551",    CLCD_CAP_5551},
 658         {"CLCD_CAP_565",     CLCD_CAP_565},
 659         {"CLCD_CAP_888",     CLCD_CAP_888},
 660         {"CLCD_CAP_RGB",     CLCD_CAP_RGB},
 661         {"CLCD_CAP_BGR",     CLCD_CAP_BGR},
 662         {"CLCD_CAP_ALL",     CLCD_CAP_ALL},
 663         { NULL, 0},
 664 };
 665
 666 u32 parse_setting(struct string_lookup *lookup, const char *name)
 667 {
 668         int i = 0;
 669         while (lookup[i].string != NULL) {
 670                 if (strcmp(lookup[i].string, name) == 0)
 671                         return lookup[i].val;
 672                 ++i;
 673         }
 674         return -EINVAL;
 675 }
 676
 677 u32 get_string_lookup(struct device_node *node, const char *name,
 678                       struct string_lookup *lookup)
 679 {
 680         const char *string;
 681         int count, i, ret = 0;
 682
 683         count = of_property_count_strings(node, name);
 684         if (count >= 0)
 685                 for (i = 0; i < count; i++)
 686                         if (of_property_read_string_index(node, name, i,
 687                                         &string) == 0)
 688                                 ret |= parse_setting(lookup, string);
 689         return ret;
 690 }
 691
 692 int get_val(struct device_node *node, const char *string)
 693 {
 694         u32 ret = 0;
 695
 696         if (of_property_read_u32(node, string, &ret))
 697                 ret = -1;
 698         return ret;
 699 }
 700
 701 struct clcd_panel *getPanel(struct device_node *node)
 702 {
 703         static struct clcd_panel panel;
 704
 705         panel.mode.refresh      = get_val(node, "refresh");
 706         panel.mode.xres         = get_val(node, "xres");
 707         panel.mode.yres         = get_val(node, "yres");
 708         panel.mode.pixclock     = get_val(node, "pixclock");
 709         panel.mode.left_margin  = get_val(node, "left_margin");
 710         panel.mode.right_margin = get_val(node, "right_margin");
 711         panel.mode.upper_margin = get_val(node, "upper_margin");
 712         panel.mode.lower_margin = get_val(node, "lower_margin");
 713         panel.mode.hsync_len    = get_val(node, "hsync_len");
 714         panel.mode.vsync_len    = get_val(node, "vsync_len");
 715         panel.mode.sync         = get_val(node, "sync");
 716         panel.bpp               = get_val(node, "bpp");
 717         panel.width             = (signed short) get_val(node, "width");
 718         panel.height            = (signed short) get_val(node, "height");
 719
 720         panel.mode.vmode = get_string_lookup(node, "vmode", vmode_lookups);
 721         panel.tim2       = get_string_lookup(node, "tim2",  tim2_lookups);
 722         panel.cntl       = get_string_lookup(node, "cntl",  cntl_lookups);
 723         panel.caps       = get_string_lookup(node, "caps",  caps_lookups);
 724
 725         return &panel;
 726 }
 727
 728 struct clcd_panel *clcdfb_get_panel(const char *name)
 729 {
 730         struct device_node *node = NULL;
 731         const char *mode;
 732         struct clcd_panel *panel = NULL;
 733
 734         do {
 735                 node = of_find_compatible_node(node, NULL, "panel");
 736                 if (node)
 737                         if (of_property_read_string(node, "mode", &mode) == 0)
 738                                 if (strcmp(mode, name) == 0) {
 739                                         panel = getPanel(node);
 740                                         panel->mode.name = name;
 741                                 }
 742         } while (node != NULL);
 743
 744         return panel;
 745 }
 746
 747 #ifdef CONFIG_OF
 748 static int clcdfb_dt_init(struct clcd_fb *fb)
 749 {
 750         int err = 0;
 751         struct device_node *node;
 752         const char *mode;
 753         dma_addr_t dma;
 754         u32 use_dma;
 755         const __be32 *prop;
 756         int len, na, ns;
 757         phys_addr_t fb_base, fb_size;
 758
 759         node = fb->dev->dev.of_node;
 760         if (!node)
 761                 return -ENODEV;
 762
 763         na = of_n_addr_cells(node);
 764         ns = of_n_size_cells(node);
 765
 766         if (WARN_ON(of_property_read_string(node, "mode", &mode)))
 767                 return -ENODEV;
 768
 769         fb->panel = clcdfb_get_panel(mode);
 770         if (!fb->panel)
 771                 return -EINVAL;
 772         fb->fb.fix.smem_len = fb->panel->mode.xres * fb->panel->mode.yres * 2;
 773
 774         fb->board->name         = "Device Tree CLCD PL111";
 775         fb->board->caps         = CLCD_CAP_5551 | CLCD_CAP_565;
 776         fb->board->check        = clcdfb_check;
 777         fb->board->decode       = clcdfb_decode;
 778
 779         if (of_property_read_u32(node, "use_dma", &use_dma))
 780                 use_dma = 0;
 781
 782         if (use_dma) {
 783                 fb->fb.screen_base = clcdfb_dma_alloc(&fb->dev->dev,
 784                                                       fb->fb.fix.smem_len,
 785                                                       &dma, GFP_KERNEL);
 786                 if (!fb->fb.screen_base) {
 787                         pr_err("CLCD: unable to map framebuffer\n");
 788                         return -ENOMEM;
 789                 }
 790
 791                 fb->fb.fix.smem_start   = dma;
 792                 fb->board->mmap         = clcdfb_mmap_dma;
 793                 fb->board->remove       = clcdfb_remove_dma;
 794         } else {
 795                 prop = of_get_property(node, "framebuffer", &len);
 796                 if (WARN_ON(!prop || len < (na + ns) * sizeof(*prop)))
 797                         return -EINVAL;
 798
 799                 fb_base = of_read_number(prop, na);
 800                 fb_size = of_read_number(prop + na, ns);
 801
 802                 fb->fb.fix.smem_start   = fb_base;
 803                 fb->fb.screen_base      = ioremap_wc(fb_base, fb_size);
 804                 fb->board->mmap         = clcdfb_mmap_io;
 805                 fb->board->remove       = clcdfb_remove_io;
 806         }
 807
 808         return err;
 809 }
 810 #endif /* CONFIG_OF */
 811
 812 static int clcdfb_probe(struct amba_device *dev, const struct amba_id *id)
 813 {
 814         struct clcd_board *board = dev->dev.platform_data;
 815         struct clcd_fb *fb;
 816         int ret;
 817
 818         if (!board) {
 819 #ifdef CONFIG_OF
 820                 if (dev->dev.of_node) {
 821                         board = kzalloc(sizeof(struct clcd_board), GFP_KERNEL);
 822                         if (!board)
 823                                 return -ENOMEM;
 824                         board->setup   = clcdfb_dt_init;
 825                 } else
 826 #endif
 827                         return -EINVAL;
 828         }
 829
 830         ret = amba_request_regions(dev, NULL);
 831         if (ret) {
 832                 printk(KERN_ERR "CLCD: unable to reserve regs region\n");
 833                 goto out;
 834         }
 835
 836         fb = kzalloc(sizeof(struct clcd_fb), GFP_KERNEL);
 837         if (!fb) {
 838                 printk(KERN_INFO "CLCD: could not allocate new clcd_fb struct\n");
 839                 ret = -ENOMEM;
 840                 goto free_region;
 841         }
 842
 843         fb->dev = dev;
 844         fb->board = board;
 845
 846         dev_info(&fb->dev->dev, "PL%03x rev%u at 0x%08llx\n",
 847                 amba_part(dev), amba_rev(dev),
 848                 (unsigned long long)dev->res.start);
 849
 850         ret = fb->board->setup(fb);
 851         if (ret)
 852                 goto free_fb;
 853
 854         ret = clcdfb_register(fb);
 855         if (ret == 0) {
 856                 amba_set_drvdata(dev, fb);
 857                 goto out;
 858         }
 859
 860         fb->board->remove(fb);
 861  free_fb:
 862         kfree(fb);
 863  free_region:
 864         amba_release_regions(dev);
 865  out:
 866         return ret;
 867 }
 868
 869 static int clcdfb_remove(struct amba_device *dev)
 870 {
 871         struct clcd_fb *fb = amba_get_drvdata(dev);
 872
 873         amba_set_drvdata(dev, NULL);
 874
 875         clcdfb_disable(fb);
 876         unregister_framebuffer(&fb->fb);
 877         if (fb->fb.cmap.len)
 878                 fb_dealloc_cmap(&fb->fb.cmap);
 879         iounmap(fb->regs);
 880         clk_unprepare(fb->clk);
 881         clk_put(fb->clk);
 882
 883         fb->board->remove(fb);
 884
 885         kfree(fb);
 886
 887         amba_release_regions(dev);
 888
 889         return 0;
 890 }
 891
 892 static struct amba_id clcdfb_id_table[] = {
 893         {
 894                 .id     = 0x00041110,
 895                 .mask   = 0x000ffffe,
 896         },
 897         { 0, 0 },
 898 };
 899
 900 MODULE_DEVICE_TABLE(amba, clcdfb_id_table);
 901
 902 static struct amba_driver clcd_driver = {
 903         .drv            = {
 904                 .name   = "clcd-pl11x",
 905         },
 906         .probe          = clcdfb_probe,
 907         .remove         = clcdfb_remove,
 908         .id_table       = clcdfb_id_table,
 909 };
 910
 911 static int __init amba_clcdfb_init(void)
 912 {
 913         if (fb_get_options("ambafb", NULL))
 914                 return -ENODEV;
 915
 916         return amba_driver_register(&clcd_driver);
 917 }
 918
 919 module_init(amba_clcdfb_init);
 920
 921 static void __exit amba_clcdfb_exit(void)
 922 {
 923         amba_driver_unregister(&clcd_driver);
 924 }
 925
 926 module_exit(amba_clcdfb_exit);
 927
 928 MODULE_DESCRIPTION("ARM PrimeCell PL110 CLCD core driver");
 929 MODULE_LICENSE("GPL");