drivers/usb/phy/phy-fsl-usb.c

   1 /*
   2  * Copyright (C) 2007,2008 Freescale semiconductor, Inc.
   3  *
   4  * Author: Li Yang <LeoLi@freescale.com>
   5  *         Jerry Huang <Chang-Ming.Huang@freescale.com>
   6  *
   7  * Initialization based on code from Shlomi Gridish.
   8  *
   9  * This program is free software; you can redistribute  it and/or modify it
  10  * under  the terms of  the GNU General  Public License as published by the
  11  * Free Software Foundation;  either version 2 of the  License, or (at your
  12  * option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful, but
  15  * WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  17  * General Public License for more details.
  18  *
  19  * You should have received a copy of the  GNU General Public License along
  20  * with this program; if not, write  to the Free Software Foundation, Inc.,
  21  * 675 Mass Ave, Cambridge, MA 02139, USA.
  22  */
  23
  24 #include <linux/module.h>
  25 #include <linux/kernel.h>
  26 #include <linux/delay.h>
  27 #include <linux/slab.h>
  28 #include <linux/proc_fs.h>
  29 #include <linux/errno.h>
  30 #include <linux/init.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/io.h>
  33 #include <linux/timer.h>
  34 #include <linux/usb.h>
  35 #include <linux/device.h>
  36 #include <linux/usb/ch9.h>
  37 #include <linux/usb/gadget.h>
  38 #include <linux/workqueue.h>
  39 #include <linux/time.h>
  40 #include <linux/fsl_devices.h>
  41 #include <linux/platform_device.h>
  42 #include <linux/uaccess.h>
  43
  44 #include <asm/unaligned.h>
  45
  46 #include "phy-fsl-usb.h"
  47
  48 #define DRIVER_VERSION "Rev. 1.55"
  49 #define DRIVER_AUTHOR "Jerry Huang/Li Yang"
  50 #define DRIVER_DESC "Freescale USB OTG Transceiver Driver"
  51 #define DRIVER_INFO DRIVER_DESC " " DRIVER_VERSION
  52
  53 static const char driver_name[] = "fsl-usb2-otg";
  54
  55 const pm_message_t otg_suspend_state = {
  56         .event = 1,
  57 };
  58
  59 #define HA_DATA_PULSE
  60
  61 static struct usb_dr_mmap *usb_dr_regs;
  62 static struct fsl_otg *fsl_otg_dev;
  63 static int srp_wait_done;
  64
  65 /* FSM timers */
  66 struct fsl_otg_timer *a_wait_vrise_tmr, *a_wait_bcon_tmr, *a_aidl_bdis_tmr,
  67         *b_ase0_brst_tmr, *b_se0_srp_tmr;
  68
  69 /* Driver specific timers */
  70 struct fsl_otg_timer *b_data_pulse_tmr, *b_vbus_pulse_tmr, *b_srp_fail_tmr,
  71         *b_srp_wait_tmr, *a_wait_enum_tmr;
  72
  73 static struct list_head active_timers;
  74
  75 static struct fsl_otg_config fsl_otg_initdata = {
  76         .otg_port = 1,
  77 };
  78
  79 #ifdef CONFIG_PPC32
  80 static u32 _fsl_readl_be(const unsigned __iomem *p)
  81 {
  82         return in_be32(p);
  83 }
  84
  85 static u32 _fsl_readl_le(const unsigned __iomem *p)
  86 {
  87         return in_le32(p);
  88 }
  89
  90 static void _fsl_writel_be(u32 v, unsigned __iomem *p)
  91 {
  92         out_be32(p, v);
  93 }
  94
  95 static void _fsl_writel_le(u32 v, unsigned __iomem *p)
  96 {
  97         out_le32(p, v);
  98 }
  99
 100 static u32 (*_fsl_readl)(const unsigned __iomem *p);
 101 static void (*_fsl_writel)(u32 v, unsigned __iomem *p);
 102
 103 #define fsl_readl(p)            (*_fsl_readl)((p))
 104 #define fsl_writel(v, p)        (*_fsl_writel)((v), (p))
 105
 106 #else
 107 #define fsl_readl(addr)         readl(addr)
 108 #define fsl_writel(val, addr)   writel(val, addr)
 109 #endif /* CONFIG_PPC32 */
 110
 111 /* Routines to access transceiver ULPI registers */
 112 u8 view_ulpi(u8 addr)
 113 {
 114         u32 temp;
 115
 116         temp = 0x40000000 | (addr << 16);
 117         fsl_writel(temp, &usb_dr_regs->ulpiview);
 118         udelay(1000);
 119         while (temp & 0x40)
 120                 temp = fsl_readl(&usb_dr_regs->ulpiview);
 121         return (le32_to_cpu(temp) & 0x0000ff00) >> 8;
 122 }
 123
 124 int write_ulpi(u8 addr, u8 data)
 125 {
 126         u32 temp;
 127
 128         temp = 0x60000000 | (addr << 16) | data;
 129         fsl_writel(temp, &usb_dr_regs->ulpiview);
 130         return 0;
 131 }
 132
 133 /* -------------------------------------------------------------*/
 134 /* Operations that will be called from OTG Finite State Machine */
 135
 136 /* Charge vbus for vbus pulsing in SRP */
 137 void fsl_otg_chrg_vbus(int on)
 138 {
 139         u32 tmp;
 140
 141         tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK;
 142
 143         if (on)
 144                 /* stop discharging, start charging */
 145                 tmp = (tmp & ~OTGSC_CTRL_VBUS_DISCHARGE) |
 146                         OTGSC_CTRL_VBUS_CHARGE;
 147         else
 148                 /* stop charging */
 149                 tmp &= ~OTGSC_CTRL_VBUS_CHARGE;
 150
 151         fsl_writel(tmp, &usb_dr_regs->otgsc);
 152 }
 153
 154 /* Discharge vbus through a resistor to ground */
 155 void fsl_otg_dischrg_vbus(int on)
 156 {
 157         u32 tmp;
 158
 159         tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK;
 160
 161         if (on)
 162                 /* stop charging, start discharging */
 163                 tmp = (tmp & ~OTGSC_CTRL_VBUS_CHARGE) |
 164                         OTGSC_CTRL_VBUS_DISCHARGE;
 165         else
 166                 /* stop discharging */
 167                 tmp &= ~OTGSC_CTRL_VBUS_DISCHARGE;
 168
 169         fsl_writel(tmp, &usb_dr_regs->otgsc);
 170 }
 171
 172 /* A-device driver vbus, controlled through PP bit in PORTSC */
 173 void fsl_otg_drv_vbus(int on)
 174 {
 175         u32 tmp;
 176
 177         if (on) {
 178                 tmp = fsl_readl(&usb_dr_regs->portsc) & ~PORTSC_W1C_BITS;
 179                 fsl_writel(tmp | PORTSC_PORT_POWER, &usb_dr_regs->portsc);
 180         } else {
 181                 tmp = fsl_readl(&usb_dr_regs->portsc) &
 182                       ~PORTSC_W1C_BITS & ~PORTSC_PORT_POWER;
 183                 fsl_writel(tmp, &usb_dr_regs->portsc);
 184         }
 185 }
 186
 187 /*
 188  * Pull-up D+, signalling connect by periperal. Also used in
 189  * data-line pulsing in SRP
 190  */
 191 void fsl_otg_loc_conn(int on)
 192 {
 193         u32 tmp;
 194
 195         tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK;
 196
 197         if (on)
 198                 tmp |= OTGSC_CTRL_DATA_PULSING;
 199         else
 200                 tmp &= ~OTGSC_CTRL_DATA_PULSING;
 201
 202         fsl_writel(tmp, &usb_dr_regs->otgsc);
 203 }
 204
 205 /*
 206  * Generate SOF by host.  This is controlled through suspend/resume the
 207  * port.  In host mode, controller will automatically send SOF.
 208  * Suspend will block the data on the port.
 209  */
 210 void fsl_otg_loc_sof(int on)
 211 {
 212         u32 tmp;
 213
 214         tmp = fsl_readl(&fsl_otg_dev->dr_mem_map->portsc) & ~PORTSC_W1C_BITS;
 215         if (on)
 216                 tmp |= PORTSC_PORT_FORCE_RESUME;
 217         else
 218                 tmp |= PORTSC_PORT_SUSPEND;
 219
 220         fsl_writel(tmp, &fsl_otg_dev->dr_mem_map->portsc);
 221
 222 }
 223
 224 /* Start SRP pulsing by data-line pulsing, followed with v-bus pulsing. */
 225 void fsl_otg_start_pulse(void)
 226 {
 227         u32 tmp;
 228
 229         srp_wait_done = 0;
 230 #ifdef HA_DATA_PULSE
 231         tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK;
 232         tmp |= OTGSC_HA_DATA_PULSE;
 233         fsl_writel(tmp, &usb_dr_regs->otgsc);
 234 #else
 235         fsl_otg_loc_conn(1);
 236 #endif
 237
 238         fsl_otg_add_timer(b_data_pulse_tmr);
 239 }
 240
 241 void b_data_pulse_end(unsigned long foo)
 242 {
 243 #ifdef HA_DATA_PULSE
 244 #else
 245         fsl_otg_loc_conn(0);
 246 #endif
 247
 248         /* Do VBUS pulse after data pulse */
 249         fsl_otg_pulse_vbus();
 250 }
 251
 252 void fsl_otg_pulse_vbus(void)
 253 {
 254         srp_wait_done = 0;
 255         fsl_otg_chrg_vbus(1);
 256         /* start the timer to end vbus charge */
 257         fsl_otg_add_timer(b_vbus_pulse_tmr);
 258 }
 259
 260 void b_vbus_pulse_end(unsigned long foo)
 261 {
 262         fsl_otg_chrg_vbus(0);
 263
 264         /*
 265          * As USB3300 using the same a_sess_vld and b_sess_vld voltage
 266          * we need to discharge the bus for a while to distinguish
 267          * residual voltage of vbus pulsing and A device pull up
 268          */
 269         fsl_otg_dischrg_vbus(1);
 270         fsl_otg_add_timer(b_srp_wait_tmr);
 271 }
 272
 273 void b_srp_end(unsigned long foo)
 274 {
 275         fsl_otg_dischrg_vbus(0);
 276         srp_wait_done = 1;
 277
 278         if ((fsl_otg_dev->phy.state == OTG_STATE_B_SRP_INIT) &&
 279             fsl_otg_dev->fsm.b_sess_vld)
 280                 fsl_otg_dev->fsm.b_srp_done = 1;
 281 }
 282
 283 /*
 284  * Workaround for a_host suspending too fast.  When a_bus_req=0,
 285  * a_host will start by SRP.  It needs to set b_hnp_enable before
 286  * actually suspending to start HNP
 287  */
 288 void a_wait_enum(unsigned long foo)
 289 {
 290         VDBG("a_wait_enum timeout\n");
 291         if (!fsl_otg_dev->phy.otg->host->b_hnp_enable)
 292                 fsl_otg_add_timer(a_wait_enum_tmr);
 293         else
 294                 otg_statemachine(&fsl_otg_dev->fsm);
 295 }
 296
 297 /* The timeout callback function to set time out bit */
 298 void set_tmout(unsigned long indicator)
 299 {
 300         *(int *)indicator = 1;
 301 }
 302
 303 /* Initialize timers */
 304 int fsl_otg_init_timers(struct otg_fsm *fsm)
 305 {
 306         /* FSM used timers */
 307         a_wait_vrise_tmr = otg_timer_initializer(&set_tmout, TA_WAIT_VRISE,
 308                                 (unsigned long)&fsm->a_wait_vrise_tmout);
 309         if (!a_wait_vrise_tmr)
 310                 return -ENOMEM;
 311
 312         a_wait_bcon_tmr = otg_timer_initializer(&set_tmout, TA_WAIT_BCON,
 313                                 (unsigned long)&fsm->a_wait_bcon_tmout);
 314         if (!a_wait_bcon_tmr)
 315                 return -ENOMEM;
 316
 317         a_aidl_bdis_tmr = otg_timer_initializer(&set_tmout, TA_AIDL_BDIS,
 318                                 (unsigned long)&fsm->a_aidl_bdis_tmout);
 319         if (!a_aidl_bdis_tmr)
 320                 return -ENOMEM;
 321
 322         b_ase0_brst_tmr = otg_timer_initializer(&set_tmout, TB_ASE0_BRST,
 323                                 (unsigned long)&fsm->b_ase0_brst_tmout);
 324         if (!b_ase0_brst_tmr)
 325                 return -ENOMEM;
 326
 327         b_se0_srp_tmr = otg_timer_initializer(&set_tmout, TB_SE0_SRP,
 328                                 (unsigned long)&fsm->b_se0_srp);
 329         if (!b_se0_srp_tmr)
 330                 return -ENOMEM;
 331
 332         b_srp_fail_tmr = otg_timer_initializer(&set_tmout, TB_SRP_FAIL,
 333                                 (unsigned long)&fsm->b_srp_done);
 334         if (!b_srp_fail_tmr)
 335                 return -ENOMEM;
 336
 337         a_wait_enum_tmr = otg_timer_initializer(&a_wait_enum, 10,
 338                                 (unsigned long)&fsm);
 339         if (!a_wait_enum_tmr)
 340                 return -ENOMEM;
 341
 342         /* device driver used timers */
 343         b_srp_wait_tmr = otg_timer_initializer(&b_srp_end, TB_SRP_WAIT, 0);
 344         if (!b_srp_wait_tmr)
 345                 return -ENOMEM;
 346
 347         b_data_pulse_tmr = otg_timer_initializer(&b_data_pulse_end,
 348                                 TB_DATA_PLS, 0);
 349         if (!b_data_pulse_tmr)
 350                 return -ENOMEM;
 351
 352         b_vbus_pulse_tmr = otg_timer_initializer(&b_vbus_pulse_end,
 353                                 TB_VBUS_PLS, 0);
 354         if (!b_vbus_pulse_tmr)
 355                 return -ENOMEM;
 356
 357         return 0;
 358 }
 359
 360 /* Uninitialize timers */
 361 void fsl_otg_uninit_timers(void)
 362 {
 363         /* FSM used timers */
 364         kfree(a_wait_vrise_tmr);
 365         kfree(a_wait_bcon_tmr);
 366         kfree(a_aidl_bdis_tmr);
 367         kfree(b_ase0_brst_tmr);
 368         kfree(b_se0_srp_tmr);
 369         kfree(b_srp_fail_tmr);
 370         kfree(a_wait_enum_tmr);
 371
 372         /* device driver used timers */
 373         kfree(b_srp_wait_tmr);
 374         kfree(b_data_pulse_tmr);
 375         kfree(b_vbus_pulse_tmr);
 376 }
 377
 378 /* Add timer to timer list */
 379 void fsl_otg_add_timer(void *gtimer)
 380 {
 381         struct fsl_otg_timer *timer = gtimer;
 382         struct fsl_otg_timer *tmp_timer;
 383
 384         /*
 385          * Check if the timer is already in the active list,
 386          * if so update timer count
 387          */
 388         list_for_each_entry(tmp_timer, &active_timers, list)
 389             if (tmp_timer == timer) {
 390                 timer->count = timer->expires;
 391                 return;
 392         }
 393         timer->count = timer->expires;
 394         list_add_tail(&timer->list, &active_timers);
 395 }
 396
 397 /* Remove timer from the timer list; clear timeout status */
 398 void fsl_otg_del_timer(void *gtimer)
 399 {
 400         struct fsl_otg_timer *timer = gtimer;
 401         struct fsl_otg_timer *tmp_timer, *del_tmp;
 402
 403         list_for_each_entry_safe(tmp_timer, del_tmp, &active_timers, list)
 404                 if (tmp_timer == timer)
 405                         list_del(&timer->list);
 406 }
 407
 408 /*
 409  * Reduce timer count by 1, and find timeout conditions.
 410  * Called by fsl_otg 1ms timer interrupt
 411  */
 412 int fsl_otg_tick_timer(void)
 413 {
 414         struct fsl_otg_timer *tmp_timer, *del_tmp;
 415         int expired = 0;
 416
 417         list_for_each_entry_safe(tmp_timer, del_tmp, &active_timers, list) {
 418                 tmp_timer->count--;
 419                 /* check if timer expires */
 420                 if (!tmp_timer->count) {
 421                         list_del(&tmp_timer->list);
 422                         tmp_timer->function(tmp_timer->data);
 423                         expired = 1;
 424                 }
 425         }
 426
 427         return expired;
 428 }
 429
 430 /* Reset controller, not reset the bus */
 431 void otg_reset_controller(void)
 432 {
 433         u32 command;
 434
 435         command = fsl_readl(&usb_dr_regs->usbcmd);
 436         command |= (1 << 1);
 437         fsl_writel(command, &usb_dr_regs->usbcmd);
 438         while (fsl_readl(&usb_dr_regs->usbcmd) & (1 << 1))
 439                 ;
 440 }
 441
 442 /* Call suspend/resume routines in host driver */
 443 int fsl_otg_start_host(struct otg_fsm *fsm, int on)
 444 {
 445         struct usb_otg *otg = fsm->otg;
 446         struct device *dev;
 447         struct fsl_otg *otg_dev = container_of(otg->phy, struct fsl_otg, phy);
 448         u32 retval = 0;
 449
 450         if (!otg->host)
 451                 return -ENODEV;
 452         dev = otg->host->controller;
 453
 454         /*
 455          * Update a_vbus_vld state as a_vbus_vld int is disabled
 456          * in device mode
 457          */
 458         fsm->a_vbus_vld =
 459                 !!(fsl_readl(&usb_dr_regs->otgsc) & OTGSC_STS_A_VBUS_VALID);
 460         if (on) {
 461                 /* start fsl usb host controller */
 462                 if (otg_dev->host_working)
 463                         goto end;
 464                 else {
 465                         otg_reset_controller();
 466                         VDBG("host on......\n");
 467                         if (dev->driver->pm && dev->driver->pm->resume) {
 468                                 retval = dev->driver->pm->resume(dev);
 469                                 if (fsm->id) {
 470                                         /* default-b */
 471                                         fsl_otg_drv_vbus(1);
 472                                         /*
 473                                          * Workaround: b_host can't driver
 474                                          * vbus, but PP in PORTSC needs to
 475                                          * be 1 for host to work.
 476                                          * So we set drv_vbus bit in
 477                                          * transceiver to 0 thru ULPI.
 478                                          */
 479                                         write_ulpi(0x0c, 0x20);
 480                                 }
 481                         }
 482
 483                         otg_dev->host_working = 1;
 484                 }
 485         } else {
 486                 /* stop fsl usb host controller */
 487                 if (!otg_dev->host_working)
 488                         goto end;
 489                 else {
 490                         VDBG("host off......\n");
 491                         if (dev && dev->driver) {
 492                                 if (dev->driver->pm && dev->driver->pm->suspend)
 493                                         retval = dev->driver->pm->suspend(dev);
 494                                 if (fsm->id)
 495                                         /* default-b */
 496                                         fsl_otg_drv_vbus(0);
 497                         }
 498                         otg_dev->host_working = 0;
 499                 }
 500         }
 501 end:
 502         return retval;
 503 }
 504
 505 /*
 506  * Call suspend and resume function in udc driver
 507  * to stop and start udc driver.
 508  */
 509 int fsl_otg_start_gadget(struct otg_fsm *fsm, int on)
 510 {
 511         struct usb_otg *otg = fsm->otg;
 512         struct device *dev;
 513
 514         if (!otg->gadget || !otg->gadget->dev.parent)
 515                 return -ENODEV;
 516
 517         VDBG("gadget %s\n", on ? "on" : "off");
 518         dev = otg->gadget->dev.parent;
 519
 520         if (on) {
 521                 if (dev->driver->resume)
 522                         dev->driver->resume(dev);
 523         } else {
 524                 if (dev->driver->suspend)
 525                         dev->driver->suspend(dev, otg_suspend_state);
 526         }
 527
 528         return 0;
 529 }
 530
 531 /*
 532  * Called by initialization code of host driver.  Register host controller
 533  * to the OTG.  Suspend host for OTG role detection.
 534  */
 535 static int fsl_otg_set_host(struct usb_otg *otg, struct usb_bus *host)
 536 {
 537         struct fsl_otg *otg_dev;
 538
 539         if (!otg)
 540                 return -ENODEV;
 541
 542         otg_dev = container_of(otg->phy, struct fsl_otg, phy);
 543         if (otg_dev != fsl_otg_dev)
 544                 return -ENODEV;
 545
 546         otg->host = host;
 547
 548         otg_dev->fsm.a_bus_drop = 0;
 549         otg_dev->fsm.a_bus_req = 1;
 550
 551         if (host) {
 552                 VDBG("host off......\n");
 553
 554                 otg->host->otg_port = fsl_otg_initdata.otg_port;
 555                 otg->host->is_b_host = otg_dev->fsm.id;
 556                 /*
 557                  * must leave time for khubd to finish its thing
 558                  * before yanking the host driver out from under it,
 559                  * so suspend the host after a short delay.
 560                  */
 561                 otg_dev->host_working = 1;
 562                 schedule_delayed_work(&otg_dev->otg_event, 100);
 563                 return 0;
 564         } else {
 565                 /* host driver going away */
 566                 if (!(fsl_readl(&otg_dev->dr_mem_map->otgsc) &
 567                       OTGSC_STS_USB_ID)) {
 568                         /* Mini-A cable connected */
 569                         struct otg_fsm *fsm = &otg_dev->fsm;
 570
 571                         otg->phy->state = OTG_STATE_UNDEFINED;
 572                         fsm->protocol = PROTO_UNDEF;
 573                 }
 574         }
 575
 576         otg_dev->host_working = 0;
 577
 578         otg_statemachine(&otg_dev->fsm);
 579
 580         return 0;
 581 }
 582
 583 /* Called by initialization code of udc.  Register udc to OTG. */
 584 static int fsl_otg_set_peripheral(struct usb_otg *otg,
 585                                         struct usb_gadget *gadget)
 586 {
 587         struct fsl_otg *otg_dev;
 588
 589         if (!otg)
 590                 return -ENODEV;
 591
 592         otg_dev = container_of(otg->phy, struct fsl_otg, phy);
 593         VDBG("otg_dev 0x%x\n", (int)otg_dev);
 594         VDBG("fsl_otg_dev 0x%x\n", (int)fsl_otg_dev);
 595         if (otg_dev != fsl_otg_dev)
 596                 return -ENODEV;
 597
 598         if (!gadget) {
 599                 if (!otg->default_a)
 600                         otg->gadget->ops->vbus_draw(otg->gadget, 0);
 601                 usb_gadget_vbus_disconnect(otg->gadget);
 602                 otg->gadget = 0;
 603                 otg_dev->fsm.b_bus_req = 0;
 604                 otg_statemachine(&otg_dev->fsm);
 605                 return 0;
 606         }
 607
 608         otg->gadget = gadget;
 609         otg->gadget->is_a_peripheral = !otg_dev->fsm.id;
 610
 611         otg_dev->fsm.b_bus_req = 1;
 612
 613         /* start the gadget right away if the ID pin says Mini-B */
 614         DBG("ID pin=%d\n", otg_dev->fsm.id);
 615         if (otg_dev->fsm.id == 1) {
 616                 fsl_otg_start_host(&otg_dev->fsm, 0);
 617                 otg_drv_vbus(&otg_dev->fsm, 0);
 618                 fsl_otg_start_gadget(&otg_dev->fsm, 1);
 619         }
 620
 621         return 0;
 622 }
 623
 624 /* Set OTG port power, only for B-device */
 625 static int fsl_otg_set_power(struct usb_phy *phy, unsigned mA)
 626 {
 627         if (!fsl_otg_dev)
 628                 return -ENODEV;
 629         if (phy->state == OTG_STATE_B_PERIPHERAL)
 630                 pr_info("FSL OTG: Draw %d mA\n", mA);
 631
 632         return 0;
 633 }
 634
 635 /*
 636  * Delayed pin detect interrupt processing.
 637  *
 638  * When the Mini-A cable is disconnected from the board,
 639  * the pin-detect interrupt happens before the disconnect
 640  * interrupts for the connected device(s).  In order to
 641  * process the disconnect interrupt(s) prior to switching
 642  * roles, the pin-detect interrupts are delayed, and handled
 643  * by this routine.
 644  */
 645 static void fsl_otg_event(struct work_struct *work)
 646 {
 647         struct fsl_otg *og = container_of(work, struct fsl_otg, otg_event.work);
 648         struct otg_fsm *fsm = &og->fsm;
 649
 650         if (fsm->id) {          /* switch to gadget */
 651                 fsl_otg_start_host(fsm, 0);
 652                 otg_drv_vbus(fsm, 0);
 653                 fsl_otg_start_gadget(fsm, 1);
 654         }
 655 }
 656
 657 /* B-device start SRP */
 658 static int fsl_otg_start_srp(struct usb_otg *otg)
 659 {
 660         struct fsl_otg *otg_dev;
 661
 662         if (!otg || otg->phy->state != OTG_STATE_B_IDLE)
 663                 return -ENODEV;
 664
 665         otg_dev = container_of(otg->phy, struct fsl_otg, phy);
 666         if (otg_dev != fsl_otg_dev)
 667                 return -ENODEV;
 668
 669         otg_dev->fsm.b_bus_req = 1;
 670         otg_statemachine(&otg_dev->fsm);
 671
 672         return 0;
 673 }
 674
 675 /* A_host suspend will call this function to start hnp */
 676 static int fsl_otg_start_hnp(struct usb_otg *otg)
 677 {
 678         struct fsl_otg *otg_dev;
 679
 680         if (!otg)
 681                 return -ENODEV;
 682
 683         otg_dev = container_of(otg->phy, struct fsl_otg, phy);
 684         if (otg_dev != fsl_otg_dev)
 685                 return -ENODEV;
 686
 687         DBG("start_hnp...n");
 688
 689         /* clear a_bus_req to enter a_suspend state */
 690         otg_dev->fsm.a_bus_req = 0;
 691         otg_statemachine(&otg_dev->fsm);
 692
 693         return 0;
 694 }
 695
 696 /*
 697  * Interrupt handler.  OTG/host/peripheral share the same int line.
 698  * OTG driver clears OTGSC interrupts and leaves USB interrupts
 699  * intact.  It needs to have knowledge of some USB interrupts
 700  * such as port change.
 701  */
 702 irqreturn_t fsl_otg_isr(int irq, void *dev_id)
 703 {
 704         struct otg_fsm *fsm = &((struct fsl_otg *)dev_id)->fsm;
 705         struct usb_otg *otg = ((struct fsl_otg *)dev_id)->phy.otg;
 706         u32 otg_int_src, otg_sc;
 707
 708         otg_sc = fsl_readl(&usb_dr_regs->otgsc);
 709         otg_int_src = otg_sc & OTGSC_INTSTS_MASK & (otg_sc >> 8);
 710
 711         /* Only clear otg interrupts */
 712         fsl_writel(otg_sc, &usb_dr_regs->otgsc);
 713
 714         /*FIXME: ID change not generate when init to 0 */
 715         fsm->id = (otg_sc & OTGSC_STS_USB_ID) ? 1 : 0;
 716         otg->default_a = (fsm->id == 0);
 717
 718         /* process OTG interrupts */
 719         if (otg_int_src) {
 720                 if (otg_int_src & OTGSC_INTSTS_USB_ID) {
 721                         fsm->id = (otg_sc & OTGSC_STS_USB_ID) ? 1 : 0;
 722                         otg->default_a = (fsm->id == 0);
 723                         /* clear conn information */
 724                         if (fsm->id)
 725                                 fsm->b_conn = 0;
 726                         else
 727                                 fsm->a_conn = 0;
 728
 729                         if (otg->host)
 730                                 otg->host->is_b_host = fsm->id;
 731                         if (otg->gadget)
 732                                 otg->gadget->is_a_peripheral = !fsm->id;
 733                         VDBG("ID int (ID is %d)\n", fsm->id);
 734
 735                         if (fsm->id) {  /* switch to gadget */
 736                                 schedule_delayed_work(
 737                                         &((struct fsl_otg *)dev_id)->otg_event,
 738                                         100);
 739                         } else {        /* switch to host */
 740                                 cancel_delayed_work(&
 741                                                     ((struct fsl_otg *)dev_id)->
 742                                                     otg_event);
 743                                 fsl_otg_start_gadget(fsm, 0);
 744                                 otg_drv_vbus(fsm, 1);
 745                                 fsl_otg_start_host(fsm, 1);
 746                         }
 747                         return IRQ_HANDLED;
 748                 }
 749         }
 750         return IRQ_NONE;
 751 }
 752
 753 static struct otg_fsm_ops fsl_otg_ops = {
 754         .chrg_vbus = fsl_otg_chrg_vbus,
 755         .drv_vbus = fsl_otg_drv_vbus,
 756         .loc_conn = fsl_otg_loc_conn,
 757         .loc_sof = fsl_otg_loc_sof,
 758         .start_pulse = fsl_otg_start_pulse,
 759
 760         .add_timer = fsl_otg_add_timer,
 761         .del_timer = fsl_otg_del_timer,
 762
 763         .start_host = fsl_otg_start_host,
 764         .start_gadget = fsl_otg_start_gadget,
 765 };
 766
 767 /* Initialize the global variable fsl_otg_dev and request IRQ for OTG */
 768 static int fsl_otg_conf(struct platform_device *pdev)
 769 {
 770         struct fsl_otg *fsl_otg_tc;
 771         int status;
 772
 773         if (fsl_otg_dev)
 774                 return 0;
 775
 776         /* allocate space to fsl otg device */
 777         fsl_otg_tc = kzalloc(sizeof(struct fsl_otg), GFP_KERNEL);
 778         if (!fsl_otg_tc)
 779                 return -ENOMEM;
 780
 781         fsl_otg_tc->phy.otg = kzalloc(sizeof(struct usb_otg), GFP_KERNEL);
 782         if (!fsl_otg_tc->phy.otg) {
 783                 kfree(fsl_otg_tc);
 784                 return -ENOMEM;
 785         }
 786
 787         INIT_DELAYED_WORK(&fsl_otg_tc->otg_event, fsl_otg_event);
 788
 789         INIT_LIST_HEAD(&active_timers);
 790         status = fsl_otg_init_timers(&fsl_otg_tc->fsm);
 791         if (status) {
 792                 pr_info("Couldn't init OTG timers\n");
 793                 goto err;
 794         }
 795         spin_lock_init(&fsl_otg_tc->fsm.lock);
 796
 797         /* Set OTG state machine operations */
 798         fsl_otg_tc->fsm.ops = &fsl_otg_ops;
 799
 800         /* initialize the otg structure */
 801         fsl_otg_tc->phy.label = DRIVER_DESC;
 802         fsl_otg_tc->phy.set_power = fsl_otg_set_power;
 803
 804         fsl_otg_tc->phy.otg->phy = &fsl_otg_tc->phy;
 805         fsl_otg_tc->phy.otg->set_host = fsl_otg_set_host;
 806         fsl_otg_tc->phy.otg->set_peripheral = fsl_otg_set_peripheral;
 807         fsl_otg_tc->phy.otg->start_hnp = fsl_otg_start_hnp;
 808         fsl_otg_tc->phy.otg->start_srp = fsl_otg_start_srp;
 809
 810         fsl_otg_dev = fsl_otg_tc;
 811
 812         /* Store the otg transceiver */
 813         status = usb_add_phy(&fsl_otg_tc->phy, USB_PHY_TYPE_USB2);
 814         if (status) {
 815                 pr_warn(FSL_OTG_NAME ": unable to register OTG transceiver.\n");
 816                 goto err;
 817         }
 818
 819         return 0;
 820 err:
 821         fsl_otg_uninit_timers();
 822         kfree(fsl_otg_tc->phy.otg);
 823         kfree(fsl_otg_tc);
 824         return status;
 825 }
 826
 827 /* OTG Initialization */
 828 int usb_otg_start(struct platform_device *pdev)
 829 {
 830         struct fsl_otg *p_otg;
 831         struct usb_phy *otg_trans = usb_get_phy(USB_PHY_TYPE_USB2);
 832         struct otg_fsm *fsm;
 833         int status;
 834         struct resource *res;
 835         u32 temp;
 836         struct fsl_usb2_platform_data *pdata = pdev->dev.platform_data;
 837
 838         p_otg = container_of(otg_trans, struct fsl_otg, phy);
 839         fsm = &p_otg->fsm;
 840
 841         /* Initialize the state machine structure with default values */
 842         SET_OTG_STATE(otg_trans, OTG_STATE_UNDEFINED);
 843         fsm->otg = p_otg->phy.otg;
 844
 845         /* We don't require predefined MEM/IRQ resource index */
 846         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 847         if (!res)
 848                 return -ENXIO;
 849
 850         /* We don't request_mem_region here to enable resource sharing
 851          * with host/device */
 852
 853         usb_dr_regs = ioremap(res->start, sizeof(struct usb_dr_mmap));
 854         p_otg->dr_mem_map = (struct usb_dr_mmap *)usb_dr_regs;
 855         pdata->regs = (void *)usb_dr_regs;
 856
 857         if (pdata->init && pdata->init(pdev) != 0)
 858                 return -EINVAL;
 859
 860         if (pdata->big_endian_mmio) {
 861                 _fsl_readl = _fsl_readl_be;
 862                 _fsl_writel = _fsl_writel_be;
 863         } else {
 864                 _fsl_readl = _fsl_readl_le;
 865                 _fsl_writel = _fsl_writel_le;
 866         }
 867
 868         /* request irq */
 869         p_otg->irq = platform_get_irq(pdev, 0);
 870         status = request_irq(p_otg->irq, fsl_otg_isr,
 871                                 IRQF_SHARED, driver_name, p_otg);
 872         if (status) {
 873                 dev_dbg(p_otg->phy.dev, "can't get IRQ %d, error %d\n",
 874                         p_otg->irq, status);
 875                 iounmap(p_otg->dr_mem_map);
 876                 kfree(p_otg->phy.otg);
 877                 kfree(p_otg);
 878                 return status;
 879         }
 880
 881         /* stop the controller */
 882         temp = fsl_readl(&p_otg->dr_mem_map->usbcmd);
 883         temp &= ~USB_CMD_RUN_STOP;
 884         fsl_writel(temp, &p_otg->dr_mem_map->usbcmd);
 885
 886         /* reset the controller */
 887         temp = fsl_readl(&p_otg->dr_mem_map->usbcmd);
 888         temp |= USB_CMD_CTRL_RESET;
 889         fsl_writel(temp, &p_otg->dr_mem_map->usbcmd);
 890
 891         /* wait reset completed */
 892         while (fsl_readl(&p_otg->dr_mem_map->usbcmd) & USB_CMD_CTRL_RESET)
 893                 ;
 894
 895         /* configure the VBUSHS as IDLE(both host and device) */
 896         temp = USB_MODE_STREAM_DISABLE | (pdata->es ? USB_MODE_ES : 0);
 897         fsl_writel(temp, &p_otg->dr_mem_map->usbmode);
 898
 899         /* configure PHY interface */
 900         temp = fsl_readl(&p_otg->dr_mem_map->portsc);
 901         temp &= ~(PORTSC_PHY_TYPE_SEL | PORTSC_PTW);
 902         switch (pdata->phy_mode) {
 903         case FSL_USB2_PHY_ULPI:
 904                 temp |= PORTSC_PTS_ULPI;
 905                 break;
 906         case FSL_USB2_PHY_UTMI_WIDE:
 907                 temp |= PORTSC_PTW_16BIT;
 908                 /* fall through */
 909         case FSL_USB2_PHY_UTMI:
 910                 temp |= PORTSC_PTS_UTMI;
 911                 /* fall through */
 912         default:
 913                 break;
 914         }
 915         fsl_writel(temp, &p_otg->dr_mem_map->portsc);
 916
 917         if (pdata->have_sysif_regs) {
 918                 /* configure control enable IO output, big endian register */
 919                 temp = __raw_readl(&p_otg->dr_mem_map->control);
 920                 temp |= USB_CTRL_IOENB;
 921                 __raw_writel(temp, &p_otg->dr_mem_map->control);
 922         }
 923
 924         /* disable all interrupt and clear all OTGSC status */
 925         temp = fsl_readl(&p_otg->dr_mem_map->otgsc);
 926         temp &= ~OTGSC_INTERRUPT_ENABLE_BITS_MASK;
 927         temp |= OTGSC_INTERRUPT_STATUS_BITS_MASK | OTGSC_CTRL_VBUS_DISCHARGE;
 928         fsl_writel(temp, &p_otg->dr_mem_map->otgsc);
 929
 930         /*
 931          * The identification (id) input is FALSE when a Mini-A plug is inserted
 932          * in the devices Mini-AB receptacle. Otherwise, this input is TRUE.
 933          * Also: record initial state of ID pin
 934          */
 935         if (fsl_readl(&p_otg->dr_mem_map->otgsc) & OTGSC_STS_USB_ID) {
 936                 p_otg->phy.state = OTG_STATE_UNDEFINED;
 937                 p_otg->fsm.id = 1;
 938         } else {
 939                 p_otg->phy.state = OTG_STATE_A_IDLE;
 940                 p_otg->fsm.id = 0;
 941         }
 942
 943         DBG("initial ID pin=%d\n", p_otg->fsm.id);
 944
 945         /* enable OTG ID pin interrupt */
 946         temp = fsl_readl(&p_otg->dr_mem_map->otgsc);
 947         temp |= OTGSC_INTR_USB_ID_EN;
 948         temp &= ~(OTGSC_CTRL_VBUS_DISCHARGE | OTGSC_INTR_1MS_TIMER_EN);
 949         fsl_writel(temp, &p_otg->dr_mem_map->otgsc);
 950
 951         return 0;
 952 }
 953
 954 /*
 955  * state file in sysfs
 956  */
 957 static int show_fsl_usb2_otg_state(struct device *dev,
 958                                    struct device_attribute *attr, char *buf)
 959 {
 960         struct otg_fsm *fsm = &fsl_otg_dev->fsm;
 961         char *next = buf;
 962         unsigned size = PAGE_SIZE;
 963         unsigned long flags;
 964         int t;
 965
 966         spin_lock_irqsave(&fsm->lock, flags);
 967
 968         /* basic driver infomation */
 969         t = scnprintf(next, size,
 970                         DRIVER_DESC "\n" "fsl_usb2_otg version: %s\n\n",
 971                         DRIVER_VERSION);
 972         size -= t;
 973         next += t;
 974
 975         /* Registers */
 976         t = scnprintf(next, size,
 977                         "OTGSC:   0x%08x\n"
 978                         "PORTSC:  0x%08x\n"
 979                         "USBMODE: 0x%08x\n"
 980                         "USBCMD:  0x%08x\n"
 981                         "USBSTS:  0x%08x\n"
 982                         "USBINTR: 0x%08x\n",
 983                         fsl_readl(&usb_dr_regs->otgsc),
 984                         fsl_readl(&usb_dr_regs->portsc),
 985                         fsl_readl(&usb_dr_regs->usbmode),
 986                         fsl_readl(&usb_dr_regs->usbcmd),
 987                         fsl_readl(&usb_dr_regs->usbsts),
 988                         fsl_readl(&usb_dr_regs->usbintr));
 989         size -= t;
 990         next += t;
 991
 992         /* State */
 993         t = scnprintf(next, size,
 994                       "OTG state: %s\n\n",
 995                       usb_otg_state_string(fsl_otg_dev->phy.state));
 996         size -= t;
 997         next += t;
 998
 999         /* State Machine Variables */
1000         t = scnprintf(next, size,
1001                         "a_bus_req: %d\n"
1002                         "b_bus_req: %d\n"
1003                         "a_bus_resume: %d\n"
1004                         "a_bus_suspend: %d\n"
1005                         "a_conn: %d\n"
1006                         "a_sess_vld: %d\n"
1007                         "a_srp_det: %d\n"
1008                         "a_vbus_vld: %d\n"
1009                         "b_bus_resume: %d\n"
1010                         "b_bus_suspend: %d\n"
1011                         "b_conn: %d\n"
1012                         "b_se0_srp: %d\n"
1013                         "b_sess_end: %d\n"
1014                         "b_sess_vld: %d\n"
1015                         "id: %d\n",
1016                         fsm->a_bus_req,
1017                         fsm->b_bus_req,
1018                         fsm->a_bus_resume,
1019                         fsm->a_bus_suspend,
1020                         fsm->a_conn,
1021                         fsm->a_sess_vld,
1022                         fsm->a_srp_det,
1023                         fsm->a_vbus_vld,
1024                         fsm->b_bus_resume,
1025                         fsm->b_bus_suspend,
1026                         fsm->b_conn,
1027                         fsm->b_se0_srp,
1028                         fsm->b_sess_end,
1029                         fsm->b_sess_vld,
1030                         fsm->id);
1031         size -= t;
1032         next += t;
1033
1034         spin_unlock_irqrestore(&fsm->lock, flags);
1035
1036         return PAGE_SIZE - size;
1037 }
1038
1039 static DEVICE_ATTR(fsl_usb2_otg_state, S_IRUGO, show_fsl_usb2_otg_state, NULL);
1040
1041
1042 /* Char driver interface to control some OTG input */
1043
1044 /*
1045  * Handle some ioctl command, such as get otg
1046  * status and set host suspend
1047  */
1048 static long fsl_otg_ioctl(struct file *file, unsigned int cmd,
1049                           unsigned long arg)
1050 {
1051         u32 retval = 0;
1052
1053         switch (cmd) {
1054         case GET_OTG_STATUS:
1055                 retval = fsl_otg_dev->host_working;
1056                 break;
1057
1058         case SET_A_SUSPEND_REQ:
1059                 fsl_otg_dev->fsm.a_suspend_req = arg;
1060                 break;
1061
1062         case SET_A_BUS_DROP:
1063                 fsl_otg_dev->fsm.a_bus_drop = arg;
1064                 break;
1065
1066         case SET_A_BUS_REQ:
1067                 fsl_otg_dev->fsm.a_bus_req = arg;
1068                 break;
1069
1070         case SET_B_BUS_REQ:
1071                 fsl_otg_dev->fsm.b_bus_req = arg;
1072                 break;
1073
1074         default:
1075                 break;
1076         }
1077
1078         otg_statemachine(&fsl_otg_dev->fsm);
1079
1080         return retval;
1081 }
1082
1083 static int fsl_otg_open(struct inode *inode, struct file *file)
1084 {
1085         return 0;
1086 }
1087
1088 static int fsl_otg_release(struct inode *inode, struct file *file)
1089 {
1090         return 0;
1091 }
1092
1093 static const struct file_operations otg_fops = {
1094         .owner = THIS_MODULE,
1095         .llseek = NULL,
1096         .read = NULL,
1097         .write = NULL,
1098         .unlocked_ioctl = fsl_otg_ioctl,
1099         .open = fsl_otg_open,
1100         .release = fsl_otg_release,
1101 };
1102
1103 static int fsl_otg_probe(struct platform_device *pdev)
1104 {
1105         int ret;
1106
1107         if (!pdev->dev.platform_data)
1108                 return -ENODEV;
1109
1110         /* configure the OTG */
1111         ret = fsl_otg_conf(pdev);
1112         if (ret) {
1113                 dev_err(&pdev->dev, "Couldn't configure OTG module\n");
1114                 return ret;
1115         }
1116
1117         /* start OTG */
1118         ret = usb_otg_start(pdev);
1119         if (ret) {
1120                 dev_err(&pdev->dev, "Can't init FSL OTG device\n");
1121                 return ret;
1122         }
1123
1124         ret = register_chrdev(FSL_OTG_MAJOR, FSL_OTG_NAME, &otg_fops);
1125         if (ret) {
1126                 dev_err(&pdev->dev, "unable to register FSL OTG device\n");
1127                 return ret;
1128         }
1129
1130         ret = device_create_file(&pdev->dev, &dev_attr_fsl_usb2_otg_state);
1131         if (ret)
1132                 dev_warn(&pdev->dev, "Can't register sysfs attribute\n");
1133
1134         return ret;
1135 }
1136
1137 static int fsl_otg_remove(struct platform_device *pdev)
1138 {
1139         struct fsl_usb2_platform_data *pdata = pdev->dev.platform_data;
1140
1141         usb_remove_phy(&fsl_otg_dev->phy);
1142         free_irq(fsl_otg_dev->irq, fsl_otg_dev);
1143
1144         iounmap((void *)usb_dr_regs);
1145
1146         fsl_otg_uninit_timers();
1147         kfree(fsl_otg_dev->phy.otg);
1148         kfree(fsl_otg_dev);
1149
1150         device_remove_file(&pdev->dev, &dev_attr_fsl_usb2_otg_state);
1151
1152         unregister_chrdev(FSL_OTG_MAJOR, FSL_OTG_NAME);
1153
1154         if (pdata->exit)
1155                 pdata->exit(pdev);
1156
1157         return 0;
1158 }
1159
1160 struct platform_driver fsl_otg_driver = {
1161         .probe = fsl_otg_probe,
1162         .remove = fsl_otg_remove,
1163         .driver = {
1164                 .name = driver_name,
1165                 .owner = THIS_MODULE,
1166         },
1167 };
1168
1169 module_platform_driver(fsl_otg_driver);
1170
1171 MODULE_DESCRIPTION(DRIVER_INFO);
1172 MODULE_AUTHOR(DRIVER_AUTHOR);
1173 MODULE_LICENSE("GPL");