2 * Texas Instruments DSPS platforms "glue layer"
4 * Copyright (C) 2012, by Texas Instruments
6 * Based on the am35x "glue layer" code.
8 * This file is part of the Inventra Controller Driver for Linux.
10 * The Inventra Controller Driver for Linux is free software; you
11 * can redistribute it and/or modify it under the terms of the GNU
12 * General Public License version 2 as published by the Free Software
15 * The Inventra Controller Driver for Linux is distributed in
16 * the hope that it will be useful, but WITHOUT ANY WARRANTY;
17 * without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
19 * License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with The Inventra Controller Driver for Linux ; if not,
23 * write to the Free Software Foundation, Inc., 59 Temple Place,
24 * Suite 330, Boston, MA 02111-1307 USA
26 * musb_dsps.c will be a common file for all the TI DSPS platforms
27 * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x.
28 * For now only ti81x is using this and in future davinci.c, am35x.c
29 * da8xx.c would be merged to this file after testing.
32 #include <linux/init.h>
34 #include <linux/err.h>
35 #include <linux/platform_device.h>
36 #include <linux/dma-mapping.h>
37 #include <linux/pm_runtime.h>
38 #include <linux/module.h>
41 #include <linux/of_device.h>
42 #include <linux/of_address.h>
46 #include "musb_core.h"
49 * avoid using musb_readx()/musb_writex() as glue layer should not be
50 * dependent on musb core layer symbols.
52 static inline u8 dsps_readb(const void __iomem *addr, unsigned offset)
53 { return __raw_readb(addr + offset); }
55 static inline u32 dsps_readl(const void __iomem *addr, unsigned offset)
56 { return __raw_readl(addr + offset); }
58 static inline void dsps_writeb(void __iomem *addr, unsigned offset, u8 data)
59 { __raw_writeb(data, addr + offset); }
61 static inline void dsps_writel(void __iomem *addr, unsigned offset, u32 data)
62 { __raw_writel(data, addr + offset); }
65 * DSPS musb wrapper register offset.
66 * FIXME: This should be expanded to have all the wrapper registers from TI DSPS
69 struct dsps_musb_wrapper {
83 /* bit positions for control */
86 /* bit positions for interrupt */
92 unsigned txep_shift:5;
96 unsigned rxep_shift:5;
100 /* bit positions for phy_utmi */
101 unsigned otg_disable:5;
103 /* bit positions for mode */
105 /* miscellaneous stuff */
106 u32 musb_core_offset;
108 /* number of musb instances */
113 * DSPS glue structure.
117 struct platform_device *musb[2]; /* child musb pdev */
118 const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */
119 struct timer_list timer[2]; /* otg_workaround timer */
120 unsigned long last_timer[2]; /* last timer data for each instance */
124 * dsps_musb_enable - enable interrupts
126 static void dsps_musb_enable(struct musb *musb)
128 struct device *dev = musb->controller;
129 struct platform_device *pdev = to_platform_device(dev->parent);
130 struct dsps_glue *glue = platform_get_drvdata(pdev);
131 const struct dsps_musb_wrapper *wrp = glue->wrp;
132 void __iomem *reg_base = musb->ctrl_base;
133 u32 epmask, coremask;
135 /* Workaround: setup IRQs through both register sets. */
136 epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) |
137 ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift);
138 coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF);
140 dsps_writel(reg_base, wrp->epintr_set, epmask);
141 dsps_writel(reg_base, wrp->coreintr_set, coremask);
142 /* Force the DRVVBUS IRQ so we can start polling for ID change. */
143 dsps_writel(reg_base, wrp->coreintr_set,
144 (1 << wrp->drvvbus) << wrp->usb_shift);
148 * dsps_musb_disable - disable HDRC and flush interrupts
150 static void dsps_musb_disable(struct musb *musb)
152 struct device *dev = musb->controller;
153 struct platform_device *pdev = to_platform_device(dev->parent);
154 struct dsps_glue *glue = platform_get_drvdata(pdev);
155 const struct dsps_musb_wrapper *wrp = glue->wrp;
156 void __iomem *reg_base = musb->ctrl_base;
158 dsps_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap);
159 dsps_writel(reg_base, wrp->epintr_clear,
160 wrp->txep_bitmap | wrp->rxep_bitmap);
161 dsps_writeb(musb->mregs, MUSB_DEVCTL, 0);
162 dsps_writel(reg_base, wrp->eoi, 0);
165 static void otg_timer(unsigned long _musb)
167 struct musb *musb = (void *)_musb;
168 void __iomem *mregs = musb->mregs;
169 struct device *dev = musb->controller;
170 struct platform_device *pdev = to_platform_device(dev);
171 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
172 const struct dsps_musb_wrapper *wrp = glue->wrp;
177 * We poll because DSPS IP's won't expose several OTG-critical
178 * status change events (from the transceiver) otherwise.
180 devctl = dsps_readb(mregs, MUSB_DEVCTL);
181 dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl,
182 otg_state_string(musb->xceiv->state));
184 spin_lock_irqsave(&musb->lock, flags);
185 switch (musb->xceiv->state) {
186 case OTG_STATE_A_WAIT_BCON:
187 devctl &= ~MUSB_DEVCTL_SESSION;
188 dsps_writeb(musb->mregs, MUSB_DEVCTL, devctl);
190 devctl = dsps_readb(musb->mregs, MUSB_DEVCTL);
191 if (devctl & MUSB_DEVCTL_BDEVICE) {
192 musb->xceiv->state = OTG_STATE_B_IDLE;
195 musb->xceiv->state = OTG_STATE_A_IDLE;
199 case OTG_STATE_A_WAIT_VFALL:
200 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
201 dsps_writel(musb->ctrl_base, wrp->coreintr_set,
202 MUSB_INTR_VBUSERROR << wrp->usb_shift);
204 case OTG_STATE_B_IDLE:
205 devctl = dsps_readb(mregs, MUSB_DEVCTL);
206 if (devctl & MUSB_DEVCTL_BDEVICE)
207 mod_timer(&glue->timer[pdev->id],
208 jiffies + wrp->poll_seconds * HZ);
210 musb->xceiv->state = OTG_STATE_A_IDLE;
215 spin_unlock_irqrestore(&musb->lock, flags);
218 static void dsps_musb_try_idle(struct musb *musb, unsigned long timeout)
220 struct device *dev = musb->controller;
221 struct platform_device *pdev = to_platform_device(dev);
222 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
225 timeout = jiffies + msecs_to_jiffies(3);
227 /* Never idle if active, or when VBUS timeout is not set as host */
228 if (musb->is_active || (musb->a_wait_bcon == 0 &&
229 musb->xceiv->state == OTG_STATE_A_WAIT_BCON)) {
230 dev_dbg(musb->controller, "%s active, deleting timer\n",
231 otg_state_string(musb->xceiv->state));
232 del_timer(&glue->timer[pdev->id]);
233 glue->last_timer[pdev->id] = jiffies;
237 if (time_after(glue->last_timer[pdev->id], timeout) &&
238 timer_pending(&glue->timer[pdev->id])) {
239 dev_dbg(musb->controller,
240 "Longer idle timer already pending, ignoring...\n");
243 glue->last_timer[pdev->id] = timeout;
245 dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n",
246 otg_state_string(musb->xceiv->state),
247 jiffies_to_msecs(timeout - jiffies));
248 mod_timer(&glue->timer[pdev->id], timeout);
251 static irqreturn_t dsps_interrupt(int irq, void *hci)
253 struct musb *musb = hci;
254 void __iomem *reg_base = musb->ctrl_base;
255 struct device *dev = musb->controller;
256 struct platform_device *pdev = to_platform_device(dev);
257 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
258 const struct dsps_musb_wrapper *wrp = glue->wrp;
260 irqreturn_t ret = IRQ_NONE;
263 spin_lock_irqsave(&musb->lock, flags);
265 /* Get endpoint interrupts */
266 epintr = dsps_readl(reg_base, wrp->epintr_status);
267 musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift;
268 musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift;
271 dsps_writel(reg_base, wrp->epintr_status, epintr);
273 /* Get usb core interrupts */
274 usbintr = dsps_readl(reg_base, wrp->coreintr_status);
275 if (!usbintr && !epintr)
278 musb->int_usb = (usbintr & wrp->usb_bitmap) >> wrp->usb_shift;
280 dsps_writel(reg_base, wrp->coreintr_status, usbintr);
282 dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n",
285 * DRVVBUS IRQs are the only proxy we have (a very poor one!) for
286 * DSPS IP's missing ID change IRQ. We need an ID change IRQ to
287 * switch appropriately between halves of the OTG state machine.
288 * Managing DEVCTL.SESSION per Mentor docs requires that we know its
289 * value but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set.
290 * Also, DRVVBUS pulses for SRP (but not at 5V) ...
292 if (usbintr & MUSB_INTR_BABBLE)
293 pr_info("CAUTION: musb: Babble Interrupt Occured\n");
295 if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) {
296 int drvvbus = dsps_readl(reg_base, wrp->status);
297 void __iomem *mregs = musb->mregs;
298 u8 devctl = dsps_readb(mregs, MUSB_DEVCTL);
301 err = musb->int_usb & MUSB_INTR_VBUSERROR;
304 * The Mentor core doesn't debounce VBUS as needed
305 * to cope with device connect current spikes. This
306 * means it's not uncommon for bus-powered devices
307 * to get VBUS errors during enumeration.
309 * This is a workaround, but newer RTL from Mentor
310 * seems to allow a better one: "re"-starting sessions
311 * without waiting for VBUS to stop registering in
314 musb->int_usb &= ~MUSB_INTR_VBUSERROR;
315 musb->xceiv->state = OTG_STATE_A_WAIT_VFALL;
316 mod_timer(&glue->timer[pdev->id],
317 jiffies + wrp->poll_seconds * HZ);
318 WARNING("VBUS error workaround (delay coming)\n");
319 } else if (drvvbus) {
322 musb->xceiv->otg->default_a = 1;
323 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
324 del_timer(&glue->timer[pdev->id]);
328 musb->xceiv->otg->default_a = 0;
329 musb->xceiv->state = OTG_STATE_B_IDLE;
332 /* NOTE: this must complete power-on within 100 ms. */
333 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n",
334 drvvbus ? "on" : "off",
335 otg_state_string(musb->xceiv->state),
341 if (musb->int_tx || musb->int_rx || musb->int_usb)
342 ret |= musb_interrupt(musb);
345 /* EOI needs to be written for the IRQ to be re-asserted. */
346 if (ret == IRQ_HANDLED || epintr || usbintr)
347 dsps_writel(reg_base, wrp->eoi, 1);
349 /* Poll for ID change */
350 if (musb->xceiv->state == OTG_STATE_B_IDLE)
351 mod_timer(&glue->timer[pdev->id],
352 jiffies + wrp->poll_seconds * HZ);
354 spin_unlock_irqrestore(&musb->lock, flags);
359 static int dsps_musb_init(struct musb *musb)
361 struct device *dev = musb->controller;
362 struct musb_hdrc_platform_data *plat = dev->platform_data;
363 struct platform_device *pdev = to_platform_device(dev);
364 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
365 const struct dsps_musb_wrapper *wrp = glue->wrp;
366 struct omap_musb_board_data *data = plat->board_data;
367 void __iomem *reg_base = musb->ctrl_base;
371 /* mentor core register starts at offset of 0x400 from musb base */
372 musb->mregs += wrp->musb_core_offset;
374 /* NOP driver needs change if supporting dual instance */
375 usb_nop_xceiv_register();
376 musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2);
377 if (IS_ERR_OR_NULL(musb->xceiv))
380 /* Returns zero if e.g. not clocked */
381 rev = dsps_readl(reg_base, wrp->revision);
387 setup_timer(&glue->timer[pdev->id], otg_timer, (unsigned long) musb);
390 dsps_writel(reg_base, wrp->control, (1 << wrp->reset));
392 /* Start the on-chip PHY and its PLL. */
393 if (data->set_phy_power)
394 data->set_phy_power(1);
396 musb->isr = dsps_interrupt;
398 /* reset the otgdisable bit, needed for host mode to work */
399 val = dsps_readl(reg_base, wrp->phy_utmi);
400 val &= ~(1 << wrp->otg_disable);
401 dsps_writel(musb->ctrl_base, wrp->phy_utmi, val);
403 /* clear level interrupt */
404 dsps_writel(reg_base, wrp->eoi, 0);
408 usb_put_phy(musb->xceiv);
409 usb_nop_xceiv_unregister();
413 static int dsps_musb_exit(struct musb *musb)
415 struct device *dev = musb->controller;
416 struct musb_hdrc_platform_data *plat = dev->platform_data;
417 struct omap_musb_board_data *data = plat->board_data;
418 struct platform_device *pdev = to_platform_device(dev);
419 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
421 del_timer_sync(&glue->timer[pdev->id]);
423 /* Shutdown the on-chip PHY and its PLL. */
424 if (data->set_phy_power)
425 data->set_phy_power(0);
427 /* NOP driver needs change if supporting dual instance */
428 usb_put_phy(musb->xceiv);
429 usb_nop_xceiv_unregister();
434 static struct musb_platform_ops dsps_ops = {
435 .init = dsps_musb_init,
436 .exit = dsps_musb_exit,
438 .enable = dsps_musb_enable,
439 .disable = dsps_musb_disable,
441 .try_idle = dsps_musb_try_idle,
444 static u64 musb_dmamask = DMA_BIT_MASK(32);
446 static int __devinit dsps_create_musb_pdev(struct dsps_glue *glue, u8 id)
448 struct device *dev = glue->dev;
449 struct platform_device *pdev = to_platform_device(dev);
450 struct musb_hdrc_platform_data *pdata = dev->platform_data;
451 struct platform_device *musb;
452 struct resource *res;
453 struct resource resources[2];
457 /* get memory resource */
458 sprintf(res_name, "musb%d", id);
459 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, res_name);
461 dev_err(dev, "%s get mem resource failed\n", res_name);
468 /* get irq resource */
469 sprintf(res_name, "musb%d-irq", id);
470 res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, res_name);
472 dev_err(dev, "%s get irq resource failed\n", res_name);
476 strcpy((u8 *)res->name, "mc");
480 /* get the musb id */
481 musbid = musb_get_id(dev, GFP_KERNEL);
483 dev_err(dev, "failed to allocate musb id\n");
487 /* allocate the child platform device */
488 musb = platform_device_alloc("musb-hdrc", musbid);
490 dev_err(dev, "failed to allocate musb device\n");
496 musb->dev.parent = dev;
497 musb->dev.dma_mask = &musb_dmamask;
498 musb->dev.coherent_dma_mask = musb_dmamask;
500 glue->musb[id] = musb;
502 pdata->platform_ops = &dsps_ops;
504 ret = platform_device_add_resources(musb, resources, 2);
506 dev_err(dev, "failed to add resources\n");
510 ret = platform_device_add_data(musb, pdata, sizeof(*pdata));
512 dev_err(dev, "failed to add platform_data\n");
516 ret = platform_device_add(musb);
518 dev_err(dev, "failed to register musb device\n");
525 platform_device_put(musb);
527 musb_put_id(dev, musbid);
532 static void dsps_delete_musb_pdev(struct dsps_glue *glue, u8 id)
534 musb_put_id(glue->dev, glue->musb[id]->id);
535 platform_device_del(glue->musb[id]);
536 platform_device_put(glue->musb[id]);
539 static int __devinit dsps_probe(struct platform_device *pdev)
541 const struct platform_device_id *id = platform_get_device_id(pdev);
542 const struct dsps_musb_wrapper *wrp =
543 (struct dsps_musb_wrapper *)id->driver_data;
544 struct dsps_glue *glue;
545 struct resource *iomem;
549 glue = kzalloc(sizeof(*glue), GFP_KERNEL);
551 dev_err(&pdev->dev, "unable to allocate glue memory\n");
556 /* get memory resource */
557 iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
559 dev_err(&pdev->dev, "failed to get usbss mem resourse\n");
564 glue->dev = &pdev->dev;
566 glue->wrp = kmemdup(wrp, sizeof(*wrp), GFP_KERNEL);
568 dev_err(&pdev->dev, "failed to duplicate wrapper struct memory\n");
572 platform_set_drvdata(pdev, glue);
574 /* create the child platform device for first instances of musb */
575 ret = dsps_create_musb_pdev(glue, 0);
577 dev_err(&pdev->dev, "failed to create child pdev\n");
581 /* enable the usbss clocks */
582 pm_runtime_enable(&pdev->dev);
584 ret = pm_runtime_get_sync(&pdev->dev);
586 dev_err(&pdev->dev, "pm_runtime_get_sync FAILED");
587 /* create the child platform device for all instances of musb */
588 for (i = 0; i < wrp->instances ; i++) {
589 ret = dsps_create_musb_pdev(glue, i);
591 dev_err(&pdev->dev, "failed to create child pdev\n");
592 /* release resources of previously created instances */
593 for (i--; i >= 0 ; i--)
594 dsps_delete_musb_pdev(glue, i);
602 pm_runtime_disable(&pdev->dev);
610 static int __devexit dsps_remove(struct platform_device *pdev)
612 struct dsps_glue *glue = platform_get_drvdata(pdev);
613 const struct dsps_musb_wrapper *wrp = glue->wrp;
616 /* delete the child platform device */
617 for (i = 0; i < wrp->instances ; i++)
618 dsps_delete_musb_pdev(glue, i);
620 /* disable usbss clocks */
621 pm_runtime_put(&pdev->dev);
622 pm_runtime_disable(&pdev->dev);
628 #ifdef CONFIG_PM_SLEEP
629 static int dsps_suspend(struct device *dev)
631 struct musb_hdrc_platform_data *plat = dev->platform_data;
632 struct omap_musb_board_data *data = plat->board_data;
634 /* Shutdown the on-chip PHY and its PLL. */
635 if (data->set_phy_power)
636 data->set_phy_power(0);
641 static int dsps_resume(struct device *dev)
643 struct musb_hdrc_platform_data *plat = dev->platform_data;
644 struct omap_musb_board_data *data = plat->board_data;
646 /* Start the on-chip PHY and its PLL. */
647 if (data->set_phy_power)
648 data->set_phy_power(1);
654 static SIMPLE_DEV_PM_OPS(dsps_pm_ops, dsps_suspend, dsps_resume);
656 static const struct dsps_musb_wrapper ti81xx_driver_data __devinitconst = {
662 .epintr_clear = 0x40,
663 .epintr_status = 0x30,
664 .coreintr_set = 0x3c,
665 .coreintr_clear = 0x44,
666 .coreintr_status = 0x34,
674 .usb_bitmap = (0x1ff << 0),
678 .txep_bitmap = (0xffff << 0),
681 .rxep_bitmap = (0xfffe << 16),
682 .musb_core_offset = 0x400,
687 static const struct platform_device_id musb_dsps_id_table[] __devinitconst = {
689 .name = "musb-ti81xx",
690 .driver_data = (kernel_ulong_t) &ti81xx_driver_data,
692 { }, /* Terminating Entry */
694 MODULE_DEVICE_TABLE(platform, musb_dsps_id_table);
696 static const struct of_device_id musb_dsps_of_match[] __devinitconst = {
697 { .compatible = "musb-ti81xx", },
698 { .compatible = "ti,ti81xx-musb", },
699 { .compatible = "ti,am335x-musb", },
702 MODULE_DEVICE_TABLE(of, musb_dsps_of_match);
704 static struct platform_driver dsps_usbss_driver = {
706 .remove = __devexit_p(dsps_remove),
710 .of_match_table = musb_dsps_of_match,
712 .id_table = musb_dsps_id_table,
715 MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer");
716 MODULE_AUTHOR("Ravi B <ravibabu@ti.com>");
717 MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>");
718 MODULE_LICENSE("GPL v2");
720 static int __init dsps_init(void)
722 return platform_driver_register(&dsps_usbss_driver);
724 subsys_initcall(dsps_init);
726 static void __exit dsps_exit(void)
728 platform_driver_unregister(&dsps_usbss_driver);
730 module_exit(dsps_exit);