2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/pci.h>
24 #include <linux/irq.h>
25 #include <linux/log2.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/slab.h>
29 #include <linux/dmi.h>
30 #include <linux/dma-mapping.h>
33 #include "xhci-trace.h"
35 #define DRIVER_AUTHOR "Sarah Sharp"
36 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
38 #define PORT_WAKE_BITS (PORT_WKOC_E | PORT_WKDISC_E | PORT_WKCONN_E)
40 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
41 static int link_quirk;
42 module_param(link_quirk, int, S_IRUGO | S_IWUSR);
43 MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB");
45 static unsigned int quirks;
46 module_param(quirks, uint, S_IRUGO);
47 MODULE_PARM_DESC(quirks, "Bit flags for quirks to be enabled as default");
49 /* TODO: copied from ehci-hcd.c - can this be refactored? */
51 * xhci_handshake - spin reading hc until handshake completes or fails
52 * @ptr: address of hc register to be read
53 * @mask: bits to look at in result of read
54 * @done: value of those bits when handshake succeeds
55 * @usec: timeout in microseconds
57 * Returns negative errno, or zero on success
59 * Success happens when the "mask" bits have the specified value (hardware
60 * handshake done). There are two failure modes: "usec" have passed (major
61 * hardware flakeout), or the register reads as all-ones (hardware removed).
63 int xhci_handshake(void __iomem *ptr, u32 mask, u32 done, int usec)
69 if (result == ~(u32)0) /* card removed */
81 * Disable interrupts and begin the xHCI halting process.
83 void xhci_quiesce(struct xhci_hcd *xhci)
90 halted = readl(&xhci->op_regs->status) & STS_HALT;
94 cmd = readl(&xhci->op_regs->command);
96 writel(cmd, &xhci->op_regs->command);
100 * Force HC into halt state.
102 * Disable any IRQs and clear the run/stop bit.
103 * HC will complete any current and actively pipelined transactions, and
104 * should halt within 16 ms of the run/stop bit being cleared.
105 * Read HC Halted bit in the status register to see when the HC is finished.
107 int xhci_halt(struct xhci_hcd *xhci)
110 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Halt the HC");
113 ret = xhci_handshake(&xhci->op_regs->status,
114 STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
116 xhci->xhc_state |= XHCI_STATE_HALTED;
117 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
119 xhci_warn(xhci, "Host not halted after %u microseconds.\n",
125 * Set the run bit and wait for the host to be running.
127 static int xhci_start(struct xhci_hcd *xhci)
132 temp = readl(&xhci->op_regs->command);
134 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Turn on HC, cmd = 0x%x.",
136 writel(temp, &xhci->op_regs->command);
139 * Wait for the HCHalted Status bit to be 0 to indicate the host is
142 ret = xhci_handshake(&xhci->op_regs->status,
143 STS_HALT, 0, XHCI_MAX_HALT_USEC);
144 if (ret == -ETIMEDOUT)
145 xhci_err(xhci, "Host took too long to start, "
146 "waited %u microseconds.\n",
149 xhci->xhc_state &= ~XHCI_STATE_HALTED;
156 * This resets pipelines, timers, counters, state machines, etc.
157 * Transactions will be terminated immediately, and operational registers
158 * will be set to their defaults.
160 int xhci_reset(struct xhci_hcd *xhci)
166 state = readl(&xhci->op_regs->status);
167 if ((state & STS_HALT) == 0) {
168 xhci_warn(xhci, "Host controller not halted, aborting reset.\n");
172 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Reset the HC");
173 command = readl(&xhci->op_regs->command);
174 command |= CMD_RESET;
175 writel(command, &xhci->op_regs->command);
177 ret = xhci_handshake(&xhci->op_regs->command,
178 CMD_RESET, 0, 10 * 1000 * 1000);
182 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
183 "Wait for controller to be ready for doorbell rings");
185 * xHCI cannot write to any doorbells or operational registers other
186 * than status until the "Controller Not Ready" flag is cleared.
188 ret = xhci_handshake(&xhci->op_regs->status,
189 STS_CNR, 0, 10 * 1000 * 1000);
191 for (i = 0; i < 2; ++i) {
192 xhci->bus_state[i].port_c_suspend = 0;
193 xhci->bus_state[i].suspended_ports = 0;
194 xhci->bus_state[i].resuming_ports = 0;
201 static int xhci_free_msi(struct xhci_hcd *xhci)
205 if (!xhci->msix_entries)
208 for (i = 0; i < xhci->msix_count; i++)
209 if (xhci->msix_entries[i].vector)
210 free_irq(xhci->msix_entries[i].vector,
218 static int xhci_setup_msi(struct xhci_hcd *xhci)
221 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
223 ret = pci_enable_msi(pdev);
225 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
226 "failed to allocate MSI entry");
230 ret = request_irq(pdev->irq, xhci_msi_irq,
231 0, "xhci_hcd", xhci_to_hcd(xhci));
233 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
234 "disable MSI interrupt");
235 pci_disable_msi(pdev);
243 * free all IRQs request
245 static void xhci_free_irq(struct xhci_hcd *xhci)
247 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
250 /* return if using legacy interrupt */
251 if (xhci_to_hcd(xhci)->irq > 0)
254 ret = xhci_free_msi(xhci);
258 free_irq(pdev->irq, xhci_to_hcd(xhci));
266 static int xhci_setup_msix(struct xhci_hcd *xhci)
269 struct usb_hcd *hcd = xhci_to_hcd(xhci);
270 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
273 * calculate number of msi-x vectors supported.
274 * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
275 * with max number of interrupters based on the xhci HCSPARAMS1.
276 * - num_online_cpus: maximum msi-x vectors per CPUs core.
277 * Add additional 1 vector to ensure always available interrupt.
279 xhci->msix_count = min(num_online_cpus() + 1,
280 HCS_MAX_INTRS(xhci->hcs_params1));
283 kmalloc((sizeof(struct msix_entry))*xhci->msix_count,
285 if (!xhci->msix_entries) {
286 xhci_err(xhci, "Failed to allocate MSI-X entries\n");
290 for (i = 0; i < xhci->msix_count; i++) {
291 xhci->msix_entries[i].entry = i;
292 xhci->msix_entries[i].vector = 0;
295 ret = pci_enable_msix_exact(pdev, xhci->msix_entries, xhci->msix_count);
297 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
298 "Failed to enable MSI-X");
302 for (i = 0; i < xhci->msix_count; i++) {
303 ret = request_irq(xhci->msix_entries[i].vector,
305 0, "xhci_hcd", xhci_to_hcd(xhci));
310 hcd->msix_enabled = 1;
314 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "disable MSI-X interrupt");
316 pci_disable_msix(pdev);
318 kfree(xhci->msix_entries);
319 xhci->msix_entries = NULL;
323 /* Free any IRQs and disable MSI-X */
324 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
326 struct usb_hcd *hcd = xhci_to_hcd(xhci);
327 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
329 if (xhci->quirks & XHCI_PLAT)
334 if (xhci->msix_entries) {
335 pci_disable_msix(pdev);
336 kfree(xhci->msix_entries);
337 xhci->msix_entries = NULL;
339 pci_disable_msi(pdev);
342 hcd->msix_enabled = 0;
346 static void __maybe_unused xhci_msix_sync_irqs(struct xhci_hcd *xhci)
350 if (xhci->msix_entries) {
351 for (i = 0; i < xhci->msix_count; i++)
352 synchronize_irq(xhci->msix_entries[i].vector);
356 static int xhci_try_enable_msi(struct usb_hcd *hcd)
358 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
359 struct pci_dev *pdev;
362 /* The xhci platform device has set up IRQs through usb_add_hcd. */
363 if (xhci->quirks & XHCI_PLAT)
366 pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
368 * Some Fresco Logic host controllers advertise MSI, but fail to
369 * generate interrupts. Don't even try to enable MSI.
371 if (xhci->quirks & XHCI_BROKEN_MSI)
374 /* unregister the legacy interrupt */
376 free_irq(hcd->irq, hcd);
379 ret = xhci_setup_msix(xhci);
381 /* fall back to msi*/
382 ret = xhci_setup_msi(xhci);
385 /* hcd->irq is 0, we have MSI */
389 xhci_err(xhci, "No msi-x/msi found and no IRQ in BIOS\n");
394 if (!strlen(hcd->irq_descr))
395 snprintf(hcd->irq_descr, sizeof(hcd->irq_descr), "%s:usb%d",
396 hcd->driver->description, hcd->self.busnum);
398 /* fall back to legacy interrupt*/
399 ret = request_irq(pdev->irq, &usb_hcd_irq, IRQF_SHARED,
400 hcd->irq_descr, hcd);
402 xhci_err(xhci, "request interrupt %d failed\n",
406 hcd->irq = pdev->irq;
412 static inline int xhci_try_enable_msi(struct usb_hcd *hcd)
417 static inline void xhci_cleanup_msix(struct xhci_hcd *xhci)
421 static inline void xhci_msix_sync_irqs(struct xhci_hcd *xhci)
427 static void compliance_mode_recovery(unsigned long arg)
429 struct xhci_hcd *xhci;
434 xhci = (struct xhci_hcd *)arg;
436 for (i = 0; i < xhci->num_usb3_ports; i++) {
437 temp = readl(xhci->usb3_ports[i]);
438 if ((temp & PORT_PLS_MASK) == USB_SS_PORT_LS_COMP_MOD) {
440 * Compliance Mode Detected. Letting USB Core
441 * handle the Warm Reset
443 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
444 "Compliance mode detected->port %d",
446 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
447 "Attempting compliance mode recovery");
448 hcd = xhci->shared_hcd;
450 if (hcd->state == HC_STATE_SUSPENDED)
451 usb_hcd_resume_root_hub(hcd);
453 usb_hcd_poll_rh_status(hcd);
457 if (xhci->port_status_u0 != ((1 << xhci->num_usb3_ports)-1))
458 mod_timer(&xhci->comp_mode_recovery_timer,
459 jiffies + msecs_to_jiffies(COMP_MODE_RCVRY_MSECS));
463 * Quirk to work around issue generated by the SN65LVPE502CP USB3.0 re-driver
464 * that causes ports behind that hardware to enter compliance mode sometimes.
465 * The quirk creates a timer that polls every 2 seconds the link state of
466 * each host controller's port and recovers it by issuing a Warm reset
467 * if Compliance mode is detected, otherwise the port will become "dead" (no
468 * device connections or disconnections will be detected anymore). Becasue no
469 * status event is generated when entering compliance mode (per xhci spec),
470 * this quirk is needed on systems that have the failing hardware installed.
472 static void compliance_mode_recovery_timer_init(struct xhci_hcd *xhci)
474 xhci->port_status_u0 = 0;
475 setup_timer(&xhci->comp_mode_recovery_timer,
476 compliance_mode_recovery, (unsigned long)xhci);
477 xhci->comp_mode_recovery_timer.expires = jiffies +
478 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS);
480 set_timer_slack(&xhci->comp_mode_recovery_timer,
481 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS));
482 add_timer(&xhci->comp_mode_recovery_timer);
483 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
484 "Compliance mode recovery timer initialized");
488 * This function identifies the systems that have installed the SN65LVPE502CP
489 * USB3.0 re-driver and that need the Compliance Mode Quirk.
491 * Vendor: Hewlett-Packard -> System Models: Z420, Z620 and Z820
493 static bool xhci_compliance_mode_recovery_timer_quirk_check(void)
495 const char *dmi_product_name, *dmi_sys_vendor;
497 dmi_product_name = dmi_get_system_info(DMI_PRODUCT_NAME);
498 dmi_sys_vendor = dmi_get_system_info(DMI_SYS_VENDOR);
499 if (!dmi_product_name || !dmi_sys_vendor)
502 if (!(strstr(dmi_sys_vendor, "Hewlett-Packard")))
505 if (strstr(dmi_product_name, "Z420") ||
506 strstr(dmi_product_name, "Z620") ||
507 strstr(dmi_product_name, "Z820") ||
508 strstr(dmi_product_name, "Z1 Workstation"))
514 static int xhci_all_ports_seen_u0(struct xhci_hcd *xhci)
516 return (xhci->port_status_u0 == ((1 << xhci->num_usb3_ports)-1));
521 * Initialize memory for HCD and xHC (one-time init).
523 * Program the PAGESIZE register, initialize the device context array, create
524 * device contexts (?), set up a command ring segment (or two?), create event
525 * ring (one for now).
527 int xhci_init(struct usb_hcd *hcd)
529 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
532 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "xhci_init");
533 spin_lock_init(&xhci->lock);
534 if (xhci->hci_version == 0x95 && link_quirk) {
535 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
536 "QUIRK: Not clearing Link TRB chain bits.");
537 xhci->quirks |= XHCI_LINK_TRB_QUIRK;
539 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
540 "xHCI doesn't need link TRB QUIRK");
542 retval = xhci_mem_init(xhci, GFP_KERNEL);
543 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "Finished xhci_init");
545 /* Initializing Compliance Mode Recovery Data If Needed */
546 if (xhci_compliance_mode_recovery_timer_quirk_check()) {
547 xhci->quirks |= XHCI_COMP_MODE_QUIRK;
548 compliance_mode_recovery_timer_init(xhci);
554 /*-------------------------------------------------------------------------*/
557 static int xhci_run_finished(struct xhci_hcd *xhci)
559 if (xhci_start(xhci)) {
563 xhci->shared_hcd->state = HC_STATE_RUNNING;
564 xhci->cmd_ring_state = CMD_RING_STATE_RUNNING;
566 if (xhci->quirks & XHCI_NEC_HOST)
567 xhci_ring_cmd_db(xhci);
569 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
570 "Finished xhci_run for USB3 roothub");
575 * Start the HC after it was halted.
577 * This function is called by the USB core when the HC driver is added.
578 * Its opposite is xhci_stop().
580 * xhci_init() must be called once before this function can be called.
581 * Reset the HC, enable device slot contexts, program DCBAAP, and
582 * set command ring pointer and event ring pointer.
584 * Setup MSI-X vectors and enable interrupts.
586 int xhci_run(struct usb_hcd *hcd)
591 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
593 /* Start the xHCI host controller running only after the USB 2.0 roothub
597 hcd->uses_new_polling = 1;
598 if (!usb_hcd_is_primary_hcd(hcd))
599 return xhci_run_finished(xhci);
601 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "xhci_run");
603 ret = xhci_try_enable_msi(hcd);
607 xhci_dbg(xhci, "Command ring memory map follows:\n");
608 xhci_debug_ring(xhci, xhci->cmd_ring);
609 xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
610 xhci_dbg_cmd_ptrs(xhci);
612 xhci_dbg(xhci, "ERST memory map follows:\n");
613 xhci_dbg_erst(xhci, &xhci->erst);
614 xhci_dbg(xhci, "Event ring:\n");
615 xhci_debug_ring(xhci, xhci->event_ring);
616 xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
617 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
618 temp_64 &= ~ERST_PTR_MASK;
619 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
620 "ERST deq = 64'h%0lx", (long unsigned int) temp_64);
622 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
623 "// Set the interrupt modulation register");
624 temp = readl(&xhci->ir_set->irq_control);
625 temp &= ~ER_IRQ_INTERVAL_MASK;
627 writel(temp, &xhci->ir_set->irq_control);
629 /* Set the HCD state before we enable the irqs */
630 temp = readl(&xhci->op_regs->command);
632 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
633 "// Enable interrupts, cmd = 0x%x.", temp);
634 writel(temp, &xhci->op_regs->command);
636 temp = readl(&xhci->ir_set->irq_pending);
637 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
638 "// Enabling event ring interrupter %p by writing 0x%x to irq_pending",
639 xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp));
640 writel(ER_IRQ_ENABLE(temp), &xhci->ir_set->irq_pending);
641 xhci_print_ir_set(xhci, 0);
643 if (xhci->quirks & XHCI_NEC_HOST) {
644 struct xhci_command *command;
645 command = xhci_alloc_command(xhci, false, false, GFP_KERNEL);
648 xhci_queue_vendor_command(xhci, command, 0, 0, 0,
649 TRB_TYPE(TRB_NEC_GET_FW));
651 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
652 "Finished xhci_run for USB2 roothub");
655 EXPORT_SYMBOL_GPL(xhci_run);
657 static void xhci_only_stop_hcd(struct usb_hcd *hcd)
659 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
661 spin_lock_irq(&xhci->lock);
663 spin_unlock_irq(&xhci->lock);
669 * This function is called by the USB core when the HC driver is removed.
670 * Its opposite is xhci_run().
672 * Disable device contexts, disable IRQs, and quiesce the HC.
673 * Reset the HC, finish any completed transactions, and cleanup memory.
675 void xhci_stop(struct usb_hcd *hcd)
678 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
680 mutex_lock(&xhci->mutex);
682 if (!usb_hcd_is_primary_hcd(hcd)) {
683 xhci_only_stop_hcd(xhci->shared_hcd);
684 mutex_unlock(&xhci->mutex);
688 spin_lock_irq(&xhci->lock);
689 /* Make sure the xHC is halted for a USB3 roothub
690 * (xhci_stop() could be called as part of failed init).
694 spin_unlock_irq(&xhci->lock);
696 xhci_cleanup_msix(xhci);
698 /* Deleting Compliance Mode Recovery Timer */
699 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
700 (!(xhci_all_ports_seen_u0(xhci)))) {
701 del_timer_sync(&xhci->comp_mode_recovery_timer);
702 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
703 "%s: compliance mode recovery timer deleted",
707 if (xhci->quirks & XHCI_AMD_PLL_FIX)
710 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
711 "// Disabling event ring interrupts");
712 temp = readl(&xhci->op_regs->status);
713 writel(temp & ~STS_EINT, &xhci->op_regs->status);
714 temp = readl(&xhci->ir_set->irq_pending);
715 writel(ER_IRQ_DISABLE(temp), &xhci->ir_set->irq_pending);
716 xhci_print_ir_set(xhci, 0);
718 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "cleaning up memory");
719 xhci_mem_cleanup(xhci);
720 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
721 "xhci_stop completed - status = %x",
722 readl(&xhci->op_regs->status));
723 mutex_unlock(&xhci->mutex);
727 * Shutdown HC (not bus-specific)
729 * This is called when the machine is rebooting or halting. We assume that the
730 * machine will be powered off, and the HC's internal state will be reset.
731 * Don't bother to free memory.
733 * This will only ever be called with the main usb_hcd (the USB3 roothub).
735 void xhci_shutdown(struct usb_hcd *hcd)
737 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
739 if (xhci->quirks & XHCI_SPURIOUS_REBOOT)
740 usb_disable_xhci_ports(to_pci_dev(hcd->self.controller));
742 spin_lock_irq(&xhci->lock);
744 /* Workaround for spurious wakeups at shutdown with HSW */
745 if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
747 spin_unlock_irq(&xhci->lock);
749 xhci_cleanup_msix(xhci);
751 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
752 "xhci_shutdown completed - status = %x",
753 readl(&xhci->op_regs->status));
755 /* Yet another workaround for spurious wakeups at shutdown with HSW */
756 if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
757 pci_set_power_state(to_pci_dev(hcd->self.controller), PCI_D3hot);
761 static void xhci_save_registers(struct xhci_hcd *xhci)
763 xhci->s3.command = readl(&xhci->op_regs->command);
764 xhci->s3.dev_nt = readl(&xhci->op_regs->dev_notification);
765 xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
766 xhci->s3.config_reg = readl(&xhci->op_regs->config_reg);
767 xhci->s3.erst_size = readl(&xhci->ir_set->erst_size);
768 xhci->s3.erst_base = xhci_read_64(xhci, &xhci->ir_set->erst_base);
769 xhci->s3.erst_dequeue = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
770 xhci->s3.irq_pending = readl(&xhci->ir_set->irq_pending);
771 xhci->s3.irq_control = readl(&xhci->ir_set->irq_control);
774 static void xhci_restore_registers(struct xhci_hcd *xhci)
776 writel(xhci->s3.command, &xhci->op_regs->command);
777 writel(xhci->s3.dev_nt, &xhci->op_regs->dev_notification);
778 xhci_write_64(xhci, xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr);
779 writel(xhci->s3.config_reg, &xhci->op_regs->config_reg);
780 writel(xhci->s3.erst_size, &xhci->ir_set->erst_size);
781 xhci_write_64(xhci, xhci->s3.erst_base, &xhci->ir_set->erst_base);
782 xhci_write_64(xhci, xhci->s3.erst_dequeue, &xhci->ir_set->erst_dequeue);
783 writel(xhci->s3.irq_pending, &xhci->ir_set->irq_pending);
784 writel(xhci->s3.irq_control, &xhci->ir_set->irq_control);
787 static void xhci_set_cmd_ring_deq(struct xhci_hcd *xhci)
791 /* step 2: initialize command ring buffer */
792 val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
793 val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |
794 (xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
795 xhci->cmd_ring->dequeue) &
796 (u64) ~CMD_RING_RSVD_BITS) |
797 xhci->cmd_ring->cycle_state;
798 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
799 "// Setting command ring address to 0x%llx",
800 (long unsigned long) val_64);
801 xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);
805 * The whole command ring must be cleared to zero when we suspend the host.
807 * The host doesn't save the command ring pointer in the suspend well, so we
808 * need to re-program it on resume. Unfortunately, the pointer must be 64-byte
809 * aligned, because of the reserved bits in the command ring dequeue pointer
810 * register. Therefore, we can't just set the dequeue pointer back in the
811 * middle of the ring (TRBs are 16-byte aligned).
813 static void xhci_clear_command_ring(struct xhci_hcd *xhci)
815 struct xhci_ring *ring;
816 struct xhci_segment *seg;
818 ring = xhci->cmd_ring;
822 sizeof(union xhci_trb) * (TRBS_PER_SEGMENT - 1));
823 seg->trbs[TRBS_PER_SEGMENT - 1].link.control &=
824 cpu_to_le32(~TRB_CYCLE);
826 } while (seg != ring->deq_seg);
828 /* Reset the software enqueue and dequeue pointers */
829 ring->deq_seg = ring->first_seg;
830 ring->dequeue = ring->first_seg->trbs;
831 ring->enq_seg = ring->deq_seg;
832 ring->enqueue = ring->dequeue;
834 ring->num_trbs_free = ring->num_segs * (TRBS_PER_SEGMENT - 1) - 1;
836 * Ring is now zeroed, so the HW should look for change of ownership
837 * when the cycle bit is set to 1.
839 ring->cycle_state = 1;
842 * Reset the hardware dequeue pointer.
843 * Yes, this will need to be re-written after resume, but we're paranoid
844 * and want to make sure the hardware doesn't access bogus memory
845 * because, say, the BIOS or an SMI started the host without changing
846 * the command ring pointers.
848 xhci_set_cmd_ring_deq(xhci);
851 static void xhci_disable_port_wake_on_bits(struct xhci_hcd *xhci)
854 __le32 __iomem **port_array;
858 spin_lock_irqsave(&xhci->lock, flags);
860 /* disble usb3 ports Wake bits*/
861 port_index = xhci->num_usb3_ports;
862 port_array = xhci->usb3_ports;
863 while (port_index--) {
864 t1 = readl(port_array[port_index]);
865 t1 = xhci_port_state_to_neutral(t1);
866 t2 = t1 & ~PORT_WAKE_BITS;
868 writel(t2, port_array[port_index]);
871 /* disble usb2 ports Wake bits*/
872 port_index = xhci->num_usb2_ports;
873 port_array = xhci->usb2_ports;
874 while (port_index--) {
875 t1 = readl(port_array[port_index]);
876 t1 = xhci_port_state_to_neutral(t1);
877 t2 = t1 & ~PORT_WAKE_BITS;
879 writel(t2, port_array[port_index]);
882 spin_unlock_irqrestore(&xhci->lock, flags);
886 * Stop HC (not bus-specific)
888 * This is called when the machine transition into S3/S4 mode.
891 int xhci_suspend(struct xhci_hcd *xhci, bool do_wakeup)
894 unsigned int delay = XHCI_MAX_HALT_USEC;
895 struct usb_hcd *hcd = xhci_to_hcd(xhci);
901 if (hcd->state != HC_STATE_SUSPENDED ||
902 xhci->shared_hcd->state != HC_STATE_SUSPENDED)
905 /* Clear root port wake on bits if wakeup not allowed. */
907 xhci_disable_port_wake_on_bits(xhci);
909 /* Don't poll the roothubs on bus suspend. */
910 xhci_dbg(xhci, "%s: stopping port polling.\n", __func__);
911 clear_bit(HCD_FLAG_POLL_RH, &hcd->flags);
912 del_timer_sync(&hcd->rh_timer);
913 clear_bit(HCD_FLAG_POLL_RH, &xhci->shared_hcd->flags);
914 del_timer_sync(&xhci->shared_hcd->rh_timer);
916 spin_lock_irq(&xhci->lock);
917 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
918 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
919 /* step 1: stop endpoint */
920 /* skipped assuming that port suspend has done */
922 /* step 2: clear Run/Stop bit */
923 command = readl(&xhci->op_regs->command);
925 writel(command, &xhci->op_regs->command);
927 /* Some chips from Fresco Logic need an extraordinary delay */
928 delay *= (xhci->quirks & XHCI_SLOW_SUSPEND) ? 10 : 1;
930 if (xhci_handshake(&xhci->op_regs->status,
931 STS_HALT, STS_HALT, delay)) {
932 xhci_warn(xhci, "WARN: xHC CMD_RUN timeout\n");
933 spin_unlock_irq(&xhci->lock);
936 xhci_clear_command_ring(xhci);
938 /* step 3: save registers */
939 xhci_save_registers(xhci);
941 /* step 4: set CSS flag */
942 command = readl(&xhci->op_regs->command);
944 writel(command, &xhci->op_regs->command);
945 if (xhci_handshake(&xhci->op_regs->status,
946 STS_SAVE, 0, 10 * 1000)) {
947 xhci_warn(xhci, "WARN: xHC save state timeout\n");
948 spin_unlock_irq(&xhci->lock);
951 spin_unlock_irq(&xhci->lock);
954 * Deleting Compliance Mode Recovery Timer because the xHCI Host
955 * is about to be suspended.
957 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
958 (!(xhci_all_ports_seen_u0(xhci)))) {
959 del_timer_sync(&xhci->comp_mode_recovery_timer);
960 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
961 "%s: compliance mode recovery timer deleted",
965 /* step 5: remove core well power */
966 /* synchronize irq when using MSI-X */
967 xhci_msix_sync_irqs(xhci);
971 EXPORT_SYMBOL_GPL(xhci_suspend);
974 * start xHC (not bus-specific)
976 * This is called when the machine transition from S3/S4 mode.
979 int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
981 u32 command, temp = 0, status;
982 struct usb_hcd *hcd = xhci_to_hcd(xhci);
983 struct usb_hcd *secondary_hcd;
985 bool comp_timer_running = false;
990 /* Wait a bit if either of the roothubs need to settle from the
991 * transition into bus suspend.
993 if (time_before(jiffies, xhci->bus_state[0].next_statechange) ||
995 xhci->bus_state[1].next_statechange))
998 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
999 set_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
1001 spin_lock_irq(&xhci->lock);
1002 if (xhci->quirks & XHCI_RESET_ON_RESUME)
1006 /* step 1: restore register */
1007 xhci_restore_registers(xhci);
1008 /* step 2: initialize command ring buffer */
1009 xhci_set_cmd_ring_deq(xhci);
1010 /* step 3: restore state and start state*/
1011 /* step 3: set CRS flag */
1012 command = readl(&xhci->op_regs->command);
1014 writel(command, &xhci->op_regs->command);
1015 if (xhci_handshake(&xhci->op_regs->status,
1016 STS_RESTORE, 0, 10 * 1000)) {
1017 xhci_warn(xhci, "WARN: xHC restore state timeout\n");
1018 spin_unlock_irq(&xhci->lock);
1021 temp = readl(&xhci->op_regs->status);
1024 /* If restore operation fails, re-initialize the HC during resume */
1025 if ((temp & STS_SRE) || hibernated) {
1027 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
1028 !(xhci_all_ports_seen_u0(xhci))) {
1029 del_timer_sync(&xhci->comp_mode_recovery_timer);
1030 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1031 "Compliance Mode Recovery Timer deleted!");
1034 /* Let the USB core know _both_ roothubs lost power. */
1035 usb_root_hub_lost_power(xhci->main_hcd->self.root_hub);
1036 usb_root_hub_lost_power(xhci->shared_hcd->self.root_hub);
1038 xhci_dbg(xhci, "Stop HCD\n");
1041 spin_unlock_irq(&xhci->lock);
1042 xhci_cleanup_msix(xhci);
1044 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
1045 temp = readl(&xhci->op_regs->status);
1046 writel(temp & ~STS_EINT, &xhci->op_regs->status);
1047 temp = readl(&xhci->ir_set->irq_pending);
1048 writel(ER_IRQ_DISABLE(temp), &xhci->ir_set->irq_pending);
1049 xhci_print_ir_set(xhci, 0);
1051 xhci_dbg(xhci, "cleaning up memory\n");
1052 xhci_mem_cleanup(xhci);
1053 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
1054 readl(&xhci->op_regs->status));
1056 /* USB core calls the PCI reinit and start functions twice:
1057 * first with the primary HCD, and then with the secondary HCD.
1058 * If we don't do the same, the host will never be started.
1060 if (!usb_hcd_is_primary_hcd(hcd))
1061 secondary_hcd = hcd;
1063 secondary_hcd = xhci->shared_hcd;
1065 xhci_dbg(xhci, "Initialize the xhci_hcd\n");
1066 retval = xhci_init(hcd->primary_hcd);
1069 comp_timer_running = true;
1071 xhci_dbg(xhci, "Start the primary HCD\n");
1072 retval = xhci_run(hcd->primary_hcd);
1074 xhci_dbg(xhci, "Start the secondary HCD\n");
1075 retval = xhci_run(secondary_hcd);
1077 hcd->state = HC_STATE_SUSPENDED;
1078 xhci->shared_hcd->state = HC_STATE_SUSPENDED;
1082 /* step 4: set Run/Stop bit */
1083 command = readl(&xhci->op_regs->command);
1085 writel(command, &xhci->op_regs->command);
1086 xhci_handshake(&xhci->op_regs->status, STS_HALT,
1089 /* step 5: walk topology and initialize portsc,
1090 * portpmsc and portli
1092 /* this is done in bus_resume */
1094 /* step 6: restart each of the previously
1095 * Running endpoints by ringing their doorbells
1098 spin_unlock_irq(&xhci->lock);
1102 /* Resume root hubs only when have pending events. */
1103 status = readl(&xhci->op_regs->status);
1104 if (status & STS_EINT) {
1105 usb_hcd_resume_root_hub(hcd);
1106 usb_hcd_resume_root_hub(xhci->shared_hcd);
1111 * If system is subject to the Quirk, Compliance Mode Timer needs to
1112 * be re-initialized Always after a system resume. Ports are subject
1113 * to suffer the Compliance Mode issue again. It doesn't matter if
1114 * ports have entered previously to U0 before system's suspension.
1116 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) && !comp_timer_running)
1117 compliance_mode_recovery_timer_init(xhci);
1119 /* Re-enable port polling. */
1120 xhci_dbg(xhci, "%s: starting port polling.\n", __func__);
1121 set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
1122 usb_hcd_poll_rh_status(hcd);
1123 set_bit(HCD_FLAG_POLL_RH, &xhci->shared_hcd->flags);
1124 usb_hcd_poll_rh_status(xhci->shared_hcd);
1128 EXPORT_SYMBOL_GPL(xhci_resume);
1129 #endif /* CONFIG_PM */
1131 /*-------------------------------------------------------------------------*/
1134 * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
1135 * HCDs. Find the index for an endpoint given its descriptor. Use the return
1136 * value to right shift 1 for the bitmask.
1138 * Index = (epnum * 2) + direction - 1,
1139 * where direction = 0 for OUT, 1 for IN.
1140 * For control endpoints, the IN index is used (OUT index is unused), so
1141 * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
1143 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc)
1146 if (usb_endpoint_xfer_control(desc))
1147 index = (unsigned int) (usb_endpoint_num(desc)*2);
1149 index = (unsigned int) (usb_endpoint_num(desc)*2) +
1150 (usb_endpoint_dir_in(desc) ? 1 : 0) - 1;
1154 /* The reverse operation to xhci_get_endpoint_index. Calculate the USB endpoint
1155 * address from the XHCI endpoint index.
1157 unsigned int xhci_get_endpoint_address(unsigned int ep_index)
1159 unsigned int number = DIV_ROUND_UP(ep_index, 2);
1160 unsigned int direction = ep_index % 2 ? USB_DIR_OUT : USB_DIR_IN;
1161 return direction | number;
1164 /* Find the flag for this endpoint (for use in the control context). Use the
1165 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1168 unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc)
1170 return 1 << (xhci_get_endpoint_index(desc) + 1);
1173 /* Find the flag for this endpoint (for use in the control context). Use the
1174 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1177 unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index)
1179 return 1 << (ep_index + 1);
1182 /* Compute the last valid endpoint context index. Basically, this is the
1183 * endpoint index plus one. For slot contexts with more than valid endpoint,
1184 * we find the most significant bit set in the added contexts flags.
1185 * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
1186 * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
1188 unsigned int xhci_last_valid_endpoint(u32 added_ctxs)
1190 return fls(added_ctxs) - 1;
1193 /* Returns 1 if the arguments are OK;
1194 * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
1196 static int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev,
1197 struct usb_host_endpoint *ep, int check_ep, bool check_virt_dev,
1199 struct xhci_hcd *xhci;
1200 struct xhci_virt_device *virt_dev;
1202 if (!hcd || (check_ep && !ep) || !udev) {
1203 pr_debug("xHCI %s called with invalid args\n", func);
1206 if (!udev->parent) {
1207 pr_debug("xHCI %s called for root hub\n", func);
1211 xhci = hcd_to_xhci(hcd);
1212 if (check_virt_dev) {
1213 if (!udev->slot_id || !xhci->devs[udev->slot_id]) {
1214 xhci_dbg(xhci, "xHCI %s called with unaddressed device\n",
1219 virt_dev = xhci->devs[udev->slot_id];
1220 if (virt_dev->udev != udev) {
1221 xhci_dbg(xhci, "xHCI %s called with udev and "
1222 "virt_dev does not match\n", func);
1227 if (xhci->xhc_state & XHCI_STATE_HALTED)
1233 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
1234 struct usb_device *udev, struct xhci_command *command,
1235 bool ctx_change, bool must_succeed);
1238 * Full speed devices may have a max packet size greater than 8 bytes, but the
1239 * USB core doesn't know that until it reads the first 8 bytes of the
1240 * descriptor. If the usb_device's max packet size changes after that point,
1241 * we need to issue an evaluate context command and wait on it.
1243 static int xhci_check_maxpacket(struct xhci_hcd *xhci, unsigned int slot_id,
1244 unsigned int ep_index, struct urb *urb)
1246 struct xhci_container_ctx *out_ctx;
1247 struct xhci_input_control_ctx *ctrl_ctx;
1248 struct xhci_ep_ctx *ep_ctx;
1249 struct xhci_command *command;
1250 int max_packet_size;
1251 int hw_max_packet_size;
1254 out_ctx = xhci->devs[slot_id]->out_ctx;
1255 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1256 hw_max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2));
1257 max_packet_size = usb_endpoint_maxp(&urb->dev->ep0.desc);
1258 if (hw_max_packet_size != max_packet_size) {
1259 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1260 "Max Packet Size for ep 0 changed.");
1261 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1262 "Max packet size in usb_device = %d",
1264 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1265 "Max packet size in xHCI HW = %d",
1266 hw_max_packet_size);
1267 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1268 "Issuing evaluate context command.");
1270 /* Set up the input context flags for the command */
1271 /* FIXME: This won't work if a non-default control endpoint
1272 * changes max packet sizes.
1275 command = xhci_alloc_command(xhci, false, true, GFP_KERNEL);
1279 command->in_ctx = xhci->devs[slot_id]->in_ctx;
1280 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx);
1282 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1285 goto command_cleanup;
1287 /* Set up the modified control endpoint 0 */
1288 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
1289 xhci->devs[slot_id]->out_ctx, ep_index);
1291 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
1292 ep_ctx->ep_info2 &= cpu_to_le32(~MAX_PACKET_MASK);
1293 ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet_size));
1295 ctrl_ctx->add_flags = cpu_to_le32(EP0_FLAG);
1296 ctrl_ctx->drop_flags = 0;
1298 xhci_dbg(xhci, "Slot %d input context\n", slot_id);
1299 xhci_dbg_ctx(xhci, command->in_ctx, ep_index);
1300 xhci_dbg(xhci, "Slot %d output context\n", slot_id);
1301 xhci_dbg_ctx(xhci, out_ctx, ep_index);
1303 ret = xhci_configure_endpoint(xhci, urb->dev, command,
1306 /* Clean up the input context for later use by bandwidth
1309 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG);
1311 kfree(command->completion);
1318 * non-error returns are a promise to giveback() the urb later
1319 * we drop ownership so next owner (or urb unlink) can get it
1321 int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
1323 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
1324 struct xhci_td *buffer;
1325 unsigned long flags;
1327 unsigned int slot_id, ep_index;
1328 struct urb_priv *urb_priv;
1331 if (!urb || xhci_check_args(hcd, urb->dev, urb->ep,
1332 true, true, __func__) <= 0)
1335 slot_id = urb->dev->slot_id;
1336 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1338 if (!HCD_HW_ACCESSIBLE(hcd)) {
1339 if (!in_interrupt())
1340 xhci_dbg(xhci, "urb submitted during PCI suspend\n");
1345 if (usb_endpoint_xfer_isoc(&urb->ep->desc))
1346 size = urb->number_of_packets;
1347 else if (usb_endpoint_is_bulk_out(&urb->ep->desc) &&
1348 urb->transfer_buffer_length > 0 &&
1349 urb->transfer_flags & URB_ZERO_PACKET &&
1350 !(urb->transfer_buffer_length % usb_endpoint_maxp(&urb->ep->desc)))
1355 urb_priv = kzalloc(sizeof(struct urb_priv) +
1356 size * sizeof(struct xhci_td *), mem_flags);
1360 buffer = kzalloc(size * sizeof(struct xhci_td), mem_flags);
1366 for (i = 0; i < size; i++) {
1367 urb_priv->td[i] = buffer;
1371 urb_priv->length = size;
1372 urb_priv->td_cnt = 0;
1373 urb->hcpriv = urb_priv;
1375 if (usb_endpoint_xfer_control(&urb->ep->desc)) {
1376 /* Check to see if the max packet size for the default control
1377 * endpoint changed during FS device enumeration
1379 if (urb->dev->speed == USB_SPEED_FULL) {
1380 ret = xhci_check_maxpacket(xhci, slot_id,
1383 xhci_urb_free_priv(urb_priv);
1389 /* We have a spinlock and interrupts disabled, so we must pass
1390 * atomic context to this function, which may allocate memory.
1392 spin_lock_irqsave(&xhci->lock, flags);
1393 if (xhci->xhc_state & XHCI_STATE_DYING)
1395 ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb,
1399 spin_unlock_irqrestore(&xhci->lock, flags);
1400 } else if (usb_endpoint_xfer_bulk(&urb->ep->desc)) {
1401 spin_lock_irqsave(&xhci->lock, flags);
1402 if (xhci->xhc_state & XHCI_STATE_DYING)
1404 if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1405 EP_GETTING_STREAMS) {
1406 xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1407 "is transitioning to using streams.\n");
1409 } else if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1410 EP_GETTING_NO_STREAMS) {
1411 xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1412 "is transitioning to "
1413 "not having streams.\n");
1416 ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
1421 spin_unlock_irqrestore(&xhci->lock, flags);
1422 } else if (usb_endpoint_xfer_int(&urb->ep->desc)) {
1423 spin_lock_irqsave(&xhci->lock, flags);
1424 if (xhci->xhc_state & XHCI_STATE_DYING)
1426 ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb,
1430 spin_unlock_irqrestore(&xhci->lock, flags);
1432 spin_lock_irqsave(&xhci->lock, flags);
1433 if (xhci->xhc_state & XHCI_STATE_DYING)
1435 ret = xhci_queue_isoc_tx_prepare(xhci, GFP_ATOMIC, urb,
1439 spin_unlock_irqrestore(&xhci->lock, flags);
1444 xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for "
1445 "non-responsive xHCI host.\n",
1446 urb->ep->desc.bEndpointAddress, urb);
1449 xhci_urb_free_priv(urb_priv);
1451 spin_unlock_irqrestore(&xhci->lock, flags);
1455 /* Get the right ring for the given URB.
1456 * If the endpoint supports streams, boundary check the URB's stream ID.
1457 * If the endpoint doesn't support streams, return the singular endpoint ring.
1459 static struct xhci_ring *xhci_urb_to_transfer_ring(struct xhci_hcd *xhci,
1462 unsigned int slot_id;
1463 unsigned int ep_index;
1464 unsigned int stream_id;
1465 struct xhci_virt_ep *ep;
1467 slot_id = urb->dev->slot_id;
1468 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1469 stream_id = urb->stream_id;
1470 ep = &xhci->devs[slot_id]->eps[ep_index];
1471 /* Common case: no streams */
1472 if (!(ep->ep_state & EP_HAS_STREAMS))
1475 if (stream_id == 0) {
1477 "WARN: Slot ID %u, ep index %u has streams, "
1478 "but URB has no stream ID.\n",
1483 if (stream_id < ep->stream_info->num_streams)
1484 return ep->stream_info->stream_rings[stream_id];
1487 "WARN: Slot ID %u, ep index %u has "
1488 "stream IDs 1 to %u allocated, "
1489 "but stream ID %u is requested.\n",
1491 ep->stream_info->num_streams - 1,
1497 * Remove the URB's TD from the endpoint ring. This may cause the HC to stop
1498 * USB transfers, potentially stopping in the middle of a TRB buffer. The HC
1499 * should pick up where it left off in the TD, unless a Set Transfer Ring
1500 * Dequeue Pointer is issued.
1502 * The TRBs that make up the buffers for the canceled URB will be "removed" from
1503 * the ring. Since the ring is a contiguous structure, they can't be physically
1504 * removed. Instead, there are two options:
1506 * 1) If the HC is in the middle of processing the URB to be canceled, we
1507 * simply move the ring's dequeue pointer past those TRBs using the Set
1508 * Transfer Ring Dequeue Pointer command. This will be the common case,
1509 * when drivers timeout on the last submitted URB and attempt to cancel.
1511 * 2) If the HC is in the middle of a different TD, we turn the TRBs into a
1512 * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The
1513 * HC will need to invalidate the any TRBs it has cached after the stop
1514 * endpoint command, as noted in the xHCI 0.95 errata.
1516 * 3) The TD may have completed by the time the Stop Endpoint Command
1517 * completes, so software needs to handle that case too.
1519 * This function should protect against the TD enqueueing code ringing the
1520 * doorbell while this code is waiting for a Stop Endpoint command to complete.
1521 * It also needs to account for multiple cancellations on happening at the same
1522 * time for the same endpoint.
1524 * Note that this function can be called in any context, or so says
1525 * usb_hcd_unlink_urb()
1527 int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1529 unsigned long flags;
1532 struct xhci_hcd *xhci;
1533 struct urb_priv *urb_priv;
1535 unsigned int ep_index;
1536 struct xhci_ring *ep_ring;
1537 struct xhci_virt_ep *ep;
1538 struct xhci_command *command;
1540 xhci = hcd_to_xhci(hcd);
1541 spin_lock_irqsave(&xhci->lock, flags);
1542 /* Make sure the URB hasn't completed or been unlinked already */
1543 ret = usb_hcd_check_unlink_urb(hcd, urb, status);
1544 if (ret || !urb->hcpriv)
1546 temp = readl(&xhci->op_regs->status);
1547 if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_HALTED)) {
1548 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1549 "HW died, freeing TD.");
1550 urb_priv = urb->hcpriv;
1551 for (i = urb_priv->td_cnt; i < urb_priv->length; i++) {
1552 td = urb_priv->td[i];
1553 if (!list_empty(&td->td_list))
1554 list_del_init(&td->td_list);
1555 if (!list_empty(&td->cancelled_td_list))
1556 list_del_init(&td->cancelled_td_list);
1559 usb_hcd_unlink_urb_from_ep(hcd, urb);
1560 spin_unlock_irqrestore(&xhci->lock, flags);
1561 usb_hcd_giveback_urb(hcd, urb, -ESHUTDOWN);
1562 xhci_urb_free_priv(urb_priv);
1565 if ((xhci->xhc_state & XHCI_STATE_DYING) ||
1566 (xhci->xhc_state & XHCI_STATE_HALTED)) {
1567 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1568 "Ep 0x%x: URB %p to be canceled on "
1569 "non-responsive xHCI host.",
1570 urb->ep->desc.bEndpointAddress, urb);
1571 /* Let the stop endpoint command watchdog timer (which set this
1572 * state) finish cleaning up the endpoint TD lists. We must
1573 * have caught it in the middle of dropping a lock and giving
1579 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1580 ep = &xhci->devs[urb->dev->slot_id]->eps[ep_index];
1581 ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
1587 urb_priv = urb->hcpriv;
1588 i = urb_priv->td_cnt;
1589 if (i < urb_priv->length)
1590 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1591 "Cancel URB %p, dev %s, ep 0x%x, "
1592 "starting at offset 0x%llx",
1593 urb, urb->dev->devpath,
1594 urb->ep->desc.bEndpointAddress,
1595 (unsigned long long) xhci_trb_virt_to_dma(
1596 urb_priv->td[i]->start_seg,
1597 urb_priv->td[i]->first_trb));
1599 for (; i < urb_priv->length; i++) {
1600 td = urb_priv->td[i];
1601 list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list);
1604 /* Queue a stop endpoint command, but only if this is
1605 * the first cancellation to be handled.
1607 if (!(ep->ep_state & EP_HALT_PENDING)) {
1608 command = xhci_alloc_command(xhci, false, false, GFP_ATOMIC);
1613 ep->ep_state |= EP_HALT_PENDING;
1614 ep->stop_cmds_pending++;
1615 ep->stop_cmd_timer.expires = jiffies +
1616 XHCI_STOP_EP_CMD_TIMEOUT * HZ;
1617 add_timer(&ep->stop_cmd_timer);
1618 xhci_queue_stop_endpoint(xhci, command, urb->dev->slot_id,
1620 xhci_ring_cmd_db(xhci);
1623 spin_unlock_irqrestore(&xhci->lock, flags);
1627 /* Drop an endpoint from a new bandwidth configuration for this device.
1628 * Only one call to this function is allowed per endpoint before
1629 * check_bandwidth() or reset_bandwidth() must be called.
1630 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1631 * add the endpoint to the schedule with possibly new parameters denoted by a
1632 * different endpoint descriptor in usb_host_endpoint.
1633 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1636 * The USB core will not allow URBs to be queued to an endpoint that is being
1637 * disabled, so there's no need for mutual exclusion to protect
1638 * the xhci->devs[slot_id] structure.
1640 int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1641 struct usb_host_endpoint *ep)
1643 struct xhci_hcd *xhci;
1644 struct xhci_container_ctx *in_ctx, *out_ctx;
1645 struct xhci_input_control_ctx *ctrl_ctx;
1646 unsigned int ep_index;
1647 struct xhci_ep_ctx *ep_ctx;
1649 u32 new_add_flags, new_drop_flags;
1652 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1655 xhci = hcd_to_xhci(hcd);
1656 if (xhci->xhc_state & XHCI_STATE_DYING)
1659 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1660 drop_flag = xhci_get_endpoint_flag(&ep->desc);
1661 if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) {
1662 xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n",
1663 __func__, drop_flag);
1667 in_ctx = xhci->devs[udev->slot_id]->in_ctx;
1668 out_ctx = xhci->devs[udev->slot_id]->out_ctx;
1669 ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
1671 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1676 ep_index = xhci_get_endpoint_index(&ep->desc);
1677 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1678 /* If the HC already knows the endpoint is disabled,
1679 * or the HCD has noted it is disabled, ignore this request
1681 if (((ep_ctx->ep_info & cpu_to_le32(EP_STATE_MASK)) ==
1682 cpu_to_le32(EP_STATE_DISABLED)) ||
1683 le32_to_cpu(ctrl_ctx->drop_flags) &
1684 xhci_get_endpoint_flag(&ep->desc)) {
1685 /* Do not warn when called after a usb_device_reset */
1686 if (xhci->devs[udev->slot_id]->eps[ep_index].ring != NULL)
1687 xhci_warn(xhci, "xHCI %s called with disabled ep %p\n",
1692 ctrl_ctx->drop_flags |= cpu_to_le32(drop_flag);
1693 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1695 ctrl_ctx->add_flags &= cpu_to_le32(~drop_flag);
1696 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1698 xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep);
1700 xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x\n",
1701 (unsigned int) ep->desc.bEndpointAddress,
1703 (unsigned int) new_drop_flags,
1704 (unsigned int) new_add_flags);
1708 /* Add an endpoint to a new possible bandwidth configuration for this device.
1709 * Only one call to this function is allowed per endpoint before
1710 * check_bandwidth() or reset_bandwidth() must be called.
1711 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1712 * add the endpoint to the schedule with possibly new parameters denoted by a
1713 * different endpoint descriptor in usb_host_endpoint.
1714 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1717 * The USB core will not allow URBs to be queued to an endpoint until the
1718 * configuration or alt setting is installed in the device, so there's no need
1719 * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1721 int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1722 struct usb_host_endpoint *ep)
1724 struct xhci_hcd *xhci;
1725 struct xhci_container_ctx *in_ctx;
1726 unsigned int ep_index;
1727 struct xhci_input_control_ctx *ctrl_ctx;
1729 u32 new_add_flags, new_drop_flags;
1730 struct xhci_virt_device *virt_dev;
1733 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1735 /* So we won't queue a reset ep command for a root hub */
1739 xhci = hcd_to_xhci(hcd);
1740 if (xhci->xhc_state & XHCI_STATE_DYING)
1743 added_ctxs = xhci_get_endpoint_flag(&ep->desc);
1744 if (added_ctxs == SLOT_FLAG || added_ctxs == EP0_FLAG) {
1745 /* FIXME when we have to issue an evaluate endpoint command to
1746 * deal with ep0 max packet size changing once we get the
1749 xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n",
1750 __func__, added_ctxs);
1754 virt_dev = xhci->devs[udev->slot_id];
1755 in_ctx = virt_dev->in_ctx;
1756 ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
1758 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1763 ep_index = xhci_get_endpoint_index(&ep->desc);
1764 /* If this endpoint is already in use, and the upper layers are trying
1765 * to add it again without dropping it, reject the addition.
1767 if (virt_dev->eps[ep_index].ring &&
1768 !(le32_to_cpu(ctrl_ctx->drop_flags) & added_ctxs)) {
1769 xhci_warn(xhci, "Trying to add endpoint 0x%x "
1770 "without dropping it.\n",
1771 (unsigned int) ep->desc.bEndpointAddress);
1775 /* If the HCD has already noted the endpoint is enabled,
1776 * ignore this request.
1778 if (le32_to_cpu(ctrl_ctx->add_flags) & added_ctxs) {
1779 xhci_warn(xhci, "xHCI %s called with enabled ep %p\n",
1785 * Configuration and alternate setting changes must be done in
1786 * process context, not interrupt context (or so documenation
1787 * for usb_set_interface() and usb_set_configuration() claim).
1789 if (xhci_endpoint_init(xhci, virt_dev, udev, ep, GFP_NOIO) < 0) {
1790 dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n",
1791 __func__, ep->desc.bEndpointAddress);
1795 ctrl_ctx->add_flags |= cpu_to_le32(added_ctxs);
1796 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1798 /* If xhci_endpoint_disable() was called for this endpoint, but the
1799 * xHC hasn't been notified yet through the check_bandwidth() call,
1800 * this re-adds a new state for the endpoint from the new endpoint
1801 * descriptors. We must drop and re-add this endpoint, so we leave the
1804 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1806 /* Store the usb_device pointer for later use */
1809 xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x\n",
1810 (unsigned int) ep->desc.bEndpointAddress,
1812 (unsigned int) new_drop_flags,
1813 (unsigned int) new_add_flags);
1817 static void xhci_zero_in_ctx(struct xhci_hcd *xhci, struct xhci_virt_device *virt_dev)
1819 struct xhci_input_control_ctx *ctrl_ctx;
1820 struct xhci_ep_ctx *ep_ctx;
1821 struct xhci_slot_ctx *slot_ctx;
1824 ctrl_ctx = xhci_get_input_control_ctx(virt_dev->in_ctx);
1826 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1831 /* When a device's add flag and drop flag are zero, any subsequent
1832 * configure endpoint command will leave that endpoint's state
1833 * untouched. Make sure we don't leave any old state in the input
1834 * endpoint contexts.
1836 ctrl_ctx->drop_flags = 0;
1837 ctrl_ctx->add_flags = 0;
1838 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
1839 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1840 /* Endpoint 0 is always valid */
1841 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1));
1842 for (i = 1; i < 31; ++i) {
1843 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i);
1844 ep_ctx->ep_info = 0;
1845 ep_ctx->ep_info2 = 0;
1847 ep_ctx->tx_info = 0;
1851 static int xhci_configure_endpoint_result(struct xhci_hcd *xhci,
1852 struct usb_device *udev, u32 *cmd_status)
1856 switch (*cmd_status) {
1857 case COMP_CMD_ABORT:
1859 xhci_warn(xhci, "Timeout while waiting for configure endpoint command\n");
1863 dev_warn(&udev->dev,
1864 "Not enough host controller resources for new device state.\n");
1866 /* FIXME: can we allocate more resources for the HC? */
1869 case COMP_2ND_BW_ERR:
1870 dev_warn(&udev->dev,
1871 "Not enough bandwidth for new device state.\n");
1873 /* FIXME: can we go back to the old state? */
1876 /* the HCD set up something wrong */
1877 dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, "
1879 "and endpoint is not disabled.\n");
1883 dev_warn(&udev->dev,
1884 "ERROR: Incompatible device for endpoint configure command.\n");
1888 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1889 "Successful Endpoint Configure command");
1893 xhci_err(xhci, "ERROR: unexpected command completion code 0x%x.\n",
1901 static int xhci_evaluate_context_result(struct xhci_hcd *xhci,
1902 struct usb_device *udev, u32 *cmd_status)
1905 struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id];
1907 switch (*cmd_status) {
1908 case COMP_CMD_ABORT:
1910 xhci_warn(xhci, "Timeout while waiting for evaluate context command\n");
1914 dev_warn(&udev->dev,
1915 "WARN: xHCI driver setup invalid evaluate context command.\n");
1919 dev_warn(&udev->dev,
1920 "WARN: slot not enabled for evaluate context command.\n");
1923 case COMP_CTX_STATE:
1924 dev_warn(&udev->dev,
1925 "WARN: invalid context state for evaluate context command.\n");
1926 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 1);
1930 dev_warn(&udev->dev,
1931 "ERROR: Incompatible device for evaluate context command.\n");
1935 /* Max Exit Latency too large error */
1936 dev_warn(&udev->dev, "WARN: Max Exit Latency too large\n");
1940 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1941 "Successful evaluate context command");
1945 xhci_err(xhci, "ERROR: unexpected command completion code 0x%x.\n",
1953 static u32 xhci_count_num_new_endpoints(struct xhci_hcd *xhci,
1954 struct xhci_input_control_ctx *ctrl_ctx)
1956 u32 valid_add_flags;
1957 u32 valid_drop_flags;
1959 /* Ignore the slot flag (bit 0), and the default control endpoint flag
1960 * (bit 1). The default control endpoint is added during the Address
1961 * Device command and is never removed until the slot is disabled.
1963 valid_add_flags = le32_to_cpu(ctrl_ctx->add_flags) >> 2;
1964 valid_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags) >> 2;
1966 /* Use hweight32 to count the number of ones in the add flags, or
1967 * number of endpoints added. Don't count endpoints that are changed
1968 * (both added and dropped).
1970 return hweight32(valid_add_flags) -
1971 hweight32(valid_add_flags & valid_drop_flags);
1974 static unsigned int xhci_count_num_dropped_endpoints(struct xhci_hcd *xhci,
1975 struct xhci_input_control_ctx *ctrl_ctx)
1977 u32 valid_add_flags;
1978 u32 valid_drop_flags;
1980 valid_add_flags = le32_to_cpu(ctrl_ctx->add_flags) >> 2;
1981 valid_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags) >> 2;
1983 return hweight32(valid_drop_flags) -
1984 hweight32(valid_add_flags & valid_drop_flags);
1988 * We need to reserve the new number of endpoints before the configure endpoint
1989 * command completes. We can't subtract the dropped endpoints from the number
1990 * of active endpoints until the command completes because we can oversubscribe
1991 * the host in this case:
1993 * - the first configure endpoint command drops more endpoints than it adds
1994 * - a second configure endpoint command that adds more endpoints is queued
1995 * - the first configure endpoint command fails, so the config is unchanged
1996 * - the second command may succeed, even though there isn't enough resources
1998 * Must be called with xhci->lock held.
2000 static int xhci_reserve_host_resources(struct xhci_hcd *xhci,
2001 struct xhci_input_control_ctx *ctrl_ctx)
2005 added_eps = xhci_count_num_new_endpoints(xhci, ctrl_ctx);
2006 if (xhci->num_active_eps + added_eps > xhci->limit_active_eps) {
2007 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2008 "Not enough ep ctxs: "
2009 "%u active, need to add %u, limit is %u.",
2010 xhci->num_active_eps, added_eps,
2011 xhci->limit_active_eps);
2014 xhci->num_active_eps += added_eps;
2015 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2016 "Adding %u ep ctxs, %u now active.", added_eps,
2017 xhci->num_active_eps);
2022 * The configure endpoint was failed by the xHC for some other reason, so we
2023 * need to revert the resources that failed configuration would have used.
2025 * Must be called with xhci->lock held.
2027 static void xhci_free_host_resources(struct xhci_hcd *xhci,
2028 struct xhci_input_control_ctx *ctrl_ctx)
2032 num_failed_eps = xhci_count_num_new_endpoints(xhci, ctrl_ctx);
2033 xhci->num_active_eps -= num_failed_eps;
2034 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2035 "Removing %u failed ep ctxs, %u now active.",
2037 xhci->num_active_eps);
2041 * Now that the command has completed, clean up the active endpoint count by
2042 * subtracting out the endpoints that were dropped (but not changed).
2044 * Must be called with xhci->lock held.
2046 static void xhci_finish_resource_reservation(struct xhci_hcd *xhci,
2047 struct xhci_input_control_ctx *ctrl_ctx)
2049 u32 num_dropped_eps;
2051 num_dropped_eps = xhci_count_num_dropped_endpoints(xhci, ctrl_ctx);
2052 xhci->num_active_eps -= num_dropped_eps;
2053 if (num_dropped_eps)
2054 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2055 "Removing %u dropped ep ctxs, %u now active.",
2057 xhci->num_active_eps);
2060 static unsigned int xhci_get_block_size(struct usb_device *udev)
2062 switch (udev->speed) {
2064 case USB_SPEED_FULL:
2066 case USB_SPEED_HIGH:
2068 case USB_SPEED_SUPER:
2070 case USB_SPEED_UNKNOWN:
2071 case USB_SPEED_WIRELESS:
2073 /* Should never happen */
2079 xhci_get_largest_overhead(struct xhci_interval_bw *interval_bw)
2081 if (interval_bw->overhead[LS_OVERHEAD_TYPE])
2083 if (interval_bw->overhead[FS_OVERHEAD_TYPE])
2088 /* If we are changing a LS/FS device under a HS hub,
2089 * make sure (if we are activating a new TT) that the HS bus has enough
2090 * bandwidth for this new TT.
2092 static int xhci_check_tt_bw_table(struct xhci_hcd *xhci,
2093 struct xhci_virt_device *virt_dev,
2096 struct xhci_interval_bw_table *bw_table;
2097 struct xhci_tt_bw_info *tt_info;
2099 /* Find the bandwidth table for the root port this TT is attached to. */
2100 bw_table = &xhci->rh_bw[virt_dev->real_port - 1].bw_table;
2101 tt_info = virt_dev->tt_info;
2102 /* If this TT already had active endpoints, the bandwidth for this TT
2103 * has already been added. Removing all periodic endpoints (and thus
2104 * making the TT enactive) will only decrease the bandwidth used.
2108 if (old_active_eps == 0 && tt_info->active_eps != 0) {
2109 if (bw_table->bw_used + TT_HS_OVERHEAD > HS_BW_LIMIT)
2113 /* Not sure why we would have no new active endpoints...
2115 * Maybe because of an Evaluate Context change for a hub update or a
2116 * control endpoint 0 max packet size change?
2117 * FIXME: skip the bandwidth calculation in that case.
2122 static int xhci_check_ss_bw(struct xhci_hcd *xhci,
2123 struct xhci_virt_device *virt_dev)
2125 unsigned int bw_reserved;
2127 bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_IN, 100);
2128 if (virt_dev->bw_table->ss_bw_in > (SS_BW_LIMIT_IN - bw_reserved))
2131 bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_OUT, 100);
2132 if (virt_dev->bw_table->ss_bw_out > (SS_BW_LIMIT_OUT - bw_reserved))
2139 * This algorithm is a very conservative estimate of the worst-case scheduling
2140 * scenario for any one interval. The hardware dynamically schedules the
2141 * packets, so we can't tell which microframe could be the limiting factor in
2142 * the bandwidth scheduling. This only takes into account periodic endpoints.
2144 * Obviously, we can't solve an NP complete problem to find the minimum worst
2145 * case scenario. Instead, we come up with an estimate that is no less than
2146 * the worst case bandwidth used for any one microframe, but may be an
2149 * We walk the requirements for each endpoint by interval, starting with the
2150 * smallest interval, and place packets in the schedule where there is only one
2151 * possible way to schedule packets for that interval. In order to simplify
2152 * this algorithm, we record the largest max packet size for each interval, and
2153 * assume all packets will be that size.
2155 * For interval 0, we obviously must schedule all packets for each interval.
2156 * The bandwidth for interval 0 is just the amount of data to be transmitted
2157 * (the sum of all max ESIT payload sizes, plus any overhead per packet times
2158 * the number of packets).
2160 * For interval 1, we have two possible microframes to schedule those packets
2161 * in. For this algorithm, if we can schedule the same number of packets for
2162 * each possible scheduling opportunity (each microframe), we will do so. The
2163 * remaining number of packets will be saved to be transmitted in the gaps in
2164 * the next interval's scheduling sequence.
2166 * As we move those remaining packets to be scheduled with interval 2 packets,
2167 * we have to double the number of remaining packets to transmit. This is
2168 * because the intervals are actually powers of 2, and we would be transmitting
2169 * the previous interval's packets twice in this interval. We also have to be
2170 * sure that when we look at the largest max packet size for this interval, we
2171 * also look at the largest max packet size for the remaining packets and take
2172 * the greater of the two.
2174 * The algorithm continues to evenly distribute packets in each scheduling
2175 * opportunity, and push the remaining packets out, until we get to the last
2176 * interval. Then those packets and their associated overhead are just added
2177 * to the bandwidth used.
2179 static int xhci_check_bw_table(struct xhci_hcd *xhci,
2180 struct xhci_virt_device *virt_dev,
2183 unsigned int bw_reserved;
2184 unsigned int max_bandwidth;
2185 unsigned int bw_used;
2186 unsigned int block_size;
2187 struct xhci_interval_bw_table *bw_table;
2188 unsigned int packet_size = 0;
2189 unsigned int overhead = 0;
2190 unsigned int packets_transmitted = 0;
2191 unsigned int packets_remaining = 0;
2194 if (virt_dev->udev->speed == USB_SPEED_SUPER)
2195 return xhci_check_ss_bw(xhci, virt_dev);
2197 if (virt_dev->udev->speed == USB_SPEED_HIGH) {
2198 max_bandwidth = HS_BW_LIMIT;
2199 /* Convert percent of bus BW reserved to blocks reserved */
2200 bw_reserved = DIV_ROUND_UP(HS_BW_RESERVED * max_bandwidth, 100);
2202 max_bandwidth = FS_BW_LIMIT;
2203 bw_reserved = DIV_ROUND_UP(FS_BW_RESERVED * max_bandwidth, 100);
2206 bw_table = virt_dev->bw_table;
2207 /* We need to translate the max packet size and max ESIT payloads into
2208 * the units the hardware uses.
2210 block_size = xhci_get_block_size(virt_dev->udev);
2212 /* If we are manipulating a LS/FS device under a HS hub, double check
2213 * that the HS bus has enough bandwidth if we are activing a new TT.
2215 if (virt_dev->tt_info) {
2216 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2217 "Recalculating BW for rootport %u",
2218 virt_dev->real_port);
2219 if (xhci_check_tt_bw_table(xhci, virt_dev, old_active_eps)) {
2220 xhci_warn(xhci, "Not enough bandwidth on HS bus for "
2221 "newly activated TT.\n");
2224 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2225 "Recalculating BW for TT slot %u port %u",
2226 virt_dev->tt_info->slot_id,
2227 virt_dev->tt_info->ttport);
2229 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2230 "Recalculating BW for rootport %u",
2231 virt_dev->real_port);
2234 /* Add in how much bandwidth will be used for interval zero, or the
2235 * rounded max ESIT payload + number of packets * largest overhead.
2237 bw_used = DIV_ROUND_UP(bw_table->interval0_esit_payload, block_size) +
2238 bw_table->interval_bw[0].num_packets *
2239 xhci_get_largest_overhead(&bw_table->interval_bw[0]);
2241 for (i = 1; i < XHCI_MAX_INTERVAL; i++) {
2242 unsigned int bw_added;
2243 unsigned int largest_mps;
2244 unsigned int interval_overhead;
2247 * How many packets could we transmit in this interval?
2248 * If packets didn't fit in the previous interval, we will need
2249 * to transmit that many packets twice within this interval.
2251 packets_remaining = 2 * packets_remaining +
2252 bw_table->interval_bw[i].num_packets;
2254 /* Find the largest max packet size of this or the previous
2257 if (list_empty(&bw_table->interval_bw[i].endpoints))
2260 struct xhci_virt_ep *virt_ep;
2261 struct list_head *ep_entry;
2263 ep_entry = bw_table->interval_bw[i].endpoints.next;
2264 virt_ep = list_entry(ep_entry,
2265 struct xhci_virt_ep, bw_endpoint_list);
2266 /* Convert to blocks, rounding up */
2267 largest_mps = DIV_ROUND_UP(
2268 virt_ep->bw_info.max_packet_size,
2271 if (largest_mps > packet_size)
2272 packet_size = largest_mps;
2274 /* Use the larger overhead of this or the previous interval. */
2275 interval_overhead = xhci_get_largest_overhead(
2276 &bw_table->interval_bw[i]);
2277 if (interval_overhead > overhead)
2278 overhead = interval_overhead;
2280 /* How many packets can we evenly distribute across
2281 * (1 << (i + 1)) possible scheduling opportunities?
2283 packets_transmitted = packets_remaining >> (i + 1);
2285 /* Add in the bandwidth used for those scheduled packets */
2286 bw_added = packets_transmitted * (overhead + packet_size);
2288 /* How many packets do we have remaining to transmit? */
2289 packets_remaining = packets_remaining % (1 << (i + 1));
2291 /* What largest max packet size should those packets have? */
2292 /* If we've transmitted all packets, don't carry over the
2293 * largest packet size.
2295 if (packets_remaining == 0) {
2298 } else if (packets_transmitted > 0) {
2299 /* Otherwise if we do have remaining packets, and we've
2300 * scheduled some packets in this interval, take the
2301 * largest max packet size from endpoints with this
2304 packet_size = largest_mps;
2305 overhead = interval_overhead;
2307 /* Otherwise carry over packet_size and overhead from the last
2308 * time we had a remainder.
2310 bw_used += bw_added;
2311 if (bw_used > max_bandwidth) {
2312 xhci_warn(xhci, "Not enough bandwidth. "
2313 "Proposed: %u, Max: %u\n",
2314 bw_used, max_bandwidth);
2319 * Ok, we know we have some packets left over after even-handedly
2320 * scheduling interval 15. We don't know which microframes they will
2321 * fit into, so we over-schedule and say they will be scheduled every
2324 if (packets_remaining > 0)
2325 bw_used += overhead + packet_size;
2327 if (!virt_dev->tt_info && virt_dev->udev->speed == USB_SPEED_HIGH) {
2328 unsigned int port_index = virt_dev->real_port - 1;
2330 /* OK, we're manipulating a HS device attached to a
2331 * root port bandwidth domain. Include the number of active TTs
2332 * in the bandwidth used.
2334 bw_used += TT_HS_OVERHEAD *
2335 xhci->rh_bw[port_index].num_active_tts;
2338 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2339 "Final bandwidth: %u, Limit: %u, Reserved: %u, "
2340 "Available: %u " "percent",
2341 bw_used, max_bandwidth, bw_reserved,
2342 (max_bandwidth - bw_used - bw_reserved) * 100 /
2345 bw_used += bw_reserved;
2346 if (bw_used > max_bandwidth) {
2347 xhci_warn(xhci, "Not enough bandwidth. Proposed: %u, Max: %u\n",
2348 bw_used, max_bandwidth);
2352 bw_table->bw_used = bw_used;
2356 static bool xhci_is_async_ep(unsigned int ep_type)
2358 return (ep_type != ISOC_OUT_EP && ep_type != INT_OUT_EP &&
2359 ep_type != ISOC_IN_EP &&
2360 ep_type != INT_IN_EP);
2363 static bool xhci_is_sync_in_ep(unsigned int ep_type)
2365 return (ep_type == ISOC_IN_EP || ep_type == INT_IN_EP);
2368 static unsigned int xhci_get_ss_bw_consumed(struct xhci_bw_info *ep_bw)
2370 unsigned int mps = DIV_ROUND_UP(ep_bw->max_packet_size, SS_BLOCK);
2372 if (ep_bw->ep_interval == 0)
2373 return SS_OVERHEAD_BURST +
2374 (ep_bw->mult * ep_bw->num_packets *
2375 (SS_OVERHEAD + mps));
2376 return DIV_ROUND_UP(ep_bw->mult * ep_bw->num_packets *
2377 (SS_OVERHEAD + mps + SS_OVERHEAD_BURST),
2378 1 << ep_bw->ep_interval);
2382 void xhci_drop_ep_from_interval_table(struct xhci_hcd *xhci,
2383 struct xhci_bw_info *ep_bw,
2384 struct xhci_interval_bw_table *bw_table,
2385 struct usb_device *udev,
2386 struct xhci_virt_ep *virt_ep,
2387 struct xhci_tt_bw_info *tt_info)
2389 struct xhci_interval_bw *interval_bw;
2390 int normalized_interval;
2392 if (xhci_is_async_ep(ep_bw->type))
2395 if (udev->speed == USB_SPEED_SUPER) {
2396 if (xhci_is_sync_in_ep(ep_bw->type))
2397 xhci->devs[udev->slot_id]->bw_table->ss_bw_in -=
2398 xhci_get_ss_bw_consumed(ep_bw);
2400 xhci->devs[udev->slot_id]->bw_table->ss_bw_out -=
2401 xhci_get_ss_bw_consumed(ep_bw);
2405 /* SuperSpeed endpoints never get added to intervals in the table, so
2406 * this check is only valid for HS/FS/LS devices.
2408 if (list_empty(&virt_ep->bw_endpoint_list))
2410 /* For LS/FS devices, we need to translate the interval expressed in
2411 * microframes to frames.
2413 if (udev->speed == USB_SPEED_HIGH)
2414 normalized_interval = ep_bw->ep_interval;
2416 normalized_interval = ep_bw->ep_interval - 3;
2418 if (normalized_interval == 0)
2419 bw_table->interval0_esit_payload -= ep_bw->max_esit_payload;
2420 interval_bw = &bw_table->interval_bw[normalized_interval];
2421 interval_bw->num_packets -= ep_bw->num_packets;
2422 switch (udev->speed) {
2424 interval_bw->overhead[LS_OVERHEAD_TYPE] -= 1;
2426 case USB_SPEED_FULL:
2427 interval_bw->overhead[FS_OVERHEAD_TYPE] -= 1;
2429 case USB_SPEED_HIGH:
2430 interval_bw->overhead[HS_OVERHEAD_TYPE] -= 1;
2432 case USB_SPEED_SUPER:
2433 case USB_SPEED_UNKNOWN:
2434 case USB_SPEED_WIRELESS:
2435 /* Should never happen because only LS/FS/HS endpoints will get
2436 * added to the endpoint list.
2441 tt_info->active_eps -= 1;
2442 list_del_init(&virt_ep->bw_endpoint_list);
2445 static void xhci_add_ep_to_interval_table(struct xhci_hcd *xhci,
2446 struct xhci_bw_info *ep_bw,
2447 struct xhci_interval_bw_table *bw_table,
2448 struct usb_device *udev,
2449 struct xhci_virt_ep *virt_ep,
2450 struct xhci_tt_bw_info *tt_info)
2452 struct xhci_interval_bw *interval_bw;
2453 struct xhci_virt_ep *smaller_ep;
2454 int normalized_interval;
2456 if (xhci_is_async_ep(ep_bw->type))
2459 if (udev->speed == USB_SPEED_SUPER) {
2460 if (xhci_is_sync_in_ep(ep_bw->type))
2461 xhci->devs[udev->slot_id]->bw_table->ss_bw_in +=
2462 xhci_get_ss_bw_consumed(ep_bw);
2464 xhci->devs[udev->slot_id]->bw_table->ss_bw_out +=
2465 xhci_get_ss_bw_consumed(ep_bw);
2469 /* For LS/FS devices, we need to translate the interval expressed in
2470 * microframes to frames.
2472 if (udev->speed == USB_SPEED_HIGH)
2473 normalized_interval = ep_bw->ep_interval;
2475 normalized_interval = ep_bw->ep_interval - 3;
2477 if (normalized_interval == 0)
2478 bw_table->interval0_esit_payload += ep_bw->max_esit_payload;
2479 interval_bw = &bw_table->interval_bw[normalized_interval];
2480 interval_bw->num_packets += ep_bw->num_packets;
2481 switch (udev->speed) {
2483 interval_bw->overhead[LS_OVERHEAD_TYPE] += 1;
2485 case USB_SPEED_FULL:
2486 interval_bw->overhead[FS_OVERHEAD_TYPE] += 1;
2488 case USB_SPEED_HIGH:
2489 interval_bw->overhead[HS_OVERHEAD_TYPE] += 1;
2491 case USB_SPEED_SUPER:
2492 case USB_SPEED_UNKNOWN:
2493 case USB_SPEED_WIRELESS:
2494 /* Should never happen because only LS/FS/HS endpoints will get
2495 * added to the endpoint list.
2501 tt_info->active_eps += 1;
2502 /* Insert the endpoint into the list, largest max packet size first. */
2503 list_for_each_entry(smaller_ep, &interval_bw->endpoints,
2505 if (ep_bw->max_packet_size >=
2506 smaller_ep->bw_info.max_packet_size) {
2507 /* Add the new ep before the smaller endpoint */
2508 list_add_tail(&virt_ep->bw_endpoint_list,
2509 &smaller_ep->bw_endpoint_list);
2513 /* Add the new endpoint at the end of the list. */
2514 list_add_tail(&virt_ep->bw_endpoint_list,
2515 &interval_bw->endpoints);
2518 void xhci_update_tt_active_eps(struct xhci_hcd *xhci,
2519 struct xhci_virt_device *virt_dev,
2522 struct xhci_root_port_bw_info *rh_bw_info;
2523 if (!virt_dev->tt_info)
2526 rh_bw_info = &xhci->rh_bw[virt_dev->real_port - 1];
2527 if (old_active_eps == 0 &&
2528 virt_dev->tt_info->active_eps != 0) {
2529 rh_bw_info->num_active_tts += 1;
2530 rh_bw_info->bw_table.bw_used += TT_HS_OVERHEAD;
2531 } else if (old_active_eps != 0 &&
2532 virt_dev->tt_info->active_eps == 0) {
2533 rh_bw_info->num_active_tts -= 1;
2534 rh_bw_info->bw_table.bw_used -= TT_HS_OVERHEAD;
2538 static int xhci_reserve_bandwidth(struct xhci_hcd *xhci,
2539 struct xhci_virt_device *virt_dev,
2540 struct xhci_container_ctx *in_ctx)
2542 struct xhci_bw_info ep_bw_info[31];
2544 struct xhci_input_control_ctx *ctrl_ctx;
2545 int old_active_eps = 0;
2547 if (virt_dev->tt_info)
2548 old_active_eps = virt_dev->tt_info->active_eps;
2550 ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
2552 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2557 for (i = 0; i < 31; i++) {
2558 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2561 /* Make a copy of the BW info in case we need to revert this */
2562 memcpy(&ep_bw_info[i], &virt_dev->eps[i].bw_info,
2563 sizeof(ep_bw_info[i]));
2564 /* Drop the endpoint from the interval table if the endpoint is
2565 * being dropped or changed.
2567 if (EP_IS_DROPPED(ctrl_ctx, i))
2568 xhci_drop_ep_from_interval_table(xhci,
2569 &virt_dev->eps[i].bw_info,
2575 /* Overwrite the information stored in the endpoints' bw_info */
2576 xhci_update_bw_info(xhci, virt_dev->in_ctx, ctrl_ctx, virt_dev);
2577 for (i = 0; i < 31; i++) {
2578 /* Add any changed or added endpoints to the interval table */
2579 if (EP_IS_ADDED(ctrl_ctx, i))
2580 xhci_add_ep_to_interval_table(xhci,
2581 &virt_dev->eps[i].bw_info,
2588 if (!xhci_check_bw_table(xhci, virt_dev, old_active_eps)) {
2589 /* Ok, this fits in the bandwidth we have.
2590 * Update the number of active TTs.
2592 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
2596 /* We don't have enough bandwidth for this, revert the stored info. */
2597 for (i = 0; i < 31; i++) {
2598 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2601 /* Drop the new copies of any added or changed endpoints from
2602 * the interval table.
2604 if (EP_IS_ADDED(ctrl_ctx, i)) {
2605 xhci_drop_ep_from_interval_table(xhci,
2606 &virt_dev->eps[i].bw_info,
2612 /* Revert the endpoint back to its old information */
2613 memcpy(&virt_dev->eps[i].bw_info, &ep_bw_info[i],
2614 sizeof(ep_bw_info[i]));
2615 /* Add any changed or dropped endpoints back into the table */
2616 if (EP_IS_DROPPED(ctrl_ctx, i))
2617 xhci_add_ep_to_interval_table(xhci,
2618 &virt_dev->eps[i].bw_info,
2628 /* Issue a configure endpoint command or evaluate context command
2629 * and wait for it to finish.
2631 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
2632 struct usb_device *udev,
2633 struct xhci_command *command,
2634 bool ctx_change, bool must_succeed)
2637 unsigned long flags;
2638 struct xhci_input_control_ctx *ctrl_ctx;
2639 struct xhci_virt_device *virt_dev;
2644 spin_lock_irqsave(&xhci->lock, flags);
2645 virt_dev = xhci->devs[udev->slot_id];
2647 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx);
2649 spin_unlock_irqrestore(&xhci->lock, flags);
2650 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2655 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK) &&
2656 xhci_reserve_host_resources(xhci, ctrl_ctx)) {
2657 spin_unlock_irqrestore(&xhci->lock, flags);
2658 xhci_warn(xhci, "Not enough host resources, "
2659 "active endpoint contexts = %u\n",
2660 xhci->num_active_eps);
2663 if ((xhci->quirks & XHCI_SW_BW_CHECKING) &&
2664 xhci_reserve_bandwidth(xhci, virt_dev, command->in_ctx)) {
2665 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2666 xhci_free_host_resources(xhci, ctrl_ctx);
2667 spin_unlock_irqrestore(&xhci->lock, flags);
2668 xhci_warn(xhci, "Not enough bandwidth\n");
2673 ret = xhci_queue_configure_endpoint(xhci, command,
2674 command->in_ctx->dma,
2675 udev->slot_id, must_succeed);
2677 ret = xhci_queue_evaluate_context(xhci, command,
2678 command->in_ctx->dma,
2679 udev->slot_id, must_succeed);
2681 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2682 xhci_free_host_resources(xhci, ctrl_ctx);
2683 spin_unlock_irqrestore(&xhci->lock, flags);
2684 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
2685 "FIXME allocate a new ring segment");
2688 xhci_ring_cmd_db(xhci);
2689 spin_unlock_irqrestore(&xhci->lock, flags);
2691 /* Wait for the configure endpoint command to complete */
2692 wait_for_completion(command->completion);
2695 ret = xhci_configure_endpoint_result(xhci, udev,
2698 ret = xhci_evaluate_context_result(xhci, udev,
2701 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
2702 spin_lock_irqsave(&xhci->lock, flags);
2703 /* If the command failed, remove the reserved resources.
2704 * Otherwise, clean up the estimate to include dropped eps.
2707 xhci_free_host_resources(xhci, ctrl_ctx);
2709 xhci_finish_resource_reservation(xhci, ctrl_ctx);
2710 spin_unlock_irqrestore(&xhci->lock, flags);
2715 static void xhci_check_bw_drop_ep_streams(struct xhci_hcd *xhci,
2716 struct xhci_virt_device *vdev, int i)
2718 struct xhci_virt_ep *ep = &vdev->eps[i];
2720 if (ep->ep_state & EP_HAS_STREAMS) {
2721 xhci_warn(xhci, "WARN: endpoint 0x%02x has streams on set_interface, freeing streams.\n",
2722 xhci_get_endpoint_address(i));
2723 xhci_free_stream_info(xhci, ep->stream_info);
2724 ep->stream_info = NULL;
2725 ep->ep_state &= ~EP_HAS_STREAMS;
2729 /* Called after one or more calls to xhci_add_endpoint() or
2730 * xhci_drop_endpoint(). If this call fails, the USB core is expected
2731 * to call xhci_reset_bandwidth().
2733 * Since we are in the middle of changing either configuration or
2734 * installing a new alt setting, the USB core won't allow URBs to be
2735 * enqueued for any endpoint on the old config or interface. Nothing
2736 * else should be touching the xhci->devs[slot_id] structure, so we
2737 * don't need to take the xhci->lock for manipulating that.
2739 int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2743 struct xhci_hcd *xhci;
2744 struct xhci_virt_device *virt_dev;
2745 struct xhci_input_control_ctx *ctrl_ctx;
2746 struct xhci_slot_ctx *slot_ctx;
2747 struct xhci_command *command;
2749 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2752 xhci = hcd_to_xhci(hcd);
2753 if (xhci->xhc_state & XHCI_STATE_DYING)
2756 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2757 virt_dev = xhci->devs[udev->slot_id];
2759 command = xhci_alloc_command(xhci, false, true, GFP_KERNEL);
2763 command->in_ctx = virt_dev->in_ctx;
2765 /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
2766 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx);
2768 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2771 goto command_cleanup;
2773 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2774 ctrl_ctx->add_flags &= cpu_to_le32(~EP0_FLAG);
2775 ctrl_ctx->drop_flags &= cpu_to_le32(~(SLOT_FLAG | EP0_FLAG));
2777 /* Don't issue the command if there's no endpoints to update. */
2778 if (ctrl_ctx->add_flags == cpu_to_le32(SLOT_FLAG) &&
2779 ctrl_ctx->drop_flags == 0) {
2781 goto command_cleanup;
2783 /* Fix up Context Entries field. Minimum value is EP0 == BIT(1). */
2784 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
2785 for (i = 31; i >= 1; i--) {
2786 __le32 le32 = cpu_to_le32(BIT(i));
2788 if ((virt_dev->eps[i-1].ring && !(ctrl_ctx->drop_flags & le32))
2789 || (ctrl_ctx->add_flags & le32) || i == 1) {
2790 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
2791 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(i));
2795 xhci_dbg(xhci, "New Input Control Context:\n");
2796 xhci_dbg_ctx(xhci, virt_dev->in_ctx,
2797 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2799 ret = xhci_configure_endpoint(xhci, udev, command,
2802 /* Callee should call reset_bandwidth() */
2803 goto command_cleanup;
2805 xhci_dbg(xhci, "Output context after successful config ep cmd:\n");
2806 xhci_dbg_ctx(xhci, virt_dev->out_ctx,
2807 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2809 /* Free any rings that were dropped, but not changed. */
2810 for (i = 1; i < 31; ++i) {
2811 if ((le32_to_cpu(ctrl_ctx->drop_flags) & (1 << (i + 1))) &&
2812 !(le32_to_cpu(ctrl_ctx->add_flags) & (1 << (i + 1)))) {
2813 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2814 xhci_check_bw_drop_ep_streams(xhci, virt_dev, i);
2817 xhci_zero_in_ctx(xhci, virt_dev);
2819 * Install any rings for completely new endpoints or changed endpoints,
2820 * and free or cache any old rings from changed endpoints.
2822 for (i = 1; i < 31; ++i) {
2823 if (!virt_dev->eps[i].new_ring)
2825 /* Only cache or free the old ring if it exists.
2826 * It may not if this is the first add of an endpoint.
2828 if (virt_dev->eps[i].ring) {
2829 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2831 xhci_check_bw_drop_ep_streams(xhci, virt_dev, i);
2832 virt_dev->eps[i].ring = virt_dev->eps[i].new_ring;
2833 virt_dev->eps[i].new_ring = NULL;
2836 kfree(command->completion);
2842 void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2844 struct xhci_hcd *xhci;
2845 struct xhci_virt_device *virt_dev;
2848 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2851 xhci = hcd_to_xhci(hcd);
2853 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2854 virt_dev = xhci->devs[udev->slot_id];
2855 /* Free any rings allocated for added endpoints */
2856 for (i = 0; i < 31; ++i) {
2857 if (virt_dev->eps[i].new_ring) {
2858 xhci_ring_free(xhci, virt_dev->eps[i].new_ring);
2859 virt_dev->eps[i].new_ring = NULL;
2862 xhci_zero_in_ctx(xhci, virt_dev);
2865 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd *xhci,
2866 struct xhci_container_ctx *in_ctx,
2867 struct xhci_container_ctx *out_ctx,
2868 struct xhci_input_control_ctx *ctrl_ctx,
2869 u32 add_flags, u32 drop_flags)
2871 ctrl_ctx->add_flags = cpu_to_le32(add_flags);
2872 ctrl_ctx->drop_flags = cpu_to_le32(drop_flags);
2873 xhci_slot_copy(xhci, in_ctx, out_ctx);
2874 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2876 xhci_dbg(xhci, "Input Context:\n");
2877 xhci_dbg_ctx(xhci, in_ctx, xhci_last_valid_endpoint(add_flags));
2880 static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd *xhci,
2881 unsigned int slot_id, unsigned int ep_index,
2882 struct xhci_dequeue_state *deq_state)
2884 struct xhci_input_control_ctx *ctrl_ctx;
2885 struct xhci_container_ctx *in_ctx;
2886 struct xhci_ep_ctx *ep_ctx;
2890 in_ctx = xhci->devs[slot_id]->in_ctx;
2891 ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
2893 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2898 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
2899 xhci->devs[slot_id]->out_ctx, ep_index);
2900 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
2901 addr = xhci_trb_virt_to_dma(deq_state->new_deq_seg,
2902 deq_state->new_deq_ptr);
2904 xhci_warn(xhci, "WARN Cannot submit config ep after "
2905 "reset ep command\n");
2906 xhci_warn(xhci, "WARN deq seg = %p, deq ptr = %p\n",
2907 deq_state->new_deq_seg,
2908 deq_state->new_deq_ptr);
2911 ep_ctx->deq = cpu_to_le64(addr | deq_state->new_cycle_state);
2913 added_ctxs = xhci_get_endpoint_flag_from_index(ep_index);
2914 xhci_setup_input_ctx_for_config_ep(xhci, xhci->devs[slot_id]->in_ctx,
2915 xhci->devs[slot_id]->out_ctx, ctrl_ctx,
2916 added_ctxs, added_ctxs);
2919 void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci,
2920 unsigned int ep_index, struct xhci_td *td)
2922 struct xhci_dequeue_state deq_state;
2923 struct xhci_virt_ep *ep;
2924 struct usb_device *udev = td->urb->dev;
2926 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2927 "Cleaning up stalled endpoint ring");
2928 ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2929 /* We need to move the HW's dequeue pointer past this TD,
2930 * or it will attempt to resend it on the next doorbell ring.
2932 xhci_find_new_dequeue_state(xhci, udev->slot_id,
2933 ep_index, ep->stopped_stream, td, &deq_state);
2935 if (!deq_state.new_deq_ptr || !deq_state.new_deq_seg)
2938 /* HW with the reset endpoint quirk will use the saved dequeue state to
2939 * issue a configure endpoint command later.
2941 if (!(xhci->quirks & XHCI_RESET_EP_QUIRK)) {
2942 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2943 "Queueing new dequeue state");
2944 xhci_queue_new_dequeue_state(xhci, udev->slot_id,
2945 ep_index, ep->stopped_stream, &deq_state);
2947 /* Better hope no one uses the input context between now and the
2948 * reset endpoint completion!
2949 * XXX: No idea how this hardware will react when stream rings
2952 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2953 "Setting up input context for "
2954 "configure endpoint command");
2955 xhci_setup_input_ctx_for_quirk(xhci, udev->slot_id,
2956 ep_index, &deq_state);
2960 /* Called when clearing halted device. The core should have sent the control
2961 * message to clear the device halt condition. The host side of the halt should
2962 * already be cleared with a reset endpoint command issued when the STALL tx
2963 * event was received.
2965 * Context: in_interrupt
2968 void xhci_endpoint_reset(struct usb_hcd *hcd,
2969 struct usb_host_endpoint *ep)
2971 struct xhci_hcd *xhci;
2973 xhci = hcd_to_xhci(hcd);
2976 * We might need to implement the config ep cmd in xhci 4.8.1 note:
2977 * The Reset Endpoint Command may only be issued to endpoints in the
2978 * Halted state. If software wishes reset the Data Toggle or Sequence
2979 * Number of an endpoint that isn't in the Halted state, then software
2980 * may issue a Configure Endpoint Command with the Drop and Add bits set
2981 * for the target endpoint. that is in the Stopped state.
2984 /* For now just print debug to follow the situation */
2985 xhci_dbg(xhci, "Endpoint 0x%x ep reset callback called\n",
2986 ep->desc.bEndpointAddress);
2989 static int xhci_check_streams_endpoint(struct xhci_hcd *xhci,
2990 struct usb_device *udev, struct usb_host_endpoint *ep,
2991 unsigned int slot_id)
2994 unsigned int ep_index;
2995 unsigned int ep_state;
2999 ret = xhci_check_args(xhci_to_hcd(xhci), udev, ep, 1, true, __func__);
3002 if (usb_ss_max_streams(&ep->ss_ep_comp) == 0) {
3003 xhci_warn(xhci, "WARN: SuperSpeed Endpoint Companion"
3004 " descriptor for ep 0x%x does not support streams\n",
3005 ep->desc.bEndpointAddress);
3009 ep_index = xhci_get_endpoint_index(&ep->desc);
3010 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
3011 if (ep_state & EP_HAS_STREAMS ||
3012 ep_state & EP_GETTING_STREAMS) {
3013 xhci_warn(xhci, "WARN: SuperSpeed bulk endpoint 0x%x "
3014 "already has streams set up.\n",
3015 ep->desc.bEndpointAddress);
3016 xhci_warn(xhci, "Send email to xHCI maintainer and ask for "
3017 "dynamic stream context array reallocation.\n");
3020 if (!list_empty(&xhci->devs[slot_id]->eps[ep_index].ring->td_list)) {
3021 xhci_warn(xhci, "Cannot setup streams for SuperSpeed bulk "
3022 "endpoint 0x%x; URBs are pending.\n",
3023 ep->desc.bEndpointAddress);
3029 static void xhci_calculate_streams_entries(struct xhci_hcd *xhci,
3030 unsigned int *num_streams, unsigned int *num_stream_ctxs)
3032 unsigned int max_streams;
3034 /* The stream context array size must be a power of two */
3035 *num_stream_ctxs = roundup_pow_of_two(*num_streams);
3037 * Find out how many primary stream array entries the host controller
3038 * supports. Later we may use secondary stream arrays (similar to 2nd
3039 * level page entries), but that's an optional feature for xHCI host
3040 * controllers. xHCs must support at least 4 stream IDs.
3042 max_streams = HCC_MAX_PSA(xhci->hcc_params);
3043 if (*num_stream_ctxs > max_streams) {
3044 xhci_dbg(xhci, "xHCI HW only supports %u stream ctx entries.\n",
3046 *num_stream_ctxs = max_streams;
3047 *num_streams = max_streams;
3051 /* Returns an error code if one of the endpoint already has streams.
3052 * This does not change any data structures, it only checks and gathers
3055 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd *xhci,
3056 struct usb_device *udev,
3057 struct usb_host_endpoint **eps, unsigned int num_eps,
3058 unsigned int *num_streams, u32 *changed_ep_bitmask)
3060 unsigned int max_streams;
3061 unsigned int endpoint_flag;
3065 for (i = 0; i < num_eps; i++) {
3066 ret = xhci_check_streams_endpoint(xhci, udev,
3067 eps[i], udev->slot_id);
3071 max_streams = usb_ss_max_streams(&eps[i]->ss_ep_comp);
3072 if (max_streams < (*num_streams - 1)) {
3073 xhci_dbg(xhci, "Ep 0x%x only supports %u stream IDs.\n",
3074 eps[i]->desc.bEndpointAddress,
3076 *num_streams = max_streams+1;
3079 endpoint_flag = xhci_get_endpoint_flag(&eps[i]->desc);
3080 if (*changed_ep_bitmask & endpoint_flag)
3082 *changed_ep_bitmask |= endpoint_flag;
3087 static u32 xhci_calculate_no_streams_bitmask(struct xhci_hcd *xhci,
3088 struct usb_device *udev,
3089 struct usb_host_endpoint **eps, unsigned int num_eps)
3091 u32 changed_ep_bitmask = 0;
3092 unsigned int slot_id;
3093 unsigned int ep_index;
3094 unsigned int ep_state;
3097 slot_id = udev->slot_id;
3098 if (!xhci->devs[slot_id])
3101 for (i = 0; i < num_eps; i++) {
3102 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3103 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
3104 /* Are streams already being freed for the endpoint? */
3105 if (ep_state & EP_GETTING_NO_STREAMS) {
3106 xhci_warn(xhci, "WARN Can't disable streams for "
3108 "streams are being disabled already\n",
3109 eps[i]->desc.bEndpointAddress);
3112 /* Are there actually any streams to free? */
3113 if (!(ep_state & EP_HAS_STREAMS) &&
3114 !(ep_state & EP_GETTING_STREAMS)) {
3115 xhci_warn(xhci, "WARN Can't disable streams for "
3117 "streams are already disabled!\n",
3118 eps[i]->desc.bEndpointAddress);
3119 xhci_warn(xhci, "WARN xhci_free_streams() called "
3120 "with non-streams endpoint\n");
3123 changed_ep_bitmask |= xhci_get_endpoint_flag(&eps[i]->desc);
3125 return changed_ep_bitmask;
3129 * The USB device drivers use this function (through the HCD interface in USB
3130 * core) to prepare a set of bulk endpoints to use streams. Streams are used to
3131 * coordinate mass storage command queueing across multiple endpoints (basically
3132 * a stream ID == a task ID).
3134 * Setting up streams involves allocating the same size stream context array
3135 * for each endpoint and issuing a configure endpoint command for all endpoints.
3137 * Don't allow the call to succeed if one endpoint only supports one stream
3138 * (which means it doesn't support streams at all).
3140 * Drivers may get less stream IDs than they asked for, if the host controller
3141 * hardware or endpoints claim they can't support the number of requested
3144 int xhci_alloc_streams(struct usb_hcd *hcd, struct usb_device *udev,
3145 struct usb_host_endpoint **eps, unsigned int num_eps,
3146 unsigned int num_streams, gfp_t mem_flags)
3149 struct xhci_hcd *xhci;
3150 struct xhci_virt_device *vdev;
3151 struct xhci_command *config_cmd;
3152 struct xhci_input_control_ctx *ctrl_ctx;
3153 unsigned int ep_index;
3154 unsigned int num_stream_ctxs;
3155 unsigned long flags;
3156 u32 changed_ep_bitmask = 0;
3161 /* Add one to the number of streams requested to account for
3162 * stream 0 that is reserved for xHCI usage.
3165 xhci = hcd_to_xhci(hcd);
3166 xhci_dbg(xhci, "Driver wants %u stream IDs (including stream 0).\n",
3169 /* MaxPSASize value 0 (2 streams) means streams are not supported */
3170 if ((xhci->quirks & XHCI_BROKEN_STREAMS) ||
3171 HCC_MAX_PSA(xhci->hcc_params) < 4) {
3172 xhci_dbg(xhci, "xHCI controller does not support streams.\n");
3176 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
3178 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
3181 ctrl_ctx = xhci_get_input_control_ctx(config_cmd->in_ctx);
3183 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3185 xhci_free_command(xhci, config_cmd);
3189 /* Check to make sure all endpoints are not already configured for
3190 * streams. While we're at it, find the maximum number of streams that
3191 * all the endpoints will support and check for duplicate endpoints.
3193 spin_lock_irqsave(&xhci->lock, flags);
3194 ret = xhci_calculate_streams_and_bitmask(xhci, udev, eps,
3195 num_eps, &num_streams, &changed_ep_bitmask);
3197 xhci_free_command(xhci, config_cmd);
3198 spin_unlock_irqrestore(&xhci->lock, flags);
3201 if (num_streams <= 1) {
3202 xhci_warn(xhci, "WARN: endpoints can't handle "
3203 "more than one stream.\n");
3204 xhci_free_command(xhci, config_cmd);
3205 spin_unlock_irqrestore(&xhci->lock, flags);
3208 vdev = xhci->devs[udev->slot_id];
3209 /* Mark each endpoint as being in transition, so
3210 * xhci_urb_enqueue() will reject all URBs.
3212 for (i = 0; i < num_eps; i++) {
3213 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3214 vdev->eps[ep_index].ep_state |= EP_GETTING_STREAMS;
3216 spin_unlock_irqrestore(&xhci->lock, flags);
3218 /* Setup internal data structures and allocate HW data structures for
3219 * streams (but don't install the HW structures in the input context
3220 * until we're sure all memory allocation succeeded).
3222 xhci_calculate_streams_entries(xhci, &num_streams, &num_stream_ctxs);
3223 xhci_dbg(xhci, "Need %u stream ctx entries for %u stream IDs.\n",
3224 num_stream_ctxs, num_streams);
3226 for (i = 0; i < num_eps; i++) {
3227 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3228 vdev->eps[ep_index].stream_info = xhci_alloc_stream_info(xhci,
3230 num_streams, mem_flags);
3231 if (!vdev->eps[ep_index].stream_info)
3233 /* Set maxPstreams in endpoint context and update deq ptr to
3234 * point to stream context array. FIXME
3238 /* Set up the input context for a configure endpoint command. */
3239 for (i = 0; i < num_eps; i++) {
3240 struct xhci_ep_ctx *ep_ctx;
3242 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3243 ep_ctx = xhci_get_ep_ctx(xhci, config_cmd->in_ctx, ep_index);
3245 xhci_endpoint_copy(xhci, config_cmd->in_ctx,
3246 vdev->out_ctx, ep_index);
3247 xhci_setup_streams_ep_input_ctx(xhci, ep_ctx,
3248 vdev->eps[ep_index].stream_info);
3250 /* Tell the HW to drop its old copy of the endpoint context info
3251 * and add the updated copy from the input context.
3253 xhci_setup_input_ctx_for_config_ep(xhci, config_cmd->in_ctx,
3254 vdev->out_ctx, ctrl_ctx,
3255 changed_ep_bitmask, changed_ep_bitmask);
3257 /* Issue and wait for the configure endpoint command */
3258 ret = xhci_configure_endpoint(xhci, udev, config_cmd,
3261 /* xHC rejected the configure endpoint command for some reason, so we
3262 * leave the old ring intact and free our internal streams data
3268 spin_lock_irqsave(&xhci->lock, flags);
3269 for (i = 0; i < num_eps; i++) {
3270 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3271 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3272 xhci_dbg(xhci, "Slot %u ep ctx %u now has streams.\n",
3273 udev->slot_id, ep_index);
3274 vdev->eps[ep_index].ep_state |= EP_HAS_STREAMS;
3276 xhci_free_command(xhci, config_cmd);
3277 spin_unlock_irqrestore(&xhci->lock, flags);
3279 /* Subtract 1 for stream 0, which drivers can't use */
3280 return num_streams - 1;
3283 /* If it didn't work, free the streams! */
3284 for (i = 0; i < num_eps; i++) {
3285 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3286 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3287 vdev->eps[ep_index].stream_info = NULL;
3288 /* FIXME Unset maxPstreams in endpoint context and
3289 * update deq ptr to point to normal string ring.
3291 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3292 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3293 xhci_endpoint_zero(xhci, vdev, eps[i]);
3295 xhci_free_command(xhci, config_cmd);
3299 /* Transition the endpoint from using streams to being a "normal" endpoint
3302 * Modify the endpoint context state, submit a configure endpoint command,
3303 * and free all endpoint rings for streams if that completes successfully.
3305 int xhci_free_streams(struct usb_hcd *hcd, struct usb_device *udev,
3306 struct usb_host_endpoint **eps, unsigned int num_eps,
3310 struct xhci_hcd *xhci;
3311 struct xhci_virt_device *vdev;
3312 struct xhci_command *command;
3313 struct xhci_input_control_ctx *ctrl_ctx;
3314 unsigned int ep_index;
3315 unsigned long flags;
3316 u32 changed_ep_bitmask;
3318 xhci = hcd_to_xhci(hcd);
3319 vdev = xhci->devs[udev->slot_id];
3321 /* Set up a configure endpoint command to remove the streams rings */
3322 spin_lock_irqsave(&xhci->lock, flags);
3323 changed_ep_bitmask = xhci_calculate_no_streams_bitmask(xhci,
3324 udev, eps, num_eps);
3325 if (changed_ep_bitmask == 0) {
3326 spin_unlock_irqrestore(&xhci->lock, flags);
3330 /* Use the xhci_command structure from the first endpoint. We may have
3331 * allocated too many, but the driver may call xhci_free_streams() for
3332 * each endpoint it grouped into one call to xhci_alloc_streams().
3334 ep_index = xhci_get_endpoint_index(&eps[0]->desc);
3335 command = vdev->eps[ep_index].stream_info->free_streams_command;
3336 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx);
3338 spin_unlock_irqrestore(&xhci->lock, flags);
3339 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3344 for (i = 0; i < num_eps; i++) {
3345 struct xhci_ep_ctx *ep_ctx;
3347 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3348 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
3349 xhci->devs[udev->slot_id]->eps[ep_index].ep_state |=
3350 EP_GETTING_NO_STREAMS;
3352 xhci_endpoint_copy(xhci, command->in_ctx,
3353 vdev->out_ctx, ep_index);
3354 xhci_setup_no_streams_ep_input_ctx(ep_ctx,
3355 &vdev->eps[ep_index]);
3357 xhci_setup_input_ctx_for_config_ep(xhci, command->in_ctx,
3358 vdev->out_ctx, ctrl_ctx,
3359 changed_ep_bitmask, changed_ep_bitmask);
3360 spin_unlock_irqrestore(&xhci->lock, flags);
3362 /* Issue and wait for the configure endpoint command,
3363 * which must succeed.
3365 ret = xhci_configure_endpoint(xhci, udev, command,
3368 /* xHC rejected the configure endpoint command for some reason, so we
3369 * leave the streams rings intact.
3374 spin_lock_irqsave(&xhci->lock, flags);
3375 for (i = 0; i < num_eps; i++) {
3376 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3377 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3378 vdev->eps[ep_index].stream_info = NULL;
3379 /* FIXME Unset maxPstreams in endpoint context and
3380 * update deq ptr to point to normal string ring.
3382 vdev->eps[ep_index].ep_state &= ~EP_GETTING_NO_STREAMS;
3383 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3385 spin_unlock_irqrestore(&xhci->lock, flags);
3391 * Deletes endpoint resources for endpoints that were active before a Reset
3392 * Device command, or a Disable Slot command. The Reset Device command leaves
3393 * the control endpoint intact, whereas the Disable Slot command deletes it.
3395 * Must be called with xhci->lock held.
3397 void xhci_free_device_endpoint_resources(struct xhci_hcd *xhci,
3398 struct xhci_virt_device *virt_dev, bool drop_control_ep)
3401 unsigned int num_dropped_eps = 0;
3402 unsigned int drop_flags = 0;
3404 for (i = (drop_control_ep ? 0 : 1); i < 31; i++) {
3405 if (virt_dev->eps[i].ring) {
3406 drop_flags |= 1 << i;
3410 xhci->num_active_eps -= num_dropped_eps;
3411 if (num_dropped_eps)
3412 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
3413 "Dropped %u ep ctxs, flags = 0x%x, "
3415 num_dropped_eps, drop_flags,
3416 xhci->num_active_eps);
3420 * This submits a Reset Device Command, which will set the device state to 0,
3421 * set the device address to 0, and disable all the endpoints except the default
3422 * control endpoint. The USB core should come back and call
3423 * xhci_address_device(), and then re-set up the configuration. If this is
3424 * called because of a usb_reset_and_verify_device(), then the old alternate
3425 * settings will be re-installed through the normal bandwidth allocation
3428 * Wait for the Reset Device command to finish. Remove all structures
3429 * associated with the endpoints that were disabled. Clear the input device
3430 * structure? Cache the rings? Reset the control endpoint 0 max packet size?
3432 * If the virt_dev to be reset does not exist or does not match the udev,
3433 * it means the device is lost, possibly due to the xHC restore error and
3434 * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
3435 * re-allocate the device.
3437 int xhci_discover_or_reset_device(struct usb_hcd *hcd, struct usb_device *udev)
3440 unsigned long flags;
3441 struct xhci_hcd *xhci;
3442 unsigned int slot_id;
3443 struct xhci_virt_device *virt_dev;
3444 struct xhci_command *reset_device_cmd;
3445 int last_freed_endpoint;
3446 struct xhci_slot_ctx *slot_ctx;
3447 int old_active_eps = 0;
3449 ret = xhci_check_args(hcd, udev, NULL, 0, false, __func__);
3452 xhci = hcd_to_xhci(hcd);
3453 slot_id = udev->slot_id;
3454 virt_dev = xhci->devs[slot_id];
3456 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3457 "not exist. Re-allocate the device\n", slot_id);
3458 ret = xhci_alloc_dev(hcd, udev);
3465 if (virt_dev->tt_info)
3466 old_active_eps = virt_dev->tt_info->active_eps;
3468 if (virt_dev->udev != udev) {
3469 /* If the virt_dev and the udev does not match, this virt_dev
3470 * may belong to another udev.
3471 * Re-allocate the device.
3473 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3474 "not match the udev. Re-allocate the device\n",
3476 ret = xhci_alloc_dev(hcd, udev);
3483 /* If device is not setup, there is no point in resetting it */
3484 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3485 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) ==
3486 SLOT_STATE_DISABLED)
3489 xhci_dbg(xhci, "Resetting device with slot ID %u\n", slot_id);
3490 /* Allocate the command structure that holds the struct completion.
3491 * Assume we're in process context, since the normal device reset
3492 * process has to wait for the device anyway. Storage devices are
3493 * reset as part of error handling, so use GFP_NOIO instead of
3496 reset_device_cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
3497 if (!reset_device_cmd) {
3498 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
3502 /* Attempt to submit the Reset Device command to the command ring */
3503 spin_lock_irqsave(&xhci->lock, flags);
3505 ret = xhci_queue_reset_device(xhci, reset_device_cmd, slot_id);
3507 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3508 spin_unlock_irqrestore(&xhci->lock, flags);
3509 goto command_cleanup;
3511 xhci_ring_cmd_db(xhci);
3512 spin_unlock_irqrestore(&xhci->lock, flags);
3514 /* Wait for the Reset Device command to finish */
3515 wait_for_completion(reset_device_cmd->completion);
3517 /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
3518 * unless we tried to reset a slot ID that wasn't enabled,
3519 * or the device wasn't in the addressed or configured state.
3521 ret = reset_device_cmd->status;
3523 case COMP_CMD_ABORT:
3525 xhci_warn(xhci, "Timeout waiting for reset device command\n");
3527 goto command_cleanup;
3528 case COMP_EBADSLT: /* 0.95 completion code for bad slot ID */
3529 case COMP_CTX_STATE: /* 0.96 completion code for same thing */
3530 xhci_dbg(xhci, "Can't reset device (slot ID %u) in %s state\n",
3532 xhci_get_slot_state(xhci, virt_dev->out_ctx));
3533 xhci_dbg(xhci, "Not freeing device rings.\n");
3534 /* Don't treat this as an error. May change my mind later. */
3536 goto command_cleanup;
3538 xhci_dbg(xhci, "Successful reset device command.\n");
3541 if (xhci_is_vendor_info_code(xhci, ret))
3543 xhci_warn(xhci, "Unknown completion code %u for "
3544 "reset device command.\n", ret);
3546 goto command_cleanup;
3549 /* Free up host controller endpoint resources */
3550 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3551 spin_lock_irqsave(&xhci->lock, flags);
3552 /* Don't delete the default control endpoint resources */
3553 xhci_free_device_endpoint_resources(xhci, virt_dev, false);
3554 spin_unlock_irqrestore(&xhci->lock, flags);
3557 /* Everything but endpoint 0 is disabled, so free or cache the rings. */
3558 last_freed_endpoint = 1;
3559 for (i = 1; i < 31; ++i) {
3560 struct xhci_virt_ep *ep = &virt_dev->eps[i];
3562 if (ep->ep_state & EP_HAS_STREAMS) {
3563 xhci_warn(xhci, "WARN: endpoint 0x%02x has streams on device reset, freeing streams.\n",
3564 xhci_get_endpoint_address(i));
3565 xhci_free_stream_info(xhci, ep->stream_info);
3566 ep->stream_info = NULL;
3567 ep->ep_state &= ~EP_HAS_STREAMS;
3571 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
3572 last_freed_endpoint = i;
3574 if (!list_empty(&virt_dev->eps[i].bw_endpoint_list))
3575 xhci_drop_ep_from_interval_table(xhci,
3576 &virt_dev->eps[i].bw_info,
3581 xhci_clear_endpoint_bw_info(&virt_dev->eps[i].bw_info);
3583 /* If necessary, update the number of active TTs on this root port */
3584 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
3586 xhci_dbg(xhci, "Output context after successful reset device cmd:\n");
3587 xhci_dbg_ctx(xhci, virt_dev->out_ctx, last_freed_endpoint);
3591 xhci_free_command(xhci, reset_device_cmd);
3596 * At this point, the struct usb_device is about to go away, the device has
3597 * disconnected, and all traffic has been stopped and the endpoints have been
3598 * disabled. Free any HC data structures associated with that device.
3600 void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
3602 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3603 struct xhci_virt_device *virt_dev;
3604 unsigned long flags;
3607 struct xhci_command *command;
3609 command = xhci_alloc_command(xhci, false, false, GFP_KERNEL);
3613 #ifndef CONFIG_USB_DEFAULT_PERSIST
3615 * We called pm_runtime_get_noresume when the device was attached.
3616 * Decrement the counter here to allow controller to runtime suspend
3617 * if no devices remain.
3619 if (xhci->quirks & XHCI_RESET_ON_RESUME)
3620 pm_runtime_put_noidle(hcd->self.controller);
3623 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
3624 /* If the host is halted due to driver unload, we still need to free the
3627 if (ret <= 0 && ret != -ENODEV) {
3632 virt_dev = xhci->devs[udev->slot_id];
3634 /* Stop any wayward timer functions (which may grab the lock) */
3635 for (i = 0; i < 31; ++i) {
3636 virt_dev->eps[i].ep_state &= ~EP_HALT_PENDING;
3637 del_timer_sync(&virt_dev->eps[i].stop_cmd_timer);
3640 spin_lock_irqsave(&xhci->lock, flags);
3641 /* Don't disable the slot if the host controller is dead. */
3642 state = readl(&xhci->op_regs->status);
3643 if (state == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
3644 (xhci->xhc_state & XHCI_STATE_HALTED)) {
3645 xhci_free_virt_device(xhci, udev->slot_id);
3646 spin_unlock_irqrestore(&xhci->lock, flags);
3651 if (xhci_queue_slot_control(xhci, command, TRB_DISABLE_SLOT,
3653 spin_unlock_irqrestore(&xhci->lock, flags);
3654 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3657 xhci_ring_cmd_db(xhci);
3658 spin_unlock_irqrestore(&xhci->lock, flags);
3661 * Event command completion handler will free any data structures
3662 * associated with the slot. XXX Can free sleep?
3667 * Checks if we have enough host controller resources for the default control
3670 * Must be called with xhci->lock held.
3672 static int xhci_reserve_host_control_ep_resources(struct xhci_hcd *xhci)
3674 if (xhci->num_active_eps + 1 > xhci->limit_active_eps) {
3675 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
3676 "Not enough ep ctxs: "
3677 "%u active, need to add 1, limit is %u.",
3678 xhci->num_active_eps, xhci->limit_active_eps);
3681 xhci->num_active_eps += 1;
3682 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
3683 "Adding 1 ep ctx, %u now active.",
3684 xhci->num_active_eps);
3690 * Returns 0 if the xHC ran out of device slots, the Enable Slot command
3691 * timed out, or allocating memory failed. Returns 1 on success.
3693 int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
3695 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3696 unsigned long flags;
3698 struct xhci_command *command;
3700 command = xhci_alloc_command(xhci, false, false, GFP_KERNEL);
3704 /* xhci->slot_id and xhci->addr_dev are not thread-safe */
3705 mutex_lock(&xhci->mutex);
3706 spin_lock_irqsave(&xhci->lock, flags);
3707 command->completion = &xhci->addr_dev;
3708 ret = xhci_queue_slot_control(xhci, command, TRB_ENABLE_SLOT, 0);
3710 spin_unlock_irqrestore(&xhci->lock, flags);
3711 mutex_unlock(&xhci->mutex);
3712 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3716 xhci_ring_cmd_db(xhci);
3717 spin_unlock_irqrestore(&xhci->lock, flags);
3719 wait_for_completion(command->completion);
3720 slot_id = xhci->slot_id;
3721 mutex_unlock(&xhci->mutex);
3723 if (!slot_id || command->status != COMP_SUCCESS) {
3724 xhci_err(xhci, "Error while assigning device slot ID\n");
3725 xhci_err(xhci, "Max number of devices this xHCI host supports is %u.\n",
3727 readl(&xhci->cap_regs->hcs_params1)));
3732 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3733 spin_lock_irqsave(&xhci->lock, flags);
3734 ret = xhci_reserve_host_control_ep_resources(xhci);
3736 spin_unlock_irqrestore(&xhci->lock, flags);
3737 xhci_warn(xhci, "Not enough host resources, "
3738 "active endpoint contexts = %u\n",
3739 xhci->num_active_eps);
3742 spin_unlock_irqrestore(&xhci->lock, flags);
3744 /* Use GFP_NOIO, since this function can be called from
3745 * xhci_discover_or_reset_device(), which may be called as part of
3746 * mass storage driver error handling.
3748 if (!xhci_alloc_virt_device(xhci, slot_id, udev, GFP_NOIO)) {
3749 xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n");
3752 udev->slot_id = slot_id;
3754 #ifndef CONFIG_USB_DEFAULT_PERSIST
3756 * If resetting upon resume, we can't put the controller into runtime
3757 * suspend if there is a device attached.
3759 if (xhci->quirks & XHCI_RESET_ON_RESUME)
3760 pm_runtime_get_noresume(hcd->self.controller);
3765 /* Is this a LS or FS device under a HS hub? */
3766 /* Hub or peripherial? */
3770 /* Disable slot, if we can do it without mem alloc */
3771 spin_lock_irqsave(&xhci->lock, flags);
3772 command->completion = NULL;
3773 command->status = 0;
3774 if (!xhci_queue_slot_control(xhci, command, TRB_DISABLE_SLOT,
3776 xhci_ring_cmd_db(xhci);
3777 spin_unlock_irqrestore(&xhci->lock, flags);
3782 * Issue an Address Device command and optionally send a corresponding
3783 * SetAddress request to the device.
3785 static int xhci_setup_device(struct usb_hcd *hcd, struct usb_device *udev,
3786 enum xhci_setup_dev setup)
3788 const char *act = setup == SETUP_CONTEXT_ONLY ? "context" : "address";
3789 unsigned long flags;
3790 struct xhci_virt_device *virt_dev;
3792 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3793 struct xhci_slot_ctx *slot_ctx;
3794 struct xhci_input_control_ctx *ctrl_ctx;
3796 struct xhci_command *command = NULL;
3798 mutex_lock(&xhci->mutex);
3800 if (!udev->slot_id) {
3801 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3802 "Bad Slot ID %d", udev->slot_id);
3807 virt_dev = xhci->devs[udev->slot_id];
3809 if (WARN_ON(!virt_dev)) {
3811 * In plug/unplug torture test with an NEC controller,
3812 * a zero-dereference was observed once due to virt_dev = 0.
3813 * Print useful debug rather than crash if it is observed again!
3815 xhci_warn(xhci, "Virt dev invalid for slot_id 0x%x!\n",
3821 if (setup == SETUP_CONTEXT_ONLY) {
3822 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3823 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) ==
3824 SLOT_STATE_DEFAULT) {
3825 xhci_dbg(xhci, "Slot already in default state\n");
3830 command = xhci_alloc_command(xhci, false, false, GFP_KERNEL);
3836 command->in_ctx = virt_dev->in_ctx;
3837 command->completion = &xhci->addr_dev;
3839 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
3840 ctrl_ctx = xhci_get_input_control_ctx(virt_dev->in_ctx);
3842 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3848 * If this is the first Set Address since device plug-in or
3849 * virt_device realloaction after a resume with an xHCI power loss,
3850 * then set up the slot context.
3852 if (!slot_ctx->dev_info)
3853 xhci_setup_addressable_virt_dev(xhci, udev);
3854 /* Otherwise, update the control endpoint ring enqueue pointer. */
3856 xhci_copy_ep0_dequeue_into_input_ctx(xhci, udev);
3857 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG | EP0_FLAG);
3858 ctrl_ctx->drop_flags = 0;
3860 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
3861 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
3862 trace_xhci_address_ctx(xhci, virt_dev->in_ctx,
3863 le32_to_cpu(slot_ctx->dev_info) >> 27);
3865 spin_lock_irqsave(&xhci->lock, flags);
3866 ret = xhci_queue_address_device(xhci, command, virt_dev->in_ctx->dma,
3867 udev->slot_id, setup);
3869 spin_unlock_irqrestore(&xhci->lock, flags);
3870 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3871 "FIXME: allocate a command ring segment");
3874 xhci_ring_cmd_db(xhci);
3875 spin_unlock_irqrestore(&xhci->lock, flags);
3877 /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
3878 wait_for_completion(command->completion);
3880 /* FIXME: From section 4.3.4: "Software shall be responsible for timing
3881 * the SetAddress() "recovery interval" required by USB and aborting the
3882 * command on a timeout.
3884 switch (command->status) {
3885 case COMP_CMD_ABORT:
3887 xhci_warn(xhci, "Timeout while waiting for setup device command\n");
3890 case COMP_CTX_STATE:
3892 xhci_err(xhci, "Setup ERROR: setup %s command for slot %d.\n",
3893 act, udev->slot_id);
3897 dev_warn(&udev->dev, "Device not responding to setup %s.\n", act);
3901 dev_warn(&udev->dev,
3902 "ERROR: Incompatible device for setup %s command\n", act);
3906 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3907 "Successful setup %s command", act);
3911 "ERROR: unexpected setup %s command completion code 0x%x.\n",
3912 act, command->status);
3913 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
3914 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
3915 trace_xhci_address_ctx(xhci, virt_dev->out_ctx, 1);
3921 temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
3922 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3923 "Op regs DCBAA ptr = %#016llx", temp_64);
3924 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3925 "Slot ID %d dcbaa entry @%p = %#016llx",
3927 &xhci->dcbaa->dev_context_ptrs[udev->slot_id],
3928 (unsigned long long)
3929 le64_to_cpu(xhci->dcbaa->dev_context_ptrs[udev->slot_id]));
3930 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3931 "Output Context DMA address = %#08llx",
3932 (unsigned long long)virt_dev->out_ctx->dma);
3933 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
3934 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
3935 trace_xhci_address_ctx(xhci, virt_dev->in_ctx,
3936 le32_to_cpu(slot_ctx->dev_info) >> 27);
3937 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
3938 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
3940 * USB core uses address 1 for the roothubs, so we add one to the
3941 * address given back to us by the HC.
3943 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3944 trace_xhci_address_ctx(xhci, virt_dev->out_ctx,
3945 le32_to_cpu(slot_ctx->dev_info) >> 27);
3946 /* Zero the input context control for later use */
3947 ctrl_ctx->add_flags = 0;
3948 ctrl_ctx->drop_flags = 0;
3950 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3951 "Internal device address = %d",
3952 le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK);
3954 mutex_unlock(&xhci->mutex);
3959 int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
3961 return xhci_setup_device(hcd, udev, SETUP_CONTEXT_ADDRESS);
3964 int xhci_enable_device(struct usb_hcd *hcd, struct usb_device *udev)
3966 return xhci_setup_device(hcd, udev, SETUP_CONTEXT_ONLY);
3970 * Transfer the port index into real index in the HW port status
3971 * registers. Caculate offset between the port's PORTSC register
3972 * and port status base. Divide the number of per port register
3973 * to get the real index. The raw port number bases 1.
3975 int xhci_find_raw_port_number(struct usb_hcd *hcd, int port1)
3977 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3978 __le32 __iomem *base_addr = &xhci->op_regs->port_status_base;
3979 __le32 __iomem *addr;
3982 if (hcd->speed != HCD_USB3)
3983 addr = xhci->usb2_ports[port1 - 1];
3985 addr = xhci->usb3_ports[port1 - 1];
3987 raw_port = (addr - base_addr)/NUM_PORT_REGS + 1;
3992 * Issue an Evaluate Context command to change the Maximum Exit Latency in the
3993 * slot context. If that succeeds, store the new MEL in the xhci_virt_device.
3995 static int __maybe_unused xhci_change_max_exit_latency(struct xhci_hcd *xhci,
3996 struct usb_device *udev, u16 max_exit_latency)
3998 struct xhci_virt_device *virt_dev;
3999 struct xhci_command *command;
4000 struct xhci_input_control_ctx *ctrl_ctx;
4001 struct xhci_slot_ctx *slot_ctx;
4002 unsigned long flags;
4005 spin_lock_irqsave(&xhci->lock, flags);
4007 virt_dev = xhci->devs[udev->slot_id];
4010 * virt_dev might not exists yet if xHC resumed from hibernate (S4) and
4011 * xHC was re-initialized. Exit latency will be set later after
4012 * hub_port_finish_reset() is done and xhci->devs[] are re-allocated
4015 if (!virt_dev || max_exit_latency == virt_dev->current_mel) {
4016 spin_unlock_irqrestore(&xhci->lock, flags);
4020 /* Attempt to issue an Evaluate Context command to change the MEL. */
4021 command = xhci->lpm_command;
4022 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx);
4024 spin_unlock_irqrestore(&xhci->lock, flags);
4025 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
4030 xhci_slot_copy(xhci, command->in_ctx, virt_dev->out_ctx);
4031 spin_unlock_irqrestore(&xhci->lock, flags);
4033 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
4034 slot_ctx = xhci_get_slot_ctx(xhci, command->in_ctx);
4035 slot_ctx->dev_info2 &= cpu_to_le32(~((u32) MAX_EXIT));
4036 slot_ctx->dev_info2 |= cpu_to_le32(max_exit_latency);
4037 slot_ctx->dev_state = 0;
4039 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
4040 "Set up evaluate context for LPM MEL change.");
4041 xhci_dbg(xhci, "Slot %u Input Context:\n", udev->slot_id);
4042 xhci_dbg_ctx(xhci, command->in_ctx, 0);
4044 /* Issue and wait for the evaluate context command. */
4045 ret = xhci_configure_endpoint(xhci, udev, command,
4047 xhci_dbg(xhci, "Slot %u Output Context:\n", udev->slot_id);
4048 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 0);
4051 spin_lock_irqsave(&xhci->lock, flags);
4052 virt_dev->current_mel = max_exit_latency;
4053 spin_unlock_irqrestore(&xhci->lock, flags);
4060 /* BESL to HIRD Encoding array for USB2 LPM */
4061 static int xhci_besl_encoding[16] = {125, 150, 200, 300, 400, 500, 1000, 2000,
4062 3000, 4000, 5000, 6000, 7000, 8000, 9000, 10000};
4064 /* Calculate HIRD/BESL for USB2 PORTPMSC*/
4065 static int xhci_calculate_hird_besl(struct xhci_hcd *xhci,
4066 struct usb_device *udev)
4068 int u2del, besl, besl_host;
4069 int besl_device = 0;
4072 u2del = HCS_U2_LATENCY(xhci->hcs_params3);
4073 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
4075 if (field & USB_BESL_SUPPORT) {
4076 for (besl_host = 0; besl_host < 16; besl_host++) {
4077 if (xhci_besl_encoding[besl_host] >= u2del)
4080 /* Use baseline BESL value as default */
4081 if (field & USB_BESL_BASELINE_VALID)
4082 besl_device = USB_GET_BESL_BASELINE(field);
4083 else if (field & USB_BESL_DEEP_VALID)
4084 besl_device = USB_GET_BESL_DEEP(field);
4089 besl_host = (u2del - 51) / 75 + 1;
4092 besl = besl_host + besl_device;
4099 /* Calculate BESLD, L1 timeout and HIRDM for USB2 PORTHLPMC */
4100 static int xhci_calculate_usb2_hw_lpm_params(struct usb_device *udev)
4107 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
4109 /* xHCI l1 is set in steps of 256us, xHCI 1.0 section 5.4.11.2 */
4110 l1 = udev->l1_params.timeout / 256;
4112 /* device has preferred BESLD */
4113 if (field & USB_BESL_DEEP_VALID) {
4114 besld = USB_GET_BESL_DEEP(field);
4118 return PORT_BESLD(besld) | PORT_L1_TIMEOUT(l1) | PORT_HIRDM(hirdm);
4121 int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
4122 struct usb_device *udev, int enable)
4124 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4125 __le32 __iomem **port_array;
4126 __le32 __iomem *pm_addr, *hlpm_addr;
4127 u32 pm_val, hlpm_val, field;
4128 unsigned int port_num;
4129 unsigned long flags;
4130 int hird, exit_latency;
4133 if (hcd->speed == HCD_USB3 || !xhci->hw_lpm_support ||
4137 if (!udev->parent || udev->parent->parent ||
4138 udev->descriptor.bDeviceClass == USB_CLASS_HUB)
4141 if (udev->usb2_hw_lpm_capable != 1)
4144 spin_lock_irqsave(&xhci->lock, flags);
4146 port_array = xhci->usb2_ports;
4147 port_num = udev->portnum - 1;
4148 pm_addr = port_array[port_num] + PORTPMSC;
4149 pm_val = readl(pm_addr);
4150 hlpm_addr = port_array[port_num] + PORTHLPMC;
4151 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
4153 xhci_dbg(xhci, "%s port %d USB2 hardware LPM\n",
4154 enable ? "enable" : "disable", port_num + 1);
4157 /* Host supports BESL timeout instead of HIRD */
4158 if (udev->usb2_hw_lpm_besl_capable) {
4159 /* if device doesn't have a preferred BESL value use a
4160 * default one which works with mixed HIRD and BESL
4161 * systems. See XHCI_DEFAULT_BESL definition in xhci.h
4163 if ((field & USB_BESL_SUPPORT) &&
4164 (field & USB_BESL_BASELINE_VALID))
4165 hird = USB_GET_BESL_BASELINE(field);
4167 hird = udev->l1_params.besl;
4169 exit_latency = xhci_besl_encoding[hird];
4170 spin_unlock_irqrestore(&xhci->lock, flags);
4172 /* USB 3.0 code dedicate one xhci->lpm_command->in_ctx
4173 * input context for link powermanagement evaluate
4174 * context commands. It is protected by hcd->bandwidth
4175 * mutex and is shared by all devices. We need to set
4176 * the max ext latency in USB 2 BESL LPM as well, so
4177 * use the same mutex and xhci_change_max_exit_latency()
4179 mutex_lock(hcd->bandwidth_mutex);
4180 ret = xhci_change_max_exit_latency(xhci, udev,
4182 mutex_unlock(hcd->bandwidth_mutex);
4186 spin_lock_irqsave(&xhci->lock, flags);
4188 hlpm_val = xhci_calculate_usb2_hw_lpm_params(udev);
4189 writel(hlpm_val, hlpm_addr);
4193 hird = xhci_calculate_hird_besl(xhci, udev);
4196 pm_val &= ~PORT_HIRD_MASK;
4197 pm_val |= PORT_HIRD(hird) | PORT_RWE | PORT_L1DS(udev->slot_id);
4198 writel(pm_val, pm_addr);
4199 pm_val = readl(pm_addr);
4201 writel(pm_val, pm_addr);
4205 pm_val &= ~(PORT_HLE | PORT_RWE | PORT_HIRD_MASK | PORT_L1DS_MASK);
4206 writel(pm_val, pm_addr);
4209 if (udev->usb2_hw_lpm_besl_capable) {
4210 spin_unlock_irqrestore(&xhci->lock, flags);
4211 mutex_lock(hcd->bandwidth_mutex);
4212 xhci_change_max_exit_latency(xhci, udev, 0);
4213 mutex_unlock(hcd->bandwidth_mutex);
4218 spin_unlock_irqrestore(&xhci->lock, flags);
4222 /* check if a usb2 port supports a given extened capability protocol
4223 * only USB2 ports extended protocol capability values are cached.
4224 * Return 1 if capability is supported
4226 static int xhci_check_usb2_port_capability(struct xhci_hcd *xhci, int port,
4227 unsigned capability)
4229 u32 port_offset, port_count;
4232 for (i = 0; i < xhci->num_ext_caps; i++) {
4233 if (xhci->ext_caps[i] & capability) {
4234 /* port offsets starts at 1 */
4235 port_offset = XHCI_EXT_PORT_OFF(xhci->ext_caps[i]) - 1;
4236 port_count = XHCI_EXT_PORT_COUNT(xhci->ext_caps[i]);
4237 if (port >= port_offset &&
4238 port < port_offset + port_count)
4245 int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
4247 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4248 int portnum = udev->portnum - 1;
4250 if (hcd->speed == HCD_USB3 || !xhci->sw_lpm_support ||
4254 /* we only support lpm for non-hub device connected to root hub yet */
4255 if (!udev->parent || udev->parent->parent ||
4256 udev->descriptor.bDeviceClass == USB_CLASS_HUB)
4259 if (xhci->hw_lpm_support == 1 &&
4260 xhci_check_usb2_port_capability(
4261 xhci, portnum, XHCI_HLC)) {
4262 udev->usb2_hw_lpm_capable = 1;
4263 udev->l1_params.timeout = XHCI_L1_TIMEOUT;
4264 udev->l1_params.besl = XHCI_DEFAULT_BESL;
4265 if (xhci_check_usb2_port_capability(xhci, portnum,
4267 udev->usb2_hw_lpm_besl_capable = 1;
4273 /*---------------------- USB 3.0 Link PM functions ------------------------*/
4275 /* Service interval in nanoseconds = 2^(bInterval - 1) * 125us * 1000ns / 1us */
4276 static unsigned long long xhci_service_interval_to_ns(
4277 struct usb_endpoint_descriptor *desc)
4279 return (1ULL << (desc->bInterval - 1)) * 125 * 1000;
4282 static u16 xhci_get_timeout_no_hub_lpm(struct usb_device *udev,
4283 enum usb3_link_state state)
4285 unsigned long long sel;
4286 unsigned long long pel;
4287 unsigned int max_sel_pel;
4292 /* Convert SEL and PEL stored in nanoseconds to microseconds */
4293 sel = DIV_ROUND_UP(udev->u1_params.sel, 1000);
4294 pel = DIV_ROUND_UP(udev->u1_params.pel, 1000);
4295 max_sel_pel = USB3_LPM_MAX_U1_SEL_PEL;
4299 sel = DIV_ROUND_UP(udev->u2_params.sel, 1000);
4300 pel = DIV_ROUND_UP(udev->u2_params.pel, 1000);
4301 max_sel_pel = USB3_LPM_MAX_U2_SEL_PEL;
4305 dev_warn(&udev->dev, "%s: Can't get timeout for non-U1 or U2 state.\n",
4307 return USB3_LPM_DISABLED;
4310 if (sel <= max_sel_pel && pel <= max_sel_pel)
4311 return USB3_LPM_DEVICE_INITIATED;
4313 if (sel > max_sel_pel)
4314 dev_dbg(&udev->dev, "Device-initiated %s disabled "
4315 "due to long SEL %llu ms\n",
4318 dev_dbg(&udev->dev, "Device-initiated %s disabled "
4319 "due to long PEL %llu ms\n",
4321 return USB3_LPM_DISABLED;
4324 /* The U1 timeout should be the maximum of the following values:
4325 * - For control endpoints, U1 system exit latency (SEL) * 3
4326 * - For bulk endpoints, U1 SEL * 5
4327 * - For interrupt endpoints:
4328 * - Notification EPs, U1 SEL * 3
4329 * - Periodic EPs, max(105% of bInterval, U1 SEL * 2)
4330 * - For isochronous endpoints, max(105% of bInterval, U1 SEL * 2)
4332 static unsigned long long xhci_calculate_intel_u1_timeout(
4333 struct usb_device *udev,
4334 struct usb_endpoint_descriptor *desc)
4336 unsigned long long timeout_ns;
4340 ep_type = usb_endpoint_type(desc);
4342 case USB_ENDPOINT_XFER_CONTROL:
4343 timeout_ns = udev->u1_params.sel * 3;
4345 case USB_ENDPOINT_XFER_BULK:
4346 timeout_ns = udev->u1_params.sel * 5;
4348 case USB_ENDPOINT_XFER_INT:
4349 intr_type = usb_endpoint_interrupt_type(desc);
4350 if (intr_type == USB_ENDPOINT_INTR_NOTIFICATION) {
4351 timeout_ns = udev->u1_params.sel * 3;
4354 /* Otherwise the calculation is the same as isoc eps */
4355 case USB_ENDPOINT_XFER_ISOC:
4356 timeout_ns = xhci_service_interval_to_ns(desc);
4357 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns * 105, 100);
4358 if (timeout_ns < udev->u1_params.sel * 2)
4359 timeout_ns = udev->u1_params.sel * 2;
4368 /* Returns the hub-encoded U1 timeout value. */
4369 static u16 xhci_calculate_u1_timeout(struct xhci_hcd *xhci,
4370 struct usb_device *udev,
4371 struct usb_endpoint_descriptor *desc)
4373 unsigned long long timeout_ns;
4375 if (xhci->quirks & XHCI_INTEL_HOST)
4376 timeout_ns = xhci_calculate_intel_u1_timeout(udev, desc);
4378 timeout_ns = udev->u1_params.sel;
4380 /* The U1 timeout is encoded in 1us intervals.
4381 * Don't return a timeout of zero, because that's USB3_LPM_DISABLED.
4383 if (timeout_ns == USB3_LPM_DISABLED)
4386 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns, 1000);
4388 /* If the necessary timeout value is bigger than what we can set in the
4389 * USB 3.0 hub, we have to disable hub-initiated U1.
4391 if (timeout_ns <= USB3_LPM_U1_MAX_TIMEOUT)
4393 dev_dbg(&udev->dev, "Hub-initiated U1 disabled "
4394 "due to long timeout %llu ms\n", timeout_ns);
4395 return xhci_get_timeout_no_hub_lpm(udev, USB3_LPM_U1);
4398 /* The U2 timeout should be the maximum of:
4399 * - 10 ms (to avoid the bandwidth impact on the scheduler)
4400 * - largest bInterval of any active periodic endpoint (to avoid going
4401 * into lower power link states between intervals).
4402 * - the U2 Exit Latency of the device
4404 static unsigned long long xhci_calculate_intel_u2_timeout(
4405 struct usb_device *udev,
4406 struct usb_endpoint_descriptor *desc)
4408 unsigned long long timeout_ns;
4409 unsigned long long u2_del_ns;
4411 timeout_ns = 10 * 1000 * 1000;
4413 if ((usb_endpoint_xfer_int(desc) || usb_endpoint_xfer_isoc(desc)) &&
4414 (xhci_service_interval_to_ns(desc) > timeout_ns))
4415 timeout_ns = xhci_service_interval_to_ns(desc);
4417 u2_del_ns = le16_to_cpu(udev->bos->ss_cap->bU2DevExitLat) * 1000ULL;
4418 if (u2_del_ns > timeout_ns)
4419 timeout_ns = u2_del_ns;
4424 /* Returns the hub-encoded U2 timeout value. */
4425 static u16 xhci_calculate_u2_timeout(struct xhci_hcd *xhci,
4426 struct usb_device *udev,
4427 struct usb_endpoint_descriptor *desc)
4429 unsigned long long timeout_ns;
4431 if (xhci->quirks & XHCI_INTEL_HOST)
4432 timeout_ns = xhci_calculate_intel_u2_timeout(udev, desc);
4434 timeout_ns = udev->u2_params.sel;
4436 /* The U2 timeout is encoded in 256us intervals */
4437 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns, 256 * 1000);
4438 /* If the necessary timeout value is bigger than what we can set in the
4439 * USB 3.0 hub, we have to disable hub-initiated U2.
4441 if (timeout_ns <= USB3_LPM_U2_MAX_TIMEOUT)
4443 dev_dbg(&udev->dev, "Hub-initiated U2 disabled "
4444 "due to long timeout %llu ms\n", timeout_ns);
4445 return xhci_get_timeout_no_hub_lpm(udev, USB3_LPM_U2);
4448 static u16 xhci_call_host_update_timeout_for_endpoint(struct xhci_hcd *xhci,
4449 struct usb_device *udev,
4450 struct usb_endpoint_descriptor *desc,
4451 enum usb3_link_state state,
4454 if (state == USB3_LPM_U1)
4455 return xhci_calculate_u1_timeout(xhci, udev, desc);
4456 else if (state == USB3_LPM_U2)
4457 return xhci_calculate_u2_timeout(xhci, udev, desc);
4459 return USB3_LPM_DISABLED;
4462 static int xhci_update_timeout_for_endpoint(struct xhci_hcd *xhci,
4463 struct usb_device *udev,
4464 struct usb_endpoint_descriptor *desc,
4465 enum usb3_link_state state,
4470 alt_timeout = xhci_call_host_update_timeout_for_endpoint(xhci, udev,
4471 desc, state, timeout);
4473 /* If we found we can't enable hub-initiated LPM, or
4474 * the U1 or U2 exit latency was too high to allow
4475 * device-initiated LPM as well, just stop searching.
4477 if (alt_timeout == USB3_LPM_DISABLED ||
4478 alt_timeout == USB3_LPM_DEVICE_INITIATED) {
4479 *timeout = alt_timeout;
4482 if (alt_timeout > *timeout)
4483 *timeout = alt_timeout;
4487 static int xhci_update_timeout_for_interface(struct xhci_hcd *xhci,
4488 struct usb_device *udev,
4489 struct usb_host_interface *alt,
4490 enum usb3_link_state state,
4495 for (j = 0; j < alt->desc.bNumEndpoints; j++) {
4496 if (xhci_update_timeout_for_endpoint(xhci, udev,
4497 &alt->endpoint[j].desc, state, timeout))
4504 static int xhci_check_intel_tier_policy(struct usb_device *udev,
4505 enum usb3_link_state state)
4507 struct usb_device *parent;
4508 unsigned int num_hubs;
4510 if (state == USB3_LPM_U2)
4513 /* Don't enable U1 if the device is on a 2nd tier hub or lower. */
4514 for (parent = udev->parent, num_hubs = 0; parent->parent;
4515 parent = parent->parent)
4521 dev_dbg(&udev->dev, "Disabling U1 link state for device"
4522 " below second-tier hub.\n");
4523 dev_dbg(&udev->dev, "Plug device into first-tier hub "
4524 "to decrease power consumption.\n");
4528 static int xhci_check_tier_policy(struct xhci_hcd *xhci,
4529 struct usb_device *udev,
4530 enum usb3_link_state state)
4532 if (xhci->quirks & XHCI_INTEL_HOST)
4533 return xhci_check_intel_tier_policy(udev, state);
4538 /* Returns the U1 or U2 timeout that should be enabled.
4539 * If the tier check or timeout setting functions return with a non-zero exit
4540 * code, that means the timeout value has been finalized and we shouldn't look
4541 * at any more endpoints.
4543 static u16 xhci_calculate_lpm_timeout(struct usb_hcd *hcd,
4544 struct usb_device *udev, enum usb3_link_state state)
4546 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4547 struct usb_host_config *config;
4550 u16 timeout = USB3_LPM_DISABLED;
4552 if (state == USB3_LPM_U1)
4554 else if (state == USB3_LPM_U2)
4557 dev_warn(&udev->dev, "Can't enable unknown link state %i\n",
4562 if (xhci_check_tier_policy(xhci, udev, state) < 0)
4565 /* Gather some information about the currently installed configuration
4566 * and alternate interface settings.
4568 if (xhci_update_timeout_for_endpoint(xhci, udev, &udev->ep0.desc,
4572 config = udev->actconfig;
4576 for (i = 0; i < config->desc.bNumInterfaces; i++) {
4577 struct usb_driver *driver;
4578 struct usb_interface *intf = config->interface[i];
4583 /* Check if any currently bound drivers want hub-initiated LPM
4586 if (intf->dev.driver) {
4587 driver = to_usb_driver(intf->dev.driver);
4588 if (driver && driver->disable_hub_initiated_lpm) {
4589 dev_dbg(&udev->dev, "Hub-initiated %s disabled "
4590 "at request of driver %s\n",
4591 state_name, driver->name);
4592 return xhci_get_timeout_no_hub_lpm(udev, state);
4596 /* Not sure how this could happen... */
4597 if (!intf->cur_altsetting)
4600 if (xhci_update_timeout_for_interface(xhci, udev,
4601 intf->cur_altsetting,
4608 static int calculate_max_exit_latency(struct usb_device *udev,
4609 enum usb3_link_state state_changed,
4610 u16 hub_encoded_timeout)
4612 unsigned long long u1_mel_us = 0;
4613 unsigned long long u2_mel_us = 0;
4614 unsigned long long mel_us = 0;
4620 disabling_u1 = (state_changed == USB3_LPM_U1 &&
4621 hub_encoded_timeout == USB3_LPM_DISABLED);
4622 disabling_u2 = (state_changed == USB3_LPM_U2 &&
4623 hub_encoded_timeout == USB3_LPM_DISABLED);
4625 enabling_u1 = (state_changed == USB3_LPM_U1 &&
4626 hub_encoded_timeout != USB3_LPM_DISABLED);
4627 enabling_u2 = (state_changed == USB3_LPM_U2 &&
4628 hub_encoded_timeout != USB3_LPM_DISABLED);
4630 /* If U1 was already enabled and we're not disabling it,
4631 * or we're going to enable U1, account for the U1 max exit latency.
4633 if ((udev->u1_params.timeout != USB3_LPM_DISABLED && !disabling_u1) ||
4635 u1_mel_us = DIV_ROUND_UP(udev->u1_params.mel, 1000);
4636 if ((udev->u2_params.timeout != USB3_LPM_DISABLED && !disabling_u2) ||
4638 u2_mel_us = DIV_ROUND_UP(udev->u2_params.mel, 1000);
4640 if (u1_mel_us > u2_mel_us)
4644 /* xHCI host controller max exit latency field is only 16 bits wide. */
4645 if (mel_us > MAX_EXIT) {
4646 dev_warn(&udev->dev, "Link PM max exit latency of %lluus "
4647 "is too big.\n", mel_us);
4653 /* Returns the USB3 hub-encoded value for the U1/U2 timeout. */
4654 int xhci_enable_usb3_lpm_timeout(struct usb_hcd *hcd,
4655 struct usb_device *udev, enum usb3_link_state state)
4657 struct xhci_hcd *xhci;
4658 u16 hub_encoded_timeout;
4662 xhci = hcd_to_xhci(hcd);
4663 /* The LPM timeout values are pretty host-controller specific, so don't
4664 * enable hub-initiated timeouts unless the vendor has provided
4665 * information about their timeout algorithm.
4667 if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) ||
4668 !xhci->devs[udev->slot_id])
4669 return USB3_LPM_DISABLED;
4671 hub_encoded_timeout = xhci_calculate_lpm_timeout(hcd, udev, state);
4672 mel = calculate_max_exit_latency(udev, state, hub_encoded_timeout);
4674 /* Max Exit Latency is too big, disable LPM. */
4675 hub_encoded_timeout = USB3_LPM_DISABLED;
4679 ret = xhci_change_max_exit_latency(xhci, udev, mel);
4682 return hub_encoded_timeout;
4685 int xhci_disable_usb3_lpm_timeout(struct usb_hcd *hcd,
4686 struct usb_device *udev, enum usb3_link_state state)
4688 struct xhci_hcd *xhci;
4691 xhci = hcd_to_xhci(hcd);
4692 if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) ||
4693 !xhci->devs[udev->slot_id])
4696 mel = calculate_max_exit_latency(udev, state, USB3_LPM_DISABLED);
4697 return xhci_change_max_exit_latency(xhci, udev, mel);
4699 #else /* CONFIG_PM */
4701 int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
4702 struct usb_device *udev, int enable)
4707 int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
4712 int xhci_enable_usb3_lpm_timeout(struct usb_hcd *hcd,
4713 struct usb_device *udev, enum usb3_link_state state)
4715 return USB3_LPM_DISABLED;
4718 int xhci_disable_usb3_lpm_timeout(struct usb_hcd *hcd,
4719 struct usb_device *udev, enum usb3_link_state state)
4723 #endif /* CONFIG_PM */
4725 /*-------------------------------------------------------------------------*/
4727 /* Once a hub descriptor is fetched for a device, we need to update the xHC's
4728 * internal data structures for the device.
4730 int xhci_update_hub_device(struct usb_hcd *hcd, struct usb_device *hdev,
4731 struct usb_tt *tt, gfp_t mem_flags)
4733 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4734 struct xhci_virt_device *vdev;
4735 struct xhci_command *config_cmd;
4736 struct xhci_input_control_ctx *ctrl_ctx;
4737 struct xhci_slot_ctx *slot_ctx;
4738 unsigned long flags;
4739 unsigned think_time;
4742 /* Ignore root hubs */
4746 vdev = xhci->devs[hdev->slot_id];
4748 xhci_warn(xhci, "Cannot update hub desc for unknown device.\n");
4751 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
4753 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
4756 ctrl_ctx = xhci_get_input_control_ctx(config_cmd->in_ctx);
4758 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
4760 xhci_free_command(xhci, config_cmd);
4764 spin_lock_irqsave(&xhci->lock, flags);
4765 if (hdev->speed == USB_SPEED_HIGH &&
4766 xhci_alloc_tt_info(xhci, vdev, hdev, tt, GFP_ATOMIC)) {
4767 xhci_dbg(xhci, "Could not allocate xHCI TT structure.\n");
4768 xhci_free_command(xhci, config_cmd);
4769 spin_unlock_irqrestore(&xhci->lock, flags);
4773 xhci_slot_copy(xhci, config_cmd->in_ctx, vdev->out_ctx);
4774 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
4775 slot_ctx = xhci_get_slot_ctx(xhci, config_cmd->in_ctx);
4776 slot_ctx->dev_info |= cpu_to_le32(DEV_HUB);
4778 slot_ctx->dev_info |= cpu_to_le32(DEV_MTT);
4779 if (xhci->hci_version > 0x95) {
4780 xhci_dbg(xhci, "xHCI version %x needs hub "
4781 "TT think time and number of ports\n",
4782 (unsigned int) xhci->hci_version);
4783 slot_ctx->dev_info2 |= cpu_to_le32(XHCI_MAX_PORTS(hdev->maxchild));
4784 /* Set TT think time - convert from ns to FS bit times.
4785 * 0 = 8 FS bit times, 1 = 16 FS bit times,
4786 * 2 = 24 FS bit times, 3 = 32 FS bit times.
4788 * xHCI 1.0: this field shall be 0 if the device is not a
4791 think_time = tt->think_time;
4792 if (think_time != 0)
4793 think_time = (think_time / 666) - 1;
4794 if (xhci->hci_version < 0x100 || hdev->speed == USB_SPEED_HIGH)
4795 slot_ctx->tt_info |=
4796 cpu_to_le32(TT_THINK_TIME(think_time));
4798 xhci_dbg(xhci, "xHCI version %x doesn't need hub "
4799 "TT think time or number of ports\n",
4800 (unsigned int) xhci->hci_version);
4802 slot_ctx->dev_state = 0;
4803 spin_unlock_irqrestore(&xhci->lock, flags);
4805 xhci_dbg(xhci, "Set up %s for hub device.\n",
4806 (xhci->hci_version > 0x95) ?
4807 "configure endpoint" : "evaluate context");
4808 xhci_dbg(xhci, "Slot %u Input Context:\n", hdev->slot_id);
4809 xhci_dbg_ctx(xhci, config_cmd->in_ctx, 0);
4811 /* Issue and wait for the configure endpoint or
4812 * evaluate context command.
4814 if (xhci->hci_version > 0x95)
4815 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
4818 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
4821 xhci_dbg(xhci, "Slot %u Output Context:\n", hdev->slot_id);
4822 xhci_dbg_ctx(xhci, vdev->out_ctx, 0);
4824 xhci_free_command(xhci, config_cmd);
4828 int xhci_get_frame(struct usb_hcd *hcd)
4830 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4831 /* EHCI mods by the periodic size. Why? */
4832 return readl(&xhci->run_regs->microframe_index) >> 3;
4835 int xhci_gen_setup(struct usb_hcd *hcd, xhci_get_quirks_t get_quirks)
4837 struct xhci_hcd *xhci;
4838 struct device *dev = hcd->self.controller;
4841 /* Accept arbitrarily long scatter-gather lists */
4842 hcd->self.sg_tablesize = ~0;
4844 /* support to build packet from discontinuous buffers */
4845 hcd->self.no_sg_constraint = 1;
4847 /* XHCI controllers don't stop the ep queue on short packets :| */
4848 hcd->self.no_stop_on_short = 1;
4850 if (usb_hcd_is_primary_hcd(hcd)) {
4851 xhci = hcd_to_xhci(hcd);
4852 xhci->main_hcd = hcd;
4853 /* Mark the first roothub as being USB 2.0.
4854 * The xHCI driver will register the USB 3.0 roothub.
4856 hcd->speed = HCD_USB2;
4857 hcd->self.root_hub->speed = USB_SPEED_HIGH;
4859 * USB 2.0 roothub under xHCI has an integrated TT,
4860 * (rate matching hub) as opposed to having an OHCI/UHCI
4861 * companion controller.
4865 /* xHCI private pointer was set in xhci_pci_probe for the second
4866 * registered roothub.
4871 mutex_init(&xhci->mutex);
4872 xhci->cap_regs = hcd->regs;
4873 xhci->op_regs = hcd->regs +
4874 HC_LENGTH(readl(&xhci->cap_regs->hc_capbase));
4875 xhci->run_regs = hcd->regs +
4876 (readl(&xhci->cap_regs->run_regs_off) & RTSOFF_MASK);
4877 /* Cache read-only capability registers */
4878 xhci->hcs_params1 = readl(&xhci->cap_regs->hcs_params1);
4879 xhci->hcs_params2 = readl(&xhci->cap_regs->hcs_params2);
4880 xhci->hcs_params3 = readl(&xhci->cap_regs->hcs_params3);
4881 xhci->hcc_params = readl(&xhci->cap_regs->hc_capbase);
4882 xhci->hci_version = HC_VERSION(xhci->hcc_params);
4883 xhci->hcc_params = readl(&xhci->cap_regs->hcc_params);
4884 xhci_print_registers(xhci);
4886 xhci->quirks = quirks;
4888 get_quirks(dev, xhci);
4890 /* In xhci controllers which follow xhci 1.0 spec gives a spurious
4891 * success event after a short transfer. This quirk will ignore such
4894 if (xhci->hci_version > 0x96)
4895 xhci->quirks |= XHCI_SPURIOUS_SUCCESS;
4897 /* Make sure the HC is halted. */
4898 retval = xhci_halt(xhci);
4902 xhci_dbg(xhci, "Resetting HCD\n");
4903 /* Reset the internal HC memory state and registers. */
4904 retval = xhci_reset(xhci);
4907 xhci_dbg(xhci, "Reset complete\n");
4909 /* Set dma_mask and coherent_dma_mask to 64-bits,
4910 * if xHC supports 64-bit addressing */
4911 if (HCC_64BIT_ADDR(xhci->hcc_params) &&
4912 !dma_set_mask(dev, DMA_BIT_MASK(64))) {
4913 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
4914 dma_set_coherent_mask(dev, DMA_BIT_MASK(64));
4917 xhci_dbg(xhci, "Calling HCD init\n");
4918 /* Initialize HCD and host controller data structures. */
4919 retval = xhci_init(hcd);
4922 xhci_dbg(xhci, "Called HCD init\n");
4924 xhci_info(xhci, "hcc params 0x%08x hci version 0x%x quirks 0x%08x\n",
4925 xhci->hcc_params, xhci->hci_version, xhci->quirks);
4929 EXPORT_SYMBOL_GPL(xhci_gen_setup);
4931 static const struct hc_driver xhci_hc_driver = {
4932 .description = "xhci-hcd",
4933 .product_desc = "xHCI Host Controller",
4934 .hcd_priv_size = sizeof(struct xhci_hcd *),
4937 * generic hardware linkage
4940 .flags = HCD_MEMORY | HCD_USB3 | HCD_SHARED,
4943 * basic lifecycle operations
4945 .reset = NULL, /* set in xhci_init_driver() */
4948 .shutdown = xhci_shutdown,
4951 * managing i/o requests and associated device resources
4953 .urb_enqueue = xhci_urb_enqueue,
4954 .urb_dequeue = xhci_urb_dequeue,
4955 .alloc_dev = xhci_alloc_dev,
4956 .free_dev = xhci_free_dev,
4957 .alloc_streams = xhci_alloc_streams,
4958 .free_streams = xhci_free_streams,
4959 .add_endpoint = xhci_add_endpoint,
4960 .drop_endpoint = xhci_drop_endpoint,
4961 .endpoint_reset = xhci_endpoint_reset,
4962 .check_bandwidth = xhci_check_bandwidth,
4963 .reset_bandwidth = xhci_reset_bandwidth,
4964 .address_device = xhci_address_device,
4965 .enable_device = xhci_enable_device,
4966 .update_hub_device = xhci_update_hub_device,
4967 .reset_device = xhci_discover_or_reset_device,
4970 * scheduling support
4972 .get_frame_number = xhci_get_frame,
4977 .hub_control = xhci_hub_control,
4978 .hub_status_data = xhci_hub_status_data,
4979 .bus_suspend = xhci_bus_suspend,
4980 .bus_resume = xhci_bus_resume,
4983 * call back when device connected and addressed
4985 .update_device = xhci_update_device,
4986 .set_usb2_hw_lpm = xhci_set_usb2_hardware_lpm,
4987 .enable_usb3_lpm_timeout = xhci_enable_usb3_lpm_timeout,
4988 .disable_usb3_lpm_timeout = xhci_disable_usb3_lpm_timeout,
4989 .find_raw_port_number = xhci_find_raw_port_number,
4992 void xhci_init_driver(struct hc_driver *drv,
4993 const struct xhci_driver_overrides *over)
4997 /* Copy the generic table to drv then apply the overrides */
4998 *drv = xhci_hc_driver;
5001 drv->hcd_priv_size += over->extra_priv_size;
5003 drv->reset = over->reset;
5005 drv->start = over->start;
5008 EXPORT_SYMBOL_GPL(xhci_init_driver);
5010 MODULE_DESCRIPTION(DRIVER_DESC);
5011 MODULE_AUTHOR(DRIVER_AUTHOR);
5012 MODULE_LICENSE("GPL");
5014 static int __init xhci_hcd_init(void)
5017 * Check the compiler generated sizes of structures that must be laid
5018 * out in specific ways for hardware access.
5020 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
5021 BUILD_BUG_ON(sizeof(struct xhci_slot_ctx) != 8*32/8);
5022 BUILD_BUG_ON(sizeof(struct xhci_ep_ctx) != 8*32/8);
5023 /* xhci_device_control has eight fields, and also
5024 * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
5026 BUILD_BUG_ON(sizeof(struct xhci_stream_ctx) != 4*32/8);
5027 BUILD_BUG_ON(sizeof(union xhci_trb) != 4*32/8);
5028 BUILD_BUG_ON(sizeof(struct xhci_erst_entry) != 4*32/8);
5029 BUILD_BUG_ON(sizeof(struct xhci_cap_regs) != 7*32/8);
5030 BUILD_BUG_ON(sizeof(struct xhci_intr_reg) != 8*32/8);
5031 /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
5032 BUILD_BUG_ON(sizeof(struct xhci_run_regs) != (8+8*128)*32/8);
5037 * If an init function is provided, an exit function must also be provided
5038 * to allow module unload.
5040 static void __exit xhci_hcd_fini(void) { }
5042 module_init(xhci_hcd_init);
5043 module_exit(xhci_hcd_fini);