2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/pci.h>
24 #include <linux/irq.h>
25 #include <linux/log2.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/slab.h>
29 #include <linux/dmi.h>
33 #define DRIVER_AUTHOR "Sarah Sharp"
34 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
36 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
37 static int link_quirk;
38 module_param(link_quirk, int, S_IRUGO | S_IWUSR);
39 MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB");
41 /* TODO: copied from ehci-hcd.c - can this be refactored? */
43 * xhci_handshake - spin reading hc until handshake completes or fails
44 * @ptr: address of hc register to be read
45 * @mask: bits to look at in result of read
46 * @done: value of those bits when handshake succeeds
47 * @usec: timeout in microseconds
49 * Returns negative errno, or zero on success
51 * Success happens when the "mask" bits have the specified value (hardware
52 * handshake done). There are two failure modes: "usec" have passed (major
53 * hardware flakeout), or the register reads as all-ones (hardware removed).
55 int xhci_handshake(struct xhci_hcd *xhci, void __iomem *ptr,
56 u32 mask, u32 done, int usec)
61 result = xhci_readl(xhci, ptr);
62 if (result == ~(u32)0) /* card removed */
74 * Disable interrupts and begin the xHCI halting process.
76 void xhci_quiesce(struct xhci_hcd *xhci)
83 halted = xhci_readl(xhci, &xhci->op_regs->status) & STS_HALT;
87 cmd = xhci_readl(xhci, &xhci->op_regs->command);
89 xhci_writel(xhci, cmd, &xhci->op_regs->command);
93 * Force HC into halt state.
95 * Disable any IRQs and clear the run/stop bit.
96 * HC will complete any current and actively pipelined transactions, and
97 * should halt within 16 ms of the run/stop bit being cleared.
98 * Read HC Halted bit in the status register to see when the HC is finished.
100 int xhci_halt(struct xhci_hcd *xhci)
103 xhci_dbg(xhci, "// Halt the HC\n");
106 ret = xhci_handshake(xhci, &xhci->op_regs->status,
107 STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
109 xhci->xhc_state |= XHCI_STATE_HALTED;
110 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
112 xhci_warn(xhci, "Host not halted after %u microseconds.\n",
118 * Set the run bit and wait for the host to be running.
120 static int xhci_start(struct xhci_hcd *xhci)
125 temp = xhci_readl(xhci, &xhci->op_regs->command);
127 xhci_dbg(xhci, "// Turn on HC, cmd = 0x%x.\n",
129 xhci_writel(xhci, temp, &xhci->op_regs->command);
132 * Wait for the HCHalted Status bit to be 0 to indicate the host is
135 ret = xhci_handshake(xhci, &xhci->op_regs->status,
136 STS_HALT, 0, XHCI_MAX_HALT_USEC);
137 if (ret == -ETIMEDOUT)
138 xhci_err(xhci, "Host took too long to start, "
139 "waited %u microseconds.\n",
142 xhci->xhc_state &= ~XHCI_STATE_HALTED;
149 * This resets pipelines, timers, counters, state machines, etc.
150 * Transactions will be terminated immediately, and operational registers
151 * will be set to their defaults.
153 int xhci_reset(struct xhci_hcd *xhci)
159 state = xhci_readl(xhci, &xhci->op_regs->status);
160 if ((state & STS_HALT) == 0) {
161 xhci_warn(xhci, "Host controller not halted, aborting reset.\n");
165 xhci_dbg(xhci, "// Reset the HC\n");
166 command = xhci_readl(xhci, &xhci->op_regs->command);
167 command |= CMD_RESET;
168 xhci_writel(xhci, command, &xhci->op_regs->command);
170 ret = xhci_handshake(xhci, &xhci->op_regs->command,
171 CMD_RESET, 0, 10 * 1000 * 1000);
175 xhci_dbg(xhci, "Wait for controller to be ready for doorbell rings\n");
177 * xHCI cannot write to any doorbells or operational registers other
178 * than status until the "Controller Not Ready" flag is cleared.
180 ret = xhci_handshake(xhci, &xhci->op_regs->status,
181 STS_CNR, 0, 10 * 1000 * 1000);
183 for (i = 0; i < 2; ++i) {
184 xhci->bus_state[i].port_c_suspend = 0;
185 xhci->bus_state[i].suspended_ports = 0;
186 xhci->bus_state[i].resuming_ports = 0;
193 static int xhci_free_msi(struct xhci_hcd *xhci)
197 if (!xhci->msix_entries)
200 for (i = 0; i < xhci->msix_count; i++)
201 if (xhci->msix_entries[i].vector)
202 free_irq(xhci->msix_entries[i].vector,
210 static int xhci_setup_msi(struct xhci_hcd *xhci)
213 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
215 ret = pci_enable_msi(pdev);
217 xhci_dbg(xhci, "failed to allocate MSI entry\n");
221 ret = request_irq(pdev->irq, (irq_handler_t)xhci_msi_irq,
222 0, "xhci_hcd", xhci_to_hcd(xhci));
224 xhci_dbg(xhci, "disable MSI interrupt\n");
225 pci_disable_msi(pdev);
233 * free all IRQs request
235 static void xhci_free_irq(struct xhci_hcd *xhci)
237 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
240 /* return if using legacy interrupt */
241 if (xhci_to_hcd(xhci)->irq > 0)
244 ret = xhci_free_msi(xhci);
248 free_irq(pdev->irq, xhci_to_hcd(xhci));
256 static int xhci_setup_msix(struct xhci_hcd *xhci)
259 struct usb_hcd *hcd = xhci_to_hcd(xhci);
260 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
263 * calculate number of msi-x vectors supported.
264 * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
265 * with max number of interrupters based on the xhci HCSPARAMS1.
266 * - num_online_cpus: maximum msi-x vectors per CPUs core.
267 * Add additional 1 vector to ensure always available interrupt.
269 xhci->msix_count = min(num_online_cpus() + 1,
270 HCS_MAX_INTRS(xhci->hcs_params1));
273 kmalloc((sizeof(struct msix_entry))*xhci->msix_count,
275 if (!xhci->msix_entries) {
276 xhci_err(xhci, "Failed to allocate MSI-X entries\n");
280 for (i = 0; i < xhci->msix_count; i++) {
281 xhci->msix_entries[i].entry = i;
282 xhci->msix_entries[i].vector = 0;
285 ret = pci_enable_msix(pdev, xhci->msix_entries, xhci->msix_count);
287 xhci_dbg(xhci, "Failed to enable MSI-X\n");
291 for (i = 0; i < xhci->msix_count; i++) {
292 ret = request_irq(xhci->msix_entries[i].vector,
293 (irq_handler_t)xhci_msi_irq,
294 0, "xhci_hcd", xhci_to_hcd(xhci));
299 hcd->msix_enabled = 1;
303 xhci_dbg(xhci, "disable MSI-X interrupt\n");
305 pci_disable_msix(pdev);
307 kfree(xhci->msix_entries);
308 xhci->msix_entries = NULL;
312 /* Free any IRQs and disable MSI-X */
313 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
315 struct usb_hcd *hcd = xhci_to_hcd(xhci);
316 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
320 if (xhci->msix_entries) {
321 pci_disable_msix(pdev);
322 kfree(xhci->msix_entries);
323 xhci->msix_entries = NULL;
325 pci_disable_msi(pdev);
328 hcd->msix_enabled = 0;
332 static void xhci_msix_sync_irqs(struct xhci_hcd *xhci)
336 if (xhci->msix_entries) {
337 for (i = 0; i < xhci->msix_count; i++)
338 synchronize_irq(xhci->msix_entries[i].vector);
342 static int xhci_try_enable_msi(struct usb_hcd *hcd)
344 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
345 struct pci_dev *pdev;
348 /* The xhci platform device has set up IRQs through usb_add_hcd. */
349 if (xhci->quirks & XHCI_PLAT)
352 pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
354 * Some Fresco Logic host controllers advertise MSI, but fail to
355 * generate interrupts. Don't even try to enable MSI.
357 if (xhci->quirks & XHCI_BROKEN_MSI)
360 /* unregister the legacy interrupt */
362 free_irq(hcd->irq, hcd);
365 ret = xhci_setup_msix(xhci);
367 /* fall back to msi*/
368 ret = xhci_setup_msi(xhci);
371 /* hcd->irq is 0, we have MSI */
375 xhci_err(xhci, "No msi-x/msi found and no IRQ in BIOS\n");
380 /* fall back to legacy interrupt*/
381 ret = request_irq(pdev->irq, &usb_hcd_irq, IRQF_SHARED,
382 hcd->irq_descr, hcd);
384 xhci_err(xhci, "request interrupt %d failed\n",
388 hcd->irq = pdev->irq;
394 static int xhci_try_enable_msi(struct usb_hcd *hcd)
399 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
403 static void xhci_msix_sync_irqs(struct xhci_hcd *xhci)
409 static void compliance_mode_recovery(unsigned long arg)
411 struct xhci_hcd *xhci;
416 xhci = (struct xhci_hcd *)arg;
418 for (i = 0; i < xhci->num_usb3_ports; i++) {
419 temp = xhci_readl(xhci, xhci->usb3_ports[i]);
420 if ((temp & PORT_PLS_MASK) == USB_SS_PORT_LS_COMP_MOD) {
422 * Compliance Mode Detected. Letting USB Core
423 * handle the Warm Reset
425 xhci_dbg(xhci, "Compliance mode detected->port %d\n",
427 xhci_dbg(xhci, "Attempting compliance mode recovery\n");
428 hcd = xhci->shared_hcd;
430 if (hcd->state == HC_STATE_SUSPENDED)
431 usb_hcd_resume_root_hub(hcd);
433 usb_hcd_poll_rh_status(hcd);
437 if (xhci->port_status_u0 != ((1 << xhci->num_usb3_ports)-1))
438 mod_timer(&xhci->comp_mode_recovery_timer,
439 jiffies + msecs_to_jiffies(COMP_MODE_RCVRY_MSECS));
443 * Quirk to work around issue generated by the SN65LVPE502CP USB3.0 re-driver
444 * that causes ports behind that hardware to enter compliance mode sometimes.
445 * The quirk creates a timer that polls every 2 seconds the link state of
446 * each host controller's port and recovers it by issuing a Warm reset
447 * if Compliance mode is detected, otherwise the port will become "dead" (no
448 * device connections or disconnections will be detected anymore). Becasue no
449 * status event is generated when entering compliance mode (per xhci spec),
450 * this quirk is needed on systems that have the failing hardware installed.
452 static void compliance_mode_recovery_timer_init(struct xhci_hcd *xhci)
454 xhci->port_status_u0 = 0;
455 init_timer(&xhci->comp_mode_recovery_timer);
457 xhci->comp_mode_recovery_timer.data = (unsigned long) xhci;
458 xhci->comp_mode_recovery_timer.function = compliance_mode_recovery;
459 xhci->comp_mode_recovery_timer.expires = jiffies +
460 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS);
462 set_timer_slack(&xhci->comp_mode_recovery_timer,
463 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS));
464 add_timer(&xhci->comp_mode_recovery_timer);
465 xhci_dbg(xhci, "Compliance mode recovery timer initialized\n");
469 * This function identifies the systems that have installed the SN65LVPE502CP
470 * USB3.0 re-driver and that need the Compliance Mode Quirk.
472 * Vendor: Hewlett-Packard -> System Models: Z420, Z620 and Z820
474 bool xhci_compliance_mode_recovery_timer_quirk_check(void)
476 const char *dmi_product_name, *dmi_sys_vendor;
478 dmi_product_name = dmi_get_system_info(DMI_PRODUCT_NAME);
479 dmi_sys_vendor = dmi_get_system_info(DMI_SYS_VENDOR);
480 if (!dmi_product_name || !dmi_sys_vendor)
483 if (!(strstr(dmi_sys_vendor, "Hewlett-Packard")))
486 if (strstr(dmi_product_name, "Z420") ||
487 strstr(dmi_product_name, "Z620") ||
488 strstr(dmi_product_name, "Z820") ||
489 strstr(dmi_product_name, "Z1 Workstation"))
495 static int xhci_all_ports_seen_u0(struct xhci_hcd *xhci)
497 return (xhci->port_status_u0 == ((1 << xhci->num_usb3_ports)-1));
502 * Initialize memory for HCD and xHC (one-time init).
504 * Program the PAGESIZE register, initialize the device context array, create
505 * device contexts (?), set up a command ring segment (or two?), create event
506 * ring (one for now).
508 int xhci_init(struct usb_hcd *hcd)
510 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
513 xhci_dbg(xhci, "xhci_init\n");
514 spin_lock_init(&xhci->lock);
515 if (xhci->hci_version == 0x95 && link_quirk) {
516 xhci_dbg(xhci, "QUIRK: Not clearing Link TRB chain bits.\n");
517 xhci->quirks |= XHCI_LINK_TRB_QUIRK;
519 xhci_dbg(xhci, "xHCI doesn't need link TRB QUIRK\n");
521 retval = xhci_mem_init(xhci, GFP_KERNEL);
522 xhci_dbg(xhci, "Finished xhci_init\n");
524 /* Initializing Compliance Mode Recovery Data If Needed */
525 if (xhci_compliance_mode_recovery_timer_quirk_check()) {
526 xhci->quirks |= XHCI_COMP_MODE_QUIRK;
527 compliance_mode_recovery_timer_init(xhci);
533 /*-------------------------------------------------------------------------*/
536 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
537 static void xhci_event_ring_work(unsigned long arg)
542 struct xhci_hcd *xhci = (struct xhci_hcd *) arg;
545 xhci_dbg(xhci, "Poll event ring: %lu\n", jiffies);
547 spin_lock_irqsave(&xhci->lock, flags);
548 temp = xhci_readl(xhci, &xhci->op_regs->status);
549 xhci_dbg(xhci, "op reg status = 0x%x\n", temp);
550 if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
551 (xhci->xhc_state & XHCI_STATE_HALTED)) {
552 xhci_dbg(xhci, "HW died, polling stopped.\n");
553 spin_unlock_irqrestore(&xhci->lock, flags);
557 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
558 xhci_dbg(xhci, "ir_set 0 pending = 0x%x\n", temp);
559 xhci_dbg(xhci, "HC error bitmask = 0x%x\n", xhci->error_bitmask);
560 xhci->error_bitmask = 0;
561 xhci_dbg(xhci, "Event ring:\n");
562 xhci_debug_segment(xhci, xhci->event_ring->deq_seg);
563 xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
564 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
565 temp_64 &= ~ERST_PTR_MASK;
566 xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
567 xhci_dbg(xhci, "Command ring:\n");
568 xhci_debug_segment(xhci, xhci->cmd_ring->deq_seg);
569 xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
570 xhci_dbg_cmd_ptrs(xhci);
571 for (i = 0; i < MAX_HC_SLOTS; ++i) {
574 for (j = 0; j < 31; ++j) {
575 xhci_dbg_ep_rings(xhci, i, j, &xhci->devs[i]->eps[j]);
578 spin_unlock_irqrestore(&xhci->lock, flags);
581 mod_timer(&xhci->event_ring_timer, jiffies + POLL_TIMEOUT * HZ);
583 xhci_dbg(xhci, "Quit polling the event ring.\n");
587 static int xhci_run_finished(struct xhci_hcd *xhci)
589 if (xhci_start(xhci)) {
593 xhci->shared_hcd->state = HC_STATE_RUNNING;
594 xhci->cmd_ring_state = CMD_RING_STATE_RUNNING;
596 if (xhci->quirks & XHCI_NEC_HOST)
597 xhci_ring_cmd_db(xhci);
599 xhci_dbg(xhci, "Finished xhci_run for USB3 roothub\n");
604 * Start the HC after it was halted.
606 * This function is called by the USB core when the HC driver is added.
607 * Its opposite is xhci_stop().
609 * xhci_init() must be called once before this function can be called.
610 * Reset the HC, enable device slot contexts, program DCBAAP, and
611 * set command ring pointer and event ring pointer.
613 * Setup MSI-X vectors and enable interrupts.
615 int xhci_run(struct usb_hcd *hcd)
620 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
622 /* Start the xHCI host controller running only after the USB 2.0 roothub
626 hcd->uses_new_polling = 1;
627 if (!usb_hcd_is_primary_hcd(hcd))
628 return xhci_run_finished(xhci);
630 xhci_dbg(xhci, "xhci_run\n");
632 ret = xhci_try_enable_msi(hcd);
636 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
637 init_timer(&xhci->event_ring_timer);
638 xhci->event_ring_timer.data = (unsigned long) xhci;
639 xhci->event_ring_timer.function = xhci_event_ring_work;
640 /* Poll the event ring */
641 xhci->event_ring_timer.expires = jiffies + POLL_TIMEOUT * HZ;
643 xhci_dbg(xhci, "Setting event ring polling timer\n");
644 add_timer(&xhci->event_ring_timer);
647 xhci_dbg(xhci, "Command ring memory map follows:\n");
648 xhci_debug_ring(xhci, xhci->cmd_ring);
649 xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
650 xhci_dbg_cmd_ptrs(xhci);
652 xhci_dbg(xhci, "ERST memory map follows:\n");
653 xhci_dbg_erst(xhci, &xhci->erst);
654 xhci_dbg(xhci, "Event ring:\n");
655 xhci_debug_ring(xhci, xhci->event_ring);
656 xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
657 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
658 temp_64 &= ~ERST_PTR_MASK;
659 xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
661 xhci_dbg(xhci, "// Set the interrupt modulation register\n");
662 temp = xhci_readl(xhci, &xhci->ir_set->irq_control);
663 temp &= ~ER_IRQ_INTERVAL_MASK;
665 xhci_writel(xhci, temp, &xhci->ir_set->irq_control);
667 /* Set the HCD state before we enable the irqs */
668 temp = xhci_readl(xhci, &xhci->op_regs->command);
670 xhci_dbg(xhci, "// Enable interrupts, cmd = 0x%x.\n",
672 xhci_writel(xhci, temp, &xhci->op_regs->command);
674 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
675 xhci_dbg(xhci, "// Enabling event ring interrupter %p by writing 0x%x to irq_pending\n",
676 xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp));
677 xhci_writel(xhci, ER_IRQ_ENABLE(temp),
678 &xhci->ir_set->irq_pending);
679 xhci_print_ir_set(xhci, 0);
681 if (xhci->quirks & XHCI_NEC_HOST)
682 xhci_queue_vendor_command(xhci, 0, 0, 0,
683 TRB_TYPE(TRB_NEC_GET_FW));
685 xhci_dbg(xhci, "Finished xhci_run for USB2 roothub\n");
689 static void xhci_only_stop_hcd(struct usb_hcd *hcd)
691 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
693 spin_lock_irq(&xhci->lock);
696 /* The shared_hcd is going to be deallocated shortly (the USB core only
697 * calls this function when allocation fails in usb_add_hcd(), or
698 * usb_remove_hcd() is called). So we need to unset xHCI's pointer.
700 xhci->shared_hcd = NULL;
701 spin_unlock_irq(&xhci->lock);
707 * This function is called by the USB core when the HC driver is removed.
708 * Its opposite is xhci_run().
710 * Disable device contexts, disable IRQs, and quiesce the HC.
711 * Reset the HC, finish any completed transactions, and cleanup memory.
713 void xhci_stop(struct usb_hcd *hcd)
716 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
718 if (!usb_hcd_is_primary_hcd(hcd)) {
719 xhci_only_stop_hcd(xhci->shared_hcd);
723 spin_lock_irq(&xhci->lock);
724 /* Make sure the xHC is halted for a USB3 roothub
725 * (xhci_stop() could be called as part of failed init).
729 spin_unlock_irq(&xhci->lock);
731 xhci_cleanup_msix(xhci);
733 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
734 /* Tell the event ring poll function not to reschedule */
736 del_timer_sync(&xhci->event_ring_timer);
739 /* Deleting Compliance Mode Recovery Timer */
740 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
741 (!(xhci_all_ports_seen_u0(xhci)))) {
742 del_timer_sync(&xhci->comp_mode_recovery_timer);
743 xhci_dbg(xhci, "%s: compliance mode recovery timer deleted\n",
747 if (xhci->quirks & XHCI_AMD_PLL_FIX)
750 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
751 temp = xhci_readl(xhci, &xhci->op_regs->status);
752 xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
753 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
754 xhci_writel(xhci, ER_IRQ_DISABLE(temp),
755 &xhci->ir_set->irq_pending);
756 xhci_print_ir_set(xhci, 0);
758 xhci_dbg(xhci, "cleaning up memory\n");
759 xhci_mem_cleanup(xhci);
760 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
761 xhci_readl(xhci, &xhci->op_regs->status));
765 * Shutdown HC (not bus-specific)
767 * This is called when the machine is rebooting or halting. We assume that the
768 * machine will be powered off, and the HC's internal state will be reset.
769 * Don't bother to free memory.
771 * This will only ever be called with the main usb_hcd (the USB3 roothub).
773 void xhci_shutdown(struct usb_hcd *hcd)
775 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
777 if (xhci->quirks & XHCI_SPURIOUS_REBOOT)
778 usb_disable_xhci_ports(to_pci_dev(hcd->self.controller));
780 spin_lock_irq(&xhci->lock);
782 spin_unlock_irq(&xhci->lock);
784 xhci_cleanup_msix(xhci);
786 xhci_dbg(xhci, "xhci_shutdown completed - status = %x\n",
787 xhci_readl(xhci, &xhci->op_regs->status));
791 static void xhci_save_registers(struct xhci_hcd *xhci)
793 xhci->s3.command = xhci_readl(xhci, &xhci->op_regs->command);
794 xhci->s3.dev_nt = xhci_readl(xhci, &xhci->op_regs->dev_notification);
795 xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
796 xhci->s3.config_reg = xhci_readl(xhci, &xhci->op_regs->config_reg);
797 xhci->s3.erst_size = xhci_readl(xhci, &xhci->ir_set->erst_size);
798 xhci->s3.erst_base = xhci_read_64(xhci, &xhci->ir_set->erst_base);
799 xhci->s3.erst_dequeue = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
800 xhci->s3.irq_pending = xhci_readl(xhci, &xhci->ir_set->irq_pending);
801 xhci->s3.irq_control = xhci_readl(xhci, &xhci->ir_set->irq_control);
804 static void xhci_restore_registers(struct xhci_hcd *xhci)
806 xhci_writel(xhci, xhci->s3.command, &xhci->op_regs->command);
807 xhci_writel(xhci, xhci->s3.dev_nt, &xhci->op_regs->dev_notification);
808 xhci_write_64(xhci, xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr);
809 xhci_writel(xhci, xhci->s3.config_reg, &xhci->op_regs->config_reg);
810 xhci_writel(xhci, xhci->s3.erst_size, &xhci->ir_set->erst_size);
811 xhci_write_64(xhci, xhci->s3.erst_base, &xhci->ir_set->erst_base);
812 xhci_write_64(xhci, xhci->s3.erst_dequeue, &xhci->ir_set->erst_dequeue);
813 xhci_writel(xhci, xhci->s3.irq_pending, &xhci->ir_set->irq_pending);
814 xhci_writel(xhci, xhci->s3.irq_control, &xhci->ir_set->irq_control);
817 static void xhci_set_cmd_ring_deq(struct xhci_hcd *xhci)
821 /* step 2: initialize command ring buffer */
822 val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
823 val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |
824 (xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
825 xhci->cmd_ring->dequeue) &
826 (u64) ~CMD_RING_RSVD_BITS) |
827 xhci->cmd_ring->cycle_state;
828 xhci_dbg(xhci, "// Setting command ring address to 0x%llx\n",
829 (long unsigned long) val_64);
830 xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);
834 * The whole command ring must be cleared to zero when we suspend the host.
836 * The host doesn't save the command ring pointer in the suspend well, so we
837 * need to re-program it on resume. Unfortunately, the pointer must be 64-byte
838 * aligned, because of the reserved bits in the command ring dequeue pointer
839 * register. Therefore, we can't just set the dequeue pointer back in the
840 * middle of the ring (TRBs are 16-byte aligned).
842 static void xhci_clear_command_ring(struct xhci_hcd *xhci)
844 struct xhci_ring *ring;
845 struct xhci_segment *seg;
847 ring = xhci->cmd_ring;
851 sizeof(union xhci_trb) * (TRBS_PER_SEGMENT - 1));
852 seg->trbs[TRBS_PER_SEGMENT - 1].link.control &=
853 cpu_to_le32(~TRB_CYCLE);
855 } while (seg != ring->deq_seg);
857 /* Reset the software enqueue and dequeue pointers */
858 ring->deq_seg = ring->first_seg;
859 ring->dequeue = ring->first_seg->trbs;
860 ring->enq_seg = ring->deq_seg;
861 ring->enqueue = ring->dequeue;
863 ring->num_trbs_free = ring->num_segs * (TRBS_PER_SEGMENT - 1) - 1;
865 * Ring is now zeroed, so the HW should look for change of ownership
866 * when the cycle bit is set to 1.
868 ring->cycle_state = 1;
871 * Reset the hardware dequeue pointer.
872 * Yes, this will need to be re-written after resume, but we're paranoid
873 * and want to make sure the hardware doesn't access bogus memory
874 * because, say, the BIOS or an SMI started the host without changing
875 * the command ring pointers.
877 xhci_set_cmd_ring_deq(xhci);
881 * Stop HC (not bus-specific)
883 * This is called when the machine transition into S3/S4 mode.
886 int xhci_suspend(struct xhci_hcd *xhci)
889 struct usb_hcd *hcd = xhci_to_hcd(xhci);
892 if (hcd->state != HC_STATE_SUSPENDED ||
893 xhci->shared_hcd->state != HC_STATE_SUSPENDED)
896 /* Don't poll the roothubs on bus suspend. */
897 xhci_dbg(xhci, "%s: stopping port polling.\n", __func__);
898 clear_bit(HCD_FLAG_POLL_RH, &hcd->flags);
899 del_timer_sync(&hcd->rh_timer);
901 spin_lock_irq(&xhci->lock);
902 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
903 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
904 /* step 1: stop endpoint */
905 /* skipped assuming that port suspend has done */
907 /* step 2: clear Run/Stop bit */
908 command = xhci_readl(xhci, &xhci->op_regs->command);
910 xhci_writel(xhci, command, &xhci->op_regs->command);
911 if (xhci_handshake(xhci, &xhci->op_regs->status,
912 STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC)) {
913 xhci_warn(xhci, "WARN: xHC CMD_RUN timeout\n");
914 spin_unlock_irq(&xhci->lock);
917 xhci_clear_command_ring(xhci);
919 /* step 3: save registers */
920 xhci_save_registers(xhci);
922 /* step 4: set CSS flag */
923 command = xhci_readl(xhci, &xhci->op_regs->command);
925 xhci_writel(xhci, command, &xhci->op_regs->command);
926 if (xhci_handshake(xhci, &xhci->op_regs->status,
927 STS_SAVE, 0, 10 * 1000)) {
928 xhci_warn(xhci, "WARN: xHC save state timeout\n");
929 spin_unlock_irq(&xhci->lock);
932 spin_unlock_irq(&xhci->lock);
935 * Deleting Compliance Mode Recovery Timer because the xHCI Host
936 * is about to be suspended.
938 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
939 (!(xhci_all_ports_seen_u0(xhci)))) {
940 del_timer_sync(&xhci->comp_mode_recovery_timer);
941 xhci_dbg(xhci, "%s: compliance mode recovery timer deleted\n",
945 /* step 5: remove core well power */
946 /* synchronize irq when using MSI-X */
947 xhci_msix_sync_irqs(xhci);
953 * start xHC (not bus-specific)
955 * This is called when the machine transition from S3/S4 mode.
958 int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
960 u32 command, temp = 0;
961 struct usb_hcd *hcd = xhci_to_hcd(xhci);
962 struct usb_hcd *secondary_hcd;
964 bool comp_timer_running = false;
966 /* Wait a bit if either of the roothubs need to settle from the
967 * transition into bus suspend.
969 if (time_before(jiffies, xhci->bus_state[0].next_statechange) ||
971 xhci->bus_state[1].next_statechange))
974 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
975 set_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
977 spin_lock_irq(&xhci->lock);
978 if (xhci->quirks & XHCI_RESET_ON_RESUME)
982 /* step 1: restore register */
983 xhci_restore_registers(xhci);
984 /* step 2: initialize command ring buffer */
985 xhci_set_cmd_ring_deq(xhci);
986 /* step 3: restore state and start state*/
987 /* step 3: set CRS flag */
988 command = xhci_readl(xhci, &xhci->op_regs->command);
990 xhci_writel(xhci, command, &xhci->op_regs->command);
991 if (xhci_handshake(xhci, &xhci->op_regs->status,
992 STS_RESTORE, 0, 10 * 1000)) {
993 xhci_warn(xhci, "WARN: xHC restore state timeout\n");
994 spin_unlock_irq(&xhci->lock);
997 temp = xhci_readl(xhci, &xhci->op_regs->status);
1000 /* If restore operation fails, re-initialize the HC during resume */
1001 if ((temp & STS_SRE) || hibernated) {
1003 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
1004 !(xhci_all_ports_seen_u0(xhci))) {
1005 del_timer_sync(&xhci->comp_mode_recovery_timer);
1006 xhci_dbg(xhci, "Compliance Mode Recovery Timer deleted!\n");
1009 /* Let the USB core know _both_ roothubs lost power. */
1010 usb_root_hub_lost_power(xhci->main_hcd->self.root_hub);
1011 usb_root_hub_lost_power(xhci->shared_hcd->self.root_hub);
1013 xhci_dbg(xhci, "Stop HCD\n");
1016 spin_unlock_irq(&xhci->lock);
1017 xhci_cleanup_msix(xhci);
1019 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
1020 /* Tell the event ring poll function not to reschedule */
1022 del_timer_sync(&xhci->event_ring_timer);
1025 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
1026 temp = xhci_readl(xhci, &xhci->op_regs->status);
1027 xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
1028 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
1029 xhci_writel(xhci, ER_IRQ_DISABLE(temp),
1030 &xhci->ir_set->irq_pending);
1031 xhci_print_ir_set(xhci, 0);
1033 xhci_dbg(xhci, "cleaning up memory\n");
1034 xhci_mem_cleanup(xhci);
1035 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
1036 xhci_readl(xhci, &xhci->op_regs->status));
1038 /* USB core calls the PCI reinit and start functions twice:
1039 * first with the primary HCD, and then with the secondary HCD.
1040 * If we don't do the same, the host will never be started.
1042 if (!usb_hcd_is_primary_hcd(hcd))
1043 secondary_hcd = hcd;
1045 secondary_hcd = xhci->shared_hcd;
1047 xhci_dbg(xhci, "Initialize the xhci_hcd\n");
1048 retval = xhci_init(hcd->primary_hcd);
1051 comp_timer_running = true;
1053 xhci_dbg(xhci, "Start the primary HCD\n");
1054 retval = xhci_run(hcd->primary_hcd);
1056 xhci_dbg(xhci, "Start the secondary HCD\n");
1057 retval = xhci_run(secondary_hcd);
1059 hcd->state = HC_STATE_SUSPENDED;
1060 xhci->shared_hcd->state = HC_STATE_SUSPENDED;
1064 /* step 4: set Run/Stop bit */
1065 command = xhci_readl(xhci, &xhci->op_regs->command);
1067 xhci_writel(xhci, command, &xhci->op_regs->command);
1068 xhci_handshake(xhci, &xhci->op_regs->status, STS_HALT,
1071 /* step 5: walk topology and initialize portsc,
1072 * portpmsc and portli
1074 /* this is done in bus_resume */
1076 /* step 6: restart each of the previously
1077 * Running endpoints by ringing their doorbells
1080 spin_unlock_irq(&xhci->lock);
1084 usb_hcd_resume_root_hub(hcd);
1085 usb_hcd_resume_root_hub(xhci->shared_hcd);
1089 * If system is subject to the Quirk, Compliance Mode Timer needs to
1090 * be re-initialized Always after a system resume. Ports are subject
1091 * to suffer the Compliance Mode issue again. It doesn't matter if
1092 * ports have entered previously to U0 before system's suspension.
1094 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) && !comp_timer_running)
1095 compliance_mode_recovery_timer_init(xhci);
1097 /* Re-enable port polling. */
1098 xhci_dbg(xhci, "%s: starting port polling.\n", __func__);
1099 set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
1100 usb_hcd_poll_rh_status(hcd);
1104 #endif /* CONFIG_PM */
1106 /*-------------------------------------------------------------------------*/
1109 * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
1110 * HCDs. Find the index for an endpoint given its descriptor. Use the return
1111 * value to right shift 1 for the bitmask.
1113 * Index = (epnum * 2) + direction - 1,
1114 * where direction = 0 for OUT, 1 for IN.
1115 * For control endpoints, the IN index is used (OUT index is unused), so
1116 * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
1118 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc)
1121 if (usb_endpoint_xfer_control(desc))
1122 index = (unsigned int) (usb_endpoint_num(desc)*2);
1124 index = (unsigned int) (usb_endpoint_num(desc)*2) +
1125 (usb_endpoint_dir_in(desc) ? 1 : 0) - 1;
1129 /* Find the flag for this endpoint (for use in the control context). Use the
1130 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1133 unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc)
1135 return 1 << (xhci_get_endpoint_index(desc) + 1);
1138 /* Find the flag for this endpoint (for use in the control context). Use the
1139 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1142 unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index)
1144 return 1 << (ep_index + 1);
1147 /* Compute the last valid endpoint context index. Basically, this is the
1148 * endpoint index plus one. For slot contexts with more than valid endpoint,
1149 * we find the most significant bit set in the added contexts flags.
1150 * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
1151 * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
1153 unsigned int xhci_last_valid_endpoint(u32 added_ctxs)
1155 return fls(added_ctxs) - 1;
1158 /* Returns 1 if the arguments are OK;
1159 * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
1161 static int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev,
1162 struct usb_host_endpoint *ep, int check_ep, bool check_virt_dev,
1164 struct xhci_hcd *xhci;
1165 struct xhci_virt_device *virt_dev;
1167 if (!hcd || (check_ep && !ep) || !udev) {
1168 printk(KERN_DEBUG "xHCI %s called with invalid args\n",
1172 if (!udev->parent) {
1173 printk(KERN_DEBUG "xHCI %s called for root hub\n",
1178 xhci = hcd_to_xhci(hcd);
1179 if (check_virt_dev) {
1180 if (!udev->slot_id || !xhci->devs[udev->slot_id]) {
1181 printk(KERN_DEBUG "xHCI %s called with unaddressed "
1186 virt_dev = xhci->devs[udev->slot_id];
1187 if (virt_dev->udev != udev) {
1188 printk(KERN_DEBUG "xHCI %s called with udev and "
1189 "virt_dev does not match\n", func);
1194 if (xhci->xhc_state & XHCI_STATE_HALTED)
1200 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
1201 struct usb_device *udev, struct xhci_command *command,
1202 bool ctx_change, bool must_succeed);
1205 * Full speed devices may have a max packet size greater than 8 bytes, but the
1206 * USB core doesn't know that until it reads the first 8 bytes of the
1207 * descriptor. If the usb_device's max packet size changes after that point,
1208 * we need to issue an evaluate context command and wait on it.
1210 static int xhci_check_maxpacket(struct xhci_hcd *xhci, unsigned int slot_id,
1211 unsigned int ep_index, struct urb *urb)
1213 struct xhci_container_ctx *in_ctx;
1214 struct xhci_container_ctx *out_ctx;
1215 struct xhci_input_control_ctx *ctrl_ctx;
1216 struct xhci_ep_ctx *ep_ctx;
1217 int max_packet_size;
1218 int hw_max_packet_size;
1221 out_ctx = xhci->devs[slot_id]->out_ctx;
1222 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1223 hw_max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2));
1224 max_packet_size = usb_endpoint_maxp(&urb->dev->ep0.desc);
1225 if (hw_max_packet_size != max_packet_size) {
1226 xhci_dbg(xhci, "Max Packet Size for ep 0 changed.\n");
1227 xhci_dbg(xhci, "Max packet size in usb_device = %d\n",
1229 xhci_dbg(xhci, "Max packet size in xHCI HW = %d\n",
1230 hw_max_packet_size);
1231 xhci_dbg(xhci, "Issuing evaluate context command.\n");
1233 /* Set up the modified control endpoint 0 */
1234 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
1235 xhci->devs[slot_id]->out_ctx, ep_index);
1236 in_ctx = xhci->devs[slot_id]->in_ctx;
1237 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
1238 ep_ctx->ep_info2 &= cpu_to_le32(~MAX_PACKET_MASK);
1239 ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet_size));
1241 /* Set up the input context flags for the command */
1242 /* FIXME: This won't work if a non-default control endpoint
1243 * changes max packet sizes.
1245 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1246 ctrl_ctx->add_flags = cpu_to_le32(EP0_FLAG);
1247 ctrl_ctx->drop_flags = 0;
1249 xhci_dbg(xhci, "Slot %d input context\n", slot_id);
1250 xhci_dbg_ctx(xhci, in_ctx, ep_index);
1251 xhci_dbg(xhci, "Slot %d output context\n", slot_id);
1252 xhci_dbg_ctx(xhci, out_ctx, ep_index);
1254 ret = xhci_configure_endpoint(xhci, urb->dev, NULL,
1257 /* Clean up the input context for later use by bandwidth
1260 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG);
1266 * non-error returns are a promise to giveback() the urb later
1267 * we drop ownership so next owner (or urb unlink) can get it
1269 int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
1271 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
1272 struct xhci_td *buffer;
1273 unsigned long flags;
1275 unsigned int slot_id, ep_index;
1276 struct urb_priv *urb_priv;
1279 if (!urb || xhci_check_args(hcd, urb->dev, urb->ep,
1280 true, true, __func__) <= 0)
1283 slot_id = urb->dev->slot_id;
1284 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1286 if (!HCD_HW_ACCESSIBLE(hcd)) {
1287 if (!in_interrupt())
1288 xhci_dbg(xhci, "urb submitted during PCI suspend\n");
1293 if (usb_endpoint_xfer_isoc(&urb->ep->desc))
1294 size = urb->number_of_packets;
1298 urb_priv = kzalloc(sizeof(struct urb_priv) +
1299 size * sizeof(struct xhci_td *), mem_flags);
1303 buffer = kzalloc(size * sizeof(struct xhci_td), mem_flags);
1309 for (i = 0; i < size; i++) {
1310 urb_priv->td[i] = buffer;
1314 urb_priv->length = size;
1315 urb_priv->td_cnt = 0;
1316 urb->hcpriv = urb_priv;
1318 if (usb_endpoint_xfer_control(&urb->ep->desc)) {
1319 /* Check to see if the max packet size for the default control
1320 * endpoint changed during FS device enumeration
1322 if (urb->dev->speed == USB_SPEED_FULL) {
1323 ret = xhci_check_maxpacket(xhci, slot_id,
1326 xhci_urb_free_priv(xhci, urb_priv);
1332 /* We have a spinlock and interrupts disabled, so we must pass
1333 * atomic context to this function, which may allocate memory.
1335 spin_lock_irqsave(&xhci->lock, flags);
1336 if (xhci->xhc_state & XHCI_STATE_DYING)
1338 ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb,
1342 spin_unlock_irqrestore(&xhci->lock, flags);
1343 } else if (usb_endpoint_xfer_bulk(&urb->ep->desc)) {
1344 spin_lock_irqsave(&xhci->lock, flags);
1345 if (xhci->xhc_state & XHCI_STATE_DYING)
1347 if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1348 EP_GETTING_STREAMS) {
1349 xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1350 "is transitioning to using streams.\n");
1352 } else if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1353 EP_GETTING_NO_STREAMS) {
1354 xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1355 "is transitioning to "
1356 "not having streams.\n");
1359 ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
1364 spin_unlock_irqrestore(&xhci->lock, flags);
1365 } else if (usb_endpoint_xfer_int(&urb->ep->desc)) {
1366 spin_lock_irqsave(&xhci->lock, flags);
1367 if (xhci->xhc_state & XHCI_STATE_DYING)
1369 ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb,
1373 spin_unlock_irqrestore(&xhci->lock, flags);
1375 spin_lock_irqsave(&xhci->lock, flags);
1376 if (xhci->xhc_state & XHCI_STATE_DYING)
1378 ret = xhci_queue_isoc_tx_prepare(xhci, GFP_ATOMIC, urb,
1382 spin_unlock_irqrestore(&xhci->lock, flags);
1387 xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for "
1388 "non-responsive xHCI host.\n",
1389 urb->ep->desc.bEndpointAddress, urb);
1392 xhci_urb_free_priv(xhci, urb_priv);
1394 spin_unlock_irqrestore(&xhci->lock, flags);
1398 /* Get the right ring for the given URB.
1399 * If the endpoint supports streams, boundary check the URB's stream ID.
1400 * If the endpoint doesn't support streams, return the singular endpoint ring.
1402 static struct xhci_ring *xhci_urb_to_transfer_ring(struct xhci_hcd *xhci,
1405 unsigned int slot_id;
1406 unsigned int ep_index;
1407 unsigned int stream_id;
1408 struct xhci_virt_ep *ep;
1410 slot_id = urb->dev->slot_id;
1411 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1412 stream_id = urb->stream_id;
1413 ep = &xhci->devs[slot_id]->eps[ep_index];
1414 /* Common case: no streams */
1415 if (!(ep->ep_state & EP_HAS_STREAMS))
1418 if (stream_id == 0) {
1420 "WARN: Slot ID %u, ep index %u has streams, "
1421 "but URB has no stream ID.\n",
1426 if (stream_id < ep->stream_info->num_streams)
1427 return ep->stream_info->stream_rings[stream_id];
1430 "WARN: Slot ID %u, ep index %u has "
1431 "stream IDs 1 to %u allocated, "
1432 "but stream ID %u is requested.\n",
1434 ep->stream_info->num_streams - 1,
1440 * Remove the URB's TD from the endpoint ring. This may cause the HC to stop
1441 * USB transfers, potentially stopping in the middle of a TRB buffer. The HC
1442 * should pick up where it left off in the TD, unless a Set Transfer Ring
1443 * Dequeue Pointer is issued.
1445 * The TRBs that make up the buffers for the canceled URB will be "removed" from
1446 * the ring. Since the ring is a contiguous structure, they can't be physically
1447 * removed. Instead, there are two options:
1449 * 1) If the HC is in the middle of processing the URB to be canceled, we
1450 * simply move the ring's dequeue pointer past those TRBs using the Set
1451 * Transfer Ring Dequeue Pointer command. This will be the common case,
1452 * when drivers timeout on the last submitted URB and attempt to cancel.
1454 * 2) If the HC is in the middle of a different TD, we turn the TRBs into a
1455 * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The
1456 * HC will need to invalidate the any TRBs it has cached after the stop
1457 * endpoint command, as noted in the xHCI 0.95 errata.
1459 * 3) The TD may have completed by the time the Stop Endpoint Command
1460 * completes, so software needs to handle that case too.
1462 * This function should protect against the TD enqueueing code ringing the
1463 * doorbell while this code is waiting for a Stop Endpoint command to complete.
1464 * It also needs to account for multiple cancellations on happening at the same
1465 * time for the same endpoint.
1467 * Note that this function can be called in any context, or so says
1468 * usb_hcd_unlink_urb()
1470 int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1472 unsigned long flags;
1475 struct xhci_hcd *xhci;
1476 struct urb_priv *urb_priv;
1478 unsigned int ep_index;
1479 struct xhci_ring *ep_ring;
1480 struct xhci_virt_ep *ep;
1482 xhci = hcd_to_xhci(hcd);
1483 spin_lock_irqsave(&xhci->lock, flags);
1484 /* Make sure the URB hasn't completed or been unlinked already */
1485 ret = usb_hcd_check_unlink_urb(hcd, urb, status);
1486 if (ret || !urb->hcpriv)
1488 temp = xhci_readl(xhci, &xhci->op_regs->status);
1489 if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_HALTED)) {
1490 xhci_dbg(xhci, "HW died, freeing TD.\n");
1491 urb_priv = urb->hcpriv;
1492 for (i = urb_priv->td_cnt; i < urb_priv->length; i++) {
1493 td = urb_priv->td[i];
1494 if (!list_empty(&td->td_list))
1495 list_del_init(&td->td_list);
1496 if (!list_empty(&td->cancelled_td_list))
1497 list_del_init(&td->cancelled_td_list);
1500 usb_hcd_unlink_urb_from_ep(hcd, urb);
1501 spin_unlock_irqrestore(&xhci->lock, flags);
1502 usb_hcd_giveback_urb(hcd, urb, -ESHUTDOWN);
1503 xhci_urb_free_priv(xhci, urb_priv);
1506 if ((xhci->xhc_state & XHCI_STATE_DYING) ||
1507 (xhci->xhc_state & XHCI_STATE_HALTED)) {
1508 xhci_dbg(xhci, "Ep 0x%x: URB %p to be canceled on "
1509 "non-responsive xHCI host.\n",
1510 urb->ep->desc.bEndpointAddress, urb);
1511 /* Let the stop endpoint command watchdog timer (which set this
1512 * state) finish cleaning up the endpoint TD lists. We must
1513 * have caught it in the middle of dropping a lock and giving
1519 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1520 ep = &xhci->devs[urb->dev->slot_id]->eps[ep_index];
1521 ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
1527 urb_priv = urb->hcpriv;
1528 i = urb_priv->td_cnt;
1529 if (i < urb_priv->length)
1530 xhci_dbg(xhci, "Cancel URB %p, dev %s, ep 0x%x, "
1531 "starting at offset 0x%llx\n",
1532 urb, urb->dev->devpath,
1533 urb->ep->desc.bEndpointAddress,
1534 (unsigned long long) xhci_trb_virt_to_dma(
1535 urb_priv->td[i]->start_seg,
1536 urb_priv->td[i]->first_trb));
1538 for (; i < urb_priv->length; i++) {
1539 td = urb_priv->td[i];
1540 list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list);
1543 /* Queue a stop endpoint command, but only if this is
1544 * the first cancellation to be handled.
1546 if (!(ep->ep_state & EP_HALT_PENDING)) {
1547 ep->ep_state |= EP_HALT_PENDING;
1548 ep->stop_cmds_pending++;
1549 ep->stop_cmd_timer.expires = jiffies +
1550 XHCI_STOP_EP_CMD_TIMEOUT * HZ;
1551 add_timer(&ep->stop_cmd_timer);
1552 xhci_queue_stop_endpoint(xhci, urb->dev->slot_id, ep_index, 0);
1553 xhci_ring_cmd_db(xhci);
1556 spin_unlock_irqrestore(&xhci->lock, flags);
1560 /* Drop an endpoint from a new bandwidth configuration for this device.
1561 * Only one call to this function is allowed per endpoint before
1562 * check_bandwidth() or reset_bandwidth() must be called.
1563 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1564 * add the endpoint to the schedule with possibly new parameters denoted by a
1565 * different endpoint descriptor in usb_host_endpoint.
1566 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1569 * The USB core will not allow URBs to be queued to an endpoint that is being
1570 * disabled, so there's no need for mutual exclusion to protect
1571 * the xhci->devs[slot_id] structure.
1573 int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1574 struct usb_host_endpoint *ep)
1576 struct xhci_hcd *xhci;
1577 struct xhci_container_ctx *in_ctx, *out_ctx;
1578 struct xhci_input_control_ctx *ctrl_ctx;
1579 struct xhci_slot_ctx *slot_ctx;
1580 unsigned int last_ctx;
1581 unsigned int ep_index;
1582 struct xhci_ep_ctx *ep_ctx;
1584 u32 new_add_flags, new_drop_flags, new_slot_info;
1587 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1590 xhci = hcd_to_xhci(hcd);
1591 if (xhci->xhc_state & XHCI_STATE_DYING)
1594 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1595 drop_flag = xhci_get_endpoint_flag(&ep->desc);
1596 if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) {
1597 xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n",
1598 __func__, drop_flag);
1602 in_ctx = xhci->devs[udev->slot_id]->in_ctx;
1603 out_ctx = xhci->devs[udev->slot_id]->out_ctx;
1604 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1605 ep_index = xhci_get_endpoint_index(&ep->desc);
1606 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1607 /* If the HC already knows the endpoint is disabled,
1608 * or the HCD has noted it is disabled, ignore this request
1610 if (((ep_ctx->ep_info & cpu_to_le32(EP_STATE_MASK)) ==
1611 cpu_to_le32(EP_STATE_DISABLED)) ||
1612 le32_to_cpu(ctrl_ctx->drop_flags) &
1613 xhci_get_endpoint_flag(&ep->desc)) {
1614 xhci_warn(xhci, "xHCI %s called with disabled ep %p\n",
1619 ctrl_ctx->drop_flags |= cpu_to_le32(drop_flag);
1620 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1622 ctrl_ctx->add_flags &= cpu_to_le32(~drop_flag);
1623 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1625 last_ctx = xhci_last_valid_endpoint(le32_to_cpu(ctrl_ctx->add_flags));
1626 slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1627 /* Update the last valid endpoint context, if we deleted the last one */
1628 if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) >
1629 LAST_CTX(last_ctx)) {
1630 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1631 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1633 new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1635 xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep);
1637 xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1638 (unsigned int) ep->desc.bEndpointAddress,
1640 (unsigned int) new_drop_flags,
1641 (unsigned int) new_add_flags,
1642 (unsigned int) new_slot_info);
1646 /* Add an endpoint to a new possible bandwidth configuration for this device.
1647 * Only one call to this function is allowed per endpoint before
1648 * check_bandwidth() or reset_bandwidth() must be called.
1649 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1650 * add the endpoint to the schedule with possibly new parameters denoted by a
1651 * different endpoint descriptor in usb_host_endpoint.
1652 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1655 * The USB core will not allow URBs to be queued to an endpoint until the
1656 * configuration or alt setting is installed in the device, so there's no need
1657 * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1659 int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1660 struct usb_host_endpoint *ep)
1662 struct xhci_hcd *xhci;
1663 struct xhci_container_ctx *in_ctx, *out_ctx;
1664 unsigned int ep_index;
1665 struct xhci_slot_ctx *slot_ctx;
1666 struct xhci_input_control_ctx *ctrl_ctx;
1668 unsigned int last_ctx;
1669 u32 new_add_flags, new_drop_flags, new_slot_info;
1670 struct xhci_virt_device *virt_dev;
1673 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1675 /* So we won't queue a reset ep command for a root hub */
1679 xhci = hcd_to_xhci(hcd);
1680 if (xhci->xhc_state & XHCI_STATE_DYING)
1683 added_ctxs = xhci_get_endpoint_flag(&ep->desc);
1684 last_ctx = xhci_last_valid_endpoint(added_ctxs);
1685 if (added_ctxs == SLOT_FLAG || added_ctxs == EP0_FLAG) {
1686 /* FIXME when we have to issue an evaluate endpoint command to
1687 * deal with ep0 max packet size changing once we get the
1690 xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n",
1691 __func__, added_ctxs);
1695 virt_dev = xhci->devs[udev->slot_id];
1696 in_ctx = virt_dev->in_ctx;
1697 out_ctx = virt_dev->out_ctx;
1698 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1699 ep_index = xhci_get_endpoint_index(&ep->desc);
1701 /* If this endpoint is already in use, and the upper layers are trying
1702 * to add it again without dropping it, reject the addition.
1704 if (virt_dev->eps[ep_index].ring &&
1705 !(le32_to_cpu(ctrl_ctx->drop_flags) &
1706 xhci_get_endpoint_flag(&ep->desc))) {
1707 xhci_warn(xhci, "Trying to add endpoint 0x%x "
1708 "without dropping it.\n",
1709 (unsigned int) ep->desc.bEndpointAddress);
1713 /* If the HCD has already noted the endpoint is enabled,
1714 * ignore this request.
1716 if (le32_to_cpu(ctrl_ctx->add_flags) &
1717 xhci_get_endpoint_flag(&ep->desc)) {
1718 xhci_warn(xhci, "xHCI %s called with enabled ep %p\n",
1724 * Configuration and alternate setting changes must be done in
1725 * process context, not interrupt context (or so documenation
1726 * for usb_set_interface() and usb_set_configuration() claim).
1728 if (xhci_endpoint_init(xhci, virt_dev, udev, ep, GFP_NOIO) < 0) {
1729 dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n",
1730 __func__, ep->desc.bEndpointAddress);
1734 ctrl_ctx->add_flags |= cpu_to_le32(added_ctxs);
1735 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1737 /* If xhci_endpoint_disable() was called for this endpoint, but the
1738 * xHC hasn't been notified yet through the check_bandwidth() call,
1739 * this re-adds a new state for the endpoint from the new endpoint
1740 * descriptors. We must drop and re-add this endpoint, so we leave the
1743 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1745 slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1746 /* Update the last valid endpoint context, if we just added one past */
1747 if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) <
1748 LAST_CTX(last_ctx)) {
1749 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1750 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1752 new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1754 /* Store the usb_device pointer for later use */
1757 xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1758 (unsigned int) ep->desc.bEndpointAddress,
1760 (unsigned int) new_drop_flags,
1761 (unsigned int) new_add_flags,
1762 (unsigned int) new_slot_info);
1766 static void xhci_zero_in_ctx(struct xhci_hcd *xhci, struct xhci_virt_device *virt_dev)
1768 struct xhci_input_control_ctx *ctrl_ctx;
1769 struct xhci_ep_ctx *ep_ctx;
1770 struct xhci_slot_ctx *slot_ctx;
1773 /* When a device's add flag and drop flag are zero, any subsequent
1774 * configure endpoint command will leave that endpoint's state
1775 * untouched. Make sure we don't leave any old state in the input
1776 * endpoint contexts.
1778 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
1779 ctrl_ctx->drop_flags = 0;
1780 ctrl_ctx->add_flags = 0;
1781 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
1782 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1783 /* Endpoint 0 is always valid */
1784 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1));
1785 for (i = 1; i < 31; ++i) {
1786 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i);
1787 ep_ctx->ep_info = 0;
1788 ep_ctx->ep_info2 = 0;
1790 ep_ctx->tx_info = 0;
1794 static int xhci_configure_endpoint_result(struct xhci_hcd *xhci,
1795 struct usb_device *udev, u32 *cmd_status)
1799 switch (*cmd_status) {
1801 dev_warn(&udev->dev, "Not enough host controller resources "
1802 "for new device state.\n");
1804 /* FIXME: can we allocate more resources for the HC? */
1807 case COMP_2ND_BW_ERR:
1808 dev_warn(&udev->dev, "Not enough bandwidth "
1809 "for new device state.\n");
1811 /* FIXME: can we go back to the old state? */
1814 /* the HCD set up something wrong */
1815 dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, "
1817 "and endpoint is not disabled.\n");
1821 dev_warn(&udev->dev, "ERROR: Incompatible device for endpoint "
1822 "configure command.\n");
1826 dev_dbg(&udev->dev, "Successful Endpoint Configure command\n");
1830 xhci_err(xhci, "ERROR: unexpected command completion "
1831 "code 0x%x.\n", *cmd_status);
1838 static int xhci_evaluate_context_result(struct xhci_hcd *xhci,
1839 struct usb_device *udev, u32 *cmd_status)
1842 struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id];
1844 switch (*cmd_status) {
1846 dev_warn(&udev->dev, "WARN: xHCI driver setup invalid evaluate "
1847 "context command.\n");
1851 dev_warn(&udev->dev, "WARN: slot not enabled for"
1852 "evaluate context command.\n");
1855 case COMP_CTX_STATE:
1856 dev_warn(&udev->dev, "WARN: invalid context state for "
1857 "evaluate context command.\n");
1858 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 1);
1862 dev_warn(&udev->dev, "ERROR: Incompatible device for evaluate "
1863 "context command.\n");
1867 /* Max Exit Latency too large error */
1868 dev_warn(&udev->dev, "WARN: Max Exit Latency too large\n");
1872 dev_dbg(&udev->dev, "Successful evaluate context command\n");
1876 xhci_err(xhci, "ERROR: unexpected command completion "
1877 "code 0x%x.\n", *cmd_status);
1884 static u32 xhci_count_num_new_endpoints(struct xhci_hcd *xhci,
1885 struct xhci_container_ctx *in_ctx)
1887 struct xhci_input_control_ctx *ctrl_ctx;
1888 u32 valid_add_flags;
1889 u32 valid_drop_flags;
1891 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1892 /* Ignore the slot flag (bit 0), and the default control endpoint flag
1893 * (bit 1). The default control endpoint is added during the Address
1894 * Device command and is never removed until the slot is disabled.
1896 valid_add_flags = ctrl_ctx->add_flags >> 2;
1897 valid_drop_flags = ctrl_ctx->drop_flags >> 2;
1899 /* Use hweight32 to count the number of ones in the add flags, or
1900 * number of endpoints added. Don't count endpoints that are changed
1901 * (both added and dropped).
1903 return hweight32(valid_add_flags) -
1904 hweight32(valid_add_flags & valid_drop_flags);
1907 static unsigned int xhci_count_num_dropped_endpoints(struct xhci_hcd *xhci,
1908 struct xhci_container_ctx *in_ctx)
1910 struct xhci_input_control_ctx *ctrl_ctx;
1911 u32 valid_add_flags;
1912 u32 valid_drop_flags;
1914 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1915 valid_add_flags = ctrl_ctx->add_flags >> 2;
1916 valid_drop_flags = ctrl_ctx->drop_flags >> 2;
1918 return hweight32(valid_drop_flags) -
1919 hweight32(valid_add_flags & valid_drop_flags);
1923 * We need to reserve the new number of endpoints before the configure endpoint
1924 * command completes. We can't subtract the dropped endpoints from the number
1925 * of active endpoints until the command completes because we can oversubscribe
1926 * the host in this case:
1928 * - the first configure endpoint command drops more endpoints than it adds
1929 * - a second configure endpoint command that adds more endpoints is queued
1930 * - the first configure endpoint command fails, so the config is unchanged
1931 * - the second command may succeed, even though there isn't enough resources
1933 * Must be called with xhci->lock held.
1935 static int xhci_reserve_host_resources(struct xhci_hcd *xhci,
1936 struct xhci_container_ctx *in_ctx)
1940 added_eps = xhci_count_num_new_endpoints(xhci, in_ctx);
1941 if (xhci->num_active_eps + added_eps > xhci->limit_active_eps) {
1942 xhci_dbg(xhci, "Not enough ep ctxs: "
1943 "%u active, need to add %u, limit is %u.\n",
1944 xhci->num_active_eps, added_eps,
1945 xhci->limit_active_eps);
1948 xhci->num_active_eps += added_eps;
1949 xhci_dbg(xhci, "Adding %u ep ctxs, %u now active.\n", added_eps,
1950 xhci->num_active_eps);
1955 * The configure endpoint was failed by the xHC for some other reason, so we
1956 * need to revert the resources that failed configuration would have used.
1958 * Must be called with xhci->lock held.
1960 static void xhci_free_host_resources(struct xhci_hcd *xhci,
1961 struct xhci_container_ctx *in_ctx)
1965 num_failed_eps = xhci_count_num_new_endpoints(xhci, in_ctx);
1966 xhci->num_active_eps -= num_failed_eps;
1967 xhci_dbg(xhci, "Removing %u failed ep ctxs, %u now active.\n",
1969 xhci->num_active_eps);
1973 * Now that the command has completed, clean up the active endpoint count by
1974 * subtracting out the endpoints that were dropped (but not changed).
1976 * Must be called with xhci->lock held.
1978 static void xhci_finish_resource_reservation(struct xhci_hcd *xhci,
1979 struct xhci_container_ctx *in_ctx)
1981 u32 num_dropped_eps;
1983 num_dropped_eps = xhci_count_num_dropped_endpoints(xhci, in_ctx);
1984 xhci->num_active_eps -= num_dropped_eps;
1985 if (num_dropped_eps)
1986 xhci_dbg(xhci, "Removing %u dropped ep ctxs, %u now active.\n",
1988 xhci->num_active_eps);
1991 static unsigned int xhci_get_block_size(struct usb_device *udev)
1993 switch (udev->speed) {
1995 case USB_SPEED_FULL:
1997 case USB_SPEED_HIGH:
1999 case USB_SPEED_SUPER:
2001 case USB_SPEED_UNKNOWN:
2002 case USB_SPEED_WIRELESS:
2004 /* Should never happen */
2010 xhci_get_largest_overhead(struct xhci_interval_bw *interval_bw)
2012 if (interval_bw->overhead[LS_OVERHEAD_TYPE])
2014 if (interval_bw->overhead[FS_OVERHEAD_TYPE])
2019 /* If we are changing a LS/FS device under a HS hub,
2020 * make sure (if we are activating a new TT) that the HS bus has enough
2021 * bandwidth for this new TT.
2023 static int xhci_check_tt_bw_table(struct xhci_hcd *xhci,
2024 struct xhci_virt_device *virt_dev,
2027 struct xhci_interval_bw_table *bw_table;
2028 struct xhci_tt_bw_info *tt_info;
2030 /* Find the bandwidth table for the root port this TT is attached to. */
2031 bw_table = &xhci->rh_bw[virt_dev->real_port - 1].bw_table;
2032 tt_info = virt_dev->tt_info;
2033 /* If this TT already had active endpoints, the bandwidth for this TT
2034 * has already been added. Removing all periodic endpoints (and thus
2035 * making the TT enactive) will only decrease the bandwidth used.
2039 if (old_active_eps == 0 && tt_info->active_eps != 0) {
2040 if (bw_table->bw_used + TT_HS_OVERHEAD > HS_BW_LIMIT)
2044 /* Not sure why we would have no new active endpoints...
2046 * Maybe because of an Evaluate Context change for a hub update or a
2047 * control endpoint 0 max packet size change?
2048 * FIXME: skip the bandwidth calculation in that case.
2053 static int xhci_check_ss_bw(struct xhci_hcd *xhci,
2054 struct xhci_virt_device *virt_dev)
2056 unsigned int bw_reserved;
2058 bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_IN, 100);
2059 if (virt_dev->bw_table->ss_bw_in > (SS_BW_LIMIT_IN - bw_reserved))
2062 bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_OUT, 100);
2063 if (virt_dev->bw_table->ss_bw_out > (SS_BW_LIMIT_OUT - bw_reserved))
2070 * This algorithm is a very conservative estimate of the worst-case scheduling
2071 * scenario for any one interval. The hardware dynamically schedules the
2072 * packets, so we can't tell which microframe could be the limiting factor in
2073 * the bandwidth scheduling. This only takes into account periodic endpoints.
2075 * Obviously, we can't solve an NP complete problem to find the minimum worst
2076 * case scenario. Instead, we come up with an estimate that is no less than
2077 * the worst case bandwidth used for any one microframe, but may be an
2080 * We walk the requirements for each endpoint by interval, starting with the
2081 * smallest interval, and place packets in the schedule where there is only one
2082 * possible way to schedule packets for that interval. In order to simplify
2083 * this algorithm, we record the largest max packet size for each interval, and
2084 * assume all packets will be that size.
2086 * For interval 0, we obviously must schedule all packets for each interval.
2087 * The bandwidth for interval 0 is just the amount of data to be transmitted
2088 * (the sum of all max ESIT payload sizes, plus any overhead per packet times
2089 * the number of packets).
2091 * For interval 1, we have two possible microframes to schedule those packets
2092 * in. For this algorithm, if we can schedule the same number of packets for
2093 * each possible scheduling opportunity (each microframe), we will do so. The
2094 * remaining number of packets will be saved to be transmitted in the gaps in
2095 * the next interval's scheduling sequence.
2097 * As we move those remaining packets to be scheduled with interval 2 packets,
2098 * we have to double the number of remaining packets to transmit. This is
2099 * because the intervals are actually powers of 2, and we would be transmitting
2100 * the previous interval's packets twice in this interval. We also have to be
2101 * sure that when we look at the largest max packet size for this interval, we
2102 * also look at the largest max packet size for the remaining packets and take
2103 * the greater of the two.
2105 * The algorithm continues to evenly distribute packets in each scheduling
2106 * opportunity, and push the remaining packets out, until we get to the last
2107 * interval. Then those packets and their associated overhead are just added
2108 * to the bandwidth used.
2110 static int xhci_check_bw_table(struct xhci_hcd *xhci,
2111 struct xhci_virt_device *virt_dev,
2114 unsigned int bw_reserved;
2115 unsigned int max_bandwidth;
2116 unsigned int bw_used;
2117 unsigned int block_size;
2118 struct xhci_interval_bw_table *bw_table;
2119 unsigned int packet_size = 0;
2120 unsigned int overhead = 0;
2121 unsigned int packets_transmitted = 0;
2122 unsigned int packets_remaining = 0;
2125 if (virt_dev->udev->speed == USB_SPEED_SUPER)
2126 return xhci_check_ss_bw(xhci, virt_dev);
2128 if (virt_dev->udev->speed == USB_SPEED_HIGH) {
2129 max_bandwidth = HS_BW_LIMIT;
2130 /* Convert percent of bus BW reserved to blocks reserved */
2131 bw_reserved = DIV_ROUND_UP(HS_BW_RESERVED * max_bandwidth, 100);
2133 max_bandwidth = FS_BW_LIMIT;
2134 bw_reserved = DIV_ROUND_UP(FS_BW_RESERVED * max_bandwidth, 100);
2137 bw_table = virt_dev->bw_table;
2138 /* We need to translate the max packet size and max ESIT payloads into
2139 * the units the hardware uses.
2141 block_size = xhci_get_block_size(virt_dev->udev);
2143 /* If we are manipulating a LS/FS device under a HS hub, double check
2144 * that the HS bus has enough bandwidth if we are activing a new TT.
2146 if (virt_dev->tt_info) {
2147 xhci_dbg(xhci, "Recalculating BW for rootport %u\n",
2148 virt_dev->real_port);
2149 if (xhci_check_tt_bw_table(xhci, virt_dev, old_active_eps)) {
2150 xhci_warn(xhci, "Not enough bandwidth on HS bus for "
2151 "newly activated TT.\n");
2154 xhci_dbg(xhci, "Recalculating BW for TT slot %u port %u\n",
2155 virt_dev->tt_info->slot_id,
2156 virt_dev->tt_info->ttport);
2158 xhci_dbg(xhci, "Recalculating BW for rootport %u\n",
2159 virt_dev->real_port);
2162 /* Add in how much bandwidth will be used for interval zero, or the
2163 * rounded max ESIT payload + number of packets * largest overhead.
2165 bw_used = DIV_ROUND_UP(bw_table->interval0_esit_payload, block_size) +
2166 bw_table->interval_bw[0].num_packets *
2167 xhci_get_largest_overhead(&bw_table->interval_bw[0]);
2169 for (i = 1; i < XHCI_MAX_INTERVAL; i++) {
2170 unsigned int bw_added;
2171 unsigned int largest_mps;
2172 unsigned int interval_overhead;
2175 * How many packets could we transmit in this interval?
2176 * If packets didn't fit in the previous interval, we will need
2177 * to transmit that many packets twice within this interval.
2179 packets_remaining = 2 * packets_remaining +
2180 bw_table->interval_bw[i].num_packets;
2182 /* Find the largest max packet size of this or the previous
2185 if (list_empty(&bw_table->interval_bw[i].endpoints))
2188 struct xhci_virt_ep *virt_ep;
2189 struct list_head *ep_entry;
2191 ep_entry = bw_table->interval_bw[i].endpoints.next;
2192 virt_ep = list_entry(ep_entry,
2193 struct xhci_virt_ep, bw_endpoint_list);
2194 /* Convert to blocks, rounding up */
2195 largest_mps = DIV_ROUND_UP(
2196 virt_ep->bw_info.max_packet_size,
2199 if (largest_mps > packet_size)
2200 packet_size = largest_mps;
2202 /* Use the larger overhead of this or the previous interval. */
2203 interval_overhead = xhci_get_largest_overhead(
2204 &bw_table->interval_bw[i]);
2205 if (interval_overhead > overhead)
2206 overhead = interval_overhead;
2208 /* How many packets can we evenly distribute across
2209 * (1 << (i + 1)) possible scheduling opportunities?
2211 packets_transmitted = packets_remaining >> (i + 1);
2213 /* Add in the bandwidth used for those scheduled packets */
2214 bw_added = packets_transmitted * (overhead + packet_size);
2216 /* How many packets do we have remaining to transmit? */
2217 packets_remaining = packets_remaining % (1 << (i + 1));
2219 /* What largest max packet size should those packets have? */
2220 /* If we've transmitted all packets, don't carry over the
2221 * largest packet size.
2223 if (packets_remaining == 0) {
2226 } else if (packets_transmitted > 0) {
2227 /* Otherwise if we do have remaining packets, and we've
2228 * scheduled some packets in this interval, take the
2229 * largest max packet size from endpoints with this
2232 packet_size = largest_mps;
2233 overhead = interval_overhead;
2235 /* Otherwise carry over packet_size and overhead from the last
2236 * time we had a remainder.
2238 bw_used += bw_added;
2239 if (bw_used > max_bandwidth) {
2240 xhci_warn(xhci, "Not enough bandwidth. "
2241 "Proposed: %u, Max: %u\n",
2242 bw_used, max_bandwidth);
2247 * Ok, we know we have some packets left over after even-handedly
2248 * scheduling interval 15. We don't know which microframes they will
2249 * fit into, so we over-schedule and say they will be scheduled every
2252 if (packets_remaining > 0)
2253 bw_used += overhead + packet_size;
2255 if (!virt_dev->tt_info && virt_dev->udev->speed == USB_SPEED_HIGH) {
2256 unsigned int port_index = virt_dev->real_port - 1;
2258 /* OK, we're manipulating a HS device attached to a
2259 * root port bandwidth domain. Include the number of active TTs
2260 * in the bandwidth used.
2262 bw_used += TT_HS_OVERHEAD *
2263 xhci->rh_bw[port_index].num_active_tts;
2266 xhci_dbg(xhci, "Final bandwidth: %u, Limit: %u, Reserved: %u, "
2267 "Available: %u " "percent\n",
2268 bw_used, max_bandwidth, bw_reserved,
2269 (max_bandwidth - bw_used - bw_reserved) * 100 /
2272 bw_used += bw_reserved;
2273 if (bw_used > max_bandwidth) {
2274 xhci_warn(xhci, "Not enough bandwidth. Proposed: %u, Max: %u\n",
2275 bw_used, max_bandwidth);
2279 bw_table->bw_used = bw_used;
2283 static bool xhci_is_async_ep(unsigned int ep_type)
2285 return (ep_type != ISOC_OUT_EP && ep_type != INT_OUT_EP &&
2286 ep_type != ISOC_IN_EP &&
2287 ep_type != INT_IN_EP);
2290 static bool xhci_is_sync_in_ep(unsigned int ep_type)
2292 return (ep_type == ISOC_IN_EP || ep_type == INT_IN_EP);
2295 static unsigned int xhci_get_ss_bw_consumed(struct xhci_bw_info *ep_bw)
2297 unsigned int mps = DIV_ROUND_UP(ep_bw->max_packet_size, SS_BLOCK);
2299 if (ep_bw->ep_interval == 0)
2300 return SS_OVERHEAD_BURST +
2301 (ep_bw->mult * ep_bw->num_packets *
2302 (SS_OVERHEAD + mps));
2303 return DIV_ROUND_UP(ep_bw->mult * ep_bw->num_packets *
2304 (SS_OVERHEAD + mps + SS_OVERHEAD_BURST),
2305 1 << ep_bw->ep_interval);
2309 void xhci_drop_ep_from_interval_table(struct xhci_hcd *xhci,
2310 struct xhci_bw_info *ep_bw,
2311 struct xhci_interval_bw_table *bw_table,
2312 struct usb_device *udev,
2313 struct xhci_virt_ep *virt_ep,
2314 struct xhci_tt_bw_info *tt_info)
2316 struct xhci_interval_bw *interval_bw;
2317 int normalized_interval;
2319 if (xhci_is_async_ep(ep_bw->type))
2322 if (udev->speed == USB_SPEED_SUPER) {
2323 if (xhci_is_sync_in_ep(ep_bw->type))
2324 xhci->devs[udev->slot_id]->bw_table->ss_bw_in -=
2325 xhci_get_ss_bw_consumed(ep_bw);
2327 xhci->devs[udev->slot_id]->bw_table->ss_bw_out -=
2328 xhci_get_ss_bw_consumed(ep_bw);
2332 /* SuperSpeed endpoints never get added to intervals in the table, so
2333 * this check is only valid for HS/FS/LS devices.
2335 if (list_empty(&virt_ep->bw_endpoint_list))
2337 /* For LS/FS devices, we need to translate the interval expressed in
2338 * microframes to frames.
2340 if (udev->speed == USB_SPEED_HIGH)
2341 normalized_interval = ep_bw->ep_interval;
2343 normalized_interval = ep_bw->ep_interval - 3;
2345 if (normalized_interval == 0)
2346 bw_table->interval0_esit_payload -= ep_bw->max_esit_payload;
2347 interval_bw = &bw_table->interval_bw[normalized_interval];
2348 interval_bw->num_packets -= ep_bw->num_packets;
2349 switch (udev->speed) {
2351 interval_bw->overhead[LS_OVERHEAD_TYPE] -= 1;
2353 case USB_SPEED_FULL:
2354 interval_bw->overhead[FS_OVERHEAD_TYPE] -= 1;
2356 case USB_SPEED_HIGH:
2357 interval_bw->overhead[HS_OVERHEAD_TYPE] -= 1;
2359 case USB_SPEED_SUPER:
2360 case USB_SPEED_UNKNOWN:
2361 case USB_SPEED_WIRELESS:
2362 /* Should never happen because only LS/FS/HS endpoints will get
2363 * added to the endpoint list.
2368 tt_info->active_eps -= 1;
2369 list_del_init(&virt_ep->bw_endpoint_list);
2372 static void xhci_add_ep_to_interval_table(struct xhci_hcd *xhci,
2373 struct xhci_bw_info *ep_bw,
2374 struct xhci_interval_bw_table *bw_table,
2375 struct usb_device *udev,
2376 struct xhci_virt_ep *virt_ep,
2377 struct xhci_tt_bw_info *tt_info)
2379 struct xhci_interval_bw *interval_bw;
2380 struct xhci_virt_ep *smaller_ep;
2381 int normalized_interval;
2383 if (xhci_is_async_ep(ep_bw->type))
2386 if (udev->speed == USB_SPEED_SUPER) {
2387 if (xhci_is_sync_in_ep(ep_bw->type))
2388 xhci->devs[udev->slot_id]->bw_table->ss_bw_in +=
2389 xhci_get_ss_bw_consumed(ep_bw);
2391 xhci->devs[udev->slot_id]->bw_table->ss_bw_out +=
2392 xhci_get_ss_bw_consumed(ep_bw);
2396 /* For LS/FS devices, we need to translate the interval expressed in
2397 * microframes to frames.
2399 if (udev->speed == USB_SPEED_HIGH)
2400 normalized_interval = ep_bw->ep_interval;
2402 normalized_interval = ep_bw->ep_interval - 3;
2404 if (normalized_interval == 0)
2405 bw_table->interval0_esit_payload += ep_bw->max_esit_payload;
2406 interval_bw = &bw_table->interval_bw[normalized_interval];
2407 interval_bw->num_packets += ep_bw->num_packets;
2408 switch (udev->speed) {
2410 interval_bw->overhead[LS_OVERHEAD_TYPE] += 1;
2412 case USB_SPEED_FULL:
2413 interval_bw->overhead[FS_OVERHEAD_TYPE] += 1;
2415 case USB_SPEED_HIGH:
2416 interval_bw->overhead[HS_OVERHEAD_TYPE] += 1;
2418 case USB_SPEED_SUPER:
2419 case USB_SPEED_UNKNOWN:
2420 case USB_SPEED_WIRELESS:
2421 /* Should never happen because only LS/FS/HS endpoints will get
2422 * added to the endpoint list.
2428 tt_info->active_eps += 1;
2429 /* Insert the endpoint into the list, largest max packet size first. */
2430 list_for_each_entry(smaller_ep, &interval_bw->endpoints,
2432 if (ep_bw->max_packet_size >=
2433 smaller_ep->bw_info.max_packet_size) {
2434 /* Add the new ep before the smaller endpoint */
2435 list_add_tail(&virt_ep->bw_endpoint_list,
2436 &smaller_ep->bw_endpoint_list);
2440 /* Add the new endpoint at the end of the list. */
2441 list_add_tail(&virt_ep->bw_endpoint_list,
2442 &interval_bw->endpoints);
2445 void xhci_update_tt_active_eps(struct xhci_hcd *xhci,
2446 struct xhci_virt_device *virt_dev,
2449 struct xhci_root_port_bw_info *rh_bw_info;
2450 if (!virt_dev->tt_info)
2453 rh_bw_info = &xhci->rh_bw[virt_dev->real_port - 1];
2454 if (old_active_eps == 0 &&
2455 virt_dev->tt_info->active_eps != 0) {
2456 rh_bw_info->num_active_tts += 1;
2457 rh_bw_info->bw_table.bw_used += TT_HS_OVERHEAD;
2458 } else if (old_active_eps != 0 &&
2459 virt_dev->tt_info->active_eps == 0) {
2460 rh_bw_info->num_active_tts -= 1;
2461 rh_bw_info->bw_table.bw_used -= TT_HS_OVERHEAD;
2465 static int xhci_reserve_bandwidth(struct xhci_hcd *xhci,
2466 struct xhci_virt_device *virt_dev,
2467 struct xhci_container_ctx *in_ctx)
2469 struct xhci_bw_info ep_bw_info[31];
2471 struct xhci_input_control_ctx *ctrl_ctx;
2472 int old_active_eps = 0;
2474 if (virt_dev->tt_info)
2475 old_active_eps = virt_dev->tt_info->active_eps;
2477 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
2479 for (i = 0; i < 31; i++) {
2480 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2483 /* Make a copy of the BW info in case we need to revert this */
2484 memcpy(&ep_bw_info[i], &virt_dev->eps[i].bw_info,
2485 sizeof(ep_bw_info[i]));
2486 /* Drop the endpoint from the interval table if the endpoint is
2487 * being dropped or changed.
2489 if (EP_IS_DROPPED(ctrl_ctx, i))
2490 xhci_drop_ep_from_interval_table(xhci,
2491 &virt_dev->eps[i].bw_info,
2497 /* Overwrite the information stored in the endpoints' bw_info */
2498 xhci_update_bw_info(xhci, virt_dev->in_ctx, ctrl_ctx, virt_dev);
2499 for (i = 0; i < 31; i++) {
2500 /* Add any changed or added endpoints to the interval table */
2501 if (EP_IS_ADDED(ctrl_ctx, i))
2502 xhci_add_ep_to_interval_table(xhci,
2503 &virt_dev->eps[i].bw_info,
2510 if (!xhci_check_bw_table(xhci, virt_dev, old_active_eps)) {
2511 /* Ok, this fits in the bandwidth we have.
2512 * Update the number of active TTs.
2514 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
2518 /* We don't have enough bandwidth for this, revert the stored info. */
2519 for (i = 0; i < 31; i++) {
2520 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2523 /* Drop the new copies of any added or changed endpoints from
2524 * the interval table.
2526 if (EP_IS_ADDED(ctrl_ctx, i)) {
2527 xhci_drop_ep_from_interval_table(xhci,
2528 &virt_dev->eps[i].bw_info,
2534 /* Revert the endpoint back to its old information */
2535 memcpy(&virt_dev->eps[i].bw_info, &ep_bw_info[i],
2536 sizeof(ep_bw_info[i]));
2537 /* Add any changed or dropped endpoints back into the table */
2538 if (EP_IS_DROPPED(ctrl_ctx, i))
2539 xhci_add_ep_to_interval_table(xhci,
2540 &virt_dev->eps[i].bw_info,
2550 /* Issue a configure endpoint command or evaluate context command
2551 * and wait for it to finish.
2553 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
2554 struct usb_device *udev,
2555 struct xhci_command *command,
2556 bool ctx_change, bool must_succeed)
2560 unsigned long flags;
2561 struct xhci_container_ctx *in_ctx;
2562 struct completion *cmd_completion;
2564 struct xhci_virt_device *virt_dev;
2565 union xhci_trb *cmd_trb;
2567 spin_lock_irqsave(&xhci->lock, flags);
2568 virt_dev = xhci->devs[udev->slot_id];
2571 in_ctx = command->in_ctx;
2573 in_ctx = virt_dev->in_ctx;
2575 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK) &&
2576 xhci_reserve_host_resources(xhci, in_ctx)) {
2577 spin_unlock_irqrestore(&xhci->lock, flags);
2578 xhci_warn(xhci, "Not enough host resources, "
2579 "active endpoint contexts = %u\n",
2580 xhci->num_active_eps);
2583 if ((xhci->quirks & XHCI_SW_BW_CHECKING) &&
2584 xhci_reserve_bandwidth(xhci, virt_dev, in_ctx)) {
2585 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2586 xhci_free_host_resources(xhci, in_ctx);
2587 spin_unlock_irqrestore(&xhci->lock, flags);
2588 xhci_warn(xhci, "Not enough bandwidth\n");
2593 cmd_completion = command->completion;
2594 cmd_status = &command->status;
2595 command->command_trb = xhci->cmd_ring->enqueue;
2597 /* Enqueue pointer can be left pointing to the link TRB,
2598 * we must handle that
2600 if (TRB_TYPE_LINK_LE32(command->command_trb->link.control))
2601 command->command_trb =
2602 xhci->cmd_ring->enq_seg->next->trbs;
2604 list_add_tail(&command->cmd_list, &virt_dev->cmd_list);
2606 cmd_completion = &virt_dev->cmd_completion;
2607 cmd_status = &virt_dev->cmd_status;
2609 init_completion(cmd_completion);
2611 cmd_trb = xhci->cmd_ring->dequeue;
2613 ret = xhci_queue_configure_endpoint(xhci, in_ctx->dma,
2614 udev->slot_id, must_succeed);
2616 ret = xhci_queue_evaluate_context(xhci, in_ctx->dma,
2617 udev->slot_id, must_succeed);
2620 list_del(&command->cmd_list);
2621 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2622 xhci_free_host_resources(xhci, in_ctx);
2623 spin_unlock_irqrestore(&xhci->lock, flags);
2624 xhci_dbg(xhci, "FIXME allocate a new ring segment\n");
2627 xhci_ring_cmd_db(xhci);
2628 spin_unlock_irqrestore(&xhci->lock, flags);
2630 /* Wait for the configure endpoint command to complete */
2631 timeleft = wait_for_completion_interruptible_timeout(
2633 XHCI_CMD_DEFAULT_TIMEOUT);
2634 if (timeleft <= 0) {
2635 xhci_warn(xhci, "%s while waiting for %s command\n",
2636 timeleft == 0 ? "Timeout" : "Signal",
2638 "configure endpoint" :
2639 "evaluate context");
2640 /* cancel the configure endpoint command */
2641 ret = xhci_cancel_cmd(xhci, command, cmd_trb);
2648 ret = xhci_configure_endpoint_result(xhci, udev, cmd_status);
2650 ret = xhci_evaluate_context_result(xhci, udev, cmd_status);
2652 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
2653 spin_lock_irqsave(&xhci->lock, flags);
2654 /* If the command failed, remove the reserved resources.
2655 * Otherwise, clean up the estimate to include dropped eps.
2658 xhci_free_host_resources(xhci, in_ctx);
2660 xhci_finish_resource_reservation(xhci, in_ctx);
2661 spin_unlock_irqrestore(&xhci->lock, flags);
2666 /* Called after one or more calls to xhci_add_endpoint() or
2667 * xhci_drop_endpoint(). If this call fails, the USB core is expected
2668 * to call xhci_reset_bandwidth().
2670 * Since we are in the middle of changing either configuration or
2671 * installing a new alt setting, the USB core won't allow URBs to be
2672 * enqueued for any endpoint on the old config or interface. Nothing
2673 * else should be touching the xhci->devs[slot_id] structure, so we
2674 * don't need to take the xhci->lock for manipulating that.
2676 int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2680 struct xhci_hcd *xhci;
2681 struct xhci_virt_device *virt_dev;
2682 struct xhci_input_control_ctx *ctrl_ctx;
2683 struct xhci_slot_ctx *slot_ctx;
2685 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2688 xhci = hcd_to_xhci(hcd);
2689 if (xhci->xhc_state & XHCI_STATE_DYING)
2692 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2693 virt_dev = xhci->devs[udev->slot_id];
2695 /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
2696 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
2697 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2698 ctrl_ctx->add_flags &= cpu_to_le32(~EP0_FLAG);
2699 ctrl_ctx->drop_flags &= cpu_to_le32(~(SLOT_FLAG | EP0_FLAG));
2701 /* Don't issue the command if there's no endpoints to update. */
2702 if (ctrl_ctx->add_flags == cpu_to_le32(SLOT_FLAG) &&
2703 ctrl_ctx->drop_flags == 0)
2706 xhci_dbg(xhci, "New Input Control Context:\n");
2707 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
2708 xhci_dbg_ctx(xhci, virt_dev->in_ctx,
2709 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2711 ret = xhci_configure_endpoint(xhci, udev, NULL,
2714 /* Callee should call reset_bandwidth() */
2718 xhci_dbg(xhci, "Output context after successful config ep cmd:\n");
2719 xhci_dbg_ctx(xhci, virt_dev->out_ctx,
2720 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2722 /* Free any rings that were dropped, but not changed. */
2723 for (i = 1; i < 31; ++i) {
2724 if ((le32_to_cpu(ctrl_ctx->drop_flags) & (1 << (i + 1))) &&
2725 !(le32_to_cpu(ctrl_ctx->add_flags) & (1 << (i + 1))))
2726 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2728 xhci_zero_in_ctx(xhci, virt_dev);
2730 * Install any rings for completely new endpoints or changed endpoints,
2731 * and free or cache any old rings from changed endpoints.
2733 for (i = 1; i < 31; ++i) {
2734 if (!virt_dev->eps[i].new_ring)
2736 /* Only cache or free the old ring if it exists.
2737 * It may not if this is the first add of an endpoint.
2739 if (virt_dev->eps[i].ring) {
2740 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2742 virt_dev->eps[i].ring = virt_dev->eps[i].new_ring;
2743 virt_dev->eps[i].new_ring = NULL;
2749 void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2751 struct xhci_hcd *xhci;
2752 struct xhci_virt_device *virt_dev;
2755 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2758 xhci = hcd_to_xhci(hcd);
2760 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2761 virt_dev = xhci->devs[udev->slot_id];
2762 /* Free any rings allocated for added endpoints */
2763 for (i = 0; i < 31; ++i) {
2764 if (virt_dev->eps[i].new_ring) {
2765 xhci_ring_free(xhci, virt_dev->eps[i].new_ring);
2766 virt_dev->eps[i].new_ring = NULL;
2769 xhci_zero_in_ctx(xhci, virt_dev);
2772 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd *xhci,
2773 struct xhci_container_ctx *in_ctx,
2774 struct xhci_container_ctx *out_ctx,
2775 u32 add_flags, u32 drop_flags)
2777 struct xhci_input_control_ctx *ctrl_ctx;
2778 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
2779 ctrl_ctx->add_flags = cpu_to_le32(add_flags);
2780 ctrl_ctx->drop_flags = cpu_to_le32(drop_flags);
2781 xhci_slot_copy(xhci, in_ctx, out_ctx);
2782 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2784 xhci_dbg(xhci, "Input Context:\n");
2785 xhci_dbg_ctx(xhci, in_ctx, xhci_last_valid_endpoint(add_flags));
2788 static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd *xhci,
2789 unsigned int slot_id, unsigned int ep_index,
2790 struct xhci_dequeue_state *deq_state)
2792 struct xhci_container_ctx *in_ctx;
2793 struct xhci_ep_ctx *ep_ctx;
2797 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
2798 xhci->devs[slot_id]->out_ctx, ep_index);
2799 in_ctx = xhci->devs[slot_id]->in_ctx;
2800 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
2801 addr = xhci_trb_virt_to_dma(deq_state->new_deq_seg,
2802 deq_state->new_deq_ptr);
2804 xhci_warn(xhci, "WARN Cannot submit config ep after "
2805 "reset ep command\n");
2806 xhci_warn(xhci, "WARN deq seg = %p, deq ptr = %p\n",
2807 deq_state->new_deq_seg,
2808 deq_state->new_deq_ptr);
2811 ep_ctx->deq = cpu_to_le64(addr | deq_state->new_cycle_state);
2813 added_ctxs = xhci_get_endpoint_flag_from_index(ep_index);
2814 xhci_setup_input_ctx_for_config_ep(xhci, xhci->devs[slot_id]->in_ctx,
2815 xhci->devs[slot_id]->out_ctx, added_ctxs, added_ctxs);
2818 void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci,
2819 struct usb_device *udev, unsigned int ep_index)
2821 struct xhci_dequeue_state deq_state;
2822 struct xhci_virt_ep *ep;
2824 xhci_dbg(xhci, "Cleaning up stalled endpoint ring\n");
2825 ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2826 /* We need to move the HW's dequeue pointer past this TD,
2827 * or it will attempt to resend it on the next doorbell ring.
2829 xhci_find_new_dequeue_state(xhci, udev->slot_id,
2830 ep_index, ep->stopped_stream, ep->stopped_td,
2833 /* HW with the reset endpoint quirk will use the saved dequeue state to
2834 * issue a configure endpoint command later.
2836 if (!(xhci->quirks & XHCI_RESET_EP_QUIRK)) {
2837 xhci_dbg(xhci, "Queueing new dequeue state\n");
2838 xhci_queue_new_dequeue_state(xhci, udev->slot_id,
2839 ep_index, ep->stopped_stream, &deq_state);
2841 /* Better hope no one uses the input context between now and the
2842 * reset endpoint completion!
2843 * XXX: No idea how this hardware will react when stream rings
2846 xhci_dbg(xhci, "Setting up input context for "
2847 "configure endpoint command\n");
2848 xhci_setup_input_ctx_for_quirk(xhci, udev->slot_id,
2849 ep_index, &deq_state);
2853 /* Deal with stalled endpoints. The core should have sent the control message
2854 * to clear the halt condition. However, we need to make the xHCI hardware
2855 * reset its sequence number, since a device will expect a sequence number of
2856 * zero after the halt condition is cleared.
2857 * Context: in_interrupt
2859 void xhci_endpoint_reset(struct usb_hcd *hcd,
2860 struct usb_host_endpoint *ep)
2862 struct xhci_hcd *xhci;
2863 struct usb_device *udev;
2864 unsigned int ep_index;
2865 unsigned long flags;
2867 struct xhci_virt_ep *virt_ep;
2869 xhci = hcd_to_xhci(hcd);
2870 udev = (struct usb_device *) ep->hcpriv;
2871 /* Called with a root hub endpoint (or an endpoint that wasn't added
2872 * with xhci_add_endpoint()
2876 ep_index = xhci_get_endpoint_index(&ep->desc);
2877 virt_ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2878 if (!virt_ep->stopped_td) {
2879 xhci_dbg(xhci, "Endpoint 0x%x not halted, refusing to reset.\n",
2880 ep->desc.bEndpointAddress);
2883 if (usb_endpoint_xfer_control(&ep->desc)) {
2884 xhci_dbg(xhci, "Control endpoint stall already handled.\n");
2888 xhci_dbg(xhci, "Queueing reset endpoint command\n");
2889 spin_lock_irqsave(&xhci->lock, flags);
2890 ret = xhci_queue_reset_ep(xhci, udev->slot_id, ep_index);
2892 * Can't change the ring dequeue pointer until it's transitioned to the
2893 * stopped state, which is only upon a successful reset endpoint
2894 * command. Better hope that last command worked!
2897 xhci_cleanup_stalled_ring(xhci, udev, ep_index);
2898 kfree(virt_ep->stopped_td);
2899 xhci_ring_cmd_db(xhci);
2901 virt_ep->stopped_td = NULL;
2902 virt_ep->stopped_trb = NULL;
2903 virt_ep->stopped_stream = 0;
2904 spin_unlock_irqrestore(&xhci->lock, flags);
2907 xhci_warn(xhci, "FIXME allocate a new ring segment\n");
2910 static int xhci_check_streams_endpoint(struct xhci_hcd *xhci,
2911 struct usb_device *udev, struct usb_host_endpoint *ep,
2912 unsigned int slot_id)
2915 unsigned int ep_index;
2916 unsigned int ep_state;
2920 ret = xhci_check_args(xhci_to_hcd(xhci), udev, ep, 1, true, __func__);
2923 if (ep->ss_ep_comp.bmAttributes == 0) {
2924 xhci_warn(xhci, "WARN: SuperSpeed Endpoint Companion"
2925 " descriptor for ep 0x%x does not support streams\n",
2926 ep->desc.bEndpointAddress);
2930 ep_index = xhci_get_endpoint_index(&ep->desc);
2931 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
2932 if (ep_state & EP_HAS_STREAMS ||
2933 ep_state & EP_GETTING_STREAMS) {
2934 xhci_warn(xhci, "WARN: SuperSpeed bulk endpoint 0x%x "
2935 "already has streams set up.\n",
2936 ep->desc.bEndpointAddress);
2937 xhci_warn(xhci, "Send email to xHCI maintainer and ask for "
2938 "dynamic stream context array reallocation.\n");
2941 if (!list_empty(&xhci->devs[slot_id]->eps[ep_index].ring->td_list)) {
2942 xhci_warn(xhci, "Cannot setup streams for SuperSpeed bulk "
2943 "endpoint 0x%x; URBs are pending.\n",
2944 ep->desc.bEndpointAddress);
2950 static void xhci_calculate_streams_entries(struct xhci_hcd *xhci,
2951 unsigned int *num_streams, unsigned int *num_stream_ctxs)
2953 unsigned int max_streams;
2955 /* The stream context array size must be a power of two */
2956 *num_stream_ctxs = roundup_pow_of_two(*num_streams);
2958 * Find out how many primary stream array entries the host controller
2959 * supports. Later we may use secondary stream arrays (similar to 2nd
2960 * level page entries), but that's an optional feature for xHCI host
2961 * controllers. xHCs must support at least 4 stream IDs.
2963 max_streams = HCC_MAX_PSA(xhci->hcc_params);
2964 if (*num_stream_ctxs > max_streams) {
2965 xhci_dbg(xhci, "xHCI HW only supports %u stream ctx entries.\n",
2967 *num_stream_ctxs = max_streams;
2968 *num_streams = max_streams;
2972 /* Returns an error code if one of the endpoint already has streams.
2973 * This does not change any data structures, it only checks and gathers
2976 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd *xhci,
2977 struct usb_device *udev,
2978 struct usb_host_endpoint **eps, unsigned int num_eps,
2979 unsigned int *num_streams, u32 *changed_ep_bitmask)
2981 unsigned int max_streams;
2982 unsigned int endpoint_flag;
2986 for (i = 0; i < num_eps; i++) {
2987 ret = xhci_check_streams_endpoint(xhci, udev,
2988 eps[i], udev->slot_id);
2992 max_streams = usb_ss_max_streams(&eps[i]->ss_ep_comp);
2993 if (max_streams < (*num_streams - 1)) {
2994 xhci_dbg(xhci, "Ep 0x%x only supports %u stream IDs.\n",
2995 eps[i]->desc.bEndpointAddress,
2997 *num_streams = max_streams+1;
3000 endpoint_flag = xhci_get_endpoint_flag(&eps[i]->desc);
3001 if (*changed_ep_bitmask & endpoint_flag)
3003 *changed_ep_bitmask |= endpoint_flag;
3008 static u32 xhci_calculate_no_streams_bitmask(struct xhci_hcd *xhci,
3009 struct usb_device *udev,
3010 struct usb_host_endpoint **eps, unsigned int num_eps)
3012 u32 changed_ep_bitmask = 0;
3013 unsigned int slot_id;
3014 unsigned int ep_index;
3015 unsigned int ep_state;
3018 slot_id = udev->slot_id;
3019 if (!xhci->devs[slot_id])
3022 for (i = 0; i < num_eps; i++) {
3023 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3024 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
3025 /* Are streams already being freed for the endpoint? */
3026 if (ep_state & EP_GETTING_NO_STREAMS) {
3027 xhci_warn(xhci, "WARN Can't disable streams for "
3029 "streams are being disabled already.",
3030 eps[i]->desc.bEndpointAddress);
3033 /* Are there actually any streams to free? */
3034 if (!(ep_state & EP_HAS_STREAMS) &&
3035 !(ep_state & EP_GETTING_STREAMS)) {
3036 xhci_warn(xhci, "WARN Can't disable streams for "
3038 "streams are already disabled!",
3039 eps[i]->desc.bEndpointAddress);
3040 xhci_warn(xhci, "WARN xhci_free_streams() called "
3041 "with non-streams endpoint\n");
3044 changed_ep_bitmask |= xhci_get_endpoint_flag(&eps[i]->desc);
3046 return changed_ep_bitmask;
3050 * The USB device drivers use this function (though the HCD interface in USB
3051 * core) to prepare a set of bulk endpoints to use streams. Streams are used to
3052 * coordinate mass storage command queueing across multiple endpoints (basically
3053 * a stream ID == a task ID).
3055 * Setting up streams involves allocating the same size stream context array
3056 * for each endpoint and issuing a configure endpoint command for all endpoints.
3058 * Don't allow the call to succeed if one endpoint only supports one stream
3059 * (which means it doesn't support streams at all).
3061 * Drivers may get less stream IDs than they asked for, if the host controller
3062 * hardware or endpoints claim they can't support the number of requested
3065 int xhci_alloc_streams(struct usb_hcd *hcd, struct usb_device *udev,
3066 struct usb_host_endpoint **eps, unsigned int num_eps,
3067 unsigned int num_streams, gfp_t mem_flags)
3070 struct xhci_hcd *xhci;
3071 struct xhci_virt_device *vdev;
3072 struct xhci_command *config_cmd;
3073 unsigned int ep_index;
3074 unsigned int num_stream_ctxs;
3075 unsigned long flags;
3076 u32 changed_ep_bitmask = 0;
3081 /* Add one to the number of streams requested to account for
3082 * stream 0 that is reserved for xHCI usage.
3085 xhci = hcd_to_xhci(hcd);
3086 xhci_dbg(xhci, "Driver wants %u stream IDs (including stream 0).\n",
3089 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
3091 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
3095 /* Check to make sure all endpoints are not already configured for
3096 * streams. While we're at it, find the maximum number of streams that
3097 * all the endpoints will support and check for duplicate endpoints.
3099 spin_lock_irqsave(&xhci->lock, flags);
3100 ret = xhci_calculate_streams_and_bitmask(xhci, udev, eps,
3101 num_eps, &num_streams, &changed_ep_bitmask);
3103 xhci_free_command(xhci, config_cmd);
3104 spin_unlock_irqrestore(&xhci->lock, flags);
3107 if (num_streams <= 1) {
3108 xhci_warn(xhci, "WARN: endpoints can't handle "
3109 "more than one stream.\n");
3110 xhci_free_command(xhci, config_cmd);
3111 spin_unlock_irqrestore(&xhci->lock, flags);
3114 vdev = xhci->devs[udev->slot_id];
3115 /* Mark each endpoint as being in transition, so
3116 * xhci_urb_enqueue() will reject all URBs.
3118 for (i = 0; i < num_eps; i++) {
3119 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3120 vdev->eps[ep_index].ep_state |= EP_GETTING_STREAMS;
3122 spin_unlock_irqrestore(&xhci->lock, flags);
3124 /* Setup internal data structures and allocate HW data structures for
3125 * streams (but don't install the HW structures in the input context
3126 * until we're sure all memory allocation succeeded).
3128 xhci_calculate_streams_entries(xhci, &num_streams, &num_stream_ctxs);
3129 xhci_dbg(xhci, "Need %u stream ctx entries for %u stream IDs.\n",
3130 num_stream_ctxs, num_streams);
3132 for (i = 0; i < num_eps; i++) {
3133 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3134 vdev->eps[ep_index].stream_info = xhci_alloc_stream_info(xhci,
3136 num_streams, mem_flags);
3137 if (!vdev->eps[ep_index].stream_info)
3139 /* Set maxPstreams in endpoint context and update deq ptr to
3140 * point to stream context array. FIXME
3144 /* Set up the input context for a configure endpoint command. */
3145 for (i = 0; i < num_eps; i++) {
3146 struct xhci_ep_ctx *ep_ctx;
3148 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3149 ep_ctx = xhci_get_ep_ctx(xhci, config_cmd->in_ctx, ep_index);
3151 xhci_endpoint_copy(xhci, config_cmd->in_ctx,
3152 vdev->out_ctx, ep_index);
3153 xhci_setup_streams_ep_input_ctx(xhci, ep_ctx,
3154 vdev->eps[ep_index].stream_info);
3156 /* Tell the HW to drop its old copy of the endpoint context info
3157 * and add the updated copy from the input context.
3159 xhci_setup_input_ctx_for_config_ep(xhci, config_cmd->in_ctx,
3160 vdev->out_ctx, changed_ep_bitmask, changed_ep_bitmask);
3162 /* Issue and wait for the configure endpoint command */
3163 ret = xhci_configure_endpoint(xhci, udev, config_cmd,
3166 /* xHC rejected the configure endpoint command for some reason, so we
3167 * leave the old ring intact and free our internal streams data
3173 spin_lock_irqsave(&xhci->lock, flags);
3174 for (i = 0; i < num_eps; i++) {
3175 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3176 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3177 xhci_dbg(xhci, "Slot %u ep ctx %u now has streams.\n",
3178 udev->slot_id, ep_index);
3179 vdev->eps[ep_index].ep_state |= EP_HAS_STREAMS;
3181 xhci_free_command(xhci, config_cmd);
3182 spin_unlock_irqrestore(&xhci->lock, flags);
3184 /* Subtract 1 for stream 0, which drivers can't use */
3185 return num_streams - 1;
3188 /* If it didn't work, free the streams! */
3189 for (i = 0; i < num_eps; i++) {
3190 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3191 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3192 vdev->eps[ep_index].stream_info = NULL;
3193 /* FIXME Unset maxPstreams in endpoint context and
3194 * update deq ptr to point to normal string ring.
3196 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3197 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3198 xhci_endpoint_zero(xhci, vdev, eps[i]);
3200 xhci_free_command(xhci, config_cmd);
3204 /* Transition the endpoint from using streams to being a "normal" endpoint
3207 * Modify the endpoint context state, submit a configure endpoint command,
3208 * and free all endpoint rings for streams if that completes successfully.
3210 int xhci_free_streams(struct usb_hcd *hcd, struct usb_device *udev,
3211 struct usb_host_endpoint **eps, unsigned int num_eps,
3215 struct xhci_hcd *xhci;
3216 struct xhci_virt_device *vdev;
3217 struct xhci_command *command;
3218 unsigned int ep_index;
3219 unsigned long flags;
3220 u32 changed_ep_bitmask;
3222 xhci = hcd_to_xhci(hcd);
3223 vdev = xhci->devs[udev->slot_id];
3225 /* Set up a configure endpoint command to remove the streams rings */
3226 spin_lock_irqsave(&xhci->lock, flags);
3227 changed_ep_bitmask = xhci_calculate_no_streams_bitmask(xhci,
3228 udev, eps, num_eps);
3229 if (changed_ep_bitmask == 0) {
3230 spin_unlock_irqrestore(&xhci->lock, flags);
3234 /* Use the xhci_command structure from the first endpoint. We may have
3235 * allocated too many, but the driver may call xhci_free_streams() for
3236 * each endpoint it grouped into one call to xhci_alloc_streams().
3238 ep_index = xhci_get_endpoint_index(&eps[0]->desc);
3239 command = vdev->eps[ep_index].stream_info->free_streams_command;
3240 for (i = 0; i < num_eps; i++) {
3241 struct xhci_ep_ctx *ep_ctx;
3243 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3244 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
3245 xhci->devs[udev->slot_id]->eps[ep_index].ep_state |=
3246 EP_GETTING_NO_STREAMS;
3248 xhci_endpoint_copy(xhci, command->in_ctx,
3249 vdev->out_ctx, ep_index);
3250 xhci_setup_no_streams_ep_input_ctx(xhci, ep_ctx,
3251 &vdev->eps[ep_index]);
3253 xhci_setup_input_ctx_for_config_ep(xhci, command->in_ctx,
3254 vdev->out_ctx, changed_ep_bitmask, changed_ep_bitmask);
3255 spin_unlock_irqrestore(&xhci->lock, flags);
3257 /* Issue and wait for the configure endpoint command,
3258 * which must succeed.
3260 ret = xhci_configure_endpoint(xhci, udev, command,
3263 /* xHC rejected the configure endpoint command for some reason, so we
3264 * leave the streams rings intact.
3269 spin_lock_irqsave(&xhci->lock, flags);
3270 for (i = 0; i < num_eps; i++) {
3271 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3272 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3273 vdev->eps[ep_index].stream_info = NULL;
3274 /* FIXME Unset maxPstreams in endpoint context and
3275 * update deq ptr to point to normal string ring.
3277 vdev->eps[ep_index].ep_state &= ~EP_GETTING_NO_STREAMS;
3278 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3280 spin_unlock_irqrestore(&xhci->lock, flags);
3286 * Deletes endpoint resources for endpoints that were active before a Reset
3287 * Device command, or a Disable Slot command. The Reset Device command leaves
3288 * the control endpoint intact, whereas the Disable Slot command deletes it.
3290 * Must be called with xhci->lock held.
3292 void xhci_free_device_endpoint_resources(struct xhci_hcd *xhci,
3293 struct xhci_virt_device *virt_dev, bool drop_control_ep)
3296 unsigned int num_dropped_eps = 0;
3297 unsigned int drop_flags = 0;
3299 for (i = (drop_control_ep ? 0 : 1); i < 31; i++) {
3300 if (virt_dev->eps[i].ring) {
3301 drop_flags |= 1 << i;
3305 xhci->num_active_eps -= num_dropped_eps;
3306 if (num_dropped_eps)
3307 xhci_dbg(xhci, "Dropped %u ep ctxs, flags = 0x%x, "
3309 num_dropped_eps, drop_flags,
3310 xhci->num_active_eps);
3314 * This submits a Reset Device Command, which will set the device state to 0,
3315 * set the device address to 0, and disable all the endpoints except the default
3316 * control endpoint. The USB core should come back and call
3317 * xhci_address_device(), and then re-set up the configuration. If this is
3318 * called because of a usb_reset_and_verify_device(), then the old alternate
3319 * settings will be re-installed through the normal bandwidth allocation
3322 * Wait for the Reset Device command to finish. Remove all structures
3323 * associated with the endpoints that were disabled. Clear the input device
3324 * structure? Cache the rings? Reset the control endpoint 0 max packet size?
3326 * If the virt_dev to be reset does not exist or does not match the udev,
3327 * it means the device is lost, possibly due to the xHC restore error and
3328 * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
3329 * re-allocate the device.
3331 int xhci_discover_or_reset_device(struct usb_hcd *hcd, struct usb_device *udev)
3334 unsigned long flags;
3335 struct xhci_hcd *xhci;
3336 unsigned int slot_id;
3337 struct xhci_virt_device *virt_dev;
3338 struct xhci_command *reset_device_cmd;
3340 int last_freed_endpoint;
3341 struct xhci_slot_ctx *slot_ctx;
3342 int old_active_eps = 0;
3344 ret = xhci_check_args(hcd, udev, NULL, 0, false, __func__);
3347 xhci = hcd_to_xhci(hcd);
3348 slot_id = udev->slot_id;
3349 virt_dev = xhci->devs[slot_id];
3351 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3352 "not exist. Re-allocate the device\n", slot_id);
3353 ret = xhci_alloc_dev(hcd, udev);
3360 if (virt_dev->udev != udev) {
3361 /* If the virt_dev and the udev does not match, this virt_dev
3362 * may belong to another udev.
3363 * Re-allocate the device.
3365 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3366 "not match the udev. Re-allocate the device\n",
3368 ret = xhci_alloc_dev(hcd, udev);
3375 /* If device is not setup, there is no point in resetting it */
3376 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3377 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) ==
3378 SLOT_STATE_DISABLED)
3381 xhci_dbg(xhci, "Resetting device with slot ID %u\n", slot_id);
3382 /* Allocate the command structure that holds the struct completion.
3383 * Assume we're in process context, since the normal device reset
3384 * process has to wait for the device anyway. Storage devices are
3385 * reset as part of error handling, so use GFP_NOIO instead of
3388 reset_device_cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
3389 if (!reset_device_cmd) {
3390 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
3394 /* Attempt to submit the Reset Device command to the command ring */
3395 spin_lock_irqsave(&xhci->lock, flags);
3396 reset_device_cmd->command_trb = xhci->cmd_ring->enqueue;
3398 /* Enqueue pointer can be left pointing to the link TRB,
3399 * we must handle that
3401 if (TRB_TYPE_LINK_LE32(reset_device_cmd->command_trb->link.control))
3402 reset_device_cmd->command_trb =
3403 xhci->cmd_ring->enq_seg->next->trbs;
3405 list_add_tail(&reset_device_cmd->cmd_list, &virt_dev->cmd_list);
3406 ret = xhci_queue_reset_device(xhci, slot_id);
3408 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3409 list_del(&reset_device_cmd->cmd_list);
3410 spin_unlock_irqrestore(&xhci->lock, flags);
3411 goto command_cleanup;
3413 xhci_ring_cmd_db(xhci);
3414 spin_unlock_irqrestore(&xhci->lock, flags);
3416 /* Wait for the Reset Device command to finish */
3417 timeleft = wait_for_completion_interruptible_timeout(
3418 reset_device_cmd->completion,
3419 USB_CTRL_SET_TIMEOUT);
3420 if (timeleft <= 0) {
3421 xhci_warn(xhci, "%s while waiting for reset device command\n",
3422 timeleft == 0 ? "Timeout" : "Signal");
3423 spin_lock_irqsave(&xhci->lock, flags);
3424 /* The timeout might have raced with the event ring handler, so
3425 * only delete from the list if the item isn't poisoned.
3427 if (reset_device_cmd->cmd_list.next != LIST_POISON1)
3428 list_del(&reset_device_cmd->cmd_list);
3429 spin_unlock_irqrestore(&xhci->lock, flags);
3431 goto command_cleanup;
3434 /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
3435 * unless we tried to reset a slot ID that wasn't enabled,
3436 * or the device wasn't in the addressed or configured state.
3438 ret = reset_device_cmd->status;
3440 case COMP_EBADSLT: /* 0.95 completion code for bad slot ID */
3441 case COMP_CTX_STATE: /* 0.96 completion code for same thing */
3442 xhci_info(xhci, "Can't reset device (slot ID %u) in %s state\n",
3444 xhci_get_slot_state(xhci, virt_dev->out_ctx));
3445 xhci_info(xhci, "Not freeing device rings.\n");
3446 /* Don't treat this as an error. May change my mind later. */
3448 goto command_cleanup;
3450 xhci_dbg(xhci, "Successful reset device command.\n");
3453 if (xhci_is_vendor_info_code(xhci, ret))
3455 xhci_warn(xhci, "Unknown completion code %u for "
3456 "reset device command.\n", ret);
3458 goto command_cleanup;
3461 /* Free up host controller endpoint resources */
3462 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3463 spin_lock_irqsave(&xhci->lock, flags);
3464 /* Don't delete the default control endpoint resources */
3465 xhci_free_device_endpoint_resources(xhci, virt_dev, false);
3466 spin_unlock_irqrestore(&xhci->lock, flags);
3469 /* Everything but endpoint 0 is disabled, so free or cache the rings. */
3470 last_freed_endpoint = 1;
3471 for (i = 1; i < 31; ++i) {
3472 struct xhci_virt_ep *ep = &virt_dev->eps[i];
3474 if (ep->ep_state & EP_HAS_STREAMS) {
3475 xhci_free_stream_info(xhci, ep->stream_info);
3476 ep->stream_info = NULL;
3477 ep->ep_state &= ~EP_HAS_STREAMS;
3481 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
3482 last_freed_endpoint = i;
3484 if (!list_empty(&virt_dev->eps[i].bw_endpoint_list))
3485 xhci_drop_ep_from_interval_table(xhci,
3486 &virt_dev->eps[i].bw_info,
3491 xhci_clear_endpoint_bw_info(&virt_dev->eps[i].bw_info);
3493 /* If necessary, update the number of active TTs on this root port */
3494 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
3496 xhci_dbg(xhci, "Output context after successful reset device cmd:\n");
3497 xhci_dbg_ctx(xhci, virt_dev->out_ctx, last_freed_endpoint);
3501 xhci_free_command(xhci, reset_device_cmd);
3506 * At this point, the struct usb_device is about to go away, the device has
3507 * disconnected, and all traffic has been stopped and the endpoints have been
3508 * disabled. Free any HC data structures associated with that device.
3510 void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
3512 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3513 struct xhci_virt_device *virt_dev;
3514 struct device *dev = hcd->self.controller;
3515 unsigned long flags;
3519 #ifndef CONFIG_USB_DEFAULT_PERSIST
3521 * We called pm_runtime_get_noresume when the device was attached.
3522 * Decrement the counter here to allow controller to runtime suspend
3523 * if no devices remain.
3525 if (xhci->quirks & XHCI_RESET_ON_RESUME)
3526 pm_runtime_put_noidle(dev);
3529 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
3530 /* If the host is halted due to driver unload, we still need to free the
3533 if (ret <= 0 && ret != -ENODEV)
3536 virt_dev = xhci->devs[udev->slot_id];
3538 /* Stop any wayward timer functions (which may grab the lock) */
3539 for (i = 0; i < 31; ++i) {
3540 virt_dev->eps[i].ep_state &= ~EP_HALT_PENDING;
3541 del_timer_sync(&virt_dev->eps[i].stop_cmd_timer);
3544 if (udev->usb2_hw_lpm_enabled) {
3545 xhci_set_usb2_hardware_lpm(hcd, udev, 0);
3546 udev->usb2_hw_lpm_enabled = 0;
3549 spin_lock_irqsave(&xhci->lock, flags);
3550 /* Don't disable the slot if the host controller is dead. */
3551 state = xhci_readl(xhci, &xhci->op_regs->status);
3552 if (state == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
3553 (xhci->xhc_state & XHCI_STATE_HALTED)) {
3554 xhci_free_virt_device(xhci, udev->slot_id);
3555 spin_unlock_irqrestore(&xhci->lock, flags);
3559 if (xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id)) {
3560 spin_unlock_irqrestore(&xhci->lock, flags);
3561 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3564 xhci_ring_cmd_db(xhci);
3565 spin_unlock_irqrestore(&xhci->lock, flags);
3567 * Event command completion handler will free any data structures
3568 * associated with the slot. XXX Can free sleep?
3573 * Checks if we have enough host controller resources for the default control
3576 * Must be called with xhci->lock held.
3578 static int xhci_reserve_host_control_ep_resources(struct xhci_hcd *xhci)
3580 if (xhci->num_active_eps + 1 > xhci->limit_active_eps) {
3581 xhci_dbg(xhci, "Not enough ep ctxs: "
3582 "%u active, need to add 1, limit is %u.\n",
3583 xhci->num_active_eps, xhci->limit_active_eps);
3586 xhci->num_active_eps += 1;
3587 xhci_dbg(xhci, "Adding 1 ep ctx, %u now active.\n",
3588 xhci->num_active_eps);
3594 * Returns 0 if the xHC ran out of device slots, the Enable Slot command
3595 * timed out, or allocating memory failed. Returns 1 on success.
3597 int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
3599 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3600 struct device *dev = hcd->self.controller;
3601 unsigned long flags;
3604 union xhci_trb *cmd_trb;
3606 spin_lock_irqsave(&xhci->lock, flags);
3607 cmd_trb = xhci->cmd_ring->dequeue;
3608 ret = xhci_queue_slot_control(xhci, TRB_ENABLE_SLOT, 0);
3610 spin_unlock_irqrestore(&xhci->lock, flags);
3611 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3614 xhci_ring_cmd_db(xhci);
3615 spin_unlock_irqrestore(&xhci->lock, flags);
3617 /* XXX: how much time for xHC slot assignment? */
3618 timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
3619 XHCI_CMD_DEFAULT_TIMEOUT);
3620 if (timeleft <= 0) {
3621 xhci_warn(xhci, "%s while waiting for a slot\n",
3622 timeleft == 0 ? "Timeout" : "Signal");
3623 /* cancel the enable slot request */
3624 return xhci_cancel_cmd(xhci, NULL, cmd_trb);
3627 if (!xhci->slot_id) {
3628 xhci_err(xhci, "Error while assigning device slot ID\n");
3632 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3633 spin_lock_irqsave(&xhci->lock, flags);
3634 ret = xhci_reserve_host_control_ep_resources(xhci);
3636 spin_unlock_irqrestore(&xhci->lock, flags);
3637 xhci_warn(xhci, "Not enough host resources, "
3638 "active endpoint contexts = %u\n",
3639 xhci->num_active_eps);
3642 spin_unlock_irqrestore(&xhci->lock, flags);
3644 /* Use GFP_NOIO, since this function can be called from
3645 * xhci_discover_or_reset_device(), which may be called as part of
3646 * mass storage driver error handling.
3648 if (!xhci_alloc_virt_device(xhci, xhci->slot_id, udev, GFP_NOIO)) {
3649 xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n");
3652 udev->slot_id = xhci->slot_id;
3654 #ifndef CONFIG_USB_DEFAULT_PERSIST
3656 * If resetting upon resume, we can't put the controller into runtime
3657 * suspend if there is a device attached.
3659 if (xhci->quirks & XHCI_RESET_ON_RESUME)
3660 pm_runtime_get_noresume(dev);
3663 /* Is this a LS or FS device under a HS hub? */
3664 /* Hub or peripherial? */
3668 /* Disable slot, if we can do it without mem alloc */
3669 spin_lock_irqsave(&xhci->lock, flags);
3670 if (!xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id))
3671 xhci_ring_cmd_db(xhci);
3672 spin_unlock_irqrestore(&xhci->lock, flags);
3677 * Issue an Address Device command (which will issue a SetAddress request to
3679 * We should be protected by the usb_address0_mutex in khubd's hub_port_init, so
3680 * we should only issue and wait on one address command at the same time.
3682 * We add one to the device address issued by the hardware because the USB core
3683 * uses address 1 for the root hubs (even though they're not really devices).
3685 int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
3687 unsigned long flags;
3689 struct xhci_virt_device *virt_dev;
3691 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3692 struct xhci_slot_ctx *slot_ctx;
3693 struct xhci_input_control_ctx *ctrl_ctx;
3695 union xhci_trb *cmd_trb;
3697 if (!udev->slot_id) {
3698 xhci_dbg(xhci, "Bad Slot ID %d\n", udev->slot_id);
3702 virt_dev = xhci->devs[udev->slot_id];
3704 if (WARN_ON(!virt_dev)) {
3706 * In plug/unplug torture test with an NEC controller,
3707 * a zero-dereference was observed once due to virt_dev = 0.
3708 * Print useful debug rather than crash if it is observed again!
3710 xhci_warn(xhci, "Virt dev invalid for slot_id 0x%x!\n",
3715 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
3717 * If this is the first Set Address since device plug-in or
3718 * virt_device realloaction after a resume with an xHCI power loss,
3719 * then set up the slot context.
3721 if (!slot_ctx->dev_info)
3722 xhci_setup_addressable_virt_dev(xhci, udev);
3723 /* Otherwise, update the control endpoint ring enqueue pointer. */
3725 xhci_copy_ep0_dequeue_into_input_ctx(xhci, udev);
3726 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
3727 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG | EP0_FLAG);
3728 ctrl_ctx->drop_flags = 0;
3730 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
3731 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
3733 spin_lock_irqsave(&xhci->lock, flags);
3734 cmd_trb = xhci->cmd_ring->dequeue;
3735 ret = xhci_queue_address_device(xhci, virt_dev->in_ctx->dma,
3738 spin_unlock_irqrestore(&xhci->lock, flags);
3739 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3742 xhci_ring_cmd_db(xhci);
3743 spin_unlock_irqrestore(&xhci->lock, flags);
3745 /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
3746 timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
3747 XHCI_CMD_DEFAULT_TIMEOUT);
3748 /* FIXME: From section 4.3.4: "Software shall be responsible for timing
3749 * the SetAddress() "recovery interval" required by USB and aborting the
3750 * command on a timeout.
3752 if (timeleft <= 0) {
3753 xhci_warn(xhci, "%s while waiting for address device command\n",
3754 timeleft == 0 ? "Timeout" : "Signal");
3755 /* cancel the address device command */
3756 ret = xhci_cancel_cmd(xhci, NULL, cmd_trb);
3762 switch (virt_dev->cmd_status) {
3763 case COMP_CTX_STATE:
3765 xhci_err(xhci, "Setup ERROR: address device command for slot %d.\n",
3770 dev_warn(&udev->dev, "Device not responding to set address.\n");
3774 dev_warn(&udev->dev, "ERROR: Incompatible device for address "
3775 "device command.\n");
3779 xhci_dbg(xhci, "Successful Address Device command\n");
3782 xhci_err(xhci, "ERROR: unexpected command completion "
3783 "code 0x%x.\n", virt_dev->cmd_status);
3784 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
3785 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
3792 temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
3793 xhci_dbg(xhci, "Op regs DCBAA ptr = %#016llx\n", temp_64);
3794 xhci_dbg(xhci, "Slot ID %d dcbaa entry @%p = %#016llx\n",
3796 &xhci->dcbaa->dev_context_ptrs[udev->slot_id],
3797 (unsigned long long)
3798 le64_to_cpu(xhci->dcbaa->dev_context_ptrs[udev->slot_id]));
3799 xhci_dbg(xhci, "Output Context DMA address = %#08llx\n",
3800 (unsigned long long)virt_dev->out_ctx->dma);
3801 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
3802 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
3803 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
3804 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
3806 * USB core uses address 1 for the roothubs, so we add one to the
3807 * address given back to us by the HC.
3809 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3810 /* Use kernel assigned address for devices; store xHC assigned
3811 * address locally. */
3812 virt_dev->address = (le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK)
3814 /* Zero the input context control for later use */
3815 ctrl_ctx->add_flags = 0;
3816 ctrl_ctx->drop_flags = 0;
3818 xhci_dbg(xhci, "Internal device address = %d\n", virt_dev->address);
3824 * Transfer the port index into real index in the HW port status
3825 * registers. Caculate offset between the port's PORTSC register
3826 * and port status base. Divide the number of per port register
3827 * to get the real index. The raw port number bases 1.
3829 int xhci_find_raw_port_number(struct usb_hcd *hcd, int port1)
3831 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3832 __le32 __iomem *base_addr = &xhci->op_regs->port_status_base;
3833 __le32 __iomem *addr;
3836 if (hcd->speed != HCD_USB3)
3837 addr = xhci->usb2_ports[port1 - 1];
3839 addr = xhci->usb3_ports[port1 - 1];
3841 raw_port = (addr - base_addr)/NUM_PORT_REGS + 1;
3845 #ifdef CONFIG_PM_RUNTIME
3847 /* BESL to HIRD Encoding array for USB2 LPM */
3848 static int xhci_besl_encoding[16] = {125, 150, 200, 300, 400, 500, 1000, 2000,
3849 3000, 4000, 5000, 6000, 7000, 8000, 9000, 10000};
3851 /* Calculate HIRD/BESL for USB2 PORTPMSC*/
3852 static int xhci_calculate_hird_besl(struct xhci_hcd *xhci,
3853 struct usb_device *udev)
3855 int u2del, besl, besl_host;
3856 int besl_device = 0;
3859 u2del = HCS_U2_LATENCY(xhci->hcs_params3);
3860 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
3862 if (field & USB_BESL_SUPPORT) {
3863 for (besl_host = 0; besl_host < 16; besl_host++) {
3864 if (xhci_besl_encoding[besl_host] >= u2del)
3867 /* Use baseline BESL value as default */
3868 if (field & USB_BESL_BASELINE_VALID)
3869 besl_device = USB_GET_BESL_BASELINE(field);
3870 else if (field & USB_BESL_DEEP_VALID)
3871 besl_device = USB_GET_BESL_DEEP(field);
3876 besl_host = (u2del - 51) / 75 + 1;
3879 besl = besl_host + besl_device;
3886 static int xhci_usb2_software_lpm_test(struct usb_hcd *hcd,
3887 struct usb_device *udev)
3889 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3890 struct dev_info *dev_info;
3891 __le32 __iomem **port_array;
3892 __le32 __iomem *addr, *pm_addr;
3894 unsigned int port_num;
3895 unsigned long flags;
3899 if (hcd->speed == HCD_USB3 || !xhci->sw_lpm_support ||
3903 /* we only support lpm for non-hub device connected to root hub yet */
3904 if (!udev->parent || udev->parent->parent ||
3905 udev->descriptor.bDeviceClass == USB_CLASS_HUB)
3908 spin_lock_irqsave(&xhci->lock, flags);
3910 /* Look for devices in lpm_failed_devs list */
3911 dev_id = le16_to_cpu(udev->descriptor.idVendor) << 16 |
3912 le16_to_cpu(udev->descriptor.idProduct);
3913 list_for_each_entry(dev_info, &xhci->lpm_failed_devs, list) {
3914 if (dev_info->dev_id == dev_id) {
3920 port_array = xhci->usb2_ports;
3921 port_num = udev->portnum - 1;
3923 if (port_num > HCS_MAX_PORTS(xhci->hcs_params1)) {
3924 xhci_dbg(xhci, "invalid port number %d\n", udev->portnum);
3930 * Test USB 2.0 software LPM.
3931 * FIXME: some xHCI 1.0 hosts may implement a new register to set up
3932 * hardware-controlled USB 2.0 LPM. See section 5.4.11 and 4.23.5.1.1.1
3933 * in the June 2011 errata release.
3935 xhci_dbg(xhci, "test port %d software LPM\n", port_num);
3937 * Set L1 Device Slot and HIRD/BESL.
3938 * Check device's USB 2.0 extension descriptor to determine whether
3939 * HIRD or BESL shoule be used. See USB2.0 LPM errata.
3941 pm_addr = port_array[port_num] + 1;
3942 hird = xhci_calculate_hird_besl(xhci, udev);
3943 temp = PORT_L1DS(udev->slot_id) | PORT_HIRD(hird);
3944 xhci_writel(xhci, temp, pm_addr);
3946 /* Set port link state to U2(L1) */
3947 addr = port_array[port_num];
3948 xhci_set_link_state(xhci, port_array, port_num, XDEV_U2);
3951 spin_unlock_irqrestore(&xhci->lock, flags);
3953 spin_lock_irqsave(&xhci->lock, flags);
3955 /* Check L1 Status */
3956 ret = xhci_handshake(xhci, pm_addr,
3957 PORT_L1S_MASK, PORT_L1S_SUCCESS, 125);
3958 if (ret != -ETIMEDOUT) {
3959 /* enter L1 successfully */
3960 temp = xhci_readl(xhci, addr);
3961 xhci_dbg(xhci, "port %d entered L1 state, port status 0x%x\n",
3965 temp = xhci_readl(xhci, pm_addr);
3966 xhci_dbg(xhci, "port %d software lpm failed, L1 status %d\n",
3967 port_num, temp & PORT_L1S_MASK);
3971 /* Resume the port */
3972 xhci_set_link_state(xhci, port_array, port_num, XDEV_U0);
3974 spin_unlock_irqrestore(&xhci->lock, flags);
3976 spin_lock_irqsave(&xhci->lock, flags);
3979 xhci_test_and_clear_bit(xhci, port_array, port_num, PORT_PLC);
3981 /* Check PORTSC to make sure the device is in the right state */
3983 temp = xhci_readl(xhci, addr);
3984 xhci_dbg(xhci, "resumed port %d status 0x%x\n", port_num, temp);
3985 if (!(temp & PORT_CONNECT) || !(temp & PORT_PE) ||
3986 (temp & PORT_PLS_MASK) != XDEV_U0) {
3987 xhci_dbg(xhci, "port L1 resume fail\n");
3993 /* Insert dev to lpm_failed_devs list */
3994 xhci_warn(xhci, "device LPM test failed, may disconnect and "
3996 dev_info = kzalloc(sizeof(struct dev_info), GFP_ATOMIC);
4001 dev_info->dev_id = dev_id;
4002 INIT_LIST_HEAD(&dev_info->list);
4003 list_add(&dev_info->list, &xhci->lpm_failed_devs);
4005 xhci_ring_device(xhci, udev->slot_id);
4009 spin_unlock_irqrestore(&xhci->lock, flags);
4013 int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
4014 struct usb_device *udev, int enable)
4016 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4017 __le32 __iomem **port_array;
4018 __le32 __iomem *pm_addr;
4020 unsigned int port_num;
4021 unsigned long flags;
4024 if (hcd->speed == HCD_USB3 || !xhci->hw_lpm_support ||
4028 if (!udev->parent || udev->parent->parent ||
4029 udev->descriptor.bDeviceClass == USB_CLASS_HUB)
4032 if (udev->usb2_hw_lpm_capable != 1)
4035 spin_lock_irqsave(&xhci->lock, flags);
4037 port_array = xhci->usb2_ports;
4038 port_num = udev->portnum - 1;
4039 pm_addr = port_array[port_num] + 1;
4040 temp = xhci_readl(xhci, pm_addr);
4042 xhci_dbg(xhci, "%s port %d USB2 hardware LPM\n",
4043 enable ? "enable" : "disable", port_num);
4045 hird = xhci_calculate_hird_besl(xhci, udev);
4048 temp &= ~PORT_HIRD_MASK;
4049 temp |= PORT_HIRD(hird) | PORT_RWE;
4050 xhci_writel(xhci, temp, pm_addr);
4051 temp = xhci_readl(xhci, pm_addr);
4053 xhci_writel(xhci, temp, pm_addr);
4055 temp &= ~(PORT_HLE | PORT_RWE | PORT_HIRD_MASK);
4056 xhci_writel(xhci, temp, pm_addr);
4059 spin_unlock_irqrestore(&xhci->lock, flags);
4063 int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
4065 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4068 ret = xhci_usb2_software_lpm_test(hcd, udev);
4070 xhci_dbg(xhci, "software LPM test succeed\n");
4071 if (xhci->hw_lpm_support == 1) {
4072 udev->usb2_hw_lpm_capable = 1;
4073 ret = xhci_set_usb2_hardware_lpm(hcd, udev, 1);
4075 udev->usb2_hw_lpm_enabled = 1;
4084 int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
4085 struct usb_device *udev, int enable)
4090 int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
4095 #endif /* CONFIG_PM_RUNTIME */
4097 /*---------------------- USB 3.0 Link PM functions ------------------------*/
4100 /* Service interval in nanoseconds = 2^(bInterval - 1) * 125us * 1000ns / 1us */
4101 static unsigned long long xhci_service_interval_to_ns(
4102 struct usb_endpoint_descriptor *desc)
4104 return (1ULL << (desc->bInterval - 1)) * 125 * 1000;
4107 static u16 xhci_get_timeout_no_hub_lpm(struct usb_device *udev,
4108 enum usb3_link_state state)
4110 unsigned long long sel;
4111 unsigned long long pel;
4112 unsigned int max_sel_pel;
4117 /* Convert SEL and PEL stored in nanoseconds to microseconds */
4118 sel = DIV_ROUND_UP(udev->u1_params.sel, 1000);
4119 pel = DIV_ROUND_UP(udev->u1_params.pel, 1000);
4120 max_sel_pel = USB3_LPM_MAX_U1_SEL_PEL;
4124 sel = DIV_ROUND_UP(udev->u2_params.sel, 1000);
4125 pel = DIV_ROUND_UP(udev->u2_params.pel, 1000);
4126 max_sel_pel = USB3_LPM_MAX_U2_SEL_PEL;
4130 dev_warn(&udev->dev, "%s: Can't get timeout for non-U1 or U2 state.\n",
4132 return USB3_LPM_DISABLED;
4135 if (sel <= max_sel_pel && pel <= max_sel_pel)
4136 return USB3_LPM_DEVICE_INITIATED;
4138 if (sel > max_sel_pel)
4139 dev_dbg(&udev->dev, "Device-initiated %s disabled "
4140 "due to long SEL %llu ms\n",
4143 dev_dbg(&udev->dev, "Device-initiated %s disabled "
4144 "due to long PEL %llu\n ms",
4146 return USB3_LPM_DISABLED;
4149 /* Returns the hub-encoded U1 timeout value.
4150 * The U1 timeout should be the maximum of the following values:
4151 * - For control endpoints, U1 system exit latency (SEL) * 3
4152 * - For bulk endpoints, U1 SEL * 5
4153 * - For interrupt endpoints:
4154 * - Notification EPs, U1 SEL * 3
4155 * - Periodic EPs, max(105% of bInterval, U1 SEL * 2)
4156 * - For isochronous endpoints, max(105% of bInterval, U1 SEL * 2)
4158 static u16 xhci_calculate_intel_u1_timeout(struct usb_device *udev,
4159 struct usb_endpoint_descriptor *desc)
4161 unsigned long long timeout_ns;
4165 ep_type = usb_endpoint_type(desc);
4167 case USB_ENDPOINT_XFER_CONTROL:
4168 timeout_ns = udev->u1_params.sel * 3;
4170 case USB_ENDPOINT_XFER_BULK:
4171 timeout_ns = udev->u1_params.sel * 5;
4173 case USB_ENDPOINT_XFER_INT:
4174 intr_type = usb_endpoint_interrupt_type(desc);
4175 if (intr_type == USB_ENDPOINT_INTR_NOTIFICATION) {
4176 timeout_ns = udev->u1_params.sel * 3;
4179 /* Otherwise the calculation is the same as isoc eps */
4180 case USB_ENDPOINT_XFER_ISOC:
4181 timeout_ns = xhci_service_interval_to_ns(desc);
4182 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns * 105, 100);
4183 if (timeout_ns < udev->u1_params.sel * 2)
4184 timeout_ns = udev->u1_params.sel * 2;
4190 /* The U1 timeout is encoded in 1us intervals. */
4191 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns, 1000);
4192 /* Don't return a timeout of zero, because that's USB3_LPM_DISABLED. */
4193 if (timeout_ns == USB3_LPM_DISABLED)
4196 /* If the necessary timeout value is bigger than what we can set in the
4197 * USB 3.0 hub, we have to disable hub-initiated U1.
4199 if (timeout_ns <= USB3_LPM_U1_MAX_TIMEOUT)
4201 dev_dbg(&udev->dev, "Hub-initiated U1 disabled "
4202 "due to long timeout %llu ms\n", timeout_ns);
4203 return xhci_get_timeout_no_hub_lpm(udev, USB3_LPM_U1);
4206 /* Returns the hub-encoded U2 timeout value.
4207 * The U2 timeout should be the maximum of:
4208 * - 10 ms (to avoid the bandwidth impact on the scheduler)
4209 * - largest bInterval of any active periodic endpoint (to avoid going
4210 * into lower power link states between intervals).
4211 * - the U2 Exit Latency of the device
4213 static u16 xhci_calculate_intel_u2_timeout(struct usb_device *udev,
4214 struct usb_endpoint_descriptor *desc)
4216 unsigned long long timeout_ns;
4217 unsigned long long u2_del_ns;
4219 timeout_ns = 10 * 1000 * 1000;
4221 if ((usb_endpoint_xfer_int(desc) || usb_endpoint_xfer_isoc(desc)) &&
4222 (xhci_service_interval_to_ns(desc) > timeout_ns))
4223 timeout_ns = xhci_service_interval_to_ns(desc);
4225 u2_del_ns = le16_to_cpu(udev->bos->ss_cap->bU2DevExitLat) * 1000ULL;
4226 if (u2_del_ns > timeout_ns)
4227 timeout_ns = u2_del_ns;
4229 /* The U2 timeout is encoded in 256us intervals */
4230 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns, 256 * 1000);
4231 /* If the necessary timeout value is bigger than what we can set in the
4232 * USB 3.0 hub, we have to disable hub-initiated U2.
4234 if (timeout_ns <= USB3_LPM_U2_MAX_TIMEOUT)
4236 dev_dbg(&udev->dev, "Hub-initiated U2 disabled "
4237 "due to long timeout %llu ms\n", timeout_ns);
4238 return xhci_get_timeout_no_hub_lpm(udev, USB3_LPM_U2);
4241 static u16 xhci_call_host_update_timeout_for_endpoint(struct xhci_hcd *xhci,
4242 struct usb_device *udev,
4243 struct usb_endpoint_descriptor *desc,
4244 enum usb3_link_state state,
4247 if (state == USB3_LPM_U1) {
4248 if (xhci->quirks & XHCI_INTEL_HOST)
4249 return xhci_calculate_intel_u1_timeout(udev, desc);
4251 if (xhci->quirks & XHCI_INTEL_HOST)
4252 return xhci_calculate_intel_u2_timeout(udev, desc);
4255 return USB3_LPM_DISABLED;
4258 static int xhci_update_timeout_for_endpoint(struct xhci_hcd *xhci,
4259 struct usb_device *udev,
4260 struct usb_endpoint_descriptor *desc,
4261 enum usb3_link_state state,
4266 alt_timeout = xhci_call_host_update_timeout_for_endpoint(xhci, udev,
4267 desc, state, timeout);
4269 /* If we found we can't enable hub-initiated LPM, or
4270 * the U1 or U2 exit latency was too high to allow
4271 * device-initiated LPM as well, just stop searching.
4273 if (alt_timeout == USB3_LPM_DISABLED ||
4274 alt_timeout == USB3_LPM_DEVICE_INITIATED) {
4275 *timeout = alt_timeout;
4278 if (alt_timeout > *timeout)
4279 *timeout = alt_timeout;
4283 static int xhci_update_timeout_for_interface(struct xhci_hcd *xhci,
4284 struct usb_device *udev,
4285 struct usb_host_interface *alt,
4286 enum usb3_link_state state,
4291 for (j = 0; j < alt->desc.bNumEndpoints; j++) {
4292 if (xhci_update_timeout_for_endpoint(xhci, udev,
4293 &alt->endpoint[j].desc, state, timeout))
4300 static int xhci_check_intel_tier_policy(struct usb_device *udev,
4301 enum usb3_link_state state)
4303 struct usb_device *parent;
4304 unsigned int num_hubs;
4306 if (state == USB3_LPM_U2)
4309 /* Don't enable U1 if the device is on a 2nd tier hub or lower. */
4310 for (parent = udev->parent, num_hubs = 0; parent->parent;
4311 parent = parent->parent)
4317 dev_dbg(&udev->dev, "Disabling U1 link state for device"
4318 " below second-tier hub.\n");
4319 dev_dbg(&udev->dev, "Plug device into first-tier hub "
4320 "to decrease power consumption.\n");
4324 static int xhci_check_tier_policy(struct xhci_hcd *xhci,
4325 struct usb_device *udev,
4326 enum usb3_link_state state)
4328 if (xhci->quirks & XHCI_INTEL_HOST)
4329 return xhci_check_intel_tier_policy(udev, state);
4333 /* Returns the U1 or U2 timeout that should be enabled.
4334 * If the tier check or timeout setting functions return with a non-zero exit
4335 * code, that means the timeout value has been finalized and we shouldn't look
4336 * at any more endpoints.
4338 static u16 xhci_calculate_lpm_timeout(struct usb_hcd *hcd,
4339 struct usb_device *udev, enum usb3_link_state state)
4341 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4342 struct usb_host_config *config;
4345 u16 timeout = USB3_LPM_DISABLED;
4347 if (state == USB3_LPM_U1)
4349 else if (state == USB3_LPM_U2)
4352 dev_warn(&udev->dev, "Can't enable unknown link state %i\n",
4357 if (xhci_check_tier_policy(xhci, udev, state) < 0)
4360 /* Gather some information about the currently installed configuration
4361 * and alternate interface settings.
4363 if (xhci_update_timeout_for_endpoint(xhci, udev, &udev->ep0.desc,
4367 config = udev->actconfig;
4371 for (i = 0; i < USB_MAXINTERFACES; i++) {
4372 struct usb_driver *driver;
4373 struct usb_interface *intf = config->interface[i];
4378 /* Check if any currently bound drivers want hub-initiated LPM
4381 if (intf->dev.driver) {
4382 driver = to_usb_driver(intf->dev.driver);
4383 if (driver && driver->disable_hub_initiated_lpm) {
4384 dev_dbg(&udev->dev, "Hub-initiated %s disabled "
4385 "at request of driver %s\n",
4386 state_name, driver->name);
4387 return xhci_get_timeout_no_hub_lpm(udev, state);
4391 /* Not sure how this could happen... */
4392 if (!intf->cur_altsetting)
4395 if (xhci_update_timeout_for_interface(xhci, udev,
4396 intf->cur_altsetting,
4404 * Issue an Evaluate Context command to change the Maximum Exit Latency in the
4405 * slot context. If that succeeds, store the new MEL in the xhci_virt_device.
4407 static int xhci_change_max_exit_latency(struct xhci_hcd *xhci,
4408 struct usb_device *udev, u16 max_exit_latency)
4410 struct xhci_virt_device *virt_dev;
4411 struct xhci_command *command;
4412 struct xhci_input_control_ctx *ctrl_ctx;
4413 struct xhci_slot_ctx *slot_ctx;
4414 unsigned long flags;
4417 spin_lock_irqsave(&xhci->lock, flags);
4418 if (max_exit_latency == xhci->devs[udev->slot_id]->current_mel) {
4419 spin_unlock_irqrestore(&xhci->lock, flags);
4423 /* Attempt to issue an Evaluate Context command to change the MEL. */
4424 virt_dev = xhci->devs[udev->slot_id];
4425 command = xhci->lpm_command;
4426 xhci_slot_copy(xhci, command->in_ctx, virt_dev->out_ctx);
4427 spin_unlock_irqrestore(&xhci->lock, flags);
4429 ctrl_ctx = xhci_get_input_control_ctx(xhci, command->in_ctx);
4430 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
4431 slot_ctx = xhci_get_slot_ctx(xhci, command->in_ctx);
4432 slot_ctx->dev_info2 &= cpu_to_le32(~((u32) MAX_EXIT));
4433 slot_ctx->dev_info2 |= cpu_to_le32(max_exit_latency);
4435 xhci_dbg(xhci, "Set up evaluate context for LPM MEL change.\n");
4436 xhci_dbg(xhci, "Slot %u Input Context:\n", udev->slot_id);
4437 xhci_dbg_ctx(xhci, command->in_ctx, 0);
4439 /* Issue and wait for the evaluate context command. */
4440 ret = xhci_configure_endpoint(xhci, udev, command,
4442 xhci_dbg(xhci, "Slot %u Output Context:\n", udev->slot_id);
4443 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 0);
4446 spin_lock_irqsave(&xhci->lock, flags);
4447 virt_dev->current_mel = max_exit_latency;
4448 spin_unlock_irqrestore(&xhci->lock, flags);
4453 static int calculate_max_exit_latency(struct usb_device *udev,
4454 enum usb3_link_state state_changed,
4455 u16 hub_encoded_timeout)
4457 unsigned long long u1_mel_us = 0;
4458 unsigned long long u2_mel_us = 0;
4459 unsigned long long mel_us = 0;
4465 disabling_u1 = (state_changed == USB3_LPM_U1 &&
4466 hub_encoded_timeout == USB3_LPM_DISABLED);
4467 disabling_u2 = (state_changed == USB3_LPM_U2 &&
4468 hub_encoded_timeout == USB3_LPM_DISABLED);
4470 enabling_u1 = (state_changed == USB3_LPM_U1 &&
4471 hub_encoded_timeout != USB3_LPM_DISABLED);
4472 enabling_u2 = (state_changed == USB3_LPM_U2 &&
4473 hub_encoded_timeout != USB3_LPM_DISABLED);
4475 /* If U1 was already enabled and we're not disabling it,
4476 * or we're going to enable U1, account for the U1 max exit latency.
4478 if ((udev->u1_params.timeout != USB3_LPM_DISABLED && !disabling_u1) ||
4480 u1_mel_us = DIV_ROUND_UP(udev->u1_params.mel, 1000);
4481 if ((udev->u2_params.timeout != USB3_LPM_DISABLED && !disabling_u2) ||
4483 u2_mel_us = DIV_ROUND_UP(udev->u2_params.mel, 1000);
4485 if (u1_mel_us > u2_mel_us)
4489 /* xHCI host controller max exit latency field is only 16 bits wide. */
4490 if (mel_us > MAX_EXIT) {
4491 dev_warn(&udev->dev, "Link PM max exit latency of %lluus "
4492 "is too big.\n", mel_us);
4498 /* Returns the USB3 hub-encoded value for the U1/U2 timeout. */
4499 int xhci_enable_usb3_lpm_timeout(struct usb_hcd *hcd,
4500 struct usb_device *udev, enum usb3_link_state state)
4502 struct xhci_hcd *xhci;
4503 u16 hub_encoded_timeout;
4507 xhci = hcd_to_xhci(hcd);
4508 /* The LPM timeout values are pretty host-controller specific, so don't
4509 * enable hub-initiated timeouts unless the vendor has provided
4510 * information about their timeout algorithm.
4512 if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) ||
4513 !xhci->devs[udev->slot_id])
4514 return USB3_LPM_DISABLED;
4516 hub_encoded_timeout = xhci_calculate_lpm_timeout(hcd, udev, state);
4517 mel = calculate_max_exit_latency(udev, state, hub_encoded_timeout);
4519 /* Max Exit Latency is too big, disable LPM. */
4520 hub_encoded_timeout = USB3_LPM_DISABLED;
4524 ret = xhci_change_max_exit_latency(xhci, udev, mel);
4527 return hub_encoded_timeout;
4530 int xhci_disable_usb3_lpm_timeout(struct usb_hcd *hcd,
4531 struct usb_device *udev, enum usb3_link_state state)
4533 struct xhci_hcd *xhci;
4537 xhci = hcd_to_xhci(hcd);
4538 if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) ||
4539 !xhci->devs[udev->slot_id])
4542 mel = calculate_max_exit_latency(udev, state, USB3_LPM_DISABLED);
4543 ret = xhci_change_max_exit_latency(xhci, udev, mel);
4548 #else /* CONFIG_PM */
4550 int xhci_enable_usb3_lpm_timeout(struct usb_hcd *hcd,
4551 struct usb_device *udev, enum usb3_link_state state)
4553 return USB3_LPM_DISABLED;
4556 int xhci_disable_usb3_lpm_timeout(struct usb_hcd *hcd,
4557 struct usb_device *udev, enum usb3_link_state state)
4561 #endif /* CONFIG_PM */
4563 /*-------------------------------------------------------------------------*/
4565 /* Once a hub descriptor is fetched for a device, we need to update the xHC's
4566 * internal data structures for the device.
4568 int xhci_update_hub_device(struct usb_hcd *hcd, struct usb_device *hdev,
4569 struct usb_tt *tt, gfp_t mem_flags)
4571 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4572 struct xhci_virt_device *vdev;
4573 struct xhci_command *config_cmd;
4574 struct xhci_input_control_ctx *ctrl_ctx;
4575 struct xhci_slot_ctx *slot_ctx;
4576 unsigned long flags;
4577 unsigned think_time;
4580 /* Ignore root hubs */
4584 vdev = xhci->devs[hdev->slot_id];
4586 xhci_warn(xhci, "Cannot update hub desc for unknown device.\n");
4589 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
4591 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
4595 spin_lock_irqsave(&xhci->lock, flags);
4596 if (hdev->speed == USB_SPEED_HIGH &&
4597 xhci_alloc_tt_info(xhci, vdev, hdev, tt, GFP_ATOMIC)) {
4598 xhci_dbg(xhci, "Could not allocate xHCI TT structure.\n");
4599 xhci_free_command(xhci, config_cmd);
4600 spin_unlock_irqrestore(&xhci->lock, flags);
4604 xhci_slot_copy(xhci, config_cmd->in_ctx, vdev->out_ctx);
4605 ctrl_ctx = xhci_get_input_control_ctx(xhci, config_cmd->in_ctx);
4606 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
4607 slot_ctx = xhci_get_slot_ctx(xhci, config_cmd->in_ctx);
4608 slot_ctx->dev_info |= cpu_to_le32(DEV_HUB);
4610 slot_ctx->dev_info |= cpu_to_le32(DEV_MTT);
4611 if (xhci->hci_version > 0x95) {
4612 xhci_dbg(xhci, "xHCI version %x needs hub "
4613 "TT think time and number of ports\n",
4614 (unsigned int) xhci->hci_version);
4615 slot_ctx->dev_info2 |= cpu_to_le32(XHCI_MAX_PORTS(hdev->maxchild));
4616 /* Set TT think time - convert from ns to FS bit times.
4617 * 0 = 8 FS bit times, 1 = 16 FS bit times,
4618 * 2 = 24 FS bit times, 3 = 32 FS bit times.
4620 * xHCI 1.0: this field shall be 0 if the device is not a
4623 think_time = tt->think_time;
4624 if (think_time != 0)
4625 think_time = (think_time / 666) - 1;
4626 if (xhci->hci_version < 0x100 || hdev->speed == USB_SPEED_HIGH)
4627 slot_ctx->tt_info |=
4628 cpu_to_le32(TT_THINK_TIME(think_time));
4630 xhci_dbg(xhci, "xHCI version %x doesn't need hub "
4631 "TT think time or number of ports\n",
4632 (unsigned int) xhci->hci_version);
4634 slot_ctx->dev_state = 0;
4635 spin_unlock_irqrestore(&xhci->lock, flags);
4637 xhci_dbg(xhci, "Set up %s for hub device.\n",
4638 (xhci->hci_version > 0x95) ?
4639 "configure endpoint" : "evaluate context");
4640 xhci_dbg(xhci, "Slot %u Input Context:\n", hdev->slot_id);
4641 xhci_dbg_ctx(xhci, config_cmd->in_ctx, 0);
4643 /* Issue and wait for the configure endpoint or
4644 * evaluate context command.
4646 if (xhci->hci_version > 0x95)
4647 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
4650 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
4653 xhci_dbg(xhci, "Slot %u Output Context:\n", hdev->slot_id);
4654 xhci_dbg_ctx(xhci, vdev->out_ctx, 0);
4656 xhci_free_command(xhci, config_cmd);
4660 int xhci_get_frame(struct usb_hcd *hcd)
4662 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4663 /* EHCI mods by the periodic size. Why? */
4664 return xhci_readl(xhci, &xhci->run_regs->microframe_index) >> 3;
4667 int xhci_gen_setup(struct usb_hcd *hcd, xhci_get_quirks_t get_quirks)
4669 struct xhci_hcd *xhci;
4670 struct device *dev = hcd->self.controller;
4674 /* Accept arbitrarily long scatter-gather lists */
4675 hcd->self.sg_tablesize = ~0;
4676 /* XHCI controllers don't stop the ep queue on short packets :| */
4677 hcd->self.no_stop_on_short = 1;
4679 if (usb_hcd_is_primary_hcd(hcd)) {
4680 xhci = kzalloc(sizeof(struct xhci_hcd), GFP_KERNEL);
4683 *((struct xhci_hcd **) hcd->hcd_priv) = xhci;
4684 xhci->main_hcd = hcd;
4685 /* Mark the first roothub as being USB 2.0.
4686 * The xHCI driver will register the USB 3.0 roothub.
4688 hcd->speed = HCD_USB2;
4689 hcd->self.root_hub->speed = USB_SPEED_HIGH;
4691 * USB 2.0 roothub under xHCI has an integrated TT,
4692 * (rate matching hub) as opposed to having an OHCI/UHCI
4693 * companion controller.
4697 /* xHCI private pointer was set in xhci_pci_probe for the second
4698 * registered roothub.
4700 xhci = hcd_to_xhci(hcd);
4701 temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
4702 if (HCC_64BIT_ADDR(temp)) {
4703 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
4704 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));
4706 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));
4711 xhci->cap_regs = hcd->regs;
4712 xhci->op_regs = hcd->regs +
4713 HC_LENGTH(xhci_readl(xhci, &xhci->cap_regs->hc_capbase));
4714 xhci->run_regs = hcd->regs +
4715 (xhci_readl(xhci, &xhci->cap_regs->run_regs_off) & RTSOFF_MASK);
4716 /* Cache read-only capability registers */
4717 xhci->hcs_params1 = xhci_readl(xhci, &xhci->cap_regs->hcs_params1);
4718 xhci->hcs_params2 = xhci_readl(xhci, &xhci->cap_regs->hcs_params2);
4719 xhci->hcs_params3 = xhci_readl(xhci, &xhci->cap_regs->hcs_params3);
4720 xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hc_capbase);
4721 xhci->hci_version = HC_VERSION(xhci->hcc_params);
4722 xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
4723 xhci_print_registers(xhci);
4725 get_quirks(dev, xhci);
4727 /* In xhci controllers which follow xhci 1.0 spec gives a spurious
4728 * success event after a short transfer. This quirk will ignore such
4731 if (xhci->hci_version > 0x96)
4732 xhci->quirks |= XHCI_SPURIOUS_SUCCESS;
4734 /* Make sure the HC is halted. */
4735 retval = xhci_halt(xhci);
4739 xhci_dbg(xhci, "Resetting HCD\n");
4740 /* Reset the internal HC memory state and registers. */
4741 retval = xhci_reset(xhci);
4744 xhci_dbg(xhci, "Reset complete\n");
4746 temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
4747 if (HCC_64BIT_ADDR(temp)) {
4748 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
4749 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));
4751 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));
4754 xhci_dbg(xhci, "Calling HCD init\n");
4755 /* Initialize HCD and host controller data structures. */
4756 retval = xhci_init(hcd);
4759 xhci_dbg(xhci, "Called HCD init\n");
4766 MODULE_DESCRIPTION(DRIVER_DESC);
4767 MODULE_AUTHOR(DRIVER_AUTHOR);
4768 MODULE_LICENSE("GPL");
4770 static int __init xhci_hcd_init(void)
4774 retval = xhci_register_pci();
4776 printk(KERN_DEBUG "Problem registering PCI driver.");
4779 retval = xhci_register_plat();
4781 printk(KERN_DEBUG "Problem registering platform driver.");
4785 * Check the compiler generated sizes of structures that must be laid
4786 * out in specific ways for hardware access.
4788 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
4789 BUILD_BUG_ON(sizeof(struct xhci_slot_ctx) != 8*32/8);
4790 BUILD_BUG_ON(sizeof(struct xhci_ep_ctx) != 8*32/8);
4791 /* xhci_device_control has eight fields, and also
4792 * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
4794 BUILD_BUG_ON(sizeof(struct xhci_stream_ctx) != 4*32/8);
4795 BUILD_BUG_ON(sizeof(union xhci_trb) != 4*32/8);
4796 BUILD_BUG_ON(sizeof(struct xhci_erst_entry) != 4*32/8);
4797 BUILD_BUG_ON(sizeof(struct xhci_cap_regs) != 7*32/8);
4798 BUILD_BUG_ON(sizeof(struct xhci_intr_reg) != 8*32/8);
4799 /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
4800 BUILD_BUG_ON(sizeof(struct xhci_run_regs) != (8+8*128)*32/8);
4803 xhci_unregister_pci();
4806 module_init(xhci_hcd_init);
4808 static void __exit xhci_hcd_cleanup(void)
4810 xhci_unregister_pci();
4811 xhci_unregister_plat();
4813 module_exit(xhci_hcd_cleanup);