2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <asm/unaligned.h>
27 static void xhci_hub_descriptor(struct xhci_hcd *xhci,
28 struct usb_hub_descriptor *desc)
33 ports = HCS_MAX_PORTS(xhci->hcs_params1);
35 /* USB 3.0 hubs have a different descriptor, but we fake this for now */
36 desc->bDescriptorType = 0x29;
37 desc->bPwrOn2PwrGood = 10; /* xhci section 5.4.9 says 20ms max */
38 desc->bHubContrCurrent = 0;
40 desc->bNbrPorts = ports;
41 temp = 1 + (ports / 8);
42 desc->bDescLength = 7 + 2 * temp;
44 /* Why does core/hcd.h define bitmap? It's just confusing. */
45 memset(&desc->DeviceRemovable[0], 0, temp);
46 memset(&desc->DeviceRemovable[temp], 0xff, temp);
48 /* Ugh, these should be #defines, FIXME */
49 /* Using table 11-13 in USB 2.0 spec. */
51 /* Bits 1:0 - support port power switching, or power always on */
52 if (HCC_PPC(xhci->hcc_params))
56 /* Bit 2 - root hubs are not part of a compound device */
57 /* Bits 4:3 - individual port over current protection */
59 /* Bits 6:5 - no TTs in root ports */
60 /* Bit 7 - no port indicators */
61 desc->wHubCharacteristics = (__force __u16) cpu_to_le16(temp);
64 static unsigned int xhci_port_speed(unsigned int port_status)
66 if (DEV_LOWSPEED(port_status))
67 return USB_PORT_STAT_LOW_SPEED;
68 if (DEV_HIGHSPEED(port_status))
69 return USB_PORT_STAT_HIGH_SPEED;
70 if (DEV_SUPERSPEED(port_status))
71 return USB_PORT_STAT_SUPER_SPEED;
73 * FIXME: Yes, we should check for full speed, but the core uses that as
74 * a default in portspeed() in usb/core/hub.c (which is the only place
75 * USB_PORT_STAT_*_SPEED is used).
81 * These bits are Read Only (RO) and should be saved and written to the
82 * registers: 0, 3, 10:13, 30
83 * connect status, over-current status, port speed, and device removable.
84 * connect status and port speed are also sticky - meaning they're in
85 * the AUX well and they aren't changed by a hot, warm, or cold reset.
87 #define XHCI_PORT_RO ((1<<0) | (1<<3) | (0xf<<10) | (1<<30))
89 * These bits are RW; writing a 0 clears the bit, writing a 1 sets the bit:
90 * bits 5:8, 9, 14:15, 25:27
91 * link state, port power, port indicator state, "wake on" enable state
93 #define XHCI_PORT_RWS ((0xf<<5) | (1<<9) | (0x3<<14) | (0x7<<25))
95 * These bits are RW; writing a 1 sets the bit, writing a 0 has no effect:
98 #define XHCI_PORT_RW1S ((1<<4))
100 * These bits are RW; writing a 1 clears the bit, writing a 0 has no effect:
101 * bits 1, 17, 18, 19, 20, 21, 22, 23
102 * port enable/disable, and
103 * change bits: connect, PED, warm port reset changed (reserved zero for USB 2.0 ports),
104 * over-current, reset, link state, and L1 change
106 #define XHCI_PORT_RW1CS ((1<<1) | (0x7f<<17))
108 * Bit 16 is RW, and writing a '1' to it causes the link state control to be
111 #define XHCI_PORT_RW ((1<<16))
113 * These bits are Reserved Zero (RsvdZ) and zero should be written to them:
116 #define XHCI_PORT_RZ ((1<<2) | (1<<24) | (0xf<<28))
119 * Given a port state, this function returns a value that would result in the
120 * port being in the same state, if the value was written to the port status
122 * Save Read Only (RO) bits and save read/write bits where
123 * writing a 0 clears the bit and writing a 1 sets the bit (RWS).
124 * For all other types (RW1S, RW1CS, RW, and RZ), writing a '0' has no effect.
126 static u32 xhci_port_state_to_neutral(u32 state)
128 /* Save read-only status and port state */
129 return (state & XHCI_PORT_RO) | (state & XHCI_PORT_RWS);
132 static void xhci_disable_port(struct xhci_hcd *xhci, u16 wIndex,
133 u32 __iomem *addr, u32 port_status)
135 /* Don't allow the USB core to disable SuperSpeed ports. */
136 if (xhci->port_array[wIndex] == 0x03) {
137 xhci_dbg(xhci, "Ignoring request to disable "
138 "SuperSpeed port.\n");
142 /* Write 1 to disable the port */
143 xhci_writel(xhci, port_status | PORT_PE, addr);
144 port_status = xhci_readl(xhci, addr);
145 xhci_dbg(xhci, "disable port, actual port %d status = 0x%x\n",
146 wIndex, port_status);
149 static void xhci_clear_port_change_bit(struct xhci_hcd *xhci, u16 wValue,
150 u16 wIndex, u32 __iomem *addr, u32 port_status)
152 char *port_change_bit;
156 case USB_PORT_FEAT_C_RESET:
158 port_change_bit = "reset";
160 case USB_PORT_FEAT_C_CONNECTION:
162 port_change_bit = "connect";
164 case USB_PORT_FEAT_C_OVER_CURRENT:
166 port_change_bit = "over-current";
168 case USB_PORT_FEAT_C_ENABLE:
170 port_change_bit = "enable/disable";
173 /* Should never happen */
176 /* Change bits are all write 1 to clear */
177 xhci_writel(xhci, port_status | status, addr);
178 port_status = xhci_readl(xhci, addr);
179 xhci_dbg(xhci, "clear port %s change, actual port %d status = 0x%x\n",
180 port_change_bit, wIndex, port_status);
183 int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
184 u16 wIndex, char *buf, u16 wLength)
186 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
193 ports = HCS_MAX_PORTS(xhci->hcs_params1);
195 spin_lock_irqsave(&xhci->lock, flags);
198 /* No power source, over-current reported per port */
201 case GetHubDescriptor:
202 xhci_hub_descriptor(xhci, (struct usb_hub_descriptor *) buf);
205 if (!wIndex || wIndex > ports)
209 addr = &xhci->op_regs->port_status_base + NUM_PORT_REGS*(wIndex & 0xff);
210 temp = xhci_readl(xhci, addr);
211 xhci_dbg(xhci, "get port status, actual port %d status = 0x%x\n", wIndex, temp);
213 /* wPortChange bits */
215 status |= USB_PORT_STAT_C_CONNECTION << 16;
217 status |= USB_PORT_STAT_C_ENABLE << 16;
218 if ((temp & PORT_OCC))
219 status |= USB_PORT_STAT_C_OVERCURRENT << 16;
221 * FIXME ignoring suspend, reset, and USB 2.1/3.0 specific
224 if (temp & PORT_CONNECT) {
225 status |= USB_PORT_STAT_CONNECTION;
226 status |= xhci_port_speed(temp);
229 status |= USB_PORT_STAT_ENABLE;
231 status |= USB_PORT_STAT_OVERCURRENT;
232 if (temp & PORT_RESET)
233 status |= USB_PORT_STAT_RESET;
234 if (temp & PORT_POWER)
235 status |= USB_PORT_STAT_POWER;
236 xhci_dbg(xhci, "Get port status returned 0x%x\n", status);
237 put_unaligned(cpu_to_le32(status), (__le32 *) buf);
241 if (!wIndex || wIndex > ports)
244 addr = &xhci->op_regs->port_status_base + NUM_PORT_REGS*(wIndex & 0xff);
245 temp = xhci_readl(xhci, addr);
246 temp = xhci_port_state_to_neutral(temp);
248 case USB_PORT_FEAT_POWER:
250 * Turn on ports, even if there isn't per-port switching.
251 * HC will report connect events even before this is set.
252 * However, khubd will ignore the roothub events until
253 * the roothub is registered.
255 xhci_writel(xhci, temp | PORT_POWER, addr);
257 temp = xhci_readl(xhci, addr);
258 xhci_dbg(xhci, "set port power, actual port %d status = 0x%x\n", wIndex, temp);
260 case USB_PORT_FEAT_RESET:
261 temp = (temp | PORT_RESET);
262 xhci_writel(xhci, temp, addr);
264 temp = xhci_readl(xhci, addr);
265 xhci_dbg(xhci, "set port reset, actual port %d status = 0x%x\n", wIndex, temp);
270 temp = xhci_readl(xhci, addr); /* unblock any posted writes */
272 case ClearPortFeature:
273 if (!wIndex || wIndex > ports)
276 addr = &xhci->op_regs->port_status_base +
277 NUM_PORT_REGS*(wIndex & 0xff);
278 temp = xhci_readl(xhci, addr);
279 temp = xhci_port_state_to_neutral(temp);
281 case USB_PORT_FEAT_C_RESET:
282 case USB_PORT_FEAT_C_CONNECTION:
283 case USB_PORT_FEAT_C_OVER_CURRENT:
284 case USB_PORT_FEAT_C_ENABLE:
285 xhci_clear_port_change_bit(xhci, wValue, wIndex,
288 case USB_PORT_FEAT_ENABLE:
289 xhci_disable_port(xhci, wIndex, addr, temp);
297 /* "stall" on error */
300 spin_unlock_irqrestore(&xhci->lock, flags);
305 * Returns 0 if the status hasn't changed, or the number of bytes in buf.
306 * Ports are 0-indexed from the HCD point of view,
307 * and 1-indexed from the USB core pointer of view.
309 * Note that the status change bits will be cleared as soon as a port status
310 * change event is generated, so we use the saved status from that event.
312 int xhci_hub_status_data(struct usb_hcd *hcd, char *buf)
317 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
321 ports = HCS_MAX_PORTS(xhci->hcs_params1);
323 /* Initial status is no changes */
324 retval = (ports + 8) / 8;
325 memset(buf, 0, retval);
328 spin_lock_irqsave(&xhci->lock, flags);
329 /* For each port, did anything change? If so, set that bit in buf. */
330 for (i = 0; i < ports; i++) {
331 addr = &xhci->op_regs->port_status_base +
333 temp = xhci_readl(xhci, addr);
334 if (temp & (PORT_CSC | PORT_PEC | PORT_OCC)) {
335 buf[(i + 1) / 8] |= 1 << (i + 1) % 8;
339 spin_unlock_irqrestore(&xhci->lock, flags);
340 return status ? retval : 0;