2 * Copyright (C) 2012 by Alan Stern
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
11 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 /* This file is part of ehci-hcd.c */
17 /*-------------------------------------------------------------------------*/
19 /* Set a bit in the USBCMD register */
20 static void ehci_set_command_bit(struct ehci_hcd *ehci, u32 bit)
23 ehci_writel(ehci, ehci->command, &ehci->regs->command);
25 /* unblock posted write */
26 ehci_readl(ehci, &ehci->regs->command);
29 /* Clear a bit in the USBCMD register */
30 static void ehci_clear_command_bit(struct ehci_hcd *ehci, u32 bit)
32 ehci->command &= ~bit;
33 ehci_writel(ehci, ehci->command, &ehci->regs->command);
35 /* unblock posted write */
36 ehci_readl(ehci, &ehci->regs->command);
39 /*-------------------------------------------------------------------------*/
42 * EHCI timer support... Now using hrtimers.
44 * Lots of different events are triggered from ehci->hrtimer. Whenever
45 * the timer routine runs, it checks each possible event; events that are
46 * currently enabled and whose expiration time has passed get handled.
47 * The set of enabled events is stored as a collection of bitflags in
48 * ehci->enabled_hrtimer_events, and they are numbered in order of
49 * increasing delay values (ranging between 1 ms and 100 ms).
51 * Rather than implementing a sorted list or tree of all pending events,
52 * we keep track only of the lowest-numbered pending event, in
53 * ehci->next_hrtimer_event. Whenever ehci->hrtimer gets restarted, its
54 * expiration time is set to the timeout value for this event.
56 * As a result, events might not get handled right away; the actual delay
57 * could be anywhere up to twice the requested delay. This doesn't
58 * matter, because none of the events are especially time-critical. The
59 * ones that matter most all have a delay of 1 ms, so they will be
60 * handled after 2 ms at most, which is okay. In addition to this, we
61 * allow for an expiration range of 1 ms.
65 * Delay lengths for the hrtimer event types.
66 * Keep this list sorted by delay length, in the same order as
67 * the event types indexed by enum ehci_hrtimer_event in ehci.h.
69 static unsigned event_delays_ns[] = {
70 1 * NSEC_PER_MSEC, /* EHCI_HRTIMER_POLL_ASS */
71 1 * NSEC_PER_MSEC, /* EHCI_HRTIMER_POLL_PSS */
72 1 * NSEC_PER_MSEC, /* EHCI_HRTIMER_POLL_DEAD */
73 1125 * NSEC_PER_USEC, /* EHCI_HRTIMER_UNLINK_INTR */
74 2 * NSEC_PER_MSEC, /* EHCI_HRTIMER_FREE_ITDS */
75 6 * NSEC_PER_MSEC, /* EHCI_HRTIMER_ASYNC_UNLINKS */
76 10 * NSEC_PER_MSEC, /* EHCI_HRTIMER_IAA_WATCHDOG */
77 10 * NSEC_PER_MSEC, /* EHCI_HRTIMER_DISABLE_PERIODIC */
78 15 * NSEC_PER_MSEC, /* EHCI_HRTIMER_DISABLE_ASYNC */
79 100 * NSEC_PER_MSEC, /* EHCI_HRTIMER_IO_WATCHDOG */
82 /* Enable a pending hrtimer event */
83 static void ehci_enable_event(struct ehci_hcd *ehci, unsigned event,
86 ktime_t *timeout = &ehci->hr_timeouts[event];
89 *timeout = ktime_add(ktime_get(),
90 ktime_set(0, event_delays_ns[event]));
91 ehci->enabled_hrtimer_events |= (1 << event);
93 /* Track only the lowest-numbered pending event */
94 if (event < ehci->next_hrtimer_event) {
95 ehci->next_hrtimer_event = event;
96 hrtimer_start_range_ns(&ehci->hrtimer, *timeout,
97 NSEC_PER_MSEC, HRTIMER_MODE_ABS);
102 /* Poll the STS_ASS status bit; see when it agrees with CMD_ASE */
103 static void ehci_poll_ASS(struct ehci_hcd *ehci)
105 unsigned actual, want;
107 /* Don't enable anything if the controller isn't running (e.g., died) */
108 if (ehci->rh_state != EHCI_RH_RUNNING)
111 want = (ehci->command & CMD_ASE) ? STS_ASS : 0;
112 actual = ehci_readl(ehci, &ehci->regs->status) & STS_ASS;
114 if (want != actual) {
116 /* Poll again later */
117 ehci_enable_event(ehci, EHCI_HRTIMER_POLL_ASS, true);
118 ++ehci->ASS_poll_count;
122 if (ehci->ASS_poll_count > 20)
123 ehci_dbg(ehci, "ASS poll count reached %d\n",
124 ehci->ASS_poll_count);
125 ehci->ASS_poll_count = 0;
127 /* The status is up-to-date; restart or stop the schedule as needed */
128 if (want == 0) { /* Stopped */
129 if (ehci->async_count > 0)
130 ehci_set_command_bit(ehci, CMD_ASE);
132 } else { /* Running */
133 if (ehci->async_count == 0) {
135 /* Turn off the schedule after a while */
136 ehci_enable_event(ehci, EHCI_HRTIMER_DISABLE_ASYNC,
142 /* Turn off the async schedule after a brief delay */
143 static void ehci_disable_ASE(struct ehci_hcd *ehci)
145 ehci_clear_command_bit(ehci, CMD_ASE);
149 /* Poll the STS_PSS status bit; see when it agrees with CMD_PSE */
150 static void ehci_poll_PSS(struct ehci_hcd *ehci)
152 unsigned actual, want;
154 /* Don't do anything if the controller isn't running (e.g., died) */
155 if (ehci->rh_state != EHCI_RH_RUNNING)
158 want = (ehci->command & CMD_PSE) ? STS_PSS : 0;
159 actual = ehci_readl(ehci, &ehci->regs->status) & STS_PSS;
161 if (want != actual) {
163 /* Poll again later */
164 ehci_enable_event(ehci, EHCI_HRTIMER_POLL_PSS, true);
168 if (ehci->PSS_poll_count > 20)
169 ehci_dbg(ehci, "PSS poll count reached %d\n",
170 ehci->PSS_poll_count);
171 ehci->PSS_poll_count = 0;
173 /* The status is up-to-date; restart or stop the schedule as needed */
174 if (want == 0) { /* Stopped */
175 if (ehci->periodic_count > 0)
176 ehci_set_command_bit(ehci, CMD_PSE);
178 } else { /* Running */
179 if (ehci->periodic_count == 0) {
181 /* Turn off the schedule after a while */
182 ehci_enable_event(ehci, EHCI_HRTIMER_DISABLE_PERIODIC,
188 /* Turn off the periodic schedule after a brief delay */
189 static void ehci_disable_PSE(struct ehci_hcd *ehci)
191 ehci_clear_command_bit(ehci, CMD_PSE);
195 /* Poll the STS_HALT status bit; see when a dead controller stops */
196 static void ehci_handle_controller_death(struct ehci_hcd *ehci)
198 if (!(ehci_readl(ehci, &ehci->regs->status) & STS_HALT)) {
200 /* Give up after a few milliseconds */
201 if (ehci->died_poll_count++ < 5) {
202 /* Try again later */
203 ehci_enable_event(ehci, EHCI_HRTIMER_POLL_DEAD, true);
206 ehci_warn(ehci, "Waited too long for the controller to stop, giving up\n");
209 /* Clean up the mess */
210 ehci->rh_state = EHCI_RH_HALTED;
211 ehci_writel(ehci, 0, &ehci->regs->configured_flag);
212 ehci_writel(ehci, 0, &ehci->regs->intr_enable);
214 end_unlink_async(ehci);
216 /* Not in process context, so don't try to reset the controller */
220 /* Handle unlinked interrupt QHs once they are gone from the hardware */
221 static void ehci_handle_intr_unlinks(struct ehci_hcd *ehci)
223 bool stopped = (ehci->rh_state < EHCI_RH_RUNNING);
226 * Process all the QHs on the intr_unlink list that were added
227 * before the current unlink cycle began. The list is in
228 * temporal order, so stop when we reach the first entry in the
229 * current cycle. But if the root hub isn't running then
230 * process all the QHs on the list.
232 ehci->intr_unlinking = true;
233 while (ehci->intr_unlink) {
234 struct ehci_qh *qh = ehci->intr_unlink;
236 if (!stopped && qh->unlink_cycle == ehci->intr_unlink_cycle)
238 ehci->intr_unlink = qh->unlink_next;
239 qh->unlink_next = NULL;
240 end_unlink_intr(ehci, qh);
243 /* Handle remaining entries later */
244 if (ehci->intr_unlink) {
245 ehci_enable_event(ehci, EHCI_HRTIMER_UNLINK_INTR, true);
246 ++ehci->intr_unlink_cycle;
248 ehci->intr_unlinking = false;
252 /* Start another free-iTDs/siTDs cycle */
253 static void start_free_itds(struct ehci_hcd *ehci)
255 if (!(ehci->enabled_hrtimer_events & BIT(EHCI_HRTIMER_FREE_ITDS))) {
256 ehci->last_itd_to_free = list_entry(
257 ehci->cached_itd_list.prev,
258 struct ehci_itd, itd_list);
259 ehci->last_sitd_to_free = list_entry(
260 ehci->cached_sitd_list.prev,
261 struct ehci_sitd, sitd_list);
262 ehci_enable_event(ehci, EHCI_HRTIMER_FREE_ITDS, true);
266 /* Wait for controller to stop using old iTDs and siTDs */
267 static void end_free_itds(struct ehci_hcd *ehci)
269 struct ehci_itd *itd, *n;
270 struct ehci_sitd *sitd, *sn;
272 if (ehci->rh_state < EHCI_RH_RUNNING) {
273 ehci->last_itd_to_free = NULL;
274 ehci->last_sitd_to_free = NULL;
277 list_for_each_entry_safe(itd, n, &ehci->cached_itd_list, itd_list) {
278 list_del(&itd->itd_list);
279 dma_pool_free(ehci->itd_pool, itd, itd->itd_dma);
280 if (itd == ehci->last_itd_to_free)
283 list_for_each_entry_safe(sitd, sn, &ehci->cached_sitd_list, sitd_list) {
284 list_del(&sitd->sitd_list);
285 dma_pool_free(ehci->sitd_pool, sitd, sitd->sitd_dma);
286 if (sitd == ehci->last_sitd_to_free)
290 if (!list_empty(&ehci->cached_itd_list) ||
291 !list_empty(&ehci->cached_sitd_list))
292 start_free_itds(ehci);
296 /* Handle lost (or very late) IAA interrupts */
297 static void ehci_iaa_watchdog(struct ehci_hcd *ehci)
299 if (ehci->rh_state != EHCI_RH_RUNNING)
303 * Lost IAA irqs wedge things badly; seen first with a vt8235.
304 * So we need this watchdog, but must protect it against both
305 * (a) SMP races against real IAA firing and retriggering, and
306 * (b) clean HC shutdown, when IAA watchdog was pending.
308 if (ehci->async_iaa) {
311 /* If we get here, IAA is *REALLY* late. It's barely
312 * conceivable that the system is so busy that CMD_IAAD
313 * is still legitimately set, so let's be sure it's
314 * clear before we read STS_IAA. (The HC should clear
315 * CMD_IAAD when it sets STS_IAA.)
317 cmd = ehci_readl(ehci, &ehci->regs->command);
320 * If IAA is set here it either legitimately triggered
321 * after the watchdog timer expired (_way_ late, so we'll
322 * still count it as lost) ... or a silicon erratum:
323 * - VIA seems to set IAA without triggering the IRQ;
324 * - IAAD potentially cleared without setting IAA.
326 status = ehci_readl(ehci, &ehci->regs->status);
327 if ((status & STS_IAA) || !(cmd & CMD_IAAD)) {
328 COUNT(ehci->stats.lost_iaa);
329 ehci_writel(ehci, STS_IAA, &ehci->regs->status);
332 ehci_vdbg(ehci, "IAA watchdog: status %x cmd %x\n",
334 end_unlink_async(ehci);
339 /* Enable the I/O watchdog, if appropriate */
340 static void turn_on_io_watchdog(struct ehci_hcd *ehci)
342 /* Not needed if the controller isn't running or it's already enabled */
343 if (ehci->rh_state != EHCI_RH_RUNNING ||
344 (ehci->enabled_hrtimer_events &
345 BIT(EHCI_HRTIMER_IO_WATCHDOG)))
349 * Isochronous transfers always need the watchdog.
350 * For other sorts we use it only if the flag is set.
352 if (ehci->isoc_count > 0 || (ehci->need_io_watchdog &&
353 ehci->async_count + ehci->intr_count > 0))
354 ehci_enable_event(ehci, EHCI_HRTIMER_IO_WATCHDOG, true);
359 * Handler functions for the hrtimer event types.
360 * Keep this array in the same order as the event types indexed by
361 * enum ehci_hrtimer_event in ehci.h.
363 static void (*event_handlers[])(struct ehci_hcd *) = {
364 ehci_poll_ASS, /* EHCI_HRTIMER_POLL_ASS */
365 ehci_poll_PSS, /* EHCI_HRTIMER_POLL_PSS */
366 ehci_handle_controller_death, /* EHCI_HRTIMER_POLL_DEAD */
367 ehci_handle_intr_unlinks, /* EHCI_HRTIMER_UNLINK_INTR */
368 end_free_itds, /* EHCI_HRTIMER_FREE_ITDS */
369 unlink_empty_async, /* EHCI_HRTIMER_ASYNC_UNLINKS */
370 ehci_iaa_watchdog, /* EHCI_HRTIMER_IAA_WATCHDOG */
371 ehci_disable_PSE, /* EHCI_HRTIMER_DISABLE_PERIODIC */
372 ehci_disable_ASE, /* EHCI_HRTIMER_DISABLE_ASYNC */
373 ehci_work, /* EHCI_HRTIMER_IO_WATCHDOG */
376 static enum hrtimer_restart ehci_hrtimer_func(struct hrtimer *t)
378 struct ehci_hcd *ehci = container_of(t, struct ehci_hcd, hrtimer);
380 unsigned long events;
384 spin_lock_irqsave(&ehci->lock, flags);
386 events = ehci->enabled_hrtimer_events;
387 ehci->enabled_hrtimer_events = 0;
388 ehci->next_hrtimer_event = EHCI_HRTIMER_NO_EVENT;
391 * Check each pending event. If its time has expired, handle
392 * the event; otherwise re-enable it.
395 for_each_set_bit(e, &events, EHCI_HRTIMER_NUM_EVENTS) {
396 if (now.tv64 >= ehci->hr_timeouts[e].tv64)
397 event_handlers[e](ehci);
399 ehci_enable_event(ehci, e, false);
402 spin_unlock_irqrestore(&ehci->lock, flags);
403 return HRTIMER_NORESTART;