drivers/usb/host/ehci-hcd.c

   1 /*
   2  * Enhanced Host Controller Interface (EHCI) driver for USB.
   3  *
   4  * Maintainer: Alan Stern <stern@rowland.harvard.edu>
   5  *
   6  * Copyright (c) 2000-2004 by David Brownell
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms of the GNU General Public License as published by the
  10  * Free Software Foundation; either version 2 of the License, or (at your
  11  * option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful, but
  14  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  15  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  16  * for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software Foundation,
  20  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  */
  22
  23 #include <linux/module.h>
  24 #include <linux/pci.h>
  25 #include <linux/dmapool.h>
  26 #include <linux/kernel.h>
  27 #include <linux/delay.h>
  28 #include <linux/ioport.h>
  29 #include <linux/sched.h>
  30 #include <linux/vmalloc.h>
  31 #include <linux/errno.h>
  32 #include <linux/init.h>
  33 #include <linux/timer.h>
  34 #include <linux/ktime.h>
  35 #include <linux/list.h>
  36 #include <linux/interrupt.h>
  37 #include <linux/usb.h>
  38 #include <linux/usb/hcd.h>
  39 #include <linux/moduleparam.h>
  40 #include <linux/dma-mapping.h>
  41 #include <linux/debugfs.h>
  42 #include <linux/slab.h>
  43 #include <linux/uaccess.h>
  44
  45 #include <asm/byteorder.h>
  46 #include <asm/io.h>
  47 #include <asm/irq.h>
  48 #include <asm/system.h>
  49 #include <asm/unaligned.h>
  50
  51 /*-------------------------------------------------------------------------*/
  52
  53 /*
  54  * EHCI hc_driver implementation ... experimental, incomplete.
  55  * Based on the final 1.0 register interface specification.
  56  *
  57  * USB 2.0 shows up in upcoming www.pcmcia.org technology.
  58  * First was PCMCIA, like ISA; then CardBus, which is PCI.
  59  * Next comes "CardBay", using USB 2.0 signals.
  60  *
  61  * Contains additional contributions by Brad Hards, Rory Bolt, and others.
  62  * Special thanks to Intel and VIA for providing host controllers to
  63  * test this driver on, and Cypress (including In-System Design) for
  64  * providing early devices for those host controllers to talk to!
  65  */
  66
  67 #define DRIVER_AUTHOR "David Brownell"
  68 #define DRIVER_DESC "USB 2.0 'Enhanced' Host Controller (EHCI) Driver"
  69
  70 static const char       hcd_name [] = "ehci_hcd";
  71
  72
  73 #undef VERBOSE_DEBUG
  74 #undef EHCI_URB_TRACE
  75
  76 #ifdef DEBUG
  77 #define EHCI_STATS
  78 #endif
  79
  80 /* magic numbers that can affect system performance */
  81 #define EHCI_TUNE_CERR          3       /* 0-3 qtd retries; 0 == don't stop */
  82 #define EHCI_TUNE_RL_HS         4       /* nak throttle; see 4.9 */
  83 #define EHCI_TUNE_RL_TT         0
  84 #define EHCI_TUNE_MULT_HS       1       /* 1-3 transactions/uframe; 4.10.3 */
  85 #define EHCI_TUNE_MULT_TT       1
  86 /*
  87  * Some drivers think it's safe to schedule isochronous transfers more than
  88  * 256 ms into the future (partly as a result of an old bug in the scheduling
  89  * code).  In an attempt to avoid trouble, we will use a minimum scheduling
  90  * length of 512 frames instead of 256.
  91  */
  92 #define EHCI_TUNE_FLS           1       /* (medium) 512-frame schedule */
  93
  94 #define EHCI_IAA_MSECS          10              /* arbitrary */
  95 #define EHCI_IO_JIFFIES         (HZ/10)         /* io watchdog > irq_thresh */
  96 #define EHCI_ASYNC_JIFFIES      (HZ/20)         /* async idle timeout */
  97 #define EHCI_SHRINK_JIFFIES     (DIV_ROUND_UP(HZ, 200) + 1)
  98                                                 /* 200-ms async qh unlink delay */
  99
 100 /* Initial IRQ latency:  faster than hw default */
 101 static int log2_irq_thresh = 0;         // 0 to 6
 102 module_param (log2_irq_thresh, int, S_IRUGO);
 103 MODULE_PARM_DESC (log2_irq_thresh, "log2 IRQ latency, 1-64 microframes");
 104
 105 /* initial park setting:  slower than hw default */
 106 static unsigned park = 0;
 107 module_param (park, uint, S_IRUGO);
 108 MODULE_PARM_DESC (park, "park setting; 1-3 back-to-back async packets");
 109
 110 /* for flakey hardware, ignore overcurrent indicators */
 111 static int ignore_oc = 0;
 112 module_param (ignore_oc, bool, S_IRUGO);
 113 MODULE_PARM_DESC (ignore_oc, "ignore bogus hardware overcurrent indications");
 114
 115 /* for link power management(LPM) feature */
 116 static unsigned int hird;
 117 module_param(hird, int, S_IRUGO);
 118 MODULE_PARM_DESC(hird, "host initiated resume duration, +1 for each 75us\n");
 119
 120 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
 121
 122 /*-------------------------------------------------------------------------*/
 123
 124 #include "ehci.h"
 125 #include "ehci-dbg.c"
 126 #include "pci-quirks.h"
 127
 128 /*-------------------------------------------------------------------------*/
 129
 130 static void
 131 timer_action(struct ehci_hcd *ehci, enum ehci_timer_action action)
 132 {
 133         /* Don't override timeouts which shrink or (later) disable
 134          * the async ring; just the I/O watchdog.  Note that if a
 135          * SHRINK were pending, OFF would never be requested.
 136          */
 137         if (timer_pending(&ehci->watchdog)
 138                         && ((BIT(TIMER_ASYNC_SHRINK) | BIT(TIMER_ASYNC_OFF))
 139                                 & ehci->actions))
 140                 return;
 141
 142         if (!test_and_set_bit(action, &ehci->actions)) {
 143                 unsigned long t;
 144
 145                 switch (action) {
 146                 case TIMER_IO_WATCHDOG:
 147                         if (!ehci->need_io_watchdog)
 148                                 return;
 149                         t = EHCI_IO_JIFFIES;
 150                         break;
 151                 case TIMER_ASYNC_OFF:
 152                         t = EHCI_ASYNC_JIFFIES;
 153                         break;
 154                 /* case TIMER_ASYNC_SHRINK: */
 155                 default:
 156                         t = EHCI_SHRINK_JIFFIES;
 157                         break;
 158                 }
 159                 mod_timer(&ehci->watchdog, t + jiffies);
 160         }
 161 }
 162
 163 /*-------------------------------------------------------------------------*/
 164
 165 /*
 166  * handshake - spin reading hc until handshake completes or fails
 167  * @ptr: address of hc register to be read
 168  * @mask: bits to look at in result of read
 169  * @done: value of those bits when handshake succeeds
 170  * @usec: timeout in microseconds
 171  *
 172  * Returns negative errno, or zero on success
 173  *
 174  * Success happens when the "mask" bits have the specified value (hardware
 175  * handshake done).  There are two failure modes:  "usec" have passed (major
 176  * hardware flakeout), or the register reads as all-ones (hardware removed).
 177  *
 178  * That last failure should_only happen in cases like physical cardbus eject
 179  * before driver shutdown. But it also seems to be caused by bugs in cardbus
 180  * bridge shutdown:  shutting down the bridge before the devices using it.
 181  */
 182 static int handshake (struct ehci_hcd *ehci, void __iomem *ptr,
 183                       u32 mask, u32 done, int usec)
 184 {
 185         u32     result;
 186
 187         do {
 188                 result = ehci_readl(ehci, ptr);
 189                 if (result == ~(u32)0)          /* card removed */
 190                         return -ENODEV;
 191                 result &= mask;
 192                 if (result == done)
 193                         return 0;
 194                 udelay (1);
 195                 usec--;
 196         } while (usec > 0);
 197         return -ETIMEDOUT;
 198 }
 199
 200 /* check TDI/ARC silicon is in host mode */
 201 static int tdi_in_host_mode (struct ehci_hcd *ehci)
 202 {
 203         u32 __iomem     *reg_ptr;
 204         u32             tmp;
 205
 206         reg_ptr = (u32 __iomem *)(((u8 __iomem *)ehci->regs) + USBMODE);
 207         tmp = ehci_readl(ehci, reg_ptr);
 208         return (tmp & 3) == USBMODE_CM_HC;
 209 }
 210
 211 /* force HC to halt state from unknown (EHCI spec section 2.3) */
 212 static int ehci_halt (struct ehci_hcd *ehci)
 213 {
 214         u32     temp = ehci_readl(ehci, &ehci->regs->status);
 215
 216         /* disable any irqs left enabled by previous code */
 217         ehci_writel(ehci, 0, &ehci->regs->intr_enable);
 218
 219         if (ehci_is_TDI(ehci) && tdi_in_host_mode(ehci) == 0) {
 220                 return 0;
 221         }
 222
 223         if ((temp & STS_HALT) != 0)
 224                 return 0;
 225
 226         temp = ehci_readl(ehci, &ehci->regs->command);
 227         temp &= ~CMD_RUN;
 228         ehci_writel(ehci, temp, &ehci->regs->command);
 229         return handshake (ehci, &ehci->regs->status,
 230                           STS_HALT, STS_HALT, 16 * 125);
 231 }
 232
 233 static int handshake_on_error_set_halt(struct ehci_hcd *ehci, void __iomem *ptr,
 234                                        u32 mask, u32 done, int usec)
 235 {
 236         int error;
 237
 238         error = handshake(ehci, ptr, mask, done, usec);
 239         if (error) {
 240                 ehci_halt(ehci);
 241                 ehci_to_hcd(ehci)->state = HC_STATE_HALT;
 242                 ehci_err(ehci, "force halt; handshake %p %08x %08x -> %d\n",
 243                         ptr, mask, done, error);
 244         }
 245
 246         return error;
 247 }
 248
 249 /* put TDI/ARC silicon into EHCI mode */
 250 static void tdi_reset (struct ehci_hcd *ehci)
 251 {
 252         u32 __iomem     *reg_ptr;
 253         u32             tmp;
 254
 255         reg_ptr = (u32 __iomem *)(((u8 __iomem *)ehci->regs) + USBMODE);
 256         tmp = ehci_readl(ehci, reg_ptr);
 257         tmp |= USBMODE_CM_HC;
 258         /* The default byte access to MMR space is LE after
 259          * controller reset. Set the required endian mode
 260          * for transfer buffers to match the host microprocessor
 261          */
 262         if (ehci_big_endian_mmio(ehci))
 263                 tmp |= USBMODE_BE;
 264         ehci_writel(ehci, tmp, reg_ptr);
 265 }
 266
 267 /* reset a non-running (STS_HALT == 1) controller */
 268 static int ehci_reset (struct ehci_hcd *ehci)
 269 {
 270         int     retval;
 271         u32     command = ehci_readl(ehci, &ehci->regs->command);
 272
 273         /* If the EHCI debug controller is active, special care must be
 274          * taken before and after a host controller reset */
 275         if (ehci->debug && !dbgp_reset_prep())
 276                 ehci->debug = NULL;
 277
 278         command |= CMD_RESET;
 279         dbg_cmd (ehci, "reset", command);
 280         ehci_writel(ehci, command, &ehci->regs->command);
 281         ehci_to_hcd(ehci)->state = HC_STATE_HALT;
 282         ehci->next_statechange = jiffies;
 283         retval = handshake (ehci, &ehci->regs->command,
 284                             CMD_RESET, 0, 250 * 1000);
 285
 286         if (ehci->has_hostpc) {
 287                 ehci_writel(ehci, USBMODE_EX_HC | USBMODE_EX_VBPS,
 288                         (u32 __iomem *)(((u8 *)ehci->regs) + USBMODE_EX));
 289                 ehci_writel(ehci, TXFIFO_DEFAULT,
 290                         (u32 __iomem *)(((u8 *)ehci->regs) + TXFILLTUNING));
 291         }
 292         if (retval)
 293                 return retval;
 294
 295         if (ehci_is_TDI(ehci))
 296                 tdi_reset (ehci);
 297
 298         if (ehci->debug)
 299                 dbgp_external_startup();
 300
 301         return retval;
 302 }
 303
 304 /* idle the controller (from running) */
 305 static void ehci_quiesce (struct ehci_hcd *ehci)
 306 {
 307         u32     temp;
 308
 309 #ifdef DEBUG
 310         if (!HC_IS_RUNNING (ehci_to_hcd(ehci)->state))
 311                 BUG ();
 312 #endif
 313
 314         /* wait for any schedule enables/disables to take effect */
 315         temp = ehci_readl(ehci, &ehci->regs->command) << 10;
 316         temp &= STS_ASS | STS_PSS;
 317         if (handshake_on_error_set_halt(ehci, &ehci->regs->status,
 318                                         STS_ASS | STS_PSS, temp, 16 * 125))
 319                 return;
 320
 321         /* then disable anything that's still active */
 322         temp = ehci_readl(ehci, &ehci->regs->command);
 323         temp &= ~(CMD_ASE | CMD_IAAD | CMD_PSE);
 324         ehci_writel(ehci, temp, &ehci->regs->command);
 325
 326         /* hardware can take 16 microframes to turn off ... */
 327         handshake_on_error_set_halt(ehci, &ehci->regs->status,
 328                                     STS_ASS | STS_PSS, 0, 16 * 125);
 329 }
 330
 331 /*-------------------------------------------------------------------------*/
 332
 333 static void end_unlink_async(struct ehci_hcd *ehci);
 334 static void ehci_work(struct ehci_hcd *ehci);
 335
 336 #include "ehci-hub.c"
 337 #include "ehci-lpm.c"
 338 #include "ehci-mem.c"
 339 #include "ehci-q.c"
 340 #include "ehci-sched.c"
 341
 342 /*-------------------------------------------------------------------------*/
 343
 344 static void ehci_iaa_watchdog(unsigned long param)
 345 {
 346         struct ehci_hcd         *ehci = (struct ehci_hcd *) param;
 347         unsigned long           flags;
 348
 349         spin_lock_irqsave (&ehci->lock, flags);
 350
 351         /* Lost IAA irqs wedge things badly; seen first with a vt8235.
 352          * So we need this watchdog, but must protect it against both
 353          * (a) SMP races against real IAA firing and retriggering, and
 354          * (b) clean HC shutdown, when IAA watchdog was pending.
 355          */
 356         if (ehci->reclaim
 357                         && !timer_pending(&ehci->iaa_watchdog)
 358                         && HC_IS_RUNNING(ehci_to_hcd(ehci)->state)) {
 359                 u32 cmd, status;
 360
 361                 /* If we get here, IAA is *REALLY* late.  It's barely
 362                  * conceivable that the system is so busy that CMD_IAAD
 363                  * is still legitimately set, so let's be sure it's
 364                  * clear before we read STS_IAA.  (The HC should clear
 365                  * CMD_IAAD when it sets STS_IAA.)
 366                  */
 367                 cmd = ehci_readl(ehci, &ehci->regs->command);
 368                 if (cmd & CMD_IAAD)
 369                         ehci_writel(ehci, cmd & ~CMD_IAAD,
 370                                         &ehci->regs->command);
 371
 372                 /* If IAA is set here it either legitimately triggered
 373                  * before we cleared IAAD above (but _way_ late, so we'll
 374                  * still count it as lost) ... or a silicon erratum:
 375                  * - VIA seems to set IAA without triggering the IRQ;
 376                  * - IAAD potentially cleared without setting IAA.
 377                  */
 378                 status = ehci_readl(ehci, &ehci->regs->status);
 379                 if ((status & STS_IAA) || !(cmd & CMD_IAAD)) {
 380                         COUNT (ehci->stats.lost_iaa);
 381                         ehci_writel(ehci, STS_IAA, &ehci->regs->status);
 382                 }
 383
 384                 ehci_vdbg(ehci, "IAA watchdog: status %x cmd %x\n",
 385                                 status, cmd);
 386                 end_unlink_async(ehci);
 387         }
 388
 389         spin_unlock_irqrestore(&ehci->lock, flags);
 390 }
 391
 392 static void ehci_watchdog(unsigned long param)
 393 {
 394         struct ehci_hcd         *ehci = (struct ehci_hcd *) param;
 395         unsigned long           flags;
 396
 397         spin_lock_irqsave(&ehci->lock, flags);
 398
 399         /* stop async processing after it's idled a bit */
 400         if (test_bit (TIMER_ASYNC_OFF, &ehci->actions))
 401                 start_unlink_async (ehci, ehci->async);
 402
 403         /* ehci could run by timer, without IRQs ... */
 404         ehci_work (ehci);
 405
 406         spin_unlock_irqrestore (&ehci->lock, flags);
 407 }
 408
 409 /* On some systems, leaving remote wakeup enabled prevents system shutdown.
 410  * The firmware seems to think that powering off is a wakeup event!
 411  * This routine turns off remote wakeup and everything else, on all ports.
 412  */
 413 static void ehci_turn_off_all_ports(struct ehci_hcd *ehci)
 414 {
 415         int     port = HCS_N_PORTS(ehci->hcs_params);
 416
 417         while (port--)
 418                 ehci_writel(ehci, PORT_RWC_BITS,
 419                                 &ehci->regs->port_status[port]);
 420 }
 421
 422 /*
 423  * Halt HC, turn off all ports, and let the BIOS use the companion controllers.
 424  * Should be called with ehci->lock held.
 425  */
 426 static void ehci_silence_controller(struct ehci_hcd *ehci)
 427 {
 428         ehci_halt(ehci);
 429         ehci_turn_off_all_ports(ehci);
 430
 431         /* make BIOS/etc use companion controller during reboot */
 432         ehci_writel(ehci, 0, &ehci->regs->configured_flag);
 433
 434         /* unblock posted writes */
 435         ehci_readl(ehci, &ehci->regs->configured_flag);
 436 }
 437
 438 /* ehci_shutdown kick in for silicon on any bus (not just pci, etc).
 439  * This forcibly disables dma and IRQs, helping kexec and other cases
 440  * where the next system software may expect clean state.
 441  */
 442 static void ehci_shutdown(struct usb_hcd *hcd)
 443 {
 444         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 445
 446         del_timer_sync(&ehci->watchdog);
 447         del_timer_sync(&ehci->iaa_watchdog);
 448
 449         spin_lock_irq(&ehci->lock);
 450         ehci_silence_controller(ehci);
 451         spin_unlock_irq(&ehci->lock);
 452 }
 453
 454 static void ehci_port_power (struct ehci_hcd *ehci, int is_on)
 455 {
 456         unsigned port;
 457
 458         if (!HCS_PPC (ehci->hcs_params))
 459                 return;
 460
 461         ehci_dbg (ehci, "...power%s ports...\n", is_on ? "up" : "down");
 462         for (port = HCS_N_PORTS (ehci->hcs_params); port > 0; )
 463                 (void) ehci_hub_control(ehci_to_hcd(ehci),
 464                                 is_on ? SetPortFeature : ClearPortFeature,
 465                                 USB_PORT_FEAT_POWER,
 466                                 port--, NULL, 0);
 467         /* Flush those writes */
 468         ehci_readl(ehci, &ehci->regs->command);
 469         msleep(20);
 470 }
 471
 472 /*-------------------------------------------------------------------------*/
 473
 474 /*
 475  * ehci_work is called from some interrupts, timers, and so on.
 476  * it calls driver completion functions, after dropping ehci->lock.
 477  */
 478 static void ehci_work (struct ehci_hcd *ehci)
 479 {
 480         timer_action_done (ehci, TIMER_IO_WATCHDOG);
 481
 482         /* another CPU may drop ehci->lock during a schedule scan while
 483          * it reports urb completions.  this flag guards against bogus
 484          * attempts at re-entrant schedule scanning.
 485          */
 486         if (ehci->scanning)
 487                 return;
 488         ehci->scanning = 1;
 489         scan_async (ehci);
 490         if (ehci->next_uframe != -1)
 491                 scan_periodic (ehci);
 492         ehci->scanning = 0;
 493
 494         /* the IO watchdog guards against hardware or driver bugs that
 495          * misplace IRQs, and should let us run completely without IRQs.
 496          * such lossage has been observed on both VT6202 and VT8235.
 497          */
 498         if (HC_IS_RUNNING (ehci_to_hcd(ehci)->state) &&
 499                         (ehci->async->qh_next.ptr != NULL ||
 500                          ehci->periodic_sched != 0))
 501                 timer_action (ehci, TIMER_IO_WATCHDOG);
 502 }
 503
 504 /*
 505  * Called when the ehci_hcd module is removed.
 506  */
 507 static void ehci_stop (struct usb_hcd *hcd)
 508 {
 509         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 510
 511         ehci_dbg (ehci, "stop\n");
 512
 513         /* no more interrupts ... */
 514         del_timer_sync (&ehci->watchdog);
 515         del_timer_sync(&ehci->iaa_watchdog);
 516
 517         spin_lock_irq(&ehci->lock);
 518         if (HC_IS_RUNNING (hcd->state))
 519                 ehci_quiesce (ehci);
 520
 521         ehci_silence_controller(ehci);
 522         ehci_reset (ehci);
 523         spin_unlock_irq(&ehci->lock);
 524
 525         remove_companion_file(ehci);
 526         remove_debug_files (ehci);
 527
 528         /* root hub is shut down separately (first, when possible) */
 529         spin_lock_irq (&ehci->lock);
 530         if (ehci->async)
 531                 ehci_work (ehci);
 532         spin_unlock_irq (&ehci->lock);
 533         ehci_mem_cleanup (ehci);
 534
 535         if (ehci->amd_pll_fix == 1)
 536                 usb_amd_dev_put();
 537
 538 #ifdef  EHCI_STATS
 539         ehci_dbg (ehci, "irq normal %ld err %ld reclaim %ld (lost %ld)\n",
 540                 ehci->stats.normal, ehci->stats.error, ehci->stats.reclaim,
 541                 ehci->stats.lost_iaa);
 542         ehci_dbg (ehci, "complete %ld unlink %ld\n",
 543                 ehci->stats.complete, ehci->stats.unlink);
 544 #endif
 545
 546         dbg_status (ehci, "ehci_stop completed",
 547                     ehci_readl(ehci, &ehci->regs->status));
 548 }
 549
 550 /* one-time init, only for memory state */
 551 static int ehci_init(struct usb_hcd *hcd)
 552 {
 553         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
 554         u32                     temp;
 555         int                     retval;
 556         u32                     hcc_params;
 557         struct ehci_qh_hw       *hw;
 558
 559         spin_lock_init(&ehci->lock);
 560
 561         /*
 562          * keep io watchdog by default, those good HCDs could turn off it later
 563          */
 564         ehci->need_io_watchdog = 1;
 565         init_timer(&ehci->watchdog);
 566         ehci->watchdog.function = ehci_watchdog;
 567         ehci->watchdog.data = (unsigned long) ehci;
 568
 569         init_timer(&ehci->iaa_watchdog);
 570         ehci->iaa_watchdog.function = ehci_iaa_watchdog;
 571         ehci->iaa_watchdog.data = (unsigned long) ehci;
 572
 573         hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
 574
 575         /*
 576          * hw default: 1K periodic list heads, one per frame.
 577          * periodic_size can shrink by USBCMD update if hcc_params allows.
 578          */
 579         ehci->periodic_size = DEFAULT_I_TDPS;
 580         INIT_LIST_HEAD(&ehci->cached_itd_list);
 581         INIT_LIST_HEAD(&ehci->cached_sitd_list);
 582
 583         if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
 584                 /* periodic schedule size can be smaller than default */
 585                 switch (EHCI_TUNE_FLS) {
 586                 case 0: ehci->periodic_size = 1024; break;
 587                 case 1: ehci->periodic_size = 512; break;
 588                 case 2: ehci->periodic_size = 256; break;
 589                 default:        BUG();
 590                 }
 591         }
 592         if ((retval = ehci_mem_init(ehci, GFP_KERNEL)) < 0)
 593                 return retval;
 594
 595         /* controllers may cache some of the periodic schedule ... */
 596         if (HCC_ISOC_CACHE(hcc_params))         // full frame cache
 597                 ehci->i_thresh = 2 + 8;
 598         else                                    // N microframes cached
 599                 ehci->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
 600
 601         ehci->reclaim = NULL;
 602         ehci->next_uframe = -1;
 603         ehci->clock_frame = -1;
 604
 605         /*
 606          * dedicate a qh for the async ring head, since we couldn't unlink
 607          * a 'real' qh without stopping the async schedule [4.8].  use it
 608          * as the 'reclamation list head' too.
 609          * its dummy is used in hw_alt_next of many tds, to prevent the qh
 610          * from automatically advancing to the next td after short reads.
 611          */
 612         ehci->async->qh_next.qh = NULL;
 613         hw = ehci->async->hw;
 614         hw->hw_next = QH_NEXT(ehci, ehci->async->qh_dma);
 615         hw->hw_info1 = cpu_to_hc32(ehci, QH_HEAD);
 616         hw->hw_token = cpu_to_hc32(ehci, QTD_STS_HALT);
 617         hw->hw_qtd_next = EHCI_LIST_END(ehci);
 618         ehci->async->qh_state = QH_STATE_LINKED;
 619         hw->hw_alt_next = QTD_NEXT(ehci, ehci->async->dummy->qtd_dma);
 620
 621         /* clear interrupt enables, set irq latency */
 622         if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
 623                 log2_irq_thresh = 0;
 624         temp = 1 << (16 + log2_irq_thresh);
 625         if (HCC_PER_PORT_CHANGE_EVENT(hcc_params)) {
 626                 ehci->has_ppcd = 1;
 627                 ehci_dbg(ehci, "enable per-port change event\n");
 628                 temp |= CMD_PPCEE;
 629         }
 630         if (HCC_CANPARK(hcc_params)) {
 631                 /* HW default park == 3, on hardware that supports it (like
 632                  * NVidia and ALI silicon), maximizes throughput on the async
 633                  * schedule by avoiding QH fetches between transfers.
 634                  *
 635                  * With fast usb storage devices and NForce2, "park" seems to
 636                  * make problems:  throughput reduction (!), data errors...
 637                  */
 638                 if (park) {
 639                         park = min(park, (unsigned) 3);
 640                         temp |= CMD_PARK;
 641                         temp |= park << 8;
 642                 }
 643                 ehci_dbg(ehci, "park %d\n", park);
 644         }
 645         if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
 646                 /* periodic schedule size can be smaller than default */
 647                 temp &= ~(3 << 2);
 648                 temp |= (EHCI_TUNE_FLS << 2);
 649         }
 650         if (HCC_LPM(hcc_params)) {
 651                 /* support link power management EHCI 1.1 addendum */
 652                 ehci_dbg(ehci, "support lpm\n");
 653                 ehci->has_lpm = 1;
 654                 if (hird > 0xf) {
 655                         ehci_dbg(ehci, "hird %d invalid, use default 0",
 656                         hird);
 657                         hird = 0;
 658                 }
 659                 temp |= hird << 24;
 660         }
 661         ehci->command = temp;
 662
 663         /* Accept arbitrarily long scatter-gather lists */
 664         if (!(hcd->driver->flags & HCD_LOCAL_MEM))
 665                 hcd->self.sg_tablesize = ~0;
 666         return 0;
 667 }
 668
 669 /* start HC running; it's halted, ehci_init() has been run (once) */
 670 static int ehci_run (struct usb_hcd *hcd)
 671 {
 672         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 673         int                     retval;
 674         u32                     temp;
 675         u32                     hcc_params;
 676
 677         hcd->uses_new_polling = 1;
 678
 679         /* EHCI spec section 4.1 */
 680         /*
 681          * TDI driver does the ehci_reset in their reset callback.
 682          * Don't reset here, because configuration settings will
 683          * vanish.
 684          */
 685         if (!ehci_is_TDI(ehci) && (retval = ehci_reset(ehci)) != 0) {
 686                 ehci_mem_cleanup(ehci);
 687                 return retval;
 688         }
 689         ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list);
 690         ehci_writel(ehci, (u32)ehci->async->qh_dma, &ehci->regs->async_next);
 691
 692         /*
 693          * hcc_params controls whether ehci->regs->segment must (!!!)
 694          * be used; it constrains QH/ITD/SITD and QTD locations.
 695          * pci_pool consistent memory always uses segment zero.
 696          * streaming mappings for I/O buffers, like pci_map_single(),
 697          * can return segments above 4GB, if the device allows.
 698          *
 699          * NOTE:  the dma mask is visible through dma_supported(), so
 700          * drivers can pass this info along ... like NETIF_F_HIGHDMA,
 701          * Scsi_Host.highmem_io, and so forth.  It's readonly to all
 702          * host side drivers though.
 703          */
 704         hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
 705         if (HCC_64BIT_ADDR(hcc_params)) {
 706                 ehci_writel(ehci, 0, &ehci->regs->segment);
 707 #if 0
 708 // this is deeply broken on almost all architectures
 709                 if (!dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64)))
 710                         ehci_info(ehci, "enabled 64bit DMA\n");
 711 #endif
 712         }
 713
 714
 715         // Philips, Intel, and maybe others need CMD_RUN before the
 716         // root hub will detect new devices (why?); NEC doesn't
 717         ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
 718         ehci->command |= CMD_RUN;
 719         ehci_writel(ehci, ehci->command, &ehci->regs->command);
 720         dbg_cmd (ehci, "init", ehci->command);
 721
 722         /*
 723          * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
 724          * are explicitly handed to companion controller(s), so no TT is
 725          * involved with the root hub.  (Except where one is integrated,
 726          * and there's no companion controller unless maybe for USB OTG.)
 727          *
 728          * Turning on the CF flag will transfer ownership of all ports
 729          * from the companions to the EHCI controller.  If any of the
 730          * companions are in the middle of a port reset at the time, it
 731          * could cause trouble.  Write-locking ehci_cf_port_reset_rwsem
 732          * guarantees that no resets are in progress.  After we set CF,
 733          * a short delay lets the hardware catch up; new resets shouldn't
 734          * be started before the port switching actions could complete.
 735          */
 736         down_write(&ehci_cf_port_reset_rwsem);
 737         hcd->state = HC_STATE_RUNNING;
 738         ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
 739         ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
 740         msleep(5);
 741         up_write(&ehci_cf_port_reset_rwsem);
 742         ehci->last_periodic_enable = ktime_get_real();
 743
 744         temp = HC_VERSION(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
 745         ehci_info (ehci,
 746                 "USB %x.%x started, EHCI %x.%02x%s\n",
 747                 ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f),
 748                 temp >> 8, temp & 0xff,
 749                 ignore_oc ? ", overcurrent ignored" : "");
 750
 751         ehci_writel(ehci, INTR_MASK,
 752                     &ehci->regs->intr_enable); /* Turn On Interrupts */
 753
 754         /* GRR this is run-once init(), being done every time the HC starts.
 755          * So long as they're part of class devices, we can't do it init()
 756          * since the class device isn't created that early.
 757          */
 758         create_debug_files(ehci);
 759         create_companion_file(ehci);
 760
 761         return 0;
 762 }
 763
 764 static int __maybe_unused ehci_setup (struct usb_hcd *hcd)
 765 {
 766         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 767         int retval;
 768
 769         ehci->regs = (void __iomem *)ehci->caps +
 770             HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
 771         dbg_hcs_params(ehci, "reset");
 772         dbg_hcc_params(ehci, "reset");
 773
 774         /* cache this readonly data; minimize chip reads */
 775         ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
 776
 777         ehci->sbrn = HCD_USB2;
 778
 779         retval = ehci_halt(ehci);
 780         if (retval)
 781                 return retval;
 782
 783         /* data structure init */
 784         retval = ehci_init(hcd);
 785         if (retval)
 786                 return retval;
 787
 788         ehci_reset(ehci);
 789
 790         return 0;
 791 }
 792
 793 /*-------------------------------------------------------------------------*/
 794
 795 static irqreturn_t ehci_irq (struct usb_hcd *hcd)
 796 {
 797         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 798         u32                     status, masked_status, pcd_status = 0, cmd;
 799         int                     bh;
 800
 801         spin_lock (&ehci->lock);
 802
 803         status = ehci_readl(ehci, &ehci->regs->status);
 804
 805         /* e.g. cardbus physical eject */
 806         if (status == ~(u32) 0) {
 807                 ehci_dbg (ehci, "device removed\n");
 808                 goto dead;
 809         }
 810
 811         /*
 812          * We don't use STS_FLR, but some controllers don't like it to
 813          * remain on, so mask it out along with the other status bits.
 814          */
 815         masked_status = status & (INTR_MASK | STS_FLR);
 816
 817         /* Shared IRQ? */
 818         if (!masked_status || unlikely(hcd->state == HC_STATE_HALT)) {
 819                 spin_unlock(&ehci->lock);
 820                 return IRQ_NONE;
 821         }
 822
 823         /* clear (just) interrupts */
 824         ehci_writel(ehci, masked_status, &ehci->regs->status);
 825         cmd = ehci_readl(ehci, &ehci->regs->command);
 826         bh = 0;
 827
 828 #ifdef  VERBOSE_DEBUG
 829         /* unrequested/ignored: Frame List Rollover */
 830         dbg_status (ehci, "irq", status);
 831 #endif
 832
 833         /* INT, ERR, and IAA interrupt rates can be throttled */
 834
 835         /* normal [4.15.1.2] or error [4.15.1.1] completion */
 836         if (likely ((status & (STS_INT|STS_ERR)) != 0)) {
 837                 if (likely ((status & STS_ERR) == 0))
 838                         COUNT (ehci->stats.normal);
 839                 else
 840                         COUNT (ehci->stats.error);
 841                 bh = 1;
 842         }
 843
 844         /* complete the unlinking of some qh [4.15.2.3] */
 845         if (status & STS_IAA) {
 846                 /* guard against (alleged) silicon errata */
 847                 if (cmd & CMD_IAAD) {
 848                         ehci_writel(ehci, cmd & ~CMD_IAAD,
 849                                         &ehci->regs->command);
 850                         ehci_dbg(ehci, "IAA with IAAD still set?\n");
 851                 }
 852                 if (ehci->reclaim) {
 853                         COUNT(ehci->stats.reclaim);
 854                         end_unlink_async(ehci);
 855                 } else
 856                         ehci_dbg(ehci, "IAA with nothing to reclaim?\n");
 857         }
 858
 859         /* remote wakeup [4.3.1] */
 860         if (status & STS_PCD) {
 861                 unsigned        i = HCS_N_PORTS (ehci->hcs_params);
 862                 u32             ppcd = 0;
 863
 864                 /* kick root hub later */
 865                 pcd_status = status;
 866
 867                 /* resume root hub? */
 868                 if (hcd->state == HC_STATE_SUSPENDED)
 869                         usb_hcd_resume_root_hub(hcd);
 870
 871                 /* get per-port change detect bits */
 872                 if (ehci->has_ppcd)
 873                         ppcd = status >> 16;
 874
 875                 while (i--) {
 876                         int pstatus;
 877
 878                         /* leverage per-port change bits feature */
 879                         if (ehci->has_ppcd && !(ppcd & (1 << i)))
 880                                 continue;
 881                         pstatus = ehci_readl(ehci,
 882                                          &ehci->regs->port_status[i]);
 883
 884                         if (pstatus & PORT_OWNER)
 885                                 continue;
 886                         if (!(test_bit(i, &ehci->suspended_ports) &&
 887                                         ((pstatus & PORT_RESUME) ||
 888                                                 !(pstatus & PORT_SUSPEND)) &&
 889                                         (pstatus & PORT_PE) &&
 890                                         ehci->reset_done[i] == 0))
 891                                 continue;
 892
 893                         /* start 20 msec resume signaling from this port,
 894                          * and make khubd collect PORT_STAT_C_SUSPEND to
 895                          * stop that signaling.  Use 5 ms extra for safety,
 896                          * like usb_port_resume() does.
 897                          */
 898                         ehci->reset_done[i] = jiffies + msecs_to_jiffies(25);
 899                         ehci_dbg (ehci, "port %d remote wakeup\n", i + 1);
 900                         mod_timer(&hcd->rh_timer, ehci->reset_done[i]);
 901                 }
 902         }
 903
 904         /* PCI errors [4.15.2.4] */
 905         if (unlikely ((status & STS_FATAL) != 0)) {
 906                 ehci_err(ehci, "fatal error\n");
 907                 dbg_cmd(ehci, "fatal", cmd);
 908                 dbg_status(ehci, "fatal", status);
 909                 ehci_halt(ehci);
 910 dead:
 911                 ehci_reset(ehci);
 912                 ehci_writel(ehci, 0, &ehci->regs->configured_flag);
 913                 usb_hc_died(hcd);
 914                 /* generic layer kills/unlinks all urbs, then
 915                  * uses ehci_stop to clean up the rest
 916                  */
 917                 bh = 1;
 918         }
 919
 920         if (bh)
 921                 ehci_work (ehci);
 922         spin_unlock (&ehci->lock);
 923         if (pcd_status)
 924                 usb_hcd_poll_rh_status(hcd);
 925         return IRQ_HANDLED;
 926 }
 927
 928 /*-------------------------------------------------------------------------*/
 929
 930 /*
 931  * non-error returns are a promise to giveback() the urb later
 932  * we drop ownership so next owner (or urb unlink) can get it
 933  *
 934  * urb + dev is in hcd.self.controller.urb_list
 935  * we're queueing TDs onto software and hardware lists
 936  *
 937  * hcd-specific init for hcpriv hasn't been done yet
 938  *
 939  * NOTE:  control, bulk, and interrupt share the same code to append TDs
 940  * to a (possibly active) QH, and the same QH scanning code.
 941  */
 942 static int ehci_urb_enqueue (
 943         struct usb_hcd  *hcd,
 944         struct urb      *urb,
 945         gfp_t           mem_flags
 946 ) {
 947         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 948         struct list_head        qtd_list;
 949
 950         INIT_LIST_HEAD (&qtd_list);
 951
 952         switch (usb_pipetype (urb->pipe)) {
 953         case PIPE_CONTROL:
 954                 /* qh_completions() code doesn't handle all the fault cases
 955                  * in multi-TD control transfers.  Even 1KB is rare anyway.
 956                  */
 957                 if (urb->transfer_buffer_length > (16 * 1024))
 958                         return -EMSGSIZE;
 959                 /* FALLTHROUGH */
 960         /* case PIPE_BULK: */
 961         default:
 962                 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
 963                         return -ENOMEM;
 964                 return submit_async(ehci, urb, &qtd_list, mem_flags);
 965
 966         case PIPE_INTERRUPT:
 967                 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
 968                         return -ENOMEM;
 969                 return intr_submit(ehci, urb, &qtd_list, mem_flags);
 970
 971         case PIPE_ISOCHRONOUS:
 972                 if (urb->dev->speed == USB_SPEED_HIGH)
 973                         return itd_submit (ehci, urb, mem_flags);
 974                 else
 975                         return sitd_submit (ehci, urb, mem_flags);
 976         }
 977 }
 978
 979 static void unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
 980 {
 981         /* failfast */
 982         if (!HC_IS_RUNNING(ehci_to_hcd(ehci)->state) && ehci->reclaim)
 983                 end_unlink_async(ehci);
 984
 985         /* If the QH isn't linked then there's nothing we can do
 986          * unless we were called during a giveback, in which case
 987          * qh_completions() has to deal with it.
 988          */
 989         if (qh->qh_state != QH_STATE_LINKED) {
 990                 if (qh->qh_state == QH_STATE_COMPLETING)
 991                         qh->needs_rescan = 1;
 992                 return;
 993         }
 994
 995         /* defer till later if busy */
 996         if (ehci->reclaim) {
 997                 struct ehci_qh          *last;
 998
 999                 for (last = ehci->reclaim;
1000                                 last->reclaim;
1001                                 last = last->reclaim)
1002                         continue;
1003                 qh->qh_state = QH_STATE_UNLINK_WAIT;
1004                 last->reclaim = qh;
1005
1006         /* start IAA cycle */
1007         } else
1008                 start_unlink_async (ehci, qh);
1009 }
1010
1011 /* remove from hardware lists
1012  * completions normally happen asynchronously
1013  */
1014
1015 static int ehci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1016 {
1017         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
1018         struct ehci_qh          *qh;
1019         unsigned long           flags;
1020         int                     rc;
1021
1022         spin_lock_irqsave (&ehci->lock, flags);
1023         rc = usb_hcd_check_unlink_urb(hcd, urb, status);
1024         if (rc)
1025                 goto done;
1026
1027         switch (usb_pipetype (urb->pipe)) {
1028         // case PIPE_CONTROL:
1029         // case PIPE_BULK:
1030         default:
1031                 qh = (struct ehci_qh *) urb->hcpriv;
1032                 if (!qh)
1033                         break;
1034                 switch (qh->qh_state) {
1035                 case QH_STATE_LINKED:
1036                 case QH_STATE_COMPLETING:
1037                         unlink_async(ehci, qh);
1038                         break;
1039                 case QH_STATE_UNLINK:
1040                 case QH_STATE_UNLINK_WAIT:
1041                         /* already started */
1042                         break;
1043                 case QH_STATE_IDLE:
1044                         /* QH might be waiting for a Clear-TT-Buffer */
1045                         qh_completions(ehci, qh);
1046                         break;
1047                 }
1048                 break;
1049
1050         case PIPE_INTERRUPT:
1051                 qh = (struct ehci_qh *) urb->hcpriv;
1052                 if (!qh)
1053                         break;
1054                 switch (qh->qh_state) {
1055                 case QH_STATE_LINKED:
1056                 case QH_STATE_COMPLETING:
1057                         intr_deschedule (ehci, qh);
1058                         break;
1059                 case QH_STATE_IDLE:
1060                         qh_completions (ehci, qh);
1061                         break;
1062                 default:
1063                         ehci_dbg (ehci, "bogus qh %p state %d\n",
1064                                         qh, qh->qh_state);
1065                         goto done;
1066                 }
1067                 break;
1068
1069         case PIPE_ISOCHRONOUS:
1070                 // itd or sitd ...
1071
1072                 // wait till next completion, do it then.
1073                 // completion irqs can wait up to 1024 msec,
1074                 break;
1075         }
1076 done:
1077         spin_unlock_irqrestore (&ehci->lock, flags);
1078         return rc;
1079 }
1080
1081 /*-------------------------------------------------------------------------*/
1082
1083 // bulk qh holds the data toggle
1084
1085 static void
1086 ehci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
1087 {
1088         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
1089         unsigned long           flags;
1090         struct ehci_qh          *qh, *tmp;
1091
1092         /* ASSERT:  any requests/urbs are being unlinked */
1093         /* ASSERT:  nobody can be submitting urbs for this any more */
1094
1095 rescan:
1096         spin_lock_irqsave (&ehci->lock, flags);
1097         qh = ep->hcpriv;
1098         if (!qh)
1099                 goto done;
1100
1101         /* endpoints can be iso streams.  for now, we don't
1102          * accelerate iso completions ... so spin a while.
1103          */
1104         if (qh->hw == NULL) {
1105                 ehci_vdbg (ehci, "iso delay\n");
1106                 goto idle_timeout;
1107         }
1108
1109         if (!HC_IS_RUNNING (hcd->state))
1110                 qh->qh_state = QH_STATE_IDLE;
1111         switch (qh->qh_state) {
1112         case QH_STATE_LINKED:
1113         case QH_STATE_COMPLETING:
1114                 for (tmp = ehci->async->qh_next.qh;
1115                                 tmp && tmp != qh;
1116                                 tmp = tmp->qh_next.qh)
1117                         continue;
1118                 /* periodic qh self-unlinks on empty, and a COMPLETING qh
1119                  * may already be unlinked.
1120                  */
1121                 if (tmp)
1122                         unlink_async(ehci, qh);
1123                 /* FALL THROUGH */
1124         case QH_STATE_UNLINK:           /* wait for hw to finish? */
1125         case QH_STATE_UNLINK_WAIT:
1126 idle_timeout:
1127                 spin_unlock_irqrestore (&ehci->lock, flags);
1128                 schedule_timeout_uninterruptible(1);
1129                 goto rescan;
1130         case QH_STATE_IDLE:             /* fully unlinked */
1131                 if (qh->clearing_tt)
1132                         goto idle_timeout;
1133                 if (list_empty (&qh->qtd_list)) {
1134                         qh_put (qh);
1135                         break;
1136                 }
1137                 /* else FALL THROUGH */
1138         default:
1139                 /* caller was supposed to have unlinked any requests;
1140                  * that's not our job.  just leak this memory.
1141                  */
1142                 ehci_err (ehci, "qh %p (#%02x) state %d%s\n",
1143                         qh, ep->desc.bEndpointAddress, qh->qh_state,
1144                         list_empty (&qh->qtd_list) ? "" : "(has tds)");
1145                 break;
1146         }
1147         ep->hcpriv = NULL;
1148 done:
1149         spin_unlock_irqrestore (&ehci->lock, flags);
1150 }
1151
1152 static void
1153 ehci_endpoint_reset(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
1154 {
1155         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1156         struct ehci_qh          *qh;
1157         int                     eptype = usb_endpoint_type(&ep->desc);
1158         int                     epnum = usb_endpoint_num(&ep->desc);
1159         int                     is_out = usb_endpoint_dir_out(&ep->desc);
1160         unsigned long           flags;
1161
1162         if (eptype != USB_ENDPOINT_XFER_BULK && eptype != USB_ENDPOINT_XFER_INT)
1163                 return;
1164
1165         spin_lock_irqsave(&ehci->lock, flags);
1166         qh = ep->hcpriv;
1167
1168         /* For Bulk and Interrupt endpoints we maintain the toggle state
1169          * in the hardware; the toggle bits in udev aren't used at all.
1170          * When an endpoint is reset by usb_clear_halt() we must reset
1171          * the toggle bit in the QH.
1172          */
1173         if (qh) {
1174                 usb_settoggle(qh->dev, epnum, is_out, 0);
1175                 if (!list_empty(&qh->qtd_list)) {
1176                         WARN_ONCE(1, "clear_halt for a busy endpoint\n");
1177                 } else if (qh->qh_state == QH_STATE_LINKED ||
1178                                 qh->qh_state == QH_STATE_COMPLETING) {
1179
1180                         /* The toggle value in the QH can't be updated
1181                          * while the QH is active.  Unlink it now;
1182                          * re-linking will call qh_refresh().
1183                          */
1184                         if (eptype == USB_ENDPOINT_XFER_BULK)
1185                                 unlink_async(ehci, qh);
1186                         else
1187                                 intr_deschedule(ehci, qh);
1188                 }
1189         }
1190         spin_unlock_irqrestore(&ehci->lock, flags);
1191 }
1192
1193 static int ehci_get_frame (struct usb_hcd *hcd)
1194 {
1195         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
1196         return (ehci_read_frame_index(ehci) >> 3) % ehci->periodic_size;
1197 }
1198
1199 /*-------------------------------------------------------------------------*/
1200
1201 MODULE_DESCRIPTION(DRIVER_DESC);
1202 MODULE_AUTHOR (DRIVER_AUTHOR);
1203 MODULE_LICENSE ("GPL");
1204
1205 #ifdef CONFIG_PCI
1206 #include "ehci-pci.c"
1207 #define PCI_DRIVER              ehci_pci_driver
1208 #endif
1209
1210 #ifdef CONFIG_USB_EHCI_FSL
1211 #include "ehci-fsl.c"
1212 #define PLATFORM_DRIVER         ehci_fsl_driver
1213 #endif
1214
1215 #ifdef CONFIG_USB_EHCI_MXC
1216 #include "ehci-mxc.c"
1217 #define PLATFORM_DRIVER         ehci_mxc_driver
1218 #endif
1219
1220 #ifdef CONFIG_USB_EHCI_SH
1221 #include "ehci-sh.c"
1222 #define PLATFORM_DRIVER         ehci_hcd_sh_driver
1223 #endif
1224
1225 #ifdef CONFIG_SOC_AU1200
1226 #include "ehci-au1xxx.c"
1227 #define PLATFORM_DRIVER         ehci_hcd_au1xxx_driver
1228 #endif
1229
1230 #ifdef CONFIG_USB_EHCI_HCD_OMAP
1231 #include "ehci-omap.c"
1232 #define        PLATFORM_DRIVER         ehci_hcd_omap_driver
1233 #endif
1234
1235 #ifdef CONFIG_PPC_PS3
1236 #include "ehci-ps3.c"
1237 #define PS3_SYSTEM_BUS_DRIVER   ps3_ehci_driver
1238 #endif
1239
1240 #ifdef CONFIG_USB_EHCI_HCD_PPC_OF
1241 #include "ehci-ppc-of.c"
1242 #define OF_PLATFORM_DRIVER      ehci_hcd_ppc_of_driver
1243 #endif
1244
1245 #ifdef CONFIG_XPS_USB_HCD_XILINX
1246 #include "ehci-xilinx-of.c"
1247 #define XILINX_OF_PLATFORM_DRIVER       ehci_hcd_xilinx_of_driver
1248 #endif
1249
1250 #ifdef CONFIG_PLAT_ORION
1251 #include "ehci-orion.c"
1252 #define PLATFORM_DRIVER         ehci_orion_driver
1253 #endif
1254
1255 #ifdef CONFIG_ARCH_IXP4XX
1256 #include "ehci-ixp4xx.c"
1257 #define PLATFORM_DRIVER         ixp4xx_ehci_driver
1258 #endif
1259
1260 #ifdef CONFIG_USB_W90X900_EHCI
1261 #include "ehci-w90x900.c"
1262 #define PLATFORM_DRIVER         ehci_hcd_w90x900_driver
1263 #endif
1264
1265 #ifdef CONFIG_ARCH_AT91
1266 #include "ehci-atmel.c"
1267 #define PLATFORM_DRIVER         ehci_atmel_driver
1268 #endif
1269
1270 #ifdef CONFIG_USB_OCTEON_EHCI
1271 #include "ehci-octeon.c"
1272 #define PLATFORM_DRIVER         ehci_octeon_driver
1273 #endif
1274
1275 #ifdef CONFIG_USB_CNS3XXX_EHCI
1276 #include "ehci-cns3xxx.c"
1277 #define PLATFORM_DRIVER         cns3xxx_ehci_driver
1278 #endif
1279
1280 #ifdef CONFIG_ARCH_VT8500
1281 #include "ehci-vt8500.c"
1282 #define PLATFORM_DRIVER         vt8500_ehci_driver
1283 #endif
1284
1285 #ifdef CONFIG_PLAT_SPEAR
1286 #include "ehci-spear.c"
1287 #define PLATFORM_DRIVER         spear_ehci_hcd_driver
1288 #endif
1289
1290 #ifdef CONFIG_USB_EHCI_MSM
1291 #include "ehci-msm.c"
1292 #define PLATFORM_DRIVER         ehci_msm_driver
1293 #endif
1294
1295 #ifdef CONFIG_USB_EHCI_HCD_PMC_MSP
1296 #include "ehci-pmcmsp.c"
1297 #define PLATFORM_DRIVER         ehci_hcd_msp_driver
1298 #endif
1299
1300 #ifdef CONFIG_USB_EHCI_TEGRA
1301 #include "ehci-tegra.c"
1302 #define PLATFORM_DRIVER         tegra_ehci_driver
1303 #endif
1304
1305 #ifdef CONFIG_USB_EHCI_S5P
1306 #include "ehci-s5p.c"
1307 #define PLATFORM_DRIVER         s5p_ehci_driver
1308 #endif
1309
1310 #ifdef CONFIG_USB_EHCI_ATH79
1311 #include "ehci-ath79.c"
1312 #define PLATFORM_DRIVER         ehci_ath79_driver
1313 #endif
1314
1315 #ifdef CONFIG_SPARC_LEON
1316 #include "ehci-grlib.c"
1317 #define PLATFORM_DRIVER         ehci_grlib_driver
1318 #endif
1319
1320 #if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER) && \
1321     !defined(PS3_SYSTEM_BUS_DRIVER) && !defined(OF_PLATFORM_DRIVER) && \
1322     !defined(XILINX_OF_PLATFORM_DRIVER)
1323 #error "missing bus glue for ehci-hcd"
1324 #endif
1325
1326 static int __init ehci_hcd_init(void)
1327 {
1328         int retval = 0;
1329
1330         if (usb_disabled())
1331                 return -ENODEV;
1332
1333         printk(KERN_INFO "%s: " DRIVER_DESC "\n", hcd_name);
1334         set_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1335         if (test_bit(USB_UHCI_LOADED, &usb_hcds_loaded) ||
1336                         test_bit(USB_OHCI_LOADED, &usb_hcds_loaded))
1337                 printk(KERN_WARNING "Warning! ehci_hcd should always be loaded"
1338                                 " before uhci_hcd and ohci_hcd, not after\n");
1339
1340         pr_debug("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n",
1341                  hcd_name,
1342                  sizeof(struct ehci_qh), sizeof(struct ehci_qtd),
1343                  sizeof(struct ehci_itd), sizeof(struct ehci_sitd));
1344
1345 #ifdef DEBUG
1346         ehci_debug_root = debugfs_create_dir("ehci", usb_debug_root);
1347         if (!ehci_debug_root) {
1348                 retval = -ENOENT;
1349                 goto err_debug;
1350         }
1351 #endif
1352
1353 #ifdef PLATFORM_DRIVER
1354         retval = platform_driver_register(&PLATFORM_DRIVER);
1355         if (retval < 0)
1356                 goto clean0;
1357 #endif
1358
1359 #ifdef PCI_DRIVER
1360         retval = pci_register_driver(&PCI_DRIVER);
1361         if (retval < 0)
1362                 goto clean1;
1363 #endif
1364
1365 #ifdef PS3_SYSTEM_BUS_DRIVER
1366         retval = ps3_ehci_driver_register(&PS3_SYSTEM_BUS_DRIVER);
1367         if (retval < 0)
1368                 goto clean2;
1369 #endif
1370
1371 #ifdef OF_PLATFORM_DRIVER
1372         retval = platform_driver_register(&OF_PLATFORM_DRIVER);
1373         if (retval < 0)
1374                 goto clean3;
1375 #endif
1376
1377 #ifdef XILINX_OF_PLATFORM_DRIVER
1378         retval = platform_driver_register(&XILINX_OF_PLATFORM_DRIVER);
1379         if (retval < 0)
1380                 goto clean4;
1381 #endif
1382         return retval;
1383
1384 #ifdef XILINX_OF_PLATFORM_DRIVER
1385         /* platform_driver_unregister(&XILINX_OF_PLATFORM_DRIVER); */
1386 clean4:
1387 #endif
1388 #ifdef OF_PLATFORM_DRIVER
1389         platform_driver_unregister(&OF_PLATFORM_DRIVER);
1390 clean3:
1391 #endif
1392 #ifdef PS3_SYSTEM_BUS_DRIVER
1393         ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1394 clean2:
1395 #endif
1396 #ifdef PCI_DRIVER
1397         pci_unregister_driver(&PCI_DRIVER);
1398 clean1:
1399 #endif
1400 #ifdef PLATFORM_DRIVER
1401         platform_driver_unregister(&PLATFORM_DRIVER);
1402 clean0:
1403 #endif
1404 #ifdef DEBUG
1405         debugfs_remove(ehci_debug_root);
1406         ehci_debug_root = NULL;
1407 err_debug:
1408 #endif
1409         clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1410         return retval;
1411 }
1412 module_init(ehci_hcd_init);
1413
1414 static void __exit ehci_hcd_cleanup(void)
1415 {
1416 #ifdef XILINX_OF_PLATFORM_DRIVER
1417         platform_driver_unregister(&XILINX_OF_PLATFORM_DRIVER);
1418 #endif
1419 #ifdef OF_PLATFORM_DRIVER
1420         platform_driver_unregister(&OF_PLATFORM_DRIVER);
1421 #endif
1422 #ifdef PLATFORM_DRIVER
1423         platform_driver_unregister(&PLATFORM_DRIVER);
1424 #endif
1425 #ifdef PCI_DRIVER
1426         pci_unregister_driver(&PCI_DRIVER);
1427 #endif
1428 #ifdef PS3_SYSTEM_BUS_DRIVER
1429         ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1430 #endif
1431 #ifdef DEBUG
1432         debugfs_remove(ehci_debug_root);
1433 #endif
1434         clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1435 }
1436 module_exit(ehci_hcd_cleanup);
1437