drivers/usb/host/ehci-hcd.c

   1 /*
   2  * Enhanced Host Controller Interface (EHCI) driver for USB.
   3  *
   4  * Maintainer: Alan Stern <stern@rowland.harvard.edu>
   5  *
   6  * Copyright (c) 2000-2004 by David Brownell
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms of the GNU General Public License as published by the
  10  * Free Software Foundation; either version 2 of the License, or (at your
  11  * option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful, but
  14  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  15  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  16  * for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software Foundation,
  20  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  */
  22
  23 #include <linux/module.h>
  24 #include <linux/pci.h>
  25 #include <linux/dmapool.h>
  26 #include <linux/kernel.h>
  27 #include <linux/delay.h>
  28 #include <linux/ioport.h>
  29 #include <linux/sched.h>
  30 #include <linux/vmalloc.h>
  31 #include <linux/errno.h>
  32 #include <linux/init.h>
  33 #include <linux/hrtimer.h>
  34 #include <linux/list.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/usb.h>
  37 #include <linux/usb/hcd.h>
  38 #include <linux/moduleparam.h>
  39 #include <linux/dma-mapping.h>
  40 #include <linux/debugfs.h>
  41 #include <linux/slab.h>
  42
  43 #include <asm/byteorder.h>
  44 #include <asm/io.h>
  45 #include <asm/irq.h>
  46 #include <asm/unaligned.h>
  47
  48 #if defined(CONFIG_PPC_PS3)
  49 #include <asm/firmware.h>
  50 #endif
  51
  52 /*-------------------------------------------------------------------------*/
  53
  54 /*
  55  * EHCI hc_driver implementation ... experimental, incomplete.
  56  * Based on the final 1.0 register interface specification.
  57  *
  58  * USB 2.0 shows up in upcoming www.pcmcia.org technology.
  59  * First was PCMCIA, like ISA; then CardBus, which is PCI.
  60  * Next comes "CardBay", using USB 2.0 signals.
  61  *
  62  * Contains additional contributions by Brad Hards, Rory Bolt, and others.
  63  * Special thanks to Intel and VIA for providing host controllers to
  64  * test this driver on, and Cypress (including In-System Design) for
  65  * providing early devices for those host controllers to talk to!
  66  */
  67
  68 #define DRIVER_AUTHOR "David Brownell"
  69 #define DRIVER_DESC "USB 2.0 'Enhanced' Host Controller (EHCI) Driver"
  70
  71 static const char       hcd_name [] = "ehci_hcd";
  72
  73
  74 #undef VERBOSE_DEBUG
  75 #undef EHCI_URB_TRACE
  76
  77 /* magic numbers that can affect system performance */
  78 #define EHCI_TUNE_CERR          3       /* 0-3 qtd retries; 0 == don't stop */
  79 #define EHCI_TUNE_RL_HS         4       /* nak throttle; see 4.9 */
  80 #define EHCI_TUNE_RL_TT         0
  81 #define EHCI_TUNE_MULT_HS       1       /* 1-3 transactions/uframe; 4.10.3 */
  82 #define EHCI_TUNE_MULT_TT       1
  83 /*
  84  * Some drivers think it's safe to schedule isochronous transfers more than
  85  * 256 ms into the future (partly as a result of an old bug in the scheduling
  86  * code).  In an attempt to avoid trouble, we will use a minimum scheduling
  87  * length of 512 frames instead of 256.
  88  */
  89 #define EHCI_TUNE_FLS           1       /* (medium) 512-frame schedule */
  90
  91 /* Initial IRQ latency:  faster than hw default */
  92 static int log2_irq_thresh = 0;         // 0 to 6
  93 module_param (log2_irq_thresh, int, S_IRUGO);
  94 MODULE_PARM_DESC (log2_irq_thresh, "log2 IRQ latency, 1-64 microframes");
  95
  96 /* initial park setting:  slower than hw default */
  97 static unsigned park = 0;
  98 module_param (park, uint, S_IRUGO);
  99 MODULE_PARM_DESC (park, "park setting; 1-3 back-to-back async packets");
 100
 101 /* for flakey hardware, ignore overcurrent indicators */
 102 static bool ignore_oc = 0;
 103 module_param (ignore_oc, bool, S_IRUGO);
 104 MODULE_PARM_DESC (ignore_oc, "ignore bogus hardware overcurrent indications");
 105
 106 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
 107
 108 /*-------------------------------------------------------------------------*/
 109
 110 #include "ehci.h"
 111 #include "pci-quirks.h"
 112
 113 /*
 114  * The MosChip MCS9990 controller updates its microframe counter
 115  * a little before the frame counter, and occasionally we will read
 116  * the invalid intermediate value.  Avoid problems by checking the
 117  * microframe number (the low-order 3 bits); if they are 0 then
 118  * re-read the register to get the correct value.
 119  */
 120 static unsigned ehci_moschip_read_frame_index(struct ehci_hcd *ehci)
 121 {
 122         unsigned uf;
 123
 124         uf = ehci_readl(ehci, &ehci->regs->frame_index);
 125         if (unlikely((uf & 7) == 0))
 126                 uf = ehci_readl(ehci, &ehci->regs->frame_index);
 127         return uf;
 128 }
 129
 130 static inline unsigned ehci_read_frame_index(struct ehci_hcd *ehci)
 131 {
 132         if (ehci->frame_index_bug)
 133                 return ehci_moschip_read_frame_index(ehci);
 134         return ehci_readl(ehci, &ehci->regs->frame_index);
 135 }
 136
 137 #include "ehci-dbg.c"
 138
 139 /*-------------------------------------------------------------------------*/
 140
 141 /*
 142  * ehci_handshake - spin reading hc until handshake completes or fails
 143  * @ptr: address of hc register to be read
 144  * @mask: bits to look at in result of read
 145  * @done: value of those bits when handshake succeeds
 146  * @usec: timeout in microseconds
 147  *
 148  * Returns negative errno, or zero on success
 149  *
 150  * Success happens when the "mask" bits have the specified value (hardware
 151  * handshake done).  There are two failure modes:  "usec" have passed (major
 152  * hardware flakeout), or the register reads as all-ones (hardware removed).
 153  *
 154  * That last failure should_only happen in cases like physical cardbus eject
 155  * before driver shutdown. But it also seems to be caused by bugs in cardbus
 156  * bridge shutdown:  shutting down the bridge before the devices using it.
 157  */
 158 int ehci_handshake(struct ehci_hcd *ehci, void __iomem *ptr,
 159                    u32 mask, u32 done, int usec)
 160 {
 161         u32     result;
 162
 163         do {
 164                 result = ehci_readl(ehci, ptr);
 165                 if (result == ~(u32)0)          /* card removed */
 166                         return -ENODEV;
 167                 result &= mask;
 168                 if (result == done)
 169                         return 0;
 170                 udelay (1);
 171                 usec--;
 172         } while (usec > 0);
 173         return -ETIMEDOUT;
 174 }
 175 EXPORT_SYMBOL_GPL(ehci_handshake);
 176
 177 /* check TDI/ARC silicon is in host mode */
 178 static int tdi_in_host_mode (struct ehci_hcd *ehci)
 179 {
 180         u32             tmp;
 181
 182         tmp = ehci_readl(ehci, &ehci->regs->usbmode);
 183         return (tmp & 3) == USBMODE_CM_HC;
 184 }
 185
 186 /*
 187  * Force HC to halt state from unknown (EHCI spec section 2.3).
 188  * Must be called with interrupts enabled and the lock not held.
 189  */
 190 static int ehci_halt (struct ehci_hcd *ehci)
 191 {
 192         u32     temp;
 193
 194         spin_lock_irq(&ehci->lock);
 195
 196         /* disable any irqs left enabled by previous code */
 197         ehci_writel(ehci, 0, &ehci->regs->intr_enable);
 198
 199         if (ehci_is_TDI(ehci) && !tdi_in_host_mode(ehci)) {
 200                 spin_unlock_irq(&ehci->lock);
 201                 return 0;
 202         }
 203
 204         /*
 205          * This routine gets called during probe before ehci->command
 206          * has been initialized, so we can't rely on its value.
 207          */
 208         ehci->command &= ~CMD_RUN;
 209         temp = ehci_readl(ehci, &ehci->regs->command);
 210         temp &= ~(CMD_RUN | CMD_IAAD);
 211         ehci_writel(ehci, temp, &ehci->regs->command);
 212
 213         spin_unlock_irq(&ehci->lock);
 214         synchronize_irq(ehci_to_hcd(ehci)->irq);
 215
 216         return ehci_handshake(ehci, &ehci->regs->status,
 217                           STS_HALT, STS_HALT, 16 * 125);
 218 }
 219
 220 /* put TDI/ARC silicon into EHCI mode */
 221 static void tdi_reset (struct ehci_hcd *ehci)
 222 {
 223         u32             tmp;
 224
 225         tmp = ehci_readl(ehci, &ehci->regs->usbmode);
 226         tmp |= USBMODE_CM_HC;
 227         /* The default byte access to MMR space is LE after
 228          * controller reset. Set the required endian mode
 229          * for transfer buffers to match the host microprocessor
 230          */
 231         if (ehci_big_endian_mmio(ehci))
 232                 tmp |= USBMODE_BE;
 233         ehci_writel(ehci, tmp, &ehci->regs->usbmode);
 234 }
 235
 236 /*
 237  * Reset a non-running (STS_HALT == 1) controller.
 238  * Must be called with interrupts enabled and the lock not held.
 239  */
 240 static int ehci_reset (struct ehci_hcd *ehci)
 241 {
 242         int     retval;
 243         u32     command = ehci_readl(ehci, &ehci->regs->command);
 244
 245         /* If the EHCI debug controller is active, special care must be
 246          * taken before and after a host controller reset */
 247         if (ehci->debug && !dbgp_reset_prep(ehci_to_hcd(ehci)))
 248                 ehci->debug = NULL;
 249
 250         command |= CMD_RESET;
 251         dbg_cmd (ehci, "reset", command);
 252         ehci_writel(ehci, command, &ehci->regs->command);
 253         ehci->rh_state = EHCI_RH_HALTED;
 254         ehci->next_statechange = jiffies;
 255         retval = ehci_handshake(ehci, &ehci->regs->command,
 256                             CMD_RESET, 0, 250 * 1000);
 257
 258         if (ehci->has_hostpc) {
 259                 ehci_writel(ehci, USBMODE_EX_HC | USBMODE_EX_VBPS,
 260                                 &ehci->regs->usbmode_ex);
 261                 ehci_writel(ehci, TXFIFO_DEFAULT, &ehci->regs->txfill_tuning);
 262         }
 263         if (retval)
 264                 return retval;
 265
 266         if (ehci_is_TDI(ehci))
 267                 tdi_reset (ehci);
 268
 269         if (ehci->debug)
 270                 dbgp_external_startup(ehci_to_hcd(ehci));
 271
 272         ehci->port_c_suspend = ehci->suspended_ports =
 273                         ehci->resuming_ports = 0;
 274         return retval;
 275 }
 276
 277 /*
 278  * Idle the controller (turn off the schedules).
 279  * Must be called with interrupts enabled and the lock not held.
 280  */
 281 static void ehci_quiesce (struct ehci_hcd *ehci)
 282 {
 283         u32     temp;
 284
 285         if (ehci->rh_state != EHCI_RH_RUNNING)
 286                 return;
 287
 288         /* wait for any schedule enables/disables to take effect */
 289         temp = (ehci->command << 10) & (STS_ASS | STS_PSS);
 290         ehci_handshake(ehci, &ehci->regs->status, STS_ASS | STS_PSS, temp,
 291                         16 * 125);
 292
 293         /* then disable anything that's still active */
 294         spin_lock_irq(&ehci->lock);
 295         ehci->command &= ~(CMD_ASE | CMD_PSE);
 296         ehci_writel(ehci, ehci->command, &ehci->regs->command);
 297         spin_unlock_irq(&ehci->lock);
 298
 299         /* hardware can take 16 microframes to turn off ... */
 300         ehci_handshake(ehci, &ehci->regs->status, STS_ASS | STS_PSS, 0,
 301                         16 * 125);
 302 }
 303
 304 /*-------------------------------------------------------------------------*/
 305
 306 static void end_unlink_async(struct ehci_hcd *ehci);
 307 static void unlink_empty_async(struct ehci_hcd *ehci);
 308 static void unlink_empty_async_suspended(struct ehci_hcd *ehci);
 309 static void ehci_work(struct ehci_hcd *ehci);
 310 static void start_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh);
 311 static void end_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh);
 312
 313 #include "ehci-timer.c"
 314 #include "ehci-hub.c"
 315 #include "ehci-mem.c"
 316 #include "ehci-q.c"
 317 #include "ehci-sched.c"
 318 #include "ehci-sysfs.c"
 319
 320 /*-------------------------------------------------------------------------*/
 321
 322 /* On some systems, leaving remote wakeup enabled prevents system shutdown.
 323  * The firmware seems to think that powering off is a wakeup event!
 324  * This routine turns off remote wakeup and everything else, on all ports.
 325  */
 326 static void ehci_turn_off_all_ports(struct ehci_hcd *ehci)
 327 {
 328         int     port = HCS_N_PORTS(ehci->hcs_params);
 329
 330         while (port--)
 331                 ehci_writel(ehci, PORT_RWC_BITS,
 332                                 &ehci->regs->port_status[port]);
 333 }
 334
 335 /*
 336  * Halt HC, turn off all ports, and let the BIOS use the companion controllers.
 337  * Must be called with interrupts enabled and the lock not held.
 338  */
 339 static void ehci_silence_controller(struct ehci_hcd *ehci)
 340 {
 341         ehci_halt(ehci);
 342
 343         spin_lock_irq(&ehci->lock);
 344         ehci->rh_state = EHCI_RH_HALTED;
 345         ehci_turn_off_all_ports(ehci);
 346
 347         /* make BIOS/etc use companion controller during reboot */
 348         ehci_writel(ehci, 0, &ehci->regs->configured_flag);
 349
 350         /* unblock posted writes */
 351         ehci_readl(ehci, &ehci->regs->configured_flag);
 352         spin_unlock_irq(&ehci->lock);
 353 }
 354
 355 /* ehci_shutdown kick in for silicon on any bus (not just pci, etc).
 356  * This forcibly disables dma and IRQs, helping kexec and other cases
 357  * where the next system software may expect clean state.
 358  */
 359 static void ehci_shutdown(struct usb_hcd *hcd)
 360 {
 361         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 362
 363         spin_lock_irq(&ehci->lock);
 364         ehci->shutdown = true;
 365         ehci->rh_state = EHCI_RH_STOPPING;
 366         ehci->enabled_hrtimer_events = 0;
 367         spin_unlock_irq(&ehci->lock);
 368
 369         ehci_silence_controller(ehci);
 370
 371         hrtimer_cancel(&ehci->hrtimer);
 372 }
 373
 374 /*-------------------------------------------------------------------------*/
 375
 376 /*
 377  * ehci_work is called from some interrupts, timers, and so on.
 378  * it calls driver completion functions, after dropping ehci->lock.
 379  */
 380 static void ehci_work (struct ehci_hcd *ehci)
 381 {
 382         /* another CPU may drop ehci->lock during a schedule scan while
 383          * it reports urb completions.  this flag guards against bogus
 384          * attempts at re-entrant schedule scanning.
 385          */
 386         if (ehci->scanning) {
 387                 ehci->need_rescan = true;
 388                 return;
 389         }
 390         ehci->scanning = true;
 391
 392  rescan:
 393         ehci->need_rescan = false;
 394         if (ehci->async_count)
 395                 scan_async(ehci);
 396         if (ehci->intr_count > 0)
 397                 scan_intr(ehci);
 398         if (ehci->isoc_count > 0)
 399                 scan_isoc(ehci);
 400         if (ehci->need_rescan)
 401                 goto rescan;
 402         ehci->scanning = false;
 403
 404         /* the IO watchdog guards against hardware or driver bugs that
 405          * misplace IRQs, and should let us run completely without IRQs.
 406          * such lossage has been observed on both VT6202 and VT8235.
 407          */
 408         turn_on_io_watchdog(ehci);
 409 }
 410
 411 /*
 412  * Called when the ehci_hcd module is removed.
 413  */
 414 static void ehci_stop (struct usb_hcd *hcd)
 415 {
 416         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 417
 418         ehci_dbg (ehci, "stop\n");
 419
 420         /* no more interrupts ... */
 421
 422         spin_lock_irq(&ehci->lock);
 423         ehci->enabled_hrtimer_events = 0;
 424         spin_unlock_irq(&ehci->lock);
 425
 426         ehci_quiesce(ehci);
 427         ehci_silence_controller(ehci);
 428         ehci_reset (ehci);
 429
 430         hrtimer_cancel(&ehci->hrtimer);
 431         remove_sysfs_files(ehci);
 432         remove_debug_files (ehci);
 433
 434         /* root hub is shut down separately (first, when possible) */
 435         spin_lock_irq (&ehci->lock);
 436         end_free_itds(ehci);
 437         spin_unlock_irq (&ehci->lock);
 438         ehci_mem_cleanup (ehci);
 439
 440         if (ehci->amd_pll_fix == 1)
 441                 usb_amd_dev_put();
 442
 443 #ifdef  EHCI_STATS
 444         ehci_dbg(ehci, "irq normal %ld err %ld iaa %ld (lost %ld)\n",
 445                 ehci->stats.normal, ehci->stats.error, ehci->stats.iaa,
 446                 ehci->stats.lost_iaa);
 447         ehci_dbg (ehci, "complete %ld unlink %ld\n",
 448                 ehci->stats.complete, ehci->stats.unlink);
 449 #endif
 450
 451         dbg_status (ehci, "ehci_stop completed",
 452                     ehci_readl(ehci, &ehci->regs->status));
 453 }
 454
 455 /* one-time init, only for memory state */
 456 static int ehci_init(struct usb_hcd *hcd)
 457 {
 458         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
 459         u32                     temp;
 460         int                     retval;
 461         u32                     hcc_params;
 462         struct ehci_qh_hw       *hw;
 463
 464         spin_lock_init(&ehci->lock);
 465
 466         /*
 467          * keep io watchdog by default, those good HCDs could turn off it later
 468          */
 469         ehci->need_io_watchdog = 1;
 470
 471         hrtimer_init(&ehci->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
 472         ehci->hrtimer.function = ehci_hrtimer_func;
 473         ehci->next_hrtimer_event = EHCI_HRTIMER_NO_EVENT;
 474
 475         hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
 476
 477         /*
 478          * by default set standard 80% (== 100 usec/uframe) max periodic
 479          * bandwidth as required by USB 2.0
 480          */
 481         ehci->uframe_periodic_max = 100;
 482
 483         /*
 484          * hw default: 1K periodic list heads, one per frame.
 485          * periodic_size can shrink by USBCMD update if hcc_params allows.
 486          */
 487         ehci->periodic_size = DEFAULT_I_TDPS;
 488         INIT_LIST_HEAD(&ehci->async_unlink);
 489         INIT_LIST_HEAD(&ehci->async_idle);
 490         INIT_LIST_HEAD(&ehci->intr_unlink_wait);
 491         INIT_LIST_HEAD(&ehci->intr_unlink);
 492         INIT_LIST_HEAD(&ehci->intr_qh_list);
 493         INIT_LIST_HEAD(&ehci->cached_itd_list);
 494         INIT_LIST_HEAD(&ehci->cached_sitd_list);
 495
 496         if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
 497                 /* periodic schedule size can be smaller than default */
 498                 switch (EHCI_TUNE_FLS) {
 499                 case 0: ehci->periodic_size = 1024; break;
 500                 case 1: ehci->periodic_size = 512; break;
 501                 case 2: ehci->periodic_size = 256; break;
 502                 default:        BUG();
 503                 }
 504         }
 505         if ((retval = ehci_mem_init(ehci, GFP_KERNEL)) < 0)
 506                 return retval;
 507
 508         /* controllers may cache some of the periodic schedule ... */
 509         if (HCC_ISOC_CACHE(hcc_params))         // full frame cache
 510                 ehci->i_thresh = 0;
 511         else                                    // N microframes cached
 512                 ehci->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
 513
 514         /*
 515          * dedicate a qh for the async ring head, since we couldn't unlink
 516          * a 'real' qh without stopping the async schedule [4.8].  use it
 517          * as the 'reclamation list head' too.
 518          * its dummy is used in hw_alt_next of many tds, to prevent the qh
 519          * from automatically advancing to the next td after short reads.
 520          */
 521         ehci->async->qh_next.qh = NULL;
 522         hw = ehci->async->hw;
 523         hw->hw_next = QH_NEXT(ehci, ehci->async->qh_dma);
 524         hw->hw_info1 = cpu_to_hc32(ehci, QH_HEAD);
 525 #if defined(CONFIG_PPC_PS3)
 526         hw->hw_info1 |= cpu_to_hc32(ehci, QH_INACTIVATE);
 527 #endif
 528         hw->hw_token = cpu_to_hc32(ehci, QTD_STS_HALT);
 529         hw->hw_qtd_next = EHCI_LIST_END(ehci);
 530         ehci->async->qh_state = QH_STATE_LINKED;
 531         hw->hw_alt_next = QTD_NEXT(ehci, ehci->async->dummy->qtd_dma);
 532
 533         /* clear interrupt enables, set irq latency */
 534         if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
 535                 log2_irq_thresh = 0;
 536         temp = 1 << (16 + log2_irq_thresh);
 537         if (HCC_PER_PORT_CHANGE_EVENT(hcc_params)) {
 538                 ehci->has_ppcd = 1;
 539                 ehci_dbg(ehci, "enable per-port change event\n");
 540                 temp |= CMD_PPCEE;
 541         }
 542         if (HCC_CANPARK(hcc_params)) {
 543                 /* HW default park == 3, on hardware that supports it (like
 544                  * NVidia and ALI silicon), maximizes throughput on the async
 545                  * schedule by avoiding QH fetches between transfers.
 546                  *
 547                  * With fast usb storage devices and NForce2, "park" seems to
 548                  * make problems:  throughput reduction (!), data errors...
 549                  */
 550                 if (park) {
 551                         park = min(park, (unsigned) 3);
 552                         temp |= CMD_PARK;
 553                         temp |= park << 8;
 554                 }
 555                 ehci_dbg(ehci, "park %d\n", park);
 556         }
 557         if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
 558                 /* periodic schedule size can be smaller than default */
 559                 temp &= ~(3 << 2);
 560                 temp |= (EHCI_TUNE_FLS << 2);
 561         }
 562         ehci->command = temp;
 563
 564         /* Accept arbitrarily long scatter-gather lists */
 565         if (!(hcd->driver->flags & HCD_LOCAL_MEM))
 566                 hcd->self.sg_tablesize = ~0;
 567         return 0;
 568 }
 569
 570 /* start HC running; it's halted, ehci_init() has been run (once) */
 571 static int ehci_run (struct usb_hcd *hcd)
 572 {
 573         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 574         u32                     temp;
 575         u32                     hcc_params;
 576
 577         hcd->uses_new_polling = 1;
 578
 579         /* EHCI spec section 4.1 */
 580
 581         ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list);
 582         ehci_writel(ehci, (u32)ehci->async->qh_dma, &ehci->regs->async_next);
 583
 584         /*
 585          * hcc_params controls whether ehci->regs->segment must (!!!)
 586          * be used; it constrains QH/ITD/SITD and QTD locations.
 587          * pci_pool consistent memory always uses segment zero.
 588          * streaming mappings for I/O buffers, like pci_map_single(),
 589          * can return segments above 4GB, if the device allows.
 590          *
 591          * NOTE:  the dma mask is visible through dma_supported(), so
 592          * drivers can pass this info along ... like NETIF_F_HIGHDMA,
 593          * Scsi_Host.highmem_io, and so forth.  It's readonly to all
 594          * host side drivers though.
 595          */
 596         hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
 597         if (HCC_64BIT_ADDR(hcc_params)) {
 598                 ehci_writel(ehci, 0, &ehci->regs->segment);
 599 #if 0
 600 // this is deeply broken on almost all architectures
 601                 if (!dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64)))
 602                         ehci_info(ehci, "enabled 64bit DMA\n");
 603 #endif
 604         }
 605
 606
 607         // Philips, Intel, and maybe others need CMD_RUN before the
 608         // root hub will detect new devices (why?); NEC doesn't
 609         ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
 610         ehci->command |= CMD_RUN;
 611         ehci_writel(ehci, ehci->command, &ehci->regs->command);
 612         dbg_cmd (ehci, "init", ehci->command);
 613
 614         /*
 615          * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
 616          * are explicitly handed to companion controller(s), so no TT is
 617          * involved with the root hub.  (Except where one is integrated,
 618          * and there's no companion controller unless maybe for USB OTG.)
 619          *
 620          * Turning on the CF flag will transfer ownership of all ports
 621          * from the companions to the EHCI controller.  If any of the
 622          * companions are in the middle of a port reset at the time, it
 623          * could cause trouble.  Write-locking ehci_cf_port_reset_rwsem
 624          * guarantees that no resets are in progress.  After we set CF,
 625          * a short delay lets the hardware catch up; new resets shouldn't
 626          * be started before the port switching actions could complete.
 627          */
 628         down_write(&ehci_cf_port_reset_rwsem);
 629         ehci->rh_state = EHCI_RH_RUNNING;
 630         ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
 631         ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
 632         msleep(5);
 633         up_write(&ehci_cf_port_reset_rwsem);
 634         ehci->last_periodic_enable = ktime_get_real();
 635
 636         temp = HC_VERSION(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
 637         ehci_info (ehci,
 638                 "USB %x.%x started, EHCI %x.%02x%s\n",
 639                 ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f),
 640                 temp >> 8, temp & 0xff,
 641                 ignore_oc ? ", overcurrent ignored" : "");
 642
 643         ehci_writel(ehci, INTR_MASK,
 644                     &ehci->regs->intr_enable); /* Turn On Interrupts */
 645
 646         /* GRR this is run-once init(), being done every time the HC starts.
 647          * So long as they're part of class devices, we can't do it init()
 648          * since the class device isn't created that early.
 649          */
 650         create_debug_files(ehci);
 651         create_sysfs_files(ehci);
 652
 653         return 0;
 654 }
 655
 656 int ehci_setup(struct usb_hcd *hcd)
 657 {
 658         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 659         int retval;
 660
 661         ehci->regs = (void __iomem *)ehci->caps +
 662             HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
 663         dbg_hcs_params(ehci, "reset");
 664         dbg_hcc_params(ehci, "reset");
 665
 666         /* cache this readonly data; minimize chip reads */
 667         ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
 668
 669         ehci->sbrn = HCD_USB2;
 670
 671         /* data structure init */
 672         retval = ehci_init(hcd);
 673         if (retval)
 674                 return retval;
 675
 676         retval = ehci_halt(ehci);
 677         if (retval)
 678                 return retval;
 679
 680         ehci_reset(ehci);
 681
 682         return 0;
 683 }
 684 EXPORT_SYMBOL_GPL(ehci_setup);
 685
 686 /*-------------------------------------------------------------------------*/
 687
 688 static irqreturn_t ehci_irq (struct usb_hcd *hcd)
 689 {
 690         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 691         u32                     status, masked_status, pcd_status = 0, cmd;
 692         int                     bh;
 693
 694         spin_lock (&ehci->lock);
 695
 696         status = ehci_readl(ehci, &ehci->regs->status);
 697
 698         /* e.g. cardbus physical eject */
 699         if (status == ~(u32) 0) {
 700                 ehci_dbg (ehci, "device removed\n");
 701                 goto dead;
 702         }
 703
 704         /*
 705          * We don't use STS_FLR, but some controllers don't like it to
 706          * remain on, so mask it out along with the other status bits.
 707          */
 708         masked_status = status & (INTR_MASK | STS_FLR);
 709
 710         /* Shared IRQ? */
 711         if (!masked_status || unlikely(ehci->rh_state == EHCI_RH_HALTED)) {
 712                 spin_unlock(&ehci->lock);
 713                 return IRQ_NONE;
 714         }
 715
 716         /* clear (just) interrupts */
 717         ehci_writel(ehci, masked_status, &ehci->regs->status);
 718         cmd = ehci_readl(ehci, &ehci->regs->command);
 719         bh = 0;
 720
 721 #ifdef  VERBOSE_DEBUG
 722         /* unrequested/ignored: Frame List Rollover */
 723         dbg_status (ehci, "irq", status);
 724 #endif
 725
 726         /* INT, ERR, and IAA interrupt rates can be throttled */
 727
 728         /* normal [4.15.1.2] or error [4.15.1.1] completion */
 729         if (likely ((status & (STS_INT|STS_ERR)) != 0)) {
 730                 if (likely ((status & STS_ERR) == 0))
 731                         COUNT (ehci->stats.normal);
 732                 else
 733                         COUNT (ehci->stats.error);
 734                 bh = 1;
 735         }
 736
 737         /* complete the unlinking of some qh [4.15.2.3] */
 738         if (status & STS_IAA) {
 739
 740                 /* Turn off the IAA watchdog */
 741                 ehci->enabled_hrtimer_events &= ~BIT(EHCI_HRTIMER_IAA_WATCHDOG);
 742
 743                 /*
 744                  * Mild optimization: Allow another IAAD to reset the
 745                  * hrtimer, if one occurs before the next expiration.
 746                  * In theory we could always cancel the hrtimer, but
 747                  * tests show that about half the time it will be reset
 748                  * for some other event anyway.
 749                  */
 750                 if (ehci->next_hrtimer_event == EHCI_HRTIMER_IAA_WATCHDOG)
 751                         ++ehci->next_hrtimer_event;
 752
 753                 /* guard against (alleged) silicon errata */
 754                 if (cmd & CMD_IAAD)
 755                         ehci_dbg(ehci, "IAA with IAAD still set?\n");
 756                 if (ehci->iaa_in_progress)
 757                         COUNT(ehci->stats.iaa);
 758                 end_unlink_async(ehci);
 759         }
 760
 761         /* remote wakeup [4.3.1] */
 762         if (status & STS_PCD) {
 763                 unsigned        i = HCS_N_PORTS (ehci->hcs_params);
 764                 u32             ppcd = ~0;
 765
 766                 /* kick root hub later */
 767                 pcd_status = status;
 768
 769                 /* resume root hub? */
 770                 if (ehci->rh_state == EHCI_RH_SUSPENDED)
 771                         usb_hcd_resume_root_hub(hcd);
 772
 773                 /* get per-port change detect bits */
 774                 if (ehci->has_ppcd)
 775                         ppcd = status >> 16;
 776
 777                 while (i--) {
 778                         int pstatus;
 779
 780                         /* leverage per-port change bits feature */
 781                         if (!(ppcd & (1 << i)))
 782                                 continue;
 783                         pstatus = ehci_readl(ehci,
 784                                          &ehci->regs->port_status[i]);
 785
 786                         if (pstatus & PORT_OWNER)
 787                                 continue;
 788                         if (!(test_bit(i, &ehci->suspended_ports) &&
 789                                         ((pstatus & PORT_RESUME) ||
 790                                                 !(pstatus & PORT_SUSPEND)) &&
 791                                         (pstatus & PORT_PE) &&
 792                                         ehci->reset_done[i] == 0))
 793                                 continue;
 794
 795                         /* start 20 msec resume signaling from this port,
 796                          * and make khubd collect PORT_STAT_C_SUSPEND to
 797                          * stop that signaling.  Use 5 ms extra for safety,
 798                          * like usb_port_resume() does.
 799                          */
 800                         ehci->reset_done[i] = jiffies + msecs_to_jiffies(25);
 801                         set_bit(i, &ehci->resuming_ports);
 802                         ehci_dbg (ehci, "port %d remote wakeup\n", i + 1);
 803                         usb_hcd_start_port_resume(&hcd->self, i);
 804                         mod_timer(&hcd->rh_timer, ehci->reset_done[i]);
 805                 }
 806         }
 807
 808         /* PCI errors [4.15.2.4] */
 809         if (unlikely ((status & STS_FATAL) != 0)) {
 810                 ehci_err(ehci, "fatal error\n");
 811                 dbg_cmd(ehci, "fatal", cmd);
 812                 dbg_status(ehci, "fatal", status);
 813 dead:
 814                 usb_hc_died(hcd);
 815
 816                 /* Don't let the controller do anything more */
 817                 ehci->shutdown = true;
 818                 ehci->rh_state = EHCI_RH_STOPPING;
 819                 ehci->command &= ~(CMD_RUN | CMD_ASE | CMD_PSE);
 820                 ehci_writel(ehci, ehci->command, &ehci->regs->command);
 821                 ehci_writel(ehci, 0, &ehci->regs->intr_enable);
 822                 ehci_handle_controller_death(ehci);
 823
 824                 /* Handle completions when the controller stops */
 825                 bh = 0;
 826         }
 827
 828         if (bh)
 829                 ehci_work (ehci);
 830         spin_unlock (&ehci->lock);
 831         if (pcd_status)
 832                 usb_hcd_poll_rh_status(hcd);
 833         return IRQ_HANDLED;
 834 }
 835
 836 /*-------------------------------------------------------------------------*/
 837
 838 /*
 839  * non-error returns are a promise to giveback() the urb later
 840  * we drop ownership so next owner (or urb unlink) can get it
 841  *
 842  * urb + dev is in hcd.self.controller.urb_list
 843  * we're queueing TDs onto software and hardware lists
 844  *
 845  * hcd-specific init for hcpriv hasn't been done yet
 846  *
 847  * NOTE:  control, bulk, and interrupt share the same code to append TDs
 848  * to a (possibly active) QH, and the same QH scanning code.
 849  */
 850 static int ehci_urb_enqueue (
 851         struct usb_hcd  *hcd,
 852         struct urb      *urb,
 853         gfp_t           mem_flags
 854 ) {
 855         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 856         struct list_head        qtd_list;
 857
 858         INIT_LIST_HEAD (&qtd_list);
 859
 860         switch (usb_pipetype (urb->pipe)) {
 861         case PIPE_CONTROL:
 862                 /* qh_completions() code doesn't handle all the fault cases
 863                  * in multi-TD control transfers.  Even 1KB is rare anyway.
 864                  */
 865                 if (urb->transfer_buffer_length > (16 * 1024))
 866                         return -EMSGSIZE;
 867                 /* FALLTHROUGH */
 868         /* case PIPE_BULK: */
 869         default:
 870                 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
 871                         return -ENOMEM;
 872                 return submit_async(ehci, urb, &qtd_list, mem_flags);
 873
 874         case PIPE_INTERRUPT:
 875                 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
 876                         return -ENOMEM;
 877                 return intr_submit(ehci, urb, &qtd_list, mem_flags);
 878
 879         case PIPE_ISOCHRONOUS:
 880                 if (urb->dev->speed == USB_SPEED_HIGH)
 881                         return itd_submit (ehci, urb, mem_flags);
 882                 else
 883                         return sitd_submit (ehci, urb, mem_flags);
 884         }
 885 }
 886
 887 /* remove from hardware lists
 888  * completions normally happen asynchronously
 889  */
 890
 891 static int ehci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
 892 {
 893         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 894         struct ehci_qh          *qh;
 895         unsigned long           flags;
 896         int                     rc;
 897
 898         spin_lock_irqsave (&ehci->lock, flags);
 899         rc = usb_hcd_check_unlink_urb(hcd, urb, status);
 900         if (rc)
 901                 goto done;
 902
 903         if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
 904                 /*
 905                  * We don't expedite dequeue for isochronous URBs.
 906                  * Just wait until they complete normally or their
 907                  * time slot expires.
 908                  */
 909         } else {
 910                 qh = (struct ehci_qh *) urb->hcpriv;
 911                 qh->exception = 1;
 912                 switch (qh->qh_state) {
 913                 case QH_STATE_LINKED:
 914                         if (usb_pipetype(urb->pipe) == PIPE_INTERRUPT)
 915                                 start_unlink_intr(ehci, qh);
 916                         else
 917                                 start_unlink_async(ehci, qh);
 918                         break;
 919                 case QH_STATE_COMPLETING:
 920                         qh->dequeue_during_giveback = 1;
 921                         break;
 922                 case QH_STATE_UNLINK:
 923                 case QH_STATE_UNLINK_WAIT:
 924                         /* already started */
 925                         break;
 926                 case QH_STATE_IDLE:
 927                         /* QH might be waiting for a Clear-TT-Buffer */
 928                         qh_completions(ehci, qh);
 929                         break;
 930                 }
 931         }
 932 done:
 933         spin_unlock_irqrestore (&ehci->lock, flags);
 934         return rc;
 935 }
 936
 937 /*-------------------------------------------------------------------------*/
 938
 939 // bulk qh holds the data toggle
 940
 941 static void
 942 ehci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
 943 {
 944         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 945         unsigned long           flags;
 946         struct ehci_qh          *qh;
 947
 948         /* ASSERT:  any requests/urbs are being unlinked */
 949         /* ASSERT:  nobody can be submitting urbs for this any more */
 950
 951 rescan:
 952         spin_lock_irqsave (&ehci->lock, flags);
 953         qh = ep->hcpriv;
 954         if (!qh)
 955                 goto done;
 956
 957         /* endpoints can be iso streams.  for now, we don't
 958          * accelerate iso completions ... so spin a while.
 959          */
 960         if (qh->hw == NULL) {
 961                 struct ehci_iso_stream  *stream = ep->hcpriv;
 962
 963                 if (!list_empty(&stream->td_list))
 964                         goto idle_timeout;
 965
 966                 /* BUG_ON(!list_empty(&stream->free_list)); */
 967                 kfree(stream);
 968                 goto done;
 969         }
 970
 971         qh->exception = 1;
 972         if (ehci->rh_state < EHCI_RH_RUNNING)
 973                 qh->qh_state = QH_STATE_IDLE;
 974         switch (qh->qh_state) {
 975         case QH_STATE_LINKED:
 976                 WARN_ON(!list_empty(&qh->qtd_list));
 977                 if (usb_endpoint_type(&ep->desc) != USB_ENDPOINT_XFER_INT)
 978                         start_unlink_async(ehci, qh);
 979                 else
 980                         start_unlink_intr(ehci, qh);
 981                 /* FALL THROUGH */
 982         case QH_STATE_COMPLETING:       /* already in unlinking */
 983         case QH_STATE_UNLINK:           /* wait for hw to finish? */
 984         case QH_STATE_UNLINK_WAIT:
 985 idle_timeout:
 986                 spin_unlock_irqrestore (&ehci->lock, flags);
 987                 schedule_timeout_uninterruptible(1);
 988                 goto rescan;
 989         case QH_STATE_IDLE:             /* fully unlinked */
 990                 if (qh->clearing_tt)
 991                         goto idle_timeout;
 992                 if (list_empty (&qh->qtd_list)) {
 993                         qh_destroy(ehci, qh);
 994                         break;
 995                 }
 996                 /* else FALL THROUGH */
 997         default:
 998                 /* caller was supposed to have unlinked any requests;
 999                  * that's not our job.  just leak this memory.
1000                  */
1001                 ehci_err (ehci, "qh %p (#%02x) state %d%s\n",
1002                         qh, ep->desc.bEndpointAddress, qh->qh_state,
1003                         list_empty (&qh->qtd_list) ? "" : "(has tds)");
1004                 break;
1005         }
1006  done:
1007         ep->hcpriv = NULL;
1008         spin_unlock_irqrestore (&ehci->lock, flags);
1009 }
1010
1011 static void
1012 ehci_endpoint_reset(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
1013 {
1014         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1015         struct ehci_qh          *qh;
1016         int                     eptype = usb_endpoint_type(&ep->desc);
1017         int                     epnum = usb_endpoint_num(&ep->desc);
1018         int                     is_out = usb_endpoint_dir_out(&ep->desc);
1019         unsigned long           flags;
1020
1021         if (eptype != USB_ENDPOINT_XFER_BULK && eptype != USB_ENDPOINT_XFER_INT)
1022                 return;
1023
1024         spin_lock_irqsave(&ehci->lock, flags);
1025         qh = ep->hcpriv;
1026
1027         /* For Bulk and Interrupt endpoints we maintain the toggle state
1028          * in the hardware; the toggle bits in udev aren't used at all.
1029          * When an endpoint is reset by usb_clear_halt() we must reset
1030          * the toggle bit in the QH.
1031          */
1032         if (qh) {
1033                 usb_settoggle(qh->dev, epnum, is_out, 0);
1034                 if (!list_empty(&qh->qtd_list)) {
1035                         WARN_ONCE(1, "clear_halt for a busy endpoint\n");
1036                 } else {
1037                         /* The toggle value in the QH can't be updated
1038                          * while the QH is active.  Unlink it now;
1039                          * re-linking will call qh_refresh().
1040                          */
1041                         qh->exception = 1;
1042                         if (eptype == USB_ENDPOINT_XFER_BULK)
1043                                 start_unlink_async(ehci, qh);
1044                         else
1045                                 start_unlink_intr(ehci, qh);
1046                 }
1047         }
1048         spin_unlock_irqrestore(&ehci->lock, flags);
1049 }
1050
1051 static int ehci_get_frame (struct usb_hcd *hcd)
1052 {
1053         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
1054         return (ehci_read_frame_index(ehci) >> 3) % ehci->periodic_size;
1055 }
1056
1057 /*-------------------------------------------------------------------------*/
1058
1059 #ifdef  CONFIG_PM
1060
1061 /* suspend/resume, section 4.3 */
1062
1063 /* These routines handle the generic parts of controller suspend/resume */
1064
1065 int ehci_suspend(struct usb_hcd *hcd, bool do_wakeup)
1066 {
1067         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1068
1069         if (time_before(jiffies, ehci->next_statechange))
1070                 msleep(10);
1071
1072         /*
1073          * Root hub was already suspended.  Disable IRQ emission and
1074          * mark HW unaccessible.  The PM and USB cores make sure that
1075          * the root hub is either suspended or stopped.
1076          */
1077         ehci_prepare_ports_for_controller_suspend(ehci, do_wakeup);
1078
1079         spin_lock_irq(&ehci->lock);
1080         ehci_writel(ehci, 0, &ehci->regs->intr_enable);
1081         (void) ehci_readl(ehci, &ehci->regs->intr_enable);
1082
1083         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1084         spin_unlock_irq(&ehci->lock);
1085
1086         return 0;
1087 }
1088 EXPORT_SYMBOL_GPL(ehci_suspend);
1089
1090 /* Returns 0 if power was preserved, 1 if power was lost */
1091 int ehci_resume(struct usb_hcd *hcd, bool hibernated)
1092 {
1093         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1094
1095         if (time_before(jiffies, ehci->next_statechange))
1096                 msleep(100);
1097
1098         /* Mark hardware accessible again as we are back to full power by now */
1099         set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1100
1101         if (ehci->shutdown)
1102                 return 0;               /* Controller is dead */
1103
1104         /*
1105          * If CF is still set and we aren't resuming from hibernation
1106          * then we maintained suspend power.
1107          * Just undo the effect of ehci_suspend().
1108          */
1109         if (ehci_readl(ehci, &ehci->regs->configured_flag) == FLAG_CF &&
1110                         !hibernated) {
1111                 int     mask = INTR_MASK;
1112
1113                 ehci_prepare_ports_for_controller_resume(ehci);
1114
1115                 spin_lock_irq(&ehci->lock);
1116                 if (ehci->shutdown)
1117                         goto skip;
1118
1119                 if (!hcd->self.root_hub->do_remote_wakeup)
1120                         mask &= ~STS_PCD;
1121                 ehci_writel(ehci, mask, &ehci->regs->intr_enable);
1122                 ehci_readl(ehci, &ehci->regs->intr_enable);
1123  skip:
1124                 spin_unlock_irq(&ehci->lock);
1125                 return 0;
1126         }
1127
1128         /*
1129          * Else reset, to cope with power loss or resume from hibernation
1130          * having let the firmware kick in during reboot.
1131          */
1132         usb_root_hub_lost_power(hcd->self.root_hub);
1133         (void) ehci_halt(ehci);
1134         (void) ehci_reset(ehci);
1135
1136         spin_lock_irq(&ehci->lock);
1137         if (ehci->shutdown)
1138                 goto skip;
1139
1140         ehci_writel(ehci, ehci->command, &ehci->regs->command);
1141         ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
1142         ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
1143
1144         ehci->rh_state = EHCI_RH_SUSPENDED;
1145         spin_unlock_irq(&ehci->lock);
1146
1147         return 1;
1148 }
1149 EXPORT_SYMBOL_GPL(ehci_resume);
1150
1151 #endif
1152
1153 /*-------------------------------------------------------------------------*/
1154
1155 /*
1156  * Generic structure: This gets copied for platform drivers so that
1157  * individual entries can be overridden as needed.
1158  */
1159
1160 static const struct hc_driver ehci_hc_driver = {
1161         .description =          hcd_name,
1162         .product_desc =         "EHCI Host Controller",
1163         .hcd_priv_size =        sizeof(struct ehci_hcd),
1164
1165         /*
1166          * generic hardware linkage
1167          */
1168         .irq =                  ehci_irq,
1169         .flags =                HCD_MEMORY | HCD_USB2 | HCD_BH,
1170
1171         /*
1172          * basic lifecycle operations
1173          */
1174         .reset =                ehci_setup,
1175         .start =                ehci_run,
1176         .stop =                 ehci_stop,
1177         .shutdown =             ehci_shutdown,
1178
1179         /*
1180          * managing i/o requests and associated device resources
1181          */
1182         .urb_enqueue =          ehci_urb_enqueue,
1183         .urb_dequeue =          ehci_urb_dequeue,
1184         .endpoint_disable =     ehci_endpoint_disable,
1185         .endpoint_reset =       ehci_endpoint_reset,
1186         .clear_tt_buffer_complete =     ehci_clear_tt_buffer_complete,
1187
1188         /*
1189          * scheduling support
1190          */
1191         .get_frame_number =     ehci_get_frame,
1192
1193         /*
1194          * root hub support
1195          */
1196         .hub_status_data =      ehci_hub_status_data,
1197         .hub_control =          ehci_hub_control,
1198         .bus_suspend =          ehci_bus_suspend,
1199         .bus_resume =           ehci_bus_resume,
1200         .relinquish_port =      ehci_relinquish_port,
1201         .port_handed_over =     ehci_port_handed_over,
1202 };
1203
1204 void ehci_init_driver(struct hc_driver *drv,
1205                 const struct ehci_driver_overrides *over)
1206 {
1207         /* Copy the generic table to drv and then apply the overrides */
1208         *drv = ehci_hc_driver;
1209
1210         if (over) {
1211                 drv->hcd_priv_size += over->extra_priv_size;
1212                 if (over->reset)
1213                         drv->reset = over->reset;
1214         }
1215 }
1216 EXPORT_SYMBOL_GPL(ehci_init_driver);
1217
1218 /*-------------------------------------------------------------------------*/
1219
1220 MODULE_DESCRIPTION(DRIVER_DESC);
1221 MODULE_AUTHOR (DRIVER_AUTHOR);
1222 MODULE_LICENSE ("GPL");
1223
1224 #ifdef CONFIG_USB_EHCI_FSL
1225 #include "ehci-fsl.c"
1226 #define PLATFORM_DRIVER         ehci_fsl_driver
1227 #endif
1228
1229 #ifdef CONFIG_USB_EHCI_SH
1230 #include "ehci-sh.c"
1231 #define PLATFORM_DRIVER         ehci_hcd_sh_driver
1232 #endif
1233
1234 #ifdef CONFIG_PPC_PS3
1235 #include "ehci-ps3.c"
1236 #define PS3_SYSTEM_BUS_DRIVER   ps3_ehci_driver
1237 #endif
1238
1239 #ifdef CONFIG_USB_EHCI_HCD_PPC_OF
1240 #include "ehci-ppc-of.c"
1241 #define OF_PLATFORM_DRIVER      ehci_hcd_ppc_of_driver
1242 #endif
1243
1244 #ifdef CONFIG_XPS_USB_HCD_XILINX
1245 #include "ehci-xilinx-of.c"
1246 #define XILINX_OF_PLATFORM_DRIVER       ehci_hcd_xilinx_of_driver
1247 #endif
1248
1249 #ifdef CONFIG_USB_W90X900_EHCI
1250 #include "ehci-w90x900.c"
1251 #define PLATFORM_DRIVER         ehci_hcd_w90x900_driver
1252 #endif
1253
1254 #ifdef CONFIG_USB_OCTEON_EHCI
1255 #include "ehci-octeon.c"
1256 #define PLATFORM_DRIVER         ehci_octeon_driver
1257 #endif
1258
1259 #ifdef CONFIG_TILE_USB
1260 #include "ehci-tilegx.c"
1261 #define PLATFORM_DRIVER         ehci_hcd_tilegx_driver
1262 #endif
1263
1264 #ifdef CONFIG_USB_EHCI_HCD_PMC_MSP
1265 #include "ehci-pmcmsp.c"
1266 #define PLATFORM_DRIVER         ehci_hcd_msp_driver
1267 #endif
1268
1269 #ifdef CONFIG_SPARC_LEON
1270 #include "ehci-grlib.c"
1271 #define PLATFORM_DRIVER         ehci_grlib_driver
1272 #endif
1273
1274 #ifdef CONFIG_USB_EHCI_MV
1275 #include "ehci-mv.c"
1276 #define        PLATFORM_DRIVER         ehci_mv_driver
1277 #endif
1278
1279 #ifdef CONFIG_MIPS_SEAD3
1280 #include "ehci-sead3.c"
1281 #define PLATFORM_DRIVER         ehci_hcd_sead3_driver
1282 #endif
1283
1284 static int __init ehci_hcd_init(void)
1285 {
1286         int retval = 0;
1287
1288         if (usb_disabled())
1289                 return -ENODEV;
1290
1291         printk(KERN_INFO "%s: " DRIVER_DESC "\n", hcd_name);
1292         set_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1293         if (test_bit(USB_UHCI_LOADED, &usb_hcds_loaded) ||
1294                         test_bit(USB_OHCI_LOADED, &usb_hcds_loaded))
1295                 printk(KERN_WARNING "Warning! ehci_hcd should always be loaded"
1296                                 " before uhci_hcd and ohci_hcd, not after\n");
1297
1298         pr_debug("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n",
1299                  hcd_name,
1300                  sizeof(struct ehci_qh), sizeof(struct ehci_qtd),
1301                  sizeof(struct ehci_itd), sizeof(struct ehci_sitd));
1302
1303 #ifdef DEBUG
1304         ehci_debug_root = debugfs_create_dir("ehci", usb_debug_root);
1305         if (!ehci_debug_root) {
1306                 retval = -ENOENT;
1307                 goto err_debug;
1308         }
1309 #endif
1310
1311 #ifdef PLATFORM_DRIVER
1312         retval = platform_driver_register(&PLATFORM_DRIVER);
1313         if (retval < 0)
1314                 goto clean0;
1315 #endif
1316
1317 #ifdef PS3_SYSTEM_BUS_DRIVER
1318         retval = ps3_ehci_driver_register(&PS3_SYSTEM_BUS_DRIVER);
1319         if (retval < 0)
1320                 goto clean2;
1321 #endif
1322
1323 #ifdef OF_PLATFORM_DRIVER
1324         retval = platform_driver_register(&OF_PLATFORM_DRIVER);
1325         if (retval < 0)
1326                 goto clean3;
1327 #endif
1328
1329 #ifdef XILINX_OF_PLATFORM_DRIVER
1330         retval = platform_driver_register(&XILINX_OF_PLATFORM_DRIVER);
1331         if (retval < 0)
1332                 goto clean4;
1333 #endif
1334         return retval;
1335
1336 #ifdef XILINX_OF_PLATFORM_DRIVER
1337         /* platform_driver_unregister(&XILINX_OF_PLATFORM_DRIVER); */
1338 clean4:
1339 #endif
1340 #ifdef OF_PLATFORM_DRIVER
1341         platform_driver_unregister(&OF_PLATFORM_DRIVER);
1342 clean3:
1343 #endif
1344 #ifdef PS3_SYSTEM_BUS_DRIVER
1345         ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1346 clean2:
1347 #endif
1348 #ifdef PLATFORM_DRIVER
1349         platform_driver_unregister(&PLATFORM_DRIVER);
1350 clean0:
1351 #endif
1352 #ifdef DEBUG
1353         debugfs_remove(ehci_debug_root);
1354         ehci_debug_root = NULL;
1355 err_debug:
1356 #endif
1357         clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1358         return retval;
1359 }
1360 module_init(ehci_hcd_init);
1361
1362 static void __exit ehci_hcd_cleanup(void)
1363 {
1364 #ifdef XILINX_OF_PLATFORM_DRIVER
1365         platform_driver_unregister(&XILINX_OF_PLATFORM_DRIVER);
1366 #endif
1367 #ifdef OF_PLATFORM_DRIVER
1368         platform_driver_unregister(&OF_PLATFORM_DRIVER);
1369 #endif
1370 #ifdef PLATFORM_DRIVER
1371         platform_driver_unregister(&PLATFORM_DRIVER);
1372 #endif
1373 #ifdef PS3_SYSTEM_BUS_DRIVER
1374         ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1375 #endif
1376 #ifdef DEBUG
1377         debugfs_remove(ehci_debug_root);
1378 #endif
1379         clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1380 }
1381 module_exit(ehci_hcd_cleanup);