Linux 3.10.72
[firefly-linux-kernel-4.4.55.git] / drivers / usb / host / ehci-hcd.c
1 /*
2  * Enhanced Host Controller Interface (EHCI) driver for USB.
3  *
4  * Maintainer: Alan Stern <stern@rowland.harvard.edu>
5  *
6  * Copyright (c) 2000-2004 by David Brownell
7  *
8  * This program is free software; you can redistribute it and/or modify it
9  * under the terms of the GNU General Public License as published by the
10  * Free Software Foundation; either version 2 of the License, or (at your
11  * option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful, but
14  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
16  * for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software Foundation,
20  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21  */
22
23 #include <linux/module.h>
24 #include <linux/pci.h>
25 #include <linux/dmapool.h>
26 #include <linux/kernel.h>
27 #include <linux/delay.h>
28 #include <linux/ioport.h>
29 #include <linux/sched.h>
30 #include <linux/vmalloc.h>
31 #include <linux/errno.h>
32 #include <linux/init.h>
33 #include <linux/hrtimer.h>
34 #include <linux/list.h>
35 #include <linux/interrupt.h>
36 #include <linux/usb.h>
37 #include <linux/usb/hcd.h>
38 #include <linux/moduleparam.h>
39 #include <linux/dma-mapping.h>
40 #include <linux/debugfs.h>
41 #include <linux/slab.h>
42
43 #include <asm/byteorder.h>
44 #include <asm/io.h>
45 #include <asm/irq.h>
46 #include <asm/unaligned.h>
47
48 #if defined(CONFIG_PPC_PS3)
49 #include <asm/firmware.h>
50 #endif
51
52 /*-------------------------------------------------------------------------*/
53
54 /*
55  * EHCI hc_driver implementation ... experimental, incomplete.
56  * Based on the final 1.0 register interface specification.
57  *
58  * USB 2.0 shows up in upcoming www.pcmcia.org technology.
59  * First was PCMCIA, like ISA; then CardBus, which is PCI.
60  * Next comes "CardBay", using USB 2.0 signals.
61  *
62  * Contains additional contributions by Brad Hards, Rory Bolt, and others.
63  * Special thanks to Intel and VIA for providing host controllers to
64  * test this driver on, and Cypress (including In-System Design) for
65  * providing early devices for those host controllers to talk to!
66  */
67
68 #define DRIVER_AUTHOR "David Brownell"
69 #define DRIVER_DESC "USB 2.0 'Enhanced' Host Controller (EHCI) Driver"
70
71 static const char       hcd_name [] = "ehci_hcd";
72
73
74 #undef VERBOSE_DEBUG
75 #undef EHCI_URB_TRACE
76
77 /* magic numbers that can affect system performance */
78 #define EHCI_TUNE_CERR          3       /* 0-3 qtd retries; 0 == don't stop */
79 #define EHCI_TUNE_RL_HS         4       /* nak throttle; see 4.9 */
80 #define EHCI_TUNE_RL_TT         0
81 #define EHCI_TUNE_MULT_HS       1       /* 1-3 transactions/uframe; 4.10.3 */
82 #define EHCI_TUNE_MULT_TT       1
83 /*
84  * Some drivers think it's safe to schedule isochronous transfers more than
85  * 256 ms into the future (partly as a result of an old bug in the scheduling
86  * code).  In an attempt to avoid trouble, we will use a minimum scheduling
87  * length of 512 frames instead of 256.
88  */
89 #define EHCI_TUNE_FLS           1       /* (medium) 512-frame schedule */
90
91 /* Initial IRQ latency:  faster than hw default */
92 static int log2_irq_thresh = 0;         // 0 to 6
93 module_param (log2_irq_thresh, int, S_IRUGO);
94 MODULE_PARM_DESC (log2_irq_thresh, "log2 IRQ latency, 1-64 microframes");
95
96 /* initial park setting:  slower than hw default */
97 static unsigned park = 0;
98 module_param (park, uint, S_IRUGO);
99 MODULE_PARM_DESC (park, "park setting; 1-3 back-to-back async packets");
100
101 /* for flakey hardware, ignore overcurrent indicators */
102 static bool ignore_oc = 0;
103 module_param (ignore_oc, bool, S_IRUGO);
104 MODULE_PARM_DESC (ignore_oc, "ignore bogus hardware overcurrent indications");
105
106 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
107
108 /*-------------------------------------------------------------------------*/
109
110 #include "ehci.h"
111 #include "pci-quirks.h"
112
113 /*
114  * The MosChip MCS9990 controller updates its microframe counter
115  * a little before the frame counter, and occasionally we will read
116  * the invalid intermediate value.  Avoid problems by checking the
117  * microframe number (the low-order 3 bits); if they are 0 then
118  * re-read the register to get the correct value.
119  */
120 static unsigned ehci_moschip_read_frame_index(struct ehci_hcd *ehci)
121 {
122         unsigned uf;
123
124         uf = ehci_readl(ehci, &ehci->regs->frame_index);
125         if (unlikely((uf & 7) == 0))
126                 uf = ehci_readl(ehci, &ehci->regs->frame_index);
127         return uf;
128 }
129
130 static inline unsigned ehci_read_frame_index(struct ehci_hcd *ehci)
131 {
132         if (ehci->frame_index_bug)
133                 return ehci_moschip_read_frame_index(ehci);
134         return ehci_readl(ehci, &ehci->regs->frame_index);
135 }
136
137 #include "ehci-dbg.c"
138
139 /*-------------------------------------------------------------------------*/
140
141 /*
142  * handshake - spin reading hc until handshake completes or fails
143  * @ptr: address of hc register to be read
144  * @mask: bits to look at in result of read
145  * @done: value of those bits when handshake succeeds
146  * @usec: timeout in microseconds
147  *
148  * Returns negative errno, or zero on success
149  *
150  * Success happens when the "mask" bits have the specified value (hardware
151  * handshake done).  There are two failure modes:  "usec" have passed (major
152  * hardware flakeout), or the register reads as all-ones (hardware removed).
153  *
154  * That last failure should_only happen in cases like physical cardbus eject
155  * before driver shutdown. But it also seems to be caused by bugs in cardbus
156  * bridge shutdown:  shutting down the bridge before the devices using it.
157  */
158 static int handshake (struct ehci_hcd *ehci, void __iomem *ptr,
159                       u32 mask, u32 done, int usec)
160 {
161         u32     result;
162
163         do {
164                 result = ehci_readl(ehci, ptr);
165                 if (result == ~(u32)0)          /* card removed */
166                         return -ENODEV;
167                 result &= mask;
168                 if (result == done)
169                         return 0;
170                 udelay (1);
171                 usec--;
172         } while (usec > 0);
173         return -ETIMEDOUT;
174 }
175
176 /* check TDI/ARC silicon is in host mode */
177 static int tdi_in_host_mode (struct ehci_hcd *ehci)
178 {
179         u32             tmp;
180
181         tmp = ehci_readl(ehci, &ehci->regs->usbmode);
182         return (tmp & 3) == USBMODE_CM_HC;
183 }
184
185 /*
186  * Force HC to halt state from unknown (EHCI spec section 2.3).
187  * Must be called with interrupts enabled and the lock not held.
188  */
189 static int ehci_halt (struct ehci_hcd *ehci)
190 {
191         u32     temp;
192
193         spin_lock_irq(&ehci->lock);
194
195         /* disable any irqs left enabled by previous code */
196         ehci_writel(ehci, 0, &ehci->regs->intr_enable);
197
198         if (ehci_is_TDI(ehci) && !tdi_in_host_mode(ehci)) {
199                 spin_unlock_irq(&ehci->lock);
200                 return 0;
201         }
202
203         /*
204          * This routine gets called during probe before ehci->command
205          * has been initialized, so we can't rely on its value.
206          */
207         ehci->command &= ~CMD_RUN;
208         temp = ehci_readl(ehci, &ehci->regs->command);
209         temp &= ~(CMD_RUN | CMD_IAAD);
210         ehci_writel(ehci, temp, &ehci->regs->command);
211
212         spin_unlock_irq(&ehci->lock);
213         synchronize_irq(ehci_to_hcd(ehci)->irq);
214
215         return handshake(ehci, &ehci->regs->status,
216                           STS_HALT, STS_HALT, 16 * 125);
217 }
218
219 /* put TDI/ARC silicon into EHCI mode */
220 static void tdi_reset (struct ehci_hcd *ehci)
221 {
222         u32             tmp;
223
224         tmp = ehci_readl(ehci, &ehci->regs->usbmode);
225         tmp |= USBMODE_CM_HC;
226         /* The default byte access to MMR space is LE after
227          * controller reset. Set the required endian mode
228          * for transfer buffers to match the host microprocessor
229          */
230         if (ehci_big_endian_mmio(ehci))
231                 tmp |= USBMODE_BE;
232         ehci_writel(ehci, tmp, &ehci->regs->usbmode);
233 }
234
235 /*
236  * Reset a non-running (STS_HALT == 1) controller.
237  * Must be called with interrupts enabled and the lock not held.
238  */
239 static int ehci_reset (struct ehci_hcd *ehci)
240 {
241         int     retval;
242         u32     command = ehci_readl(ehci, &ehci->regs->command);
243
244         /* If the EHCI debug controller is active, special care must be
245          * taken before and after a host controller reset */
246         if (ehci->debug && !dbgp_reset_prep(ehci_to_hcd(ehci)))
247                 ehci->debug = NULL;
248
249         command |= CMD_RESET;
250         dbg_cmd (ehci, "reset", command);
251         ehci_writel(ehci, command, &ehci->regs->command);
252         ehci->rh_state = EHCI_RH_HALTED;
253         ehci->next_statechange = jiffies;
254         retval = handshake (ehci, &ehci->regs->command,
255                             CMD_RESET, 0, 250 * 1000);
256
257         if (ehci->has_hostpc) {
258                 ehci_writel(ehci, USBMODE_EX_HC | USBMODE_EX_VBPS,
259                                 &ehci->regs->usbmode_ex);
260                 ehci_writel(ehci, TXFIFO_DEFAULT, &ehci->regs->txfill_tuning);
261         }
262         if (retval)
263                 return retval;
264
265         if (ehci_is_TDI(ehci))
266                 tdi_reset (ehci);
267
268         if (ehci->debug)
269                 dbgp_external_startup(ehci_to_hcd(ehci));
270
271         ehci->port_c_suspend = ehci->suspended_ports =
272                         ehci->resuming_ports = 0;
273         return retval;
274 }
275
276 /*
277  * Idle the controller (turn off the schedules).
278  * Must be called with interrupts enabled and the lock not held.
279  */
280 static void ehci_quiesce (struct ehci_hcd *ehci)
281 {
282         u32     temp;
283
284         if (ehci->rh_state != EHCI_RH_RUNNING)
285                 return;
286
287         /* wait for any schedule enables/disables to take effect */
288         temp = (ehci->command << 10) & (STS_ASS | STS_PSS);
289         handshake(ehci, &ehci->regs->status, STS_ASS | STS_PSS, temp, 16 * 125);
290
291         /* then disable anything that's still active */
292         spin_lock_irq(&ehci->lock);
293         ehci->command &= ~(CMD_ASE | CMD_PSE);
294         ehci_writel(ehci, ehci->command, &ehci->regs->command);
295         spin_unlock_irq(&ehci->lock);
296
297         /* hardware can take 16 microframes to turn off ... */
298         handshake(ehci, &ehci->regs->status, STS_ASS | STS_PSS, 0, 16 * 125);
299 }
300
301 /*-------------------------------------------------------------------------*/
302
303 static void end_unlink_async(struct ehci_hcd *ehci);
304 static void unlink_empty_async(struct ehci_hcd *ehci);
305 static void unlink_empty_async_suspended(struct ehci_hcd *ehci);
306 static void ehci_work(struct ehci_hcd *ehci);
307 static void start_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh);
308 static void end_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh);
309
310 #include "ehci-timer.c"
311 #include "ehci-hub.c"
312 #include "ehci-mem.c"
313 #include "ehci-q.c"
314 #include "ehci-sched.c"
315 #include "ehci-sysfs.c"
316
317 /*-------------------------------------------------------------------------*/
318
319 /* On some systems, leaving remote wakeup enabled prevents system shutdown.
320  * The firmware seems to think that powering off is a wakeup event!
321  * This routine turns off remote wakeup and everything else, on all ports.
322  */
323 static void ehci_turn_off_all_ports(struct ehci_hcd *ehci)
324 {
325         int     port = HCS_N_PORTS(ehci->hcs_params);
326
327         while (port--)
328                 ehci_writel(ehci, PORT_RWC_BITS,
329                                 &ehci->regs->port_status[port]);
330 }
331
332 /*
333  * Halt HC, turn off all ports, and let the BIOS use the companion controllers.
334  * Must be called with interrupts enabled and the lock not held.
335  */
336 static void ehci_silence_controller(struct ehci_hcd *ehci)
337 {
338         ehci_halt(ehci);
339
340         spin_lock_irq(&ehci->lock);
341         ehci->rh_state = EHCI_RH_HALTED;
342         ehci_turn_off_all_ports(ehci);
343
344         /* make BIOS/etc use companion controller during reboot */
345         ehci_writel(ehci, 0, &ehci->regs->configured_flag);
346
347         /* unblock posted writes */
348         ehci_readl(ehci, &ehci->regs->configured_flag);
349         spin_unlock_irq(&ehci->lock);
350 }
351
352 /* ehci_shutdown kick in for silicon on any bus (not just pci, etc).
353  * This forcibly disables dma and IRQs, helping kexec and other cases
354  * where the next system software may expect clean state.
355  */
356 static void ehci_shutdown(struct usb_hcd *hcd)
357 {
358         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
359
360         spin_lock_irq(&ehci->lock);
361         ehci->shutdown = true;
362         ehci->rh_state = EHCI_RH_STOPPING;
363         ehci->enabled_hrtimer_events = 0;
364         spin_unlock_irq(&ehci->lock);
365
366         ehci_silence_controller(ehci);
367
368         hrtimer_cancel(&ehci->hrtimer);
369 }
370
371 /*-------------------------------------------------------------------------*/
372
373 /*
374  * ehci_work is called from some interrupts, timers, and so on.
375  * it calls driver completion functions, after dropping ehci->lock.
376  */
377 static void ehci_work (struct ehci_hcd *ehci)
378 {
379         /* another CPU may drop ehci->lock during a schedule scan while
380          * it reports urb completions.  this flag guards against bogus
381          * attempts at re-entrant schedule scanning.
382          */
383         if (ehci->scanning) {
384                 ehci->need_rescan = true;
385                 return;
386         }
387         ehci->scanning = true;
388
389  rescan:
390         ehci->need_rescan = false;
391         if (ehci->async_count)
392                 scan_async(ehci);
393         if (ehci->intr_count > 0)
394                 scan_intr(ehci);
395         if (ehci->isoc_count > 0)
396                 scan_isoc(ehci);
397         if (ehci->need_rescan)
398                 goto rescan;
399         ehci->scanning = false;
400
401         /* the IO watchdog guards against hardware or driver bugs that
402          * misplace IRQs, and should let us run completely without IRQs.
403          * such lossage has been observed on both VT6202 and VT8235.
404          */
405         turn_on_io_watchdog(ehci);
406 }
407
408 /*
409  * Called when the ehci_hcd module is removed.
410  */
411 static void ehci_stop (struct usb_hcd *hcd)
412 {
413         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
414
415         ehci_dbg (ehci, "stop\n");
416
417         /* no more interrupts ... */
418
419         spin_lock_irq(&ehci->lock);
420         ehci->enabled_hrtimer_events = 0;
421         spin_unlock_irq(&ehci->lock);
422
423         ehci_quiesce(ehci);
424         ehci_silence_controller(ehci);
425         ehci_reset (ehci);
426
427         hrtimer_cancel(&ehci->hrtimer);
428         remove_sysfs_files(ehci);
429         remove_debug_files (ehci);
430
431         /* root hub is shut down separately (first, when possible) */
432         spin_lock_irq (&ehci->lock);
433         end_free_itds(ehci);
434         spin_unlock_irq (&ehci->lock);
435         ehci_mem_cleanup (ehci);
436
437         if (ehci->amd_pll_fix == 1)
438                 usb_amd_dev_put();
439
440 #ifdef  EHCI_STATS
441         ehci_dbg(ehci, "irq normal %ld err %ld iaa %ld (lost %ld)\n",
442                 ehci->stats.normal, ehci->stats.error, ehci->stats.iaa,
443                 ehci->stats.lost_iaa);
444         ehci_dbg (ehci, "complete %ld unlink %ld\n",
445                 ehci->stats.complete, ehci->stats.unlink);
446 #endif
447
448         dbg_status (ehci, "ehci_stop completed",
449                     ehci_readl(ehci, &ehci->regs->status));
450 }
451
452 /* one-time init, only for memory state */
453 static int ehci_init(struct usb_hcd *hcd)
454 {
455         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
456         u32                     temp;
457         int                     retval;
458         u32                     hcc_params;
459         struct ehci_qh_hw       *hw;
460
461         spin_lock_init(&ehci->lock);
462
463         /*
464          * keep io watchdog by default, those good HCDs could turn off it later
465          */
466         ehci->need_io_watchdog = 1;
467
468         hrtimer_init(&ehci->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
469         ehci->hrtimer.function = ehci_hrtimer_func;
470         ehci->next_hrtimer_event = EHCI_HRTIMER_NO_EVENT;
471
472         hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
473
474         /*
475          * by default set standard 80% (== 100 usec/uframe) max periodic
476          * bandwidth as required by USB 2.0
477          */
478         ehci->uframe_periodic_max = 100;
479
480         /*
481          * hw default: 1K periodic list heads, one per frame.
482          * periodic_size can shrink by USBCMD update if hcc_params allows.
483          */
484         ehci->periodic_size = DEFAULT_I_TDPS;
485         INIT_LIST_HEAD(&ehci->async_unlink);
486         INIT_LIST_HEAD(&ehci->async_idle);
487         INIT_LIST_HEAD(&ehci->intr_unlink);
488         INIT_LIST_HEAD(&ehci->intr_qh_list);
489         INIT_LIST_HEAD(&ehci->cached_itd_list);
490         INIT_LIST_HEAD(&ehci->cached_sitd_list);
491
492         if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
493                 /* periodic schedule size can be smaller than default */
494                 switch (EHCI_TUNE_FLS) {
495                 case 0: ehci->periodic_size = 1024; break;
496                 case 1: ehci->periodic_size = 512; break;
497                 case 2: ehci->periodic_size = 256; break;
498                 default:        BUG();
499                 }
500         }
501         if ((retval = ehci_mem_init(ehci, GFP_KERNEL)) < 0)
502                 return retval;
503
504         /* controllers may cache some of the periodic schedule ... */
505         if (HCC_ISOC_CACHE(hcc_params))         // full frame cache
506                 ehci->i_thresh = 0;
507         else                                    // N microframes cached
508                 ehci->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
509
510         /*
511          * dedicate a qh for the async ring head, since we couldn't unlink
512          * a 'real' qh without stopping the async schedule [4.8].  use it
513          * as the 'reclamation list head' too.
514          * its dummy is used in hw_alt_next of many tds, to prevent the qh
515          * from automatically advancing to the next td after short reads.
516          */
517         ehci->async->qh_next.qh = NULL;
518         hw = ehci->async->hw;
519         hw->hw_next = QH_NEXT(ehci, ehci->async->qh_dma);
520         hw->hw_info1 = cpu_to_hc32(ehci, QH_HEAD);
521 #if defined(CONFIG_PPC_PS3)
522         hw->hw_info1 |= cpu_to_hc32(ehci, QH_INACTIVATE);
523 #endif
524         hw->hw_token = cpu_to_hc32(ehci, QTD_STS_HALT);
525         hw->hw_qtd_next = EHCI_LIST_END(ehci);
526         ehci->async->qh_state = QH_STATE_LINKED;
527         hw->hw_alt_next = QTD_NEXT(ehci, ehci->async->dummy->qtd_dma);
528
529         /* clear interrupt enables, set irq latency */
530         if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
531                 log2_irq_thresh = 0;
532         temp = 1 << (16 + log2_irq_thresh);
533         if (HCC_PER_PORT_CHANGE_EVENT(hcc_params)) {
534                 ehci->has_ppcd = 1;
535                 ehci_dbg(ehci, "enable per-port change event\n");
536                 temp |= CMD_PPCEE;
537         }
538         if (HCC_CANPARK(hcc_params)) {
539                 /* HW default park == 3, on hardware that supports it (like
540                  * NVidia and ALI silicon), maximizes throughput on the async
541                  * schedule by avoiding QH fetches between transfers.
542                  *
543                  * With fast usb storage devices and NForce2, "park" seems to
544                  * make problems:  throughput reduction (!), data errors...
545                  */
546                 if (park) {
547                         park = min(park, (unsigned) 3);
548                         temp |= CMD_PARK;
549                         temp |= park << 8;
550                 }
551                 ehci_dbg(ehci, "park %d\n", park);
552         }
553         if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
554                 /* periodic schedule size can be smaller than default */
555                 temp &= ~(3 << 2);
556                 temp |= (EHCI_TUNE_FLS << 2);
557         }
558         ehci->command = temp;
559
560         /* Accept arbitrarily long scatter-gather lists */
561         if (!(hcd->driver->flags & HCD_LOCAL_MEM))
562                 hcd->self.sg_tablesize = ~0;
563         return 0;
564 }
565
566 /* start HC running; it's halted, ehci_init() has been run (once) */
567 static int ehci_run (struct usb_hcd *hcd)
568 {
569         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
570         u32                     temp;
571         u32                     hcc_params;
572
573         hcd->uses_new_polling = 1;
574
575         /* EHCI spec section 4.1 */
576
577         ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list);
578         ehci_writel(ehci, (u32)ehci->async->qh_dma, &ehci->regs->async_next);
579
580         /*
581          * hcc_params controls whether ehci->regs->segment must (!!!)
582          * be used; it constrains QH/ITD/SITD and QTD locations.
583          * pci_pool consistent memory always uses segment zero.
584          * streaming mappings for I/O buffers, like pci_map_single(),
585          * can return segments above 4GB, if the device allows.
586          *
587          * NOTE:  the dma mask is visible through dma_supported(), so
588          * drivers can pass this info along ... like NETIF_F_HIGHDMA,
589          * Scsi_Host.highmem_io, and so forth.  It's readonly to all
590          * host side drivers though.
591          */
592         hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
593         if (HCC_64BIT_ADDR(hcc_params)) {
594                 ehci_writel(ehci, 0, &ehci->regs->segment);
595 #if 0
596 // this is deeply broken on almost all architectures
597                 if (!dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64)))
598                         ehci_info(ehci, "enabled 64bit DMA\n");
599 #endif
600         }
601
602
603         // Philips, Intel, and maybe others need CMD_RUN before the
604         // root hub will detect new devices (why?); NEC doesn't
605         ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
606         ehci->command |= CMD_RUN;
607         ehci_writel(ehci, ehci->command, &ehci->regs->command);
608         dbg_cmd (ehci, "init", ehci->command);
609
610         /*
611          * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
612          * are explicitly handed to companion controller(s), so no TT is
613          * involved with the root hub.  (Except where one is integrated,
614          * and there's no companion controller unless maybe for USB OTG.)
615          *
616          * Turning on the CF flag will transfer ownership of all ports
617          * from the companions to the EHCI controller.  If any of the
618          * companions are in the middle of a port reset at the time, it
619          * could cause trouble.  Write-locking ehci_cf_port_reset_rwsem
620          * guarantees that no resets are in progress.  After we set CF,
621          * a short delay lets the hardware catch up; new resets shouldn't
622          * be started before the port switching actions could complete.
623          */
624         down_write(&ehci_cf_port_reset_rwsem);
625         ehci->rh_state = EHCI_RH_RUNNING;
626         ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
627         ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
628         msleep(5);
629         up_write(&ehci_cf_port_reset_rwsem);
630         ehci->last_periodic_enable = ktime_get_real();
631
632         temp = HC_VERSION(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
633         ehci_info (ehci,
634                 "USB %x.%x started, EHCI %x.%02x%s\n",
635                 ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f),
636                 temp >> 8, temp & 0xff,
637                 ignore_oc ? ", overcurrent ignored" : "");
638
639         ehci_writel(ehci, INTR_MASK,
640                     &ehci->regs->intr_enable); /* Turn On Interrupts */
641
642         /* GRR this is run-once init(), being done every time the HC starts.
643          * So long as they're part of class devices, we can't do it init()
644          * since the class device isn't created that early.
645          */
646         create_debug_files(ehci);
647         create_sysfs_files(ehci);
648
649         return 0;
650 }
651
652 int ehci_setup(struct usb_hcd *hcd)
653 {
654         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
655         int retval;
656
657         ehci->regs = (void __iomem *)ehci->caps +
658             HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
659         dbg_hcs_params(ehci, "reset");
660         dbg_hcc_params(ehci, "reset");
661
662         /* cache this readonly data; minimize chip reads */
663         ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
664
665         ehci->sbrn = HCD_USB2;
666
667         /* data structure init */
668         retval = ehci_init(hcd);
669         if (retval)
670                 return retval;
671
672         retval = ehci_halt(ehci);
673         if (retval)
674                 return retval;
675
676         ehci_reset(ehci);
677
678         return 0;
679 }
680 EXPORT_SYMBOL_GPL(ehci_setup);
681
682 /*-------------------------------------------------------------------------*/
683
684 static irqreturn_t ehci_irq (struct usb_hcd *hcd)
685 {
686         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
687         u32                     status, masked_status, pcd_status = 0, cmd;
688         int                     bh;
689         unsigned long           flags;
690
691         /*
692          * For threadirqs option we use spin_lock_irqsave() variant to prevent
693          * deadlock with ehci hrtimer callback, because hrtimer callbacks run
694          * in interrupt context even when threadirqs is specified. We can go
695          * back to spin_lock() variant when hrtimer callbacks become threaded.
696          */
697         spin_lock_irqsave(&ehci->lock, flags);
698
699         status = ehci_readl(ehci, &ehci->regs->status);
700
701         /* e.g. cardbus physical eject */
702         if (status == ~(u32) 0) {
703                 ehci_dbg (ehci, "device removed\n");
704                 goto dead;
705         }
706
707         /*
708          * We don't use STS_FLR, but some controllers don't like it to
709          * remain on, so mask it out along with the other status bits.
710          */
711         masked_status = status & (INTR_MASK | STS_FLR);
712
713         /* Shared IRQ? */
714         if (!masked_status || unlikely(ehci->rh_state == EHCI_RH_HALTED)) {
715                 spin_unlock_irqrestore(&ehci->lock, flags);
716                 return IRQ_NONE;
717         }
718
719         /* clear (just) interrupts */
720         ehci_writel(ehci, masked_status, &ehci->regs->status);
721         cmd = ehci_readl(ehci, &ehci->regs->command);
722         bh = 0;
723
724 #ifdef  VERBOSE_DEBUG
725         /* unrequested/ignored: Frame List Rollover */
726         dbg_status (ehci, "irq", status);
727 #endif
728
729         /* INT, ERR, and IAA interrupt rates can be throttled */
730
731         /* normal [4.15.1.2] or error [4.15.1.1] completion */
732         if (likely ((status & (STS_INT|STS_ERR)) != 0)) {
733                 if (likely ((status & STS_ERR) == 0))
734                         COUNT (ehci->stats.normal);
735                 else
736                         COUNT (ehci->stats.error);
737                 bh = 1;
738         }
739
740         /* complete the unlinking of some qh [4.15.2.3] */
741         if (status & STS_IAA) {
742
743                 /* Turn off the IAA watchdog */
744                 ehci->enabled_hrtimer_events &= ~BIT(EHCI_HRTIMER_IAA_WATCHDOG);
745
746                 /*
747                  * Mild optimization: Allow another IAAD to reset the
748                  * hrtimer, if one occurs before the next expiration.
749                  * In theory we could always cancel the hrtimer, but
750                  * tests show that about half the time it will be reset
751                  * for some other event anyway.
752                  */
753                 if (ehci->next_hrtimer_event == EHCI_HRTIMER_IAA_WATCHDOG)
754                         ++ehci->next_hrtimer_event;
755
756                 /* guard against (alleged) silicon errata */
757                 if (cmd & CMD_IAAD)
758                         ehci_dbg(ehci, "IAA with IAAD still set?\n");
759                 if (ehci->iaa_in_progress)
760                         COUNT(ehci->stats.iaa);
761                 end_unlink_async(ehci);
762         }
763
764         /* remote wakeup [4.3.1] */
765         if (status & STS_PCD) {
766                 unsigned        i = HCS_N_PORTS (ehci->hcs_params);
767                 u32             ppcd = ~0;
768
769                 /* kick root hub later */
770                 pcd_status = status;
771
772                 /* resume root hub? */
773                 if (ehci->rh_state == EHCI_RH_SUSPENDED)
774                         usb_hcd_resume_root_hub(hcd);
775
776                 /* get per-port change detect bits */
777                 if (ehci->has_ppcd)
778                         ppcd = status >> 16;
779
780                 while (i--) {
781                         int pstatus;
782
783                         /* leverage per-port change bits feature */
784                         if (!(ppcd & (1 << i)))
785                                 continue;
786                         pstatus = ehci_readl(ehci,
787                                          &ehci->regs->port_status[i]);
788
789                         if (pstatus & PORT_OWNER)
790                                 continue;
791                         if (!(test_bit(i, &ehci->suspended_ports) &&
792                                         ((pstatus & PORT_RESUME) ||
793                                                 !(pstatus & PORT_SUSPEND)) &&
794                                         (pstatus & PORT_PE) &&
795                                         ehci->reset_done[i] == 0))
796                                 continue;
797
798                         /* start 20 msec resume signaling from this port,
799                          * and make khubd collect PORT_STAT_C_SUSPEND to
800                          * stop that signaling.  Use 5 ms extra for safety,
801                          * like usb_port_resume() does.
802                          */
803                         ehci->reset_done[i] = jiffies + msecs_to_jiffies(25);
804                         set_bit(i, &ehci->resuming_ports);
805                         ehci_dbg (ehci, "port %d remote wakeup\n", i + 1);
806                         usb_hcd_start_port_resume(&hcd->self, i);
807                         mod_timer(&hcd->rh_timer, ehci->reset_done[i]);
808                 }
809         }
810
811         /* PCI errors [4.15.2.4] */
812         if (unlikely ((status & STS_FATAL) != 0)) {
813                 ehci_err(ehci, "fatal error\n");
814                 dbg_cmd(ehci, "fatal", cmd);
815                 dbg_status(ehci, "fatal", status);
816 dead:
817                 usb_hc_died(hcd);
818
819                 /* Don't let the controller do anything more */
820                 ehci->shutdown = true;
821                 ehci->rh_state = EHCI_RH_STOPPING;
822                 ehci->command &= ~(CMD_RUN | CMD_ASE | CMD_PSE);
823                 ehci_writel(ehci, ehci->command, &ehci->regs->command);
824                 ehci_writel(ehci, 0, &ehci->regs->intr_enable);
825                 ehci_handle_controller_death(ehci);
826
827                 /* Handle completions when the controller stops */
828                 bh = 0;
829         }
830
831         if (bh)
832                 ehci_work (ehci);
833         spin_unlock_irqrestore(&ehci->lock, flags);
834         if (pcd_status)
835                 usb_hcd_poll_rh_status(hcd);
836         return IRQ_HANDLED;
837 }
838
839 /*-------------------------------------------------------------------------*/
840
841 /*
842  * non-error returns are a promise to giveback() the urb later
843  * we drop ownership so next owner (or urb unlink) can get it
844  *
845  * urb + dev is in hcd.self.controller.urb_list
846  * we're queueing TDs onto software and hardware lists
847  *
848  * hcd-specific init for hcpriv hasn't been done yet
849  *
850  * NOTE:  control, bulk, and interrupt share the same code to append TDs
851  * to a (possibly active) QH, and the same QH scanning code.
852  */
853 static int ehci_urb_enqueue (
854         struct usb_hcd  *hcd,
855         struct urb      *urb,
856         gfp_t           mem_flags
857 ) {
858         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
859         struct list_head        qtd_list;
860
861         INIT_LIST_HEAD (&qtd_list);
862
863         switch (usb_pipetype (urb->pipe)) {
864         case PIPE_CONTROL:
865                 /* qh_completions() code doesn't handle all the fault cases
866                  * in multi-TD control transfers.  Even 1KB is rare anyway.
867                  */
868                 if (urb->transfer_buffer_length > (16 * 1024))
869                         return -EMSGSIZE;
870                 /* FALLTHROUGH */
871         /* case PIPE_BULK: */
872         default:
873                 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
874                         return -ENOMEM;
875                 return submit_async(ehci, urb, &qtd_list, mem_flags);
876
877         case PIPE_INTERRUPT:
878                 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
879                         return -ENOMEM;
880                 return intr_submit(ehci, urb, &qtd_list, mem_flags);
881
882         case PIPE_ISOCHRONOUS:
883                 if (urb->dev->speed == USB_SPEED_HIGH)
884                         return itd_submit (ehci, urb, mem_flags);
885                 else
886                         return sitd_submit (ehci, urb, mem_flags);
887         }
888 }
889
890 /* remove from hardware lists
891  * completions normally happen asynchronously
892  */
893
894 static int ehci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
895 {
896         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
897         struct ehci_qh          *qh;
898         unsigned long           flags;
899         int                     rc;
900
901         spin_lock_irqsave (&ehci->lock, flags);
902         rc = usb_hcd_check_unlink_urb(hcd, urb, status);
903         if (rc)
904                 goto done;
905
906         if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
907                 /*
908                  * We don't expedite dequeue for isochronous URBs.
909                  * Just wait until they complete normally or their
910                  * time slot expires.
911                  */
912         } else {
913                 qh = (struct ehci_qh *) urb->hcpriv;
914                 qh->exception = 1;
915                 switch (qh->qh_state) {
916                 case QH_STATE_LINKED:
917                         if (usb_pipetype(urb->pipe) == PIPE_INTERRUPT)
918                                 start_unlink_intr(ehci, qh);
919                         else
920                                 start_unlink_async(ehci, qh);
921                         break;
922                 case QH_STATE_COMPLETING:
923                         qh->dequeue_during_giveback = 1;
924                         break;
925                 case QH_STATE_UNLINK:
926                 case QH_STATE_UNLINK_WAIT:
927                         /* already started */
928                         break;
929                 case QH_STATE_IDLE:
930                         /* QH might be waiting for a Clear-TT-Buffer */
931                         qh_completions(ehci, qh);
932                         break;
933                 }
934         }
935 done:
936         spin_unlock_irqrestore (&ehci->lock, flags);
937         return rc;
938 }
939
940 /*-------------------------------------------------------------------------*/
941
942 // bulk qh holds the data toggle
943
944 static void
945 ehci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
946 {
947         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
948         unsigned long           flags;
949         struct ehci_qh          *qh, *tmp;
950
951         /* ASSERT:  any requests/urbs are being unlinked */
952         /* ASSERT:  nobody can be submitting urbs for this any more */
953
954 rescan:
955         spin_lock_irqsave (&ehci->lock, flags);
956         qh = ep->hcpriv;
957         if (!qh)
958                 goto done;
959
960         /* endpoints can be iso streams.  for now, we don't
961          * accelerate iso completions ... so spin a while.
962          */
963         if (qh->hw == NULL) {
964                 struct ehci_iso_stream  *stream = ep->hcpriv;
965
966                 if (!list_empty(&stream->td_list))
967                         goto idle_timeout;
968
969                 /* BUG_ON(!list_empty(&stream->free_list)); */
970                 kfree(stream);
971                 goto done;
972         }
973
974         qh->exception = 1;
975         switch (qh->qh_state) {
976         case QH_STATE_LINKED:
977         case QH_STATE_COMPLETING:
978                 for (tmp = ehci->async->qh_next.qh;
979                                 tmp && tmp != qh;
980                                 tmp = tmp->qh_next.qh)
981                         continue;
982                 /* periodic qh self-unlinks on empty, and a COMPLETING qh
983                  * may already be unlinked.
984                  */
985                 if (tmp)
986                         start_unlink_async(ehci, qh);
987                 /* FALL THROUGH */
988         case QH_STATE_UNLINK:           /* wait for hw to finish? */
989         case QH_STATE_UNLINK_WAIT:
990 idle_timeout:
991                 spin_unlock_irqrestore (&ehci->lock, flags);
992                 schedule_timeout_uninterruptible(1);
993                 goto rescan;
994         case QH_STATE_IDLE:             /* fully unlinked */
995                 if (qh->clearing_tt)
996                         goto idle_timeout;
997                 if (list_empty (&qh->qtd_list)) {
998                         qh_destroy(ehci, qh);
999                         break;
1000                 }
1001                 /* else FALL THROUGH */
1002         default:
1003                 /* caller was supposed to have unlinked any requests;
1004                  * that's not our job.  just leak this memory.
1005                  */
1006                 ehci_err (ehci, "qh %p (#%02x) state %d%s\n",
1007                         qh, ep->desc.bEndpointAddress, qh->qh_state,
1008                         list_empty (&qh->qtd_list) ? "" : "(has tds)");
1009                 break;
1010         }
1011  done:
1012         ep->hcpriv = NULL;
1013         spin_unlock_irqrestore (&ehci->lock, flags);
1014 }
1015
1016 static void
1017 ehci_endpoint_reset(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
1018 {
1019         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1020         struct ehci_qh          *qh;
1021         int                     eptype = usb_endpoint_type(&ep->desc);
1022         int                     epnum = usb_endpoint_num(&ep->desc);
1023         int                     is_out = usb_endpoint_dir_out(&ep->desc);
1024         unsigned long           flags;
1025
1026         if (eptype != USB_ENDPOINT_XFER_BULK && eptype != USB_ENDPOINT_XFER_INT)
1027                 return;
1028
1029         spin_lock_irqsave(&ehci->lock, flags);
1030         qh = ep->hcpriv;
1031
1032         /* For Bulk and Interrupt endpoints we maintain the toggle state
1033          * in the hardware; the toggle bits in udev aren't used at all.
1034          * When an endpoint is reset by usb_clear_halt() we must reset
1035          * the toggle bit in the QH.
1036          */
1037         if (qh) {
1038                 usb_settoggle(qh->dev, epnum, is_out, 0);
1039                 if (!list_empty(&qh->qtd_list)) {
1040                         WARN_ONCE(1, "clear_halt for a busy endpoint\n");
1041                 } else {
1042                         /* The toggle value in the QH can't be updated
1043                          * while the QH is active.  Unlink it now;
1044                          * re-linking will call qh_refresh().
1045                          */
1046                         qh->exception = 1;
1047                         if (eptype == USB_ENDPOINT_XFER_BULK)
1048                                 start_unlink_async(ehci, qh);
1049                         else
1050                                 start_unlink_intr(ehci, qh);
1051                 }
1052         }
1053         spin_unlock_irqrestore(&ehci->lock, flags);
1054 }
1055
1056 static int ehci_get_frame (struct usb_hcd *hcd)
1057 {
1058         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
1059         return (ehci_read_frame_index(ehci) >> 3) % ehci->periodic_size;
1060 }
1061
1062 /*-------------------------------------------------------------------------*/
1063
1064 #ifdef  CONFIG_PM
1065
1066 /* suspend/resume, section 4.3 */
1067
1068 /* These routines handle the generic parts of controller suspend/resume */
1069
1070 int ehci_suspend(struct usb_hcd *hcd, bool do_wakeup)
1071 {
1072         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1073
1074         if (time_before(jiffies, ehci->next_statechange))
1075                 msleep(10);
1076
1077         /*
1078          * Root hub was already suspended.  Disable IRQ emission and
1079          * mark HW unaccessible.  The PM and USB cores make sure that
1080          * the root hub is either suspended or stopped.
1081          */
1082         ehci_prepare_ports_for_controller_suspend(ehci, do_wakeup);
1083
1084         spin_lock_irq(&ehci->lock);
1085         ehci_writel(ehci, 0, &ehci->regs->intr_enable);
1086         (void) ehci_readl(ehci, &ehci->regs->intr_enable);
1087
1088         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1089         spin_unlock_irq(&ehci->lock);
1090
1091         return 0;
1092 }
1093 EXPORT_SYMBOL_GPL(ehci_suspend);
1094
1095 /* Returns 0 if power was preserved, 1 if power was lost */
1096 int ehci_resume(struct usb_hcd *hcd, bool hibernated)
1097 {
1098         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1099
1100         if (time_before(jiffies, ehci->next_statechange))
1101                 msleep(100);
1102
1103         /* Mark hardware accessible again as we are back to full power by now */
1104         set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1105
1106         if (ehci->shutdown)
1107                 return 0;               /* Controller is dead */
1108
1109         /*
1110          * If CF is still set and we aren't resuming from hibernation
1111          * then we maintained suspend power.
1112          * Just undo the effect of ehci_suspend().
1113          */
1114         if (ehci_readl(ehci, &ehci->regs->configured_flag) == FLAG_CF &&
1115                         !hibernated) {
1116                 int     mask = INTR_MASK;
1117
1118                 ehci_prepare_ports_for_controller_resume(ehci);
1119
1120                 spin_lock_irq(&ehci->lock);
1121                 if (ehci->shutdown)
1122                         goto skip;
1123
1124                 if (!hcd->self.root_hub->do_remote_wakeup)
1125                         mask &= ~STS_PCD;
1126                 ehci_writel(ehci, mask, &ehci->regs->intr_enable);
1127                 ehci_readl(ehci, &ehci->regs->intr_enable);
1128  skip:
1129                 spin_unlock_irq(&ehci->lock);
1130                 return 0;
1131         }
1132
1133         /*
1134          * Else reset, to cope with power loss or resume from hibernation
1135          * having let the firmware kick in during reboot.
1136          */
1137         usb_root_hub_lost_power(hcd->self.root_hub);
1138         (void) ehci_halt(ehci);
1139         (void) ehci_reset(ehci);
1140
1141         spin_lock_irq(&ehci->lock);
1142         if (ehci->shutdown)
1143                 goto skip;
1144
1145         ehci_writel(ehci, ehci->command, &ehci->regs->command);
1146         ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
1147         ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
1148
1149         ehci->rh_state = EHCI_RH_SUSPENDED;
1150         spin_unlock_irq(&ehci->lock);
1151
1152         return 1;
1153 }
1154 EXPORT_SYMBOL_GPL(ehci_resume);
1155
1156 #endif
1157
1158 /*-------------------------------------------------------------------------*/
1159
1160 /*
1161  * Generic structure: This gets copied for platform drivers so that
1162  * individual entries can be overridden as needed.
1163  */
1164
1165 static const struct hc_driver ehci_hc_driver = {
1166         .description =          hcd_name,
1167         .product_desc =         "EHCI Host Controller",
1168         .hcd_priv_size =        sizeof(struct ehci_hcd),
1169
1170         /*
1171          * generic hardware linkage
1172          */
1173         .irq =                  ehci_irq,
1174         .flags =                HCD_MEMORY | HCD_USB2,
1175
1176         /*
1177          * basic lifecycle operations
1178          */
1179         .reset =                ehci_setup,
1180         .start =                ehci_run,
1181         .stop =                 ehci_stop,
1182         .shutdown =             ehci_shutdown,
1183
1184         /*
1185          * managing i/o requests and associated device resources
1186          */
1187         .urb_enqueue =          ehci_urb_enqueue,
1188         .urb_dequeue =          ehci_urb_dequeue,
1189         .endpoint_disable =     ehci_endpoint_disable,
1190         .endpoint_reset =       ehci_endpoint_reset,
1191         .clear_tt_buffer_complete =     ehci_clear_tt_buffer_complete,
1192
1193         /*
1194          * scheduling support
1195          */
1196         .get_frame_number =     ehci_get_frame,
1197
1198         /*
1199          * root hub support
1200          */
1201         .hub_status_data =      ehci_hub_status_data,
1202         .hub_control =          ehci_hub_control,
1203         .bus_suspend =          ehci_bus_suspend,
1204         .bus_resume =           ehci_bus_resume,
1205         .relinquish_port =      ehci_relinquish_port,
1206         .port_handed_over =     ehci_port_handed_over,
1207 };
1208
1209 void ehci_init_driver(struct hc_driver *drv,
1210                 const struct ehci_driver_overrides *over)
1211 {
1212         /* Copy the generic table to drv and then apply the overrides */
1213         *drv = ehci_hc_driver;
1214
1215         if (over) {
1216                 drv->hcd_priv_size += over->extra_priv_size;
1217                 if (over->reset)
1218                         drv->reset = over->reset;
1219         }
1220 }
1221 EXPORT_SYMBOL_GPL(ehci_init_driver);
1222
1223 /*-------------------------------------------------------------------------*/
1224
1225 MODULE_DESCRIPTION(DRIVER_DESC);
1226 MODULE_AUTHOR (DRIVER_AUTHOR);
1227 MODULE_LICENSE ("GPL");
1228
1229 #ifdef CONFIG_USB_EHCI_FSL
1230 #include "ehci-fsl.c"
1231 #define PLATFORM_DRIVER         ehci_fsl_driver
1232 #endif
1233
1234 #ifdef CONFIG_USB_EHCI_SH
1235 #include "ehci-sh.c"
1236 #define PLATFORM_DRIVER         ehci_hcd_sh_driver
1237 #endif
1238
1239 #ifdef CONFIG_PPC_PS3
1240 #include "ehci-ps3.c"
1241 #define PS3_SYSTEM_BUS_DRIVER   ps3_ehci_driver
1242 #endif
1243
1244 #ifdef CONFIG_USB_EHCI_HCD_PPC_OF
1245 #include "ehci-ppc-of.c"
1246 #define OF_PLATFORM_DRIVER      ehci_hcd_ppc_of_driver
1247 #endif
1248
1249 #ifdef CONFIG_XPS_USB_HCD_XILINX
1250 #include "ehci-xilinx-of.c"
1251 #define XILINX_OF_PLATFORM_DRIVER       ehci_hcd_xilinx_of_driver
1252 #endif
1253
1254 #ifdef CONFIG_USB_W90X900_EHCI
1255 #include "ehci-w90x900.c"
1256 #define PLATFORM_DRIVER         ehci_hcd_w90x900_driver
1257 #endif
1258
1259 #ifdef CONFIG_USB_OCTEON_EHCI
1260 #include "ehci-octeon.c"
1261 #define PLATFORM_DRIVER         ehci_octeon_driver
1262 #endif
1263
1264 #ifdef CONFIG_TILE_USB
1265 #include "ehci-tilegx.c"
1266 #define PLATFORM_DRIVER         ehci_hcd_tilegx_driver
1267 #endif
1268
1269 #ifdef CONFIG_USB_EHCI_HCD_PMC_MSP
1270 #include "ehci-pmcmsp.c"
1271 #define PLATFORM_DRIVER         ehci_hcd_msp_driver
1272 #endif
1273
1274 #ifdef CONFIG_USB_EHCI_TEGRA
1275 #include "ehci-tegra.c"
1276 #define PLATFORM_DRIVER         tegra_ehci_driver
1277 #endif
1278
1279 #ifdef CONFIG_SPARC_LEON
1280 #include "ehci-grlib.c"
1281 #define PLATFORM_DRIVER         ehci_grlib_driver
1282 #endif
1283
1284 #ifdef CONFIG_USB_EHCI_MV
1285 #include "ehci-mv.c"
1286 #define        PLATFORM_DRIVER         ehci_mv_driver
1287 #endif
1288
1289 #ifdef CONFIG_MIPS_SEAD3
1290 #include "ehci-sead3.c"
1291 #define PLATFORM_DRIVER         ehci_hcd_sead3_driver
1292 #endif
1293
1294 static int __init ehci_hcd_init(void)
1295 {
1296         int retval = 0;
1297
1298         if (usb_disabled())
1299                 return -ENODEV;
1300
1301         printk(KERN_INFO "%s: " DRIVER_DESC "\n", hcd_name);
1302         set_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1303         if (test_bit(USB_UHCI_LOADED, &usb_hcds_loaded) ||
1304                         test_bit(USB_OHCI_LOADED, &usb_hcds_loaded))
1305                 printk(KERN_WARNING "Warning! ehci_hcd should always be loaded"
1306                                 " before uhci_hcd and ohci_hcd, not after\n");
1307
1308         pr_debug("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n",
1309                  hcd_name,
1310                  sizeof(struct ehci_qh), sizeof(struct ehci_qtd),
1311                  sizeof(struct ehci_itd), sizeof(struct ehci_sitd));
1312
1313 #ifdef DEBUG
1314         ehci_debug_root = debugfs_create_dir("ehci", usb_debug_root);
1315         if (!ehci_debug_root) {
1316                 retval = -ENOENT;
1317                 goto err_debug;
1318         }
1319 #endif
1320
1321 #ifdef PLATFORM_DRIVER
1322         retval = platform_driver_register(&PLATFORM_DRIVER);
1323         if (retval < 0)
1324                 goto clean0;
1325 #endif
1326
1327 #ifdef PS3_SYSTEM_BUS_DRIVER
1328         retval = ps3_ehci_driver_register(&PS3_SYSTEM_BUS_DRIVER);
1329         if (retval < 0)
1330                 goto clean2;
1331 #endif
1332
1333 #ifdef OF_PLATFORM_DRIVER
1334         retval = platform_driver_register(&OF_PLATFORM_DRIVER);
1335         if (retval < 0)
1336                 goto clean3;
1337 #endif
1338
1339 #ifdef XILINX_OF_PLATFORM_DRIVER
1340         retval = platform_driver_register(&XILINX_OF_PLATFORM_DRIVER);
1341         if (retval < 0)
1342                 goto clean4;
1343 #endif
1344         return retval;
1345
1346 #ifdef XILINX_OF_PLATFORM_DRIVER
1347         /* platform_driver_unregister(&XILINX_OF_PLATFORM_DRIVER); */
1348 clean4:
1349 #endif
1350 #ifdef OF_PLATFORM_DRIVER
1351         platform_driver_unregister(&OF_PLATFORM_DRIVER);
1352 clean3:
1353 #endif
1354 #ifdef PS3_SYSTEM_BUS_DRIVER
1355         ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1356 clean2:
1357 #endif
1358 #ifdef PLATFORM_DRIVER
1359         platform_driver_unregister(&PLATFORM_DRIVER);
1360 clean0:
1361 #endif
1362 #ifdef DEBUG
1363         debugfs_remove(ehci_debug_root);
1364         ehci_debug_root = NULL;
1365 err_debug:
1366 #endif
1367         clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1368         return retval;
1369 }
1370 module_init(ehci_hcd_init);
1371
1372 static void __exit ehci_hcd_cleanup(void)
1373 {
1374 #ifdef XILINX_OF_PLATFORM_DRIVER
1375         platform_driver_unregister(&XILINX_OF_PLATFORM_DRIVER);
1376 #endif
1377 #ifdef OF_PLATFORM_DRIVER
1378         platform_driver_unregister(&OF_PLATFORM_DRIVER);
1379 #endif
1380 #ifdef PLATFORM_DRIVER
1381         platform_driver_unregister(&PLATFORM_DRIVER);
1382 #endif
1383 #ifdef PS3_SYSTEM_BUS_DRIVER
1384         ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1385 #endif
1386 #ifdef DEBUG
1387         debugfs_remove(ehci_debug_root);
1388 #endif
1389         clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1390 }
1391 module_exit(ehci_hcd_cleanup);