drivers/usb/host/ehci-hcd.c

   1 /*
   2  * Enhanced Host Controller Interface (EHCI) driver for USB.
   3  *
   4  * Maintainer: Alan Stern <stern@rowland.harvard.edu>
   5  *
   6  * Copyright (c) 2000-2004 by David Brownell
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms of the GNU General Public License as published by the
  10  * Free Software Foundation; either version 2 of the License, or (at your
  11  * option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful, but
  14  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  15  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  16  * for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software Foundation,
  20  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  */
  22
  23 #include <linux/module.h>
  24 #include <linux/pci.h>
  25 #include <linux/dmapool.h>
  26 #include <linux/kernel.h>
  27 #include <linux/delay.h>
  28 #include <linux/ioport.h>
  29 #include <linux/sched.h>
  30 #include <linux/vmalloc.h>
  31 #include <linux/errno.h>
  32 #include <linux/init.h>
  33 #include <linux/hrtimer.h>
  34 #include <linux/list.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/usb.h>
  37 #include <linux/usb/hcd.h>
  38 #include <linux/moduleparam.h>
  39 #include <linux/dma-mapping.h>
  40 #include <linux/debugfs.h>
  41 #include <linux/slab.h>
  42
  43 #include <asm/byteorder.h>
  44 #include <asm/io.h>
  45 #include <asm/irq.h>
  46 #include <asm/unaligned.h>
  47
  48 #if defined(CONFIG_PPC_PS3)
  49 #include <asm/firmware.h>
  50 #endif
  51
  52 /*-------------------------------------------------------------------------*/
  53
  54 /*
  55  * EHCI hc_driver implementation ... experimental, incomplete.
  56  * Based on the final 1.0 register interface specification.
  57  *
  58  * USB 2.0 shows up in upcoming www.pcmcia.org technology.
  59  * First was PCMCIA, like ISA; then CardBus, which is PCI.
  60  * Next comes "CardBay", using USB 2.0 signals.
  61  *
  62  * Contains additional contributions by Brad Hards, Rory Bolt, and others.
  63  * Special thanks to Intel and VIA for providing host controllers to
  64  * test this driver on, and Cypress (including In-System Design) for
  65  * providing early devices for those host controllers to talk to!
  66  */
  67
  68 #define DRIVER_AUTHOR "David Brownell"
  69 #define DRIVER_DESC "USB 2.0 'Enhanced' Host Controller (EHCI) Driver"
  70
  71 static const char       hcd_name [] = "ehci_hcd";
  72
  73
  74 #undef VERBOSE_DEBUG
  75 #undef EHCI_URB_TRACE
  76
  77 /* magic numbers that can affect system performance */
  78 #define EHCI_TUNE_CERR          3       /* 0-3 qtd retries; 0 == don't stop */
  79 #define EHCI_TUNE_RL_HS         4       /* nak throttle; see 4.9 */
  80 #define EHCI_TUNE_RL_TT         0
  81 #define EHCI_TUNE_MULT_HS       1       /* 1-3 transactions/uframe; 4.10.3 */
  82 #define EHCI_TUNE_MULT_TT       1
  83 /*
  84  * Some drivers think it's safe to schedule isochronous transfers more than
  85  * 256 ms into the future (partly as a result of an old bug in the scheduling
  86  * code).  In an attempt to avoid trouble, we will use a minimum scheduling
  87  * length of 512 frames instead of 256.
  88  */
  89 #define EHCI_TUNE_FLS           1       /* (medium) 512-frame schedule */
  90
  91 /* Initial IRQ latency:  faster than hw default */
  92 static int log2_irq_thresh = 0;         // 0 to 6
  93 module_param (log2_irq_thresh, int, S_IRUGO);
  94 MODULE_PARM_DESC (log2_irq_thresh, "log2 IRQ latency, 1-64 microframes");
  95
  96 /* initial park setting:  slower than hw default */
  97 static unsigned park = 0;
  98 module_param (park, uint, S_IRUGO);
  99 MODULE_PARM_DESC (park, "park setting; 1-3 back-to-back async packets");
 100
 101 /* for flakey hardware, ignore overcurrent indicators */
 102 static bool ignore_oc = 0;
 103 module_param (ignore_oc, bool, S_IRUGO);
 104 MODULE_PARM_DESC (ignore_oc, "ignore bogus hardware overcurrent indications");
 105
 106 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
 107
 108 /*-------------------------------------------------------------------------*/
 109
 110 #include "ehci.h"
 111 #include "pci-quirks.h"
 112
 113 /*
 114  * The MosChip MCS9990 controller updates its microframe counter
 115  * a little before the frame counter, and occasionally we will read
 116  * the invalid intermediate value.  Avoid problems by checking the
 117  * microframe number (the low-order 3 bits); if they are 0 then
 118  * re-read the register to get the correct value.
 119  */
 120 static unsigned ehci_moschip_read_frame_index(struct ehci_hcd *ehci)
 121 {
 122         unsigned uf;
 123
 124         uf = ehci_readl(ehci, &ehci->regs->frame_index);
 125         if (unlikely((uf & 7) == 0))
 126                 uf = ehci_readl(ehci, &ehci->regs->frame_index);
 127         return uf;
 128 }
 129
 130 static inline unsigned ehci_read_frame_index(struct ehci_hcd *ehci)
 131 {
 132         if (ehci->frame_index_bug)
 133                 return ehci_moschip_read_frame_index(ehci);
 134         return ehci_readl(ehci, &ehci->regs->frame_index);
 135 }
 136
 137 #include "ehci-dbg.c"
 138
 139 /*-------------------------------------------------------------------------*/
 140
 141 /*
 142  * handshake - spin reading hc until handshake completes or fails
 143  * @ptr: address of hc register to be read
 144  * @mask: bits to look at in result of read
 145  * @done: value of those bits when handshake succeeds
 146  * @usec: timeout in microseconds
 147  *
 148  * Returns negative errno, or zero on success
 149  *
 150  * Success happens when the "mask" bits have the specified value (hardware
 151  * handshake done).  There are two failure modes:  "usec" have passed (major
 152  * hardware flakeout), or the register reads as all-ones (hardware removed).
 153  *
 154  * That last failure should_only happen in cases like physical cardbus eject
 155  * before driver shutdown. But it also seems to be caused by bugs in cardbus
 156  * bridge shutdown:  shutting down the bridge before the devices using it.
 157  */
 158 static int handshake (struct ehci_hcd *ehci, void __iomem *ptr,
 159                       u32 mask, u32 done, int usec)
 160 {
 161         u32     result;
 162
 163         do {
 164                 result = ehci_readl(ehci, ptr);
 165                 if (result == ~(u32)0)          /* card removed */
 166                         return -ENODEV;
 167                 result &= mask;
 168                 if (result == done)
 169                         return 0;
 170                 udelay (1);
 171                 usec--;
 172         } while (usec > 0);
 173         return -ETIMEDOUT;
 174 }
 175
 176 /* check TDI/ARC silicon is in host mode */
 177 static int tdi_in_host_mode (struct ehci_hcd *ehci)
 178 {
 179         u32             tmp;
 180
 181         tmp = ehci_readl(ehci, &ehci->regs->usbmode);
 182         return (tmp & 3) == USBMODE_CM_HC;
 183 }
 184
 185 /*
 186  * Force HC to halt state from unknown (EHCI spec section 2.3).
 187  * Must be called with interrupts enabled and the lock not held.
 188  */
 189 static int ehci_halt (struct ehci_hcd *ehci)
 190 {
 191         u32     temp;
 192
 193         spin_lock_irq(&ehci->lock);
 194
 195         /* disable any irqs left enabled by previous code */
 196         ehci_writel(ehci, 0, &ehci->regs->intr_enable);
 197
 198         if (ehci_is_TDI(ehci) && !tdi_in_host_mode(ehci)) {
 199                 spin_unlock_irq(&ehci->lock);
 200                 return 0;
 201         }
 202
 203         /*
 204          * This routine gets called during probe before ehci->command
 205          * has been initialized, so we can't rely on its value.
 206          */
 207         ehci->command &= ~CMD_RUN;
 208         temp = ehci_readl(ehci, &ehci->regs->command);
 209         temp &= ~(CMD_RUN | CMD_IAAD);
 210         ehci_writel(ehci, temp, &ehci->regs->command);
 211
 212         spin_unlock_irq(&ehci->lock);
 213         synchronize_irq(ehci_to_hcd(ehci)->irq);
 214
 215         return handshake(ehci, &ehci->regs->status,
 216                           STS_HALT, STS_HALT, 16 * 125);
 217 }
 218
 219 /* put TDI/ARC silicon into EHCI mode */
 220 static void tdi_reset (struct ehci_hcd *ehci)
 221 {
 222         u32             tmp;
 223
 224         tmp = ehci_readl(ehci, &ehci->regs->usbmode);
 225         tmp |= USBMODE_CM_HC;
 226         /* The default byte access to MMR space is LE after
 227          * controller reset. Set the required endian mode
 228          * for transfer buffers to match the host microprocessor
 229          */
 230         if (ehci_big_endian_mmio(ehci))
 231                 tmp |= USBMODE_BE;
 232         ehci_writel(ehci, tmp, &ehci->regs->usbmode);
 233 }
 234
 235 /*
 236  * Reset a non-running (STS_HALT == 1) controller.
 237  * Must be called with interrupts enabled and the lock not held.
 238  */
 239 static int ehci_reset (struct ehci_hcd *ehci)
 240 {
 241         int     retval;
 242         u32     command = ehci_readl(ehci, &ehci->regs->command);
 243
 244         /* If the EHCI debug controller is active, special care must be
 245          * taken before and after a host controller reset */
 246         if (ehci->debug && !dbgp_reset_prep(ehci_to_hcd(ehci)))
 247                 ehci->debug = NULL;
 248
 249         command |= CMD_RESET;
 250         dbg_cmd (ehci, "reset", command);
 251         ehci_writel(ehci, command, &ehci->regs->command);
 252         ehci->rh_state = EHCI_RH_HALTED;
 253         ehci->next_statechange = jiffies;
 254         retval = handshake (ehci, &ehci->regs->command,
 255                             CMD_RESET, 0, 250 * 1000);
 256
 257         if (ehci->has_hostpc) {
 258                 ehci_writel(ehci, USBMODE_EX_HC | USBMODE_EX_VBPS,
 259                                 &ehci->regs->usbmode_ex);
 260                 ehci_writel(ehci, TXFIFO_DEFAULT, &ehci->regs->txfill_tuning);
 261         }
 262         if (retval)
 263                 return retval;
 264
 265         if (ehci_is_TDI(ehci))
 266                 tdi_reset (ehci);
 267
 268         if (ehci->debug)
 269                 dbgp_external_startup(ehci_to_hcd(ehci));
 270
 271         ehci->port_c_suspend = ehci->suspended_ports =
 272                         ehci->resuming_ports = 0;
 273         return retval;
 274 }
 275
 276 /*
 277  * Idle the controller (turn off the schedules).
 278  * Must be called with interrupts enabled and the lock not held.
 279  */
 280 static void ehci_quiesce (struct ehci_hcd *ehci)
 281 {
 282         u32     temp;
 283
 284         if (ehci->rh_state != EHCI_RH_RUNNING)
 285                 return;
 286
 287         /* wait for any schedule enables/disables to take effect */
 288         temp = (ehci->command << 10) & (STS_ASS | STS_PSS);
 289         handshake(ehci, &ehci->regs->status, STS_ASS | STS_PSS, temp, 16 * 125);
 290
 291         /* then disable anything that's still active */
 292         spin_lock_irq(&ehci->lock);
 293         ehci->command &= ~(CMD_ASE | CMD_PSE);
 294         ehci_writel(ehci, ehci->command, &ehci->regs->command);
 295         spin_unlock_irq(&ehci->lock);
 296
 297         /* hardware can take 16 microframes to turn off ... */
 298         handshake(ehci, &ehci->regs->status, STS_ASS | STS_PSS, 0, 16 * 125);
 299 }
 300
 301 /*-------------------------------------------------------------------------*/
 302
 303 static void end_unlink_async(struct ehci_hcd *ehci);
 304 static void unlink_empty_async(struct ehci_hcd *ehci);
 305 static void ehci_work(struct ehci_hcd *ehci);
 306 static void start_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh);
 307 static void end_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh);
 308
 309 #include "ehci-timer.c"
 310 #include "ehci-hub.c"
 311 #include "ehci-mem.c"
 312 #include "ehci-q.c"
 313 #include "ehci-sched.c"
 314 #include "ehci-sysfs.c"
 315
 316 /*-------------------------------------------------------------------------*/
 317
 318 /* On some systems, leaving remote wakeup enabled prevents system shutdown.
 319  * The firmware seems to think that powering off is a wakeup event!
 320  * This routine turns off remote wakeup and everything else, on all ports.
 321  */
 322 static void ehci_turn_off_all_ports(struct ehci_hcd *ehci)
 323 {
 324         int     port = HCS_N_PORTS(ehci->hcs_params);
 325
 326         while (port--)
 327                 ehci_writel(ehci, PORT_RWC_BITS,
 328                                 &ehci->regs->port_status[port]);
 329 }
 330
 331 /*
 332  * Halt HC, turn off all ports, and let the BIOS use the companion controllers.
 333  * Must be called with interrupts enabled and the lock not held.
 334  */
 335 static void ehci_silence_controller(struct ehci_hcd *ehci)
 336 {
 337         ehci_halt(ehci);
 338
 339         spin_lock_irq(&ehci->lock);
 340         ehci->rh_state = EHCI_RH_HALTED;
 341         ehci_turn_off_all_ports(ehci);
 342
 343         /* make BIOS/etc use companion controller during reboot */
 344         ehci_writel(ehci, 0, &ehci->regs->configured_flag);
 345
 346         /* unblock posted writes */
 347         ehci_readl(ehci, &ehci->regs->configured_flag);
 348         spin_unlock_irq(&ehci->lock);
 349 }
 350
 351 /* ehci_shutdown kick in for silicon on any bus (not just pci, etc).
 352  * This forcibly disables dma and IRQs, helping kexec and other cases
 353  * where the next system software may expect clean state.
 354  */
 355 static void ehci_shutdown(struct usb_hcd *hcd)
 356 {
 357         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 358
 359         spin_lock_irq(&ehci->lock);
 360         ehci->shutdown = true;
 361         ehci->rh_state = EHCI_RH_STOPPING;
 362         ehci->enabled_hrtimer_events = 0;
 363         spin_unlock_irq(&ehci->lock);
 364
 365         ehci_silence_controller(ehci);
 366
 367         hrtimer_cancel(&ehci->hrtimer);
 368 }
 369
 370 /*-------------------------------------------------------------------------*/
 371
 372 /*
 373  * ehci_work is called from some interrupts, timers, and so on.
 374  * it calls driver completion functions, after dropping ehci->lock.
 375  */
 376 static void ehci_work (struct ehci_hcd *ehci)
 377 {
 378         /* another CPU may drop ehci->lock during a schedule scan while
 379          * it reports urb completions.  this flag guards against bogus
 380          * attempts at re-entrant schedule scanning.
 381          */
 382         if (ehci->scanning) {
 383                 ehci->need_rescan = true;
 384                 return;
 385         }
 386         ehci->scanning = true;
 387
 388  rescan:
 389         ehci->need_rescan = false;
 390         if (ehci->async_count)
 391                 scan_async(ehci);
 392         if (ehci->intr_count > 0)
 393                 scan_intr(ehci);
 394         if (ehci->isoc_count > 0)
 395                 scan_isoc(ehci);
 396         if (ehci->need_rescan)
 397                 goto rescan;
 398         ehci->scanning = false;
 399
 400         /* the IO watchdog guards against hardware or driver bugs that
 401          * misplace IRQs, and should let us run completely without IRQs.
 402          * such lossage has been observed on both VT6202 and VT8235.
 403          */
 404         turn_on_io_watchdog(ehci);
 405 }
 406
 407 /*
 408  * Called when the ehci_hcd module is removed.
 409  */
 410 static void ehci_stop (struct usb_hcd *hcd)
 411 {
 412         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 413
 414         ehci_dbg (ehci, "stop\n");
 415
 416         /* no more interrupts ... */
 417
 418         spin_lock_irq(&ehci->lock);
 419         ehci->enabled_hrtimer_events = 0;
 420         spin_unlock_irq(&ehci->lock);
 421
 422         ehci_quiesce(ehci);
 423         ehci_silence_controller(ehci);
 424         ehci_reset (ehci);
 425
 426         hrtimer_cancel(&ehci->hrtimer);
 427         remove_sysfs_files(ehci);
 428         remove_debug_files (ehci);
 429
 430         /* root hub is shut down separately (first, when possible) */
 431         spin_lock_irq (&ehci->lock);
 432         end_free_itds(ehci);
 433         spin_unlock_irq (&ehci->lock);
 434         ehci_mem_cleanup (ehci);
 435
 436         if (ehci->amd_pll_fix == 1)
 437                 usb_amd_dev_put();
 438
 439 #ifdef  EHCI_STATS
 440         ehci_dbg(ehci, "irq normal %ld err %ld iaa %ld (lost %ld)\n",
 441                 ehci->stats.normal, ehci->stats.error, ehci->stats.iaa,
 442                 ehci->stats.lost_iaa);
 443         ehci_dbg (ehci, "complete %ld unlink %ld\n",
 444                 ehci->stats.complete, ehci->stats.unlink);
 445 #endif
 446
 447         dbg_status (ehci, "ehci_stop completed",
 448                     ehci_readl(ehci, &ehci->regs->status));
 449 }
 450
 451 /* one-time init, only for memory state */
 452 static int ehci_init(struct usb_hcd *hcd)
 453 {
 454         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
 455         u32                     temp;
 456         int                     retval;
 457         u32                     hcc_params;
 458         struct ehci_qh_hw       *hw;
 459
 460         spin_lock_init(&ehci->lock);
 461
 462         /*
 463          * keep io watchdog by default, those good HCDs could turn off it later
 464          */
 465         ehci->need_io_watchdog = 1;
 466
 467         hrtimer_init(&ehci->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
 468         ehci->hrtimer.function = ehci_hrtimer_func;
 469         ehci->next_hrtimer_event = EHCI_HRTIMER_NO_EVENT;
 470
 471         hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
 472
 473         /*
 474          * by default set standard 80% (== 100 usec/uframe) max periodic
 475          * bandwidth as required by USB 2.0
 476          */
 477         ehci->uframe_periodic_max = 100;
 478
 479         /*
 480          * hw default: 1K periodic list heads, one per frame.
 481          * periodic_size can shrink by USBCMD update if hcc_params allows.
 482          */
 483         ehci->periodic_size = DEFAULT_I_TDPS;
 484         INIT_LIST_HEAD(&ehci->intr_qh_list);
 485         INIT_LIST_HEAD(&ehci->cached_itd_list);
 486         INIT_LIST_HEAD(&ehci->cached_sitd_list);
 487
 488         if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
 489                 /* periodic schedule size can be smaller than default */
 490                 switch (EHCI_TUNE_FLS) {
 491                 case 0: ehci->periodic_size = 1024; break;
 492                 case 1: ehci->periodic_size = 512; break;
 493                 case 2: ehci->periodic_size = 256; break;
 494                 default:        BUG();
 495                 }
 496         }
 497         if ((retval = ehci_mem_init(ehci, GFP_KERNEL)) < 0)
 498                 return retval;
 499
 500         /* controllers may cache some of the periodic schedule ... */
 501         if (HCC_ISOC_CACHE(hcc_params))         // full frame cache
 502                 ehci->i_thresh = 0;
 503         else                                    // N microframes cached
 504                 ehci->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
 505
 506         /*
 507          * dedicate a qh for the async ring head, since we couldn't unlink
 508          * a 'real' qh without stopping the async schedule [4.8].  use it
 509          * as the 'reclamation list head' too.
 510          * its dummy is used in hw_alt_next of many tds, to prevent the qh
 511          * from automatically advancing to the next td after short reads.
 512          */
 513         ehci->async->qh_next.qh = NULL;
 514         hw = ehci->async->hw;
 515         hw->hw_next = QH_NEXT(ehci, ehci->async->qh_dma);
 516         hw->hw_info1 = cpu_to_hc32(ehci, QH_HEAD);
 517 #if defined(CONFIG_PPC_PS3)
 518         hw->hw_info1 |= cpu_to_hc32(ehci, QH_INACTIVATE);
 519 #endif
 520         hw->hw_token = cpu_to_hc32(ehci, QTD_STS_HALT);
 521         hw->hw_qtd_next = EHCI_LIST_END(ehci);
 522         ehci->async->qh_state = QH_STATE_LINKED;
 523         hw->hw_alt_next = QTD_NEXT(ehci, ehci->async->dummy->qtd_dma);
 524
 525         /* clear interrupt enables, set irq latency */
 526         if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
 527                 log2_irq_thresh = 0;
 528         temp = 1 << (16 + log2_irq_thresh);
 529         if (HCC_PER_PORT_CHANGE_EVENT(hcc_params)) {
 530                 ehci->has_ppcd = 1;
 531                 ehci_dbg(ehci, "enable per-port change event\n");
 532                 temp |= CMD_PPCEE;
 533         }
 534         if (HCC_CANPARK(hcc_params)) {
 535                 /* HW default park == 3, on hardware that supports it (like
 536                  * NVidia and ALI silicon), maximizes throughput on the async
 537                  * schedule by avoiding QH fetches between transfers.
 538                  *
 539                  * With fast usb storage devices and NForce2, "park" seems to
 540                  * make problems:  throughput reduction (!), data errors...
 541                  */
 542                 if (park) {
 543                         park = min(park, (unsigned) 3);
 544                         temp |= CMD_PARK;
 545                         temp |= park << 8;
 546                 }
 547                 ehci_dbg(ehci, "park %d\n", park);
 548         }
 549         if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
 550                 /* periodic schedule size can be smaller than default */
 551                 temp &= ~(3 << 2);
 552                 temp |= (EHCI_TUNE_FLS << 2);
 553         }
 554         ehci->command = temp;
 555
 556         /* Accept arbitrarily long scatter-gather lists */
 557         if (!(hcd->driver->flags & HCD_LOCAL_MEM))
 558                 hcd->self.sg_tablesize = ~0;
 559         return 0;
 560 }
 561
 562 /* start HC running; it's halted, ehci_init() has been run (once) */
 563 static int ehci_run (struct usb_hcd *hcd)
 564 {
 565         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 566         u32                     temp;
 567         u32                     hcc_params;
 568
 569         hcd->uses_new_polling = 1;
 570
 571         /* EHCI spec section 4.1 */
 572
 573         ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list);
 574         ehci_writel(ehci, (u32)ehci->async->qh_dma, &ehci->regs->async_next);
 575
 576         /*
 577          * hcc_params controls whether ehci->regs->segment must (!!!)
 578          * be used; it constrains QH/ITD/SITD and QTD locations.
 579          * pci_pool consistent memory always uses segment zero.
 580          * streaming mappings for I/O buffers, like pci_map_single(),
 581          * can return segments above 4GB, if the device allows.
 582          *
 583          * NOTE:  the dma mask is visible through dma_supported(), so
 584          * drivers can pass this info along ... like NETIF_F_HIGHDMA,
 585          * Scsi_Host.highmem_io, and so forth.  It's readonly to all
 586          * host side drivers though.
 587          */
 588         hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
 589         if (HCC_64BIT_ADDR(hcc_params)) {
 590                 ehci_writel(ehci, 0, &ehci->regs->segment);
 591 #if 0
 592 // this is deeply broken on almost all architectures
 593                 if (!dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64)))
 594                         ehci_info(ehci, "enabled 64bit DMA\n");
 595 #endif
 596         }
 597
 598
 599         // Philips, Intel, and maybe others need CMD_RUN before the
 600         // root hub will detect new devices (why?); NEC doesn't
 601         ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
 602         ehci->command |= CMD_RUN;
 603         ehci_writel(ehci, ehci->command, &ehci->regs->command);
 604         dbg_cmd (ehci, "init", ehci->command);
 605
 606         /*
 607          * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
 608          * are explicitly handed to companion controller(s), so no TT is
 609          * involved with the root hub.  (Except where one is integrated,
 610          * and there's no companion controller unless maybe for USB OTG.)
 611          *
 612          * Turning on the CF flag will transfer ownership of all ports
 613          * from the companions to the EHCI controller.  If any of the
 614          * companions are in the middle of a port reset at the time, it
 615          * could cause trouble.  Write-locking ehci_cf_port_reset_rwsem
 616          * guarantees that no resets are in progress.  After we set CF,
 617          * a short delay lets the hardware catch up; new resets shouldn't
 618          * be started before the port switching actions could complete.
 619          */
 620         down_write(&ehci_cf_port_reset_rwsem);
 621         ehci->rh_state = EHCI_RH_RUNNING;
 622         ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
 623         ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
 624         msleep(5);
 625         up_write(&ehci_cf_port_reset_rwsem);
 626         ehci->last_periodic_enable = ktime_get_real();
 627
 628         temp = HC_VERSION(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
 629         ehci_info (ehci,
 630                 "USB %x.%x started, EHCI %x.%02x%s\n",
 631                 ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f),
 632                 temp >> 8, temp & 0xff,
 633                 ignore_oc ? ", overcurrent ignored" : "");
 634
 635         ehci_writel(ehci, INTR_MASK,
 636                     &ehci->regs->intr_enable); /* Turn On Interrupts */
 637
 638         /* GRR this is run-once init(), being done every time the HC starts.
 639          * So long as they're part of class devices, we can't do it init()
 640          * since the class device isn't created that early.
 641          */
 642         create_debug_files(ehci);
 643         create_sysfs_files(ehci);
 644
 645         return 0;
 646 }
 647
 648 int ehci_setup(struct usb_hcd *hcd)
 649 {
 650         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 651         int retval;
 652
 653         ehci->regs = (void __iomem *)ehci->caps +
 654             HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
 655         dbg_hcs_params(ehci, "reset");
 656         dbg_hcc_params(ehci, "reset");
 657
 658         /* cache this readonly data; minimize chip reads */
 659         ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
 660
 661         ehci->sbrn = HCD_USB2;
 662
 663         /* data structure init */
 664         retval = ehci_init(hcd);
 665         if (retval)
 666                 return retval;
 667
 668         retval = ehci_halt(ehci);
 669         if (retval)
 670                 return retval;
 671
 672         if (ehci_is_TDI(ehci))
 673                 tdi_reset(ehci);
 674
 675         ehci_reset(ehci);
 676
 677         return 0;
 678 }
 679 EXPORT_SYMBOL_GPL(ehci_setup);
 680
 681 /*-------------------------------------------------------------------------*/
 682
 683 static irqreturn_t ehci_irq (struct usb_hcd *hcd)
 684 {
 685         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 686         u32                     status, masked_status, pcd_status = 0, cmd;
 687         int                     bh;
 688
 689         spin_lock (&ehci->lock);
 690
 691         status = ehci_readl(ehci, &ehci->regs->status);
 692
 693         /* e.g. cardbus physical eject */
 694         if (status == ~(u32) 0) {
 695                 ehci_dbg (ehci, "device removed\n");
 696                 goto dead;
 697         }
 698
 699         /*
 700          * We don't use STS_FLR, but some controllers don't like it to
 701          * remain on, so mask it out along with the other status bits.
 702          */
 703         masked_status = status & (INTR_MASK | STS_FLR);
 704
 705         /* Shared IRQ? */
 706         if (!masked_status || unlikely(ehci->rh_state == EHCI_RH_HALTED)) {
 707                 spin_unlock(&ehci->lock);
 708                 return IRQ_NONE;
 709         }
 710
 711         /* clear (just) interrupts */
 712         ehci_writel(ehci, masked_status, &ehci->regs->status);
 713         cmd = ehci_readl(ehci, &ehci->regs->command);
 714         bh = 0;
 715
 716 #ifdef  VERBOSE_DEBUG
 717         /* unrequested/ignored: Frame List Rollover */
 718         dbg_status (ehci, "irq", status);
 719 #endif
 720
 721         /* INT, ERR, and IAA interrupt rates can be throttled */
 722
 723         /* normal [4.15.1.2] or error [4.15.1.1] completion */
 724         if (likely ((status & (STS_INT|STS_ERR)) != 0)) {
 725                 if (likely ((status & STS_ERR) == 0))
 726                         COUNT (ehci->stats.normal);
 727                 else
 728                         COUNT (ehci->stats.error);
 729                 bh = 1;
 730         }
 731
 732         /* complete the unlinking of some qh [4.15.2.3] */
 733         if (status & STS_IAA) {
 734
 735                 /* Turn off the IAA watchdog */
 736                 ehci->enabled_hrtimer_events &= ~BIT(EHCI_HRTIMER_IAA_WATCHDOG);
 737
 738                 /*
 739                  * Mild optimization: Allow another IAAD to reset the
 740                  * hrtimer, if one occurs before the next expiration.
 741                  * In theory we could always cancel the hrtimer, but
 742                  * tests show that about half the time it will be reset
 743                  * for some other event anyway.
 744                  */
 745                 if (ehci->next_hrtimer_event == EHCI_HRTIMER_IAA_WATCHDOG)
 746                         ++ehci->next_hrtimer_event;
 747
 748                 /* guard against (alleged) silicon errata */
 749                 if (cmd & CMD_IAAD)
 750                         ehci_dbg(ehci, "IAA with IAAD still set?\n");
 751                 if (ehci->async_iaa)
 752                         COUNT(ehci->stats.iaa);
 753                 end_unlink_async(ehci);
 754         }
 755
 756         /* remote wakeup [4.3.1] */
 757         if (status & STS_PCD) {
 758                 unsigned        i = HCS_N_PORTS (ehci->hcs_params);
 759                 u32             ppcd = 0;
 760
 761                 /* kick root hub later */
 762                 pcd_status = status;
 763
 764                 /* resume root hub? */
 765                 if (ehci->rh_state == EHCI_RH_SUSPENDED)
 766                         usb_hcd_resume_root_hub(hcd);
 767
 768                 /* get per-port change detect bits */
 769                 if (ehci->has_ppcd)
 770                         ppcd = status >> 16;
 771
 772                 while (i--) {
 773                         int pstatus;
 774
 775                         /* leverage per-port change bits feature */
 776                         if (ehci->has_ppcd && !(ppcd & (1 << i)))
 777                                 continue;
 778                         pstatus = ehci_readl(ehci,
 779                                          &ehci->regs->port_status[i]);
 780
 781                         if (pstatus & PORT_OWNER)
 782                                 continue;
 783                         if (!(test_bit(i, &ehci->suspended_ports) &&
 784                                         ((pstatus & PORT_RESUME) ||
 785                                                 !(pstatus & PORT_SUSPEND)) &&
 786                                         (pstatus & PORT_PE) &&
 787                                         ehci->reset_done[i] == 0))
 788                                 continue;
 789
 790                         /* start 20 msec resume signaling from this port,
 791                          * and make khubd collect PORT_STAT_C_SUSPEND to
 792                          * stop that signaling.  Use 5 ms extra for safety,
 793                          * like usb_port_resume() does.
 794                          */
 795                         ehci->reset_done[i] = jiffies + msecs_to_jiffies(25);
 796                         set_bit(i, &ehci->resuming_ports);
 797                         ehci_dbg (ehci, "port %d remote wakeup\n", i + 1);
 798                         usb_hcd_start_port_resume(&hcd->self, i);
 799                         mod_timer(&hcd->rh_timer, ehci->reset_done[i]);
 800                 }
 801         }
 802
 803         /* PCI errors [4.15.2.4] */
 804         if (unlikely ((status & STS_FATAL) != 0)) {
 805                 ehci_err(ehci, "fatal error\n");
 806                 dbg_cmd(ehci, "fatal", cmd);
 807                 dbg_status(ehci, "fatal", status);
 808 dead:
 809                 usb_hc_died(hcd);
 810
 811                 /* Don't let the controller do anything more */
 812                 ehci->shutdown = true;
 813                 ehci->rh_state = EHCI_RH_STOPPING;
 814                 ehci->command &= ~(CMD_RUN | CMD_ASE | CMD_PSE);
 815                 ehci_writel(ehci, ehci->command, &ehci->regs->command);
 816                 ehci_writel(ehci, 0, &ehci->regs->intr_enable);
 817                 ehci_handle_controller_death(ehci);
 818
 819                 /* Handle completions when the controller stops */
 820                 bh = 0;
 821         }
 822
 823         if (bh)
 824                 ehci_work (ehci);
 825         spin_unlock (&ehci->lock);
 826         if (pcd_status)
 827                 usb_hcd_poll_rh_status(hcd);
 828         return IRQ_HANDLED;
 829 }
 830
 831 /*-------------------------------------------------------------------------*/
 832
 833 /*
 834  * non-error returns are a promise to giveback() the urb later
 835  * we drop ownership so next owner (or urb unlink) can get it
 836  *
 837  * urb + dev is in hcd.self.controller.urb_list
 838  * we're queueing TDs onto software and hardware lists
 839  *
 840  * hcd-specific init for hcpriv hasn't been done yet
 841  *
 842  * NOTE:  control, bulk, and interrupt share the same code to append TDs
 843  * to a (possibly active) QH, and the same QH scanning code.
 844  */
 845 static int ehci_urb_enqueue (
 846         struct usb_hcd  *hcd,
 847         struct urb      *urb,
 848         gfp_t           mem_flags
 849 ) {
 850         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 851         struct list_head        qtd_list;
 852
 853         INIT_LIST_HEAD (&qtd_list);
 854
 855         switch (usb_pipetype (urb->pipe)) {
 856         case PIPE_CONTROL:
 857                 /* qh_completions() code doesn't handle all the fault cases
 858                  * in multi-TD control transfers.  Even 1KB is rare anyway.
 859                  */
 860                 if (urb->transfer_buffer_length > (16 * 1024))
 861                         return -EMSGSIZE;
 862                 /* FALLTHROUGH */
 863         /* case PIPE_BULK: */
 864         default:
 865                 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
 866                         return -ENOMEM;
 867                 return submit_async(ehci, urb, &qtd_list, mem_flags);
 868
 869         case PIPE_INTERRUPT:
 870                 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
 871                         return -ENOMEM;
 872                 return intr_submit(ehci, urb, &qtd_list, mem_flags);
 873
 874         case PIPE_ISOCHRONOUS:
 875                 if (urb->dev->speed == USB_SPEED_HIGH)
 876                         return itd_submit (ehci, urb, mem_flags);
 877                 else
 878                         return sitd_submit (ehci, urb, mem_flags);
 879         }
 880 }
 881
 882 /* remove from hardware lists
 883  * completions normally happen asynchronously
 884  */
 885
 886 static int ehci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
 887 {
 888         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 889         struct ehci_qh          *qh;
 890         unsigned long           flags;
 891         int                     rc;
 892
 893         spin_lock_irqsave (&ehci->lock, flags);
 894         rc = usb_hcd_check_unlink_urb(hcd, urb, status);
 895         if (rc)
 896                 goto done;
 897
 898         switch (usb_pipetype (urb->pipe)) {
 899         // case PIPE_CONTROL:
 900         // case PIPE_BULK:
 901         default:
 902                 qh = (struct ehci_qh *) urb->hcpriv;
 903                 if (!qh)
 904                         break;
 905                 switch (qh->qh_state) {
 906                 case QH_STATE_LINKED:
 907                 case QH_STATE_COMPLETING:
 908                         start_unlink_async(ehci, qh);
 909                         break;
 910                 case QH_STATE_UNLINK:
 911                 case QH_STATE_UNLINK_WAIT:
 912                         /* already started */
 913                         break;
 914                 case QH_STATE_IDLE:
 915                         /* QH might be waiting for a Clear-TT-Buffer */
 916                         qh_completions(ehci, qh);
 917                         break;
 918                 }
 919                 break;
 920
 921         case PIPE_INTERRUPT:
 922                 qh = (struct ehci_qh *) urb->hcpriv;
 923                 if (!qh)
 924                         break;
 925                 switch (qh->qh_state) {
 926                 case QH_STATE_LINKED:
 927                 case QH_STATE_COMPLETING:
 928                         start_unlink_intr(ehci, qh);
 929                         break;
 930                 case QH_STATE_IDLE:
 931                         qh_completions (ehci, qh);
 932                         break;
 933                 default:
 934                         ehci_dbg (ehci, "bogus qh %p state %d\n",
 935                                         qh, qh->qh_state);
 936                         goto done;
 937                 }
 938                 break;
 939
 940         case PIPE_ISOCHRONOUS:
 941                 // itd or sitd ...
 942
 943                 // wait till next completion, do it then.
 944                 // completion irqs can wait up to 1024 msec,
 945                 break;
 946         }
 947 done:
 948         spin_unlock_irqrestore (&ehci->lock, flags);
 949         return rc;
 950 }
 951
 952 /*-------------------------------------------------------------------------*/
 953
 954 // bulk qh holds the data toggle
 955
 956 static void
 957 ehci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
 958 {
 959         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 960         unsigned long           flags;
 961         struct ehci_qh          *qh, *tmp;
 962
 963         /* ASSERT:  any requests/urbs are being unlinked */
 964         /* ASSERT:  nobody can be submitting urbs for this any more */
 965
 966 rescan:
 967         spin_lock_irqsave (&ehci->lock, flags);
 968         qh = ep->hcpriv;
 969         if (!qh)
 970                 goto done;
 971
 972         /* endpoints can be iso streams.  for now, we don't
 973          * accelerate iso completions ... so spin a while.
 974          */
 975         if (qh->hw == NULL) {
 976                 struct ehci_iso_stream  *stream = ep->hcpriv;
 977
 978                 if (!list_empty(&stream->td_list))
 979                         goto idle_timeout;
 980
 981                 /* BUG_ON(!list_empty(&stream->free_list)); */
 982                 kfree(stream);
 983                 goto done;
 984         }
 985
 986         if (ehci->rh_state < EHCI_RH_RUNNING)
 987                 qh->qh_state = QH_STATE_IDLE;
 988         switch (qh->qh_state) {
 989         case QH_STATE_LINKED:
 990         case QH_STATE_COMPLETING:
 991                 for (tmp = ehci->async->qh_next.qh;
 992                                 tmp && tmp != qh;
 993                                 tmp = tmp->qh_next.qh)
 994                         continue;
 995                 /* periodic qh self-unlinks on empty, and a COMPLETING qh
 996                  * may already be unlinked.
 997                  */
 998                 if (tmp)
 999                         start_unlink_async(ehci, qh);
1000                 /* FALL THROUGH */
1001         case QH_STATE_UNLINK:           /* wait for hw to finish? */
1002         case QH_STATE_UNLINK_WAIT:
1003 idle_timeout:
1004                 spin_unlock_irqrestore (&ehci->lock, flags);
1005                 schedule_timeout_uninterruptible(1);
1006                 goto rescan;
1007         case QH_STATE_IDLE:             /* fully unlinked */
1008                 if (qh->clearing_tt)
1009                         goto idle_timeout;
1010                 if (list_empty (&qh->qtd_list)) {
1011                         qh_destroy(ehci, qh);
1012                         break;
1013                 }
1014                 /* else FALL THROUGH */
1015         default:
1016                 /* caller was supposed to have unlinked any requests;
1017                  * that's not our job.  just leak this memory.
1018                  */
1019                 ehci_err (ehci, "qh %p (#%02x) state %d%s\n",
1020                         qh, ep->desc.bEndpointAddress, qh->qh_state,
1021                         list_empty (&qh->qtd_list) ? "" : "(has tds)");
1022                 break;
1023         }
1024  done:
1025         ep->hcpriv = NULL;
1026         spin_unlock_irqrestore (&ehci->lock, flags);
1027 }
1028
1029 static void
1030 ehci_endpoint_reset(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
1031 {
1032         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1033         struct ehci_qh          *qh;
1034         int                     eptype = usb_endpoint_type(&ep->desc);
1035         int                     epnum = usb_endpoint_num(&ep->desc);
1036         int                     is_out = usb_endpoint_dir_out(&ep->desc);
1037         unsigned long           flags;
1038
1039         if (eptype != USB_ENDPOINT_XFER_BULK && eptype != USB_ENDPOINT_XFER_INT)
1040                 return;
1041
1042         spin_lock_irqsave(&ehci->lock, flags);
1043         qh = ep->hcpriv;
1044
1045         /* For Bulk and Interrupt endpoints we maintain the toggle state
1046          * in the hardware; the toggle bits in udev aren't used at all.
1047          * When an endpoint is reset by usb_clear_halt() we must reset
1048          * the toggle bit in the QH.
1049          */
1050         if (qh) {
1051                 usb_settoggle(qh->dev, epnum, is_out, 0);
1052                 if (!list_empty(&qh->qtd_list)) {
1053                         WARN_ONCE(1, "clear_halt for a busy endpoint\n");
1054                 } else if (qh->qh_state == QH_STATE_LINKED ||
1055                                 qh->qh_state == QH_STATE_COMPLETING) {
1056
1057                         /* The toggle value in the QH can't be updated
1058                          * while the QH is active.  Unlink it now;
1059                          * re-linking will call qh_refresh().
1060                          */
1061                         if (eptype == USB_ENDPOINT_XFER_BULK)
1062                                 start_unlink_async(ehci, qh);
1063                         else
1064                                 start_unlink_intr(ehci, qh);
1065                 }
1066         }
1067         spin_unlock_irqrestore(&ehci->lock, flags);
1068 }
1069
1070 static int ehci_get_frame (struct usb_hcd *hcd)
1071 {
1072         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
1073         return (ehci_read_frame_index(ehci) >> 3) % ehci->periodic_size;
1074 }
1075
1076 /*-------------------------------------------------------------------------*/
1077
1078 #ifdef  CONFIG_PM
1079
1080 /* suspend/resume, section 4.3 */
1081
1082 /* These routines handle the generic parts of controller suspend/resume */
1083
1084 int ehci_suspend(struct usb_hcd *hcd, bool do_wakeup)
1085 {
1086         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1087
1088         if (time_before(jiffies, ehci->next_statechange))
1089                 msleep(10);
1090
1091         /*
1092          * Root hub was already suspended.  Disable IRQ emission and
1093          * mark HW unaccessible.  The PM and USB cores make sure that
1094          * the root hub is either suspended or stopped.
1095          */
1096         ehci_prepare_ports_for_controller_suspend(ehci, do_wakeup);
1097
1098         spin_lock_irq(&ehci->lock);
1099         ehci_writel(ehci, 0, &ehci->regs->intr_enable);
1100         (void) ehci_readl(ehci, &ehci->regs->intr_enable);
1101
1102         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1103         spin_unlock_irq(&ehci->lock);
1104
1105         return 0;
1106 }
1107 EXPORT_SYMBOL_GPL(ehci_suspend);
1108
1109 /* Returns 0 if power was preserved, 1 if power was lost */
1110 int ehci_resume(struct usb_hcd *hcd, bool hibernated)
1111 {
1112         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1113
1114         if (time_before(jiffies, ehci->next_statechange))
1115                 msleep(100);
1116
1117         /* Mark hardware accessible again as we are back to full power by now */
1118         set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1119
1120         if (ehci->shutdown)
1121                 return 0;               /* Controller is dead */
1122
1123         /*
1124          * If CF is still set and we aren't resuming from hibernation
1125          * then we maintained suspend power.
1126          * Just undo the effect of ehci_suspend().
1127          */
1128         if (ehci_readl(ehci, &ehci->regs->configured_flag) == FLAG_CF &&
1129                         !hibernated) {
1130                 int     mask = INTR_MASK;
1131
1132                 ehci_prepare_ports_for_controller_resume(ehci);
1133
1134                 spin_lock_irq(&ehci->lock);
1135                 if (ehci->shutdown)
1136                         goto skip;
1137
1138                 if (!hcd->self.root_hub->do_remote_wakeup)
1139                         mask &= ~STS_PCD;
1140                 ehci_writel(ehci, mask, &ehci->regs->intr_enable);
1141                 ehci_readl(ehci, &ehci->regs->intr_enable);
1142  skip:
1143                 spin_unlock_irq(&ehci->lock);
1144                 return 0;
1145         }
1146
1147         /*
1148          * Else reset, to cope with power loss or resume from hibernation
1149          * having let the firmware kick in during reboot.
1150          */
1151         usb_root_hub_lost_power(hcd->self.root_hub);
1152         (void) ehci_halt(ehci);
1153         (void) ehci_reset(ehci);
1154
1155         spin_lock_irq(&ehci->lock);
1156         if (ehci->shutdown)
1157                 goto skip;
1158
1159         ehci_writel(ehci, ehci->command, &ehci->regs->command);
1160         ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
1161         ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
1162
1163         ehci->rh_state = EHCI_RH_SUSPENDED;
1164         spin_unlock_irq(&ehci->lock);
1165
1166         return 1;
1167 }
1168 EXPORT_SYMBOL_GPL(ehci_resume);
1169
1170 #endif
1171
1172 /*-------------------------------------------------------------------------*/
1173
1174 /*
1175  * Generic structure: This gets copied for platform drivers so that
1176  * individual entries can be overridden as needed.
1177  */
1178
1179 static const struct hc_driver ehci_hc_driver = {
1180         .description =          hcd_name,
1181         .product_desc =         "EHCI Host Controller",
1182         .hcd_priv_size =        sizeof(struct ehci_hcd),
1183
1184         /*
1185          * generic hardware linkage
1186          */
1187         .irq =                  ehci_irq,
1188         .flags =                HCD_MEMORY | HCD_USB2,
1189
1190         /*
1191          * basic lifecycle operations
1192          */
1193         .reset =                ehci_setup,
1194         .start =                ehci_run,
1195         .stop =                 ehci_stop,
1196         .shutdown =             ehci_shutdown,
1197
1198         /*
1199          * managing i/o requests and associated device resources
1200          */
1201         .urb_enqueue =          ehci_urb_enqueue,
1202         .urb_dequeue =          ehci_urb_dequeue,
1203         .endpoint_disable =     ehci_endpoint_disable,
1204         .endpoint_reset =       ehci_endpoint_reset,
1205         .clear_tt_buffer_complete =     ehci_clear_tt_buffer_complete,
1206
1207         /*
1208          * scheduling support
1209          */
1210         .get_frame_number =     ehci_get_frame,
1211
1212         /*
1213          * root hub support
1214          */
1215         .hub_status_data =      ehci_hub_status_data,
1216         .hub_control =          ehci_hub_control,
1217         .bus_suspend =          ehci_bus_suspend,
1218         .bus_resume =           ehci_bus_resume,
1219         .relinquish_port =      ehci_relinquish_port,
1220         .port_handed_over =     ehci_port_handed_over,
1221 };
1222
1223 void ehci_init_driver(struct hc_driver *drv,
1224                 const struct ehci_driver_overrides *over)
1225 {
1226         /* Copy the generic table to drv and then apply the overrides */
1227         *drv = ehci_hc_driver;
1228
1229         if (over) {
1230                 drv->hcd_priv_size += over->extra_priv_size;
1231                 if (over->reset)
1232                         drv->reset = over->reset;
1233         }
1234 }
1235 EXPORT_SYMBOL_GPL(ehci_init_driver);
1236
1237 /*-------------------------------------------------------------------------*/
1238
1239 MODULE_DESCRIPTION(DRIVER_DESC);
1240 MODULE_AUTHOR (DRIVER_AUTHOR);
1241 MODULE_LICENSE ("GPL");
1242
1243 #ifdef CONFIG_USB_EHCI_FSL
1244 #include "ehci-fsl.c"
1245 #define PLATFORM_DRIVER         ehci_fsl_driver
1246 #endif
1247
1248 #ifdef CONFIG_USB_EHCI_SH
1249 #include "ehci-sh.c"
1250 #define PLATFORM_DRIVER         ehci_hcd_sh_driver
1251 #endif
1252
1253 #ifdef CONFIG_USB_EHCI_HCD_OMAP
1254 #include "ehci-omap.c"
1255 #define        PLATFORM_DRIVER         ehci_hcd_omap_driver
1256 #endif
1257
1258 #ifdef CONFIG_PPC_PS3
1259 #include "ehci-ps3.c"
1260 #define PS3_SYSTEM_BUS_DRIVER   ps3_ehci_driver
1261 #endif
1262
1263 #ifdef CONFIG_USB_EHCI_HCD_PPC_OF
1264 #include "ehci-ppc-of.c"
1265 #define OF_PLATFORM_DRIVER      ehci_hcd_ppc_of_driver
1266 #endif
1267
1268 #ifdef CONFIG_XPS_USB_HCD_XILINX
1269 #include "ehci-xilinx-of.c"
1270 #define XILINX_OF_PLATFORM_DRIVER       ehci_hcd_xilinx_of_driver
1271 #endif
1272
1273 #ifdef CONFIG_PLAT_ORION
1274 #include "ehci-orion.c"
1275 #define PLATFORM_DRIVER         ehci_orion_driver
1276 #endif
1277
1278 #ifdef CONFIG_USB_W90X900_EHCI
1279 #include "ehci-w90x900.c"
1280 #define PLATFORM_DRIVER         ehci_hcd_w90x900_driver
1281 #endif
1282
1283 #ifdef CONFIG_ARCH_AT91
1284 #include "ehci-atmel.c"
1285 #define PLATFORM_DRIVER         ehci_atmel_driver
1286 #endif
1287
1288 #ifdef CONFIG_USB_OCTEON_EHCI
1289 #include "ehci-octeon.c"
1290 #define PLATFORM_DRIVER         ehci_octeon_driver
1291 #endif
1292
1293 #ifdef CONFIG_ARCH_VT8500
1294 #include "ehci-vt8500.c"
1295 #define PLATFORM_DRIVER         vt8500_ehci_driver
1296 #endif
1297
1298 #ifdef CONFIG_PLAT_SPEAR
1299 #include "ehci-spear.c"
1300 #define PLATFORM_DRIVER         spear_ehci_hcd_driver
1301 #endif
1302
1303 #ifdef CONFIG_USB_EHCI_MSM
1304 #include "ehci-msm.c"
1305 #define PLATFORM_DRIVER         ehci_msm_driver
1306 #endif
1307
1308 #ifdef CONFIG_TILE_USB
1309 #include "ehci-tilegx.c"
1310 #define PLATFORM_DRIVER         ehci_hcd_tilegx_driver
1311 #endif
1312
1313 #ifdef CONFIG_USB_EHCI_HCD_PMC_MSP
1314 #include "ehci-pmcmsp.c"
1315 #define PLATFORM_DRIVER         ehci_hcd_msp_driver
1316 #endif
1317
1318 #ifdef CONFIG_USB_EHCI_TEGRA
1319 #include "ehci-tegra.c"
1320 #define PLATFORM_DRIVER         tegra_ehci_driver
1321 #endif
1322
1323 #ifdef CONFIG_USB_EHCI_S5P
1324 #include "ehci-s5p.c"
1325 #define PLATFORM_DRIVER         s5p_ehci_driver
1326 #endif
1327
1328 #ifdef CONFIG_SPARC_LEON
1329 #include "ehci-grlib.c"
1330 #define PLATFORM_DRIVER         ehci_grlib_driver
1331 #endif
1332
1333 #ifdef CONFIG_USB_EHCI_MV
1334 #include "ehci-mv.c"
1335 #define        PLATFORM_DRIVER         ehci_mv_driver
1336 #endif
1337
1338 #ifdef CONFIG_MIPS_SEAD3
1339 #include "ehci-sead3.c"
1340 #define PLATFORM_DRIVER         ehci_hcd_sead3_driver
1341 #endif
1342
1343 #if !IS_ENABLED(CONFIG_USB_EHCI_PCI) && \
1344         !IS_ENABLED(CONFIG_USB_EHCI_HCD_PLATFORM) && \
1345         !IS_ENABLED(CONFIG_USB_CHIPIDEA_HOST) && \
1346         !IS_ENABLED(CONFIG_USB_EHCI_MXC) && \
1347         !defined(PLATFORM_DRIVER) && \
1348         !defined(PS3_SYSTEM_BUS_DRIVER) && \
1349         !defined(OF_PLATFORM_DRIVER) && \
1350         !defined(XILINX_OF_PLATFORM_DRIVER)
1351 #error "missing bus glue for ehci-hcd"
1352 #endif
1353
1354 static int __init ehci_hcd_init(void)
1355 {
1356         int retval = 0;
1357
1358         if (usb_disabled())
1359                 return -ENODEV;
1360
1361         printk(KERN_INFO "%s: " DRIVER_DESC "\n", hcd_name);
1362         set_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1363         if (test_bit(USB_UHCI_LOADED, &usb_hcds_loaded) ||
1364                         test_bit(USB_OHCI_LOADED, &usb_hcds_loaded))
1365                 printk(KERN_WARNING "Warning! ehci_hcd should always be loaded"
1366                                 " before uhci_hcd and ohci_hcd, not after\n");
1367
1368         pr_debug("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n",
1369                  hcd_name,
1370                  sizeof(struct ehci_qh), sizeof(struct ehci_qtd),
1371                  sizeof(struct ehci_itd), sizeof(struct ehci_sitd));
1372
1373 #ifdef DEBUG
1374         ehci_debug_root = debugfs_create_dir("ehci", usb_debug_root);
1375         if (!ehci_debug_root) {
1376                 retval = -ENOENT;
1377                 goto err_debug;
1378         }
1379 #endif
1380
1381 #ifdef PLATFORM_DRIVER
1382         retval = platform_driver_register(&PLATFORM_DRIVER);
1383         if (retval < 0)
1384                 goto clean0;
1385 #endif
1386
1387 #ifdef PS3_SYSTEM_BUS_DRIVER
1388         retval = ps3_ehci_driver_register(&PS3_SYSTEM_BUS_DRIVER);
1389         if (retval < 0)
1390                 goto clean2;
1391 #endif
1392
1393 #ifdef OF_PLATFORM_DRIVER
1394         retval = platform_driver_register(&OF_PLATFORM_DRIVER);
1395         if (retval < 0)
1396                 goto clean3;
1397 #endif
1398
1399 #ifdef XILINX_OF_PLATFORM_DRIVER
1400         retval = platform_driver_register(&XILINX_OF_PLATFORM_DRIVER);
1401         if (retval < 0)
1402                 goto clean4;
1403 #endif
1404         return retval;
1405
1406 #ifdef XILINX_OF_PLATFORM_DRIVER
1407         /* platform_driver_unregister(&XILINX_OF_PLATFORM_DRIVER); */
1408 clean4:
1409 #endif
1410 #ifdef OF_PLATFORM_DRIVER
1411         platform_driver_unregister(&OF_PLATFORM_DRIVER);
1412 clean3:
1413 #endif
1414 #ifdef PS3_SYSTEM_BUS_DRIVER
1415         ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1416 clean2:
1417 #endif
1418 #ifdef PLATFORM_DRIVER
1419         platform_driver_unregister(&PLATFORM_DRIVER);
1420 clean0:
1421 #endif
1422 #ifdef DEBUG
1423         debugfs_remove(ehci_debug_root);
1424         ehci_debug_root = NULL;
1425 err_debug:
1426 #endif
1427         clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1428         return retval;
1429 }
1430 module_init(ehci_hcd_init);
1431
1432 static void __exit ehci_hcd_cleanup(void)
1433 {
1434 #ifdef XILINX_OF_PLATFORM_DRIVER
1435         platform_driver_unregister(&XILINX_OF_PLATFORM_DRIVER);
1436 #endif
1437 #ifdef OF_PLATFORM_DRIVER
1438         platform_driver_unregister(&OF_PLATFORM_DRIVER);
1439 #endif
1440 #ifdef PLATFORM_DRIVER
1441         platform_driver_unregister(&PLATFORM_DRIVER);
1442 #endif
1443 #ifdef PS3_SYSTEM_BUS_DRIVER
1444         ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1445 #endif
1446 #ifdef DEBUG
1447         debugfs_remove(ehci_debug_root);
1448 #endif
1449         clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1450 }
1451 module_exit(ehci_hcd_cleanup);