USB: move transceiver from ehci_hcd and ohci_hcd to hcd and rename it as phy
[firefly-linux-kernel-4.4.55.git] / drivers / usb / host / ehci-fsl.c
1 /*
2  * Copyright 2005-2009 MontaVista Software, Inc.
3  * Copyright 2008,2012      Freescale Semiconductor, Inc.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of the GNU General Public License as published by the
7  * Free Software Foundation; either version 2 of the License, or (at your
8  * option) any later version.
9  *
10  * This program is distributed in the hope that it will be useful, but
11  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
12  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
13  * for more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program; if not, write to the Free Software Foundation,
17  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18  *
19  * Ported to 834x by Randy Vinson <rvinson@mvista.com> using code provided
20  * by Hunter Wu.
21  * Power Management support by Dave Liu <daveliu@freescale.com>,
22  * Jerry Huang <Chang-Ming.Huang@freescale.com> and
23  * Anton Vorontsov <avorontsov@ru.mvista.com>.
24  */
25
26 #include <linux/kernel.h>
27 #include <linux/types.h>
28 #include <linux/delay.h>
29 #include <linux/pm.h>
30 #include <linux/platform_device.h>
31 #include <linux/fsl_devices.h>
32
33 #include "ehci-fsl.h"
34
35 /* configure so an HC device and id are always provided */
36 /* always called with process context; sleeping is OK */
37
38 /**
39  * usb_hcd_fsl_probe - initialize FSL-based HCDs
40  * @drvier: Driver to be used for this HCD
41  * @pdev: USB Host Controller being probed
42  * Context: !in_interrupt()
43  *
44  * Allocates basic resources for this USB host controller.
45  *
46  */
47 static int usb_hcd_fsl_probe(const struct hc_driver *driver,
48                              struct platform_device *pdev)
49 {
50         struct fsl_usb2_platform_data *pdata;
51         struct usb_hcd *hcd;
52         struct resource *res;
53         int irq;
54         int retval;
55
56         pr_debug("initializing FSL-SOC USB Controller\n");
57
58         /* Need platform data for setup */
59         pdata = (struct fsl_usb2_platform_data *)pdev->dev.platform_data;
60         if (!pdata) {
61                 dev_err(&pdev->dev,
62                         "No platform data for %s.\n", dev_name(&pdev->dev));
63                 return -ENODEV;
64         }
65
66         /*
67          * This is a host mode driver, verify that we're supposed to be
68          * in host mode.
69          */
70         if (!((pdata->operating_mode == FSL_USB2_DR_HOST) ||
71               (pdata->operating_mode == FSL_USB2_MPH_HOST) ||
72               (pdata->operating_mode == FSL_USB2_DR_OTG))) {
73                 dev_err(&pdev->dev,
74                         "Non Host Mode configured for %s. Wrong driver linked.\n",
75                         dev_name(&pdev->dev));
76                 return -ENODEV;
77         }
78
79         res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
80         if (!res) {
81                 dev_err(&pdev->dev,
82                         "Found HC with no IRQ. Check %s setup!\n",
83                         dev_name(&pdev->dev));
84                 return -ENODEV;
85         }
86         irq = res->start;
87
88         hcd = usb_create_hcd(driver, &pdev->dev, dev_name(&pdev->dev));
89         if (!hcd) {
90                 retval = -ENOMEM;
91                 goto err1;
92         }
93
94         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
95         if (!res) {
96                 dev_err(&pdev->dev,
97                         "Found HC with no register addr. Check %s setup!\n",
98                         dev_name(&pdev->dev));
99                 retval = -ENODEV;
100                 goto err2;
101         }
102         hcd->rsrc_start = res->start;
103         hcd->rsrc_len = resource_size(res);
104         if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len,
105                                 driver->description)) {
106                 dev_dbg(&pdev->dev, "controller already in use\n");
107                 retval = -EBUSY;
108                 goto err2;
109         }
110         hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
111
112         if (hcd->regs == NULL) {
113                 dev_dbg(&pdev->dev, "error mapping memory\n");
114                 retval = -EFAULT;
115                 goto err3;
116         }
117
118         pdata->regs = hcd->regs;
119
120         if (pdata->power_budget)
121                 hcd->power_budget = pdata->power_budget;
122
123         /*
124          * do platform specific init: check the clock, grab/config pins, etc.
125          */
126         if (pdata->init && pdata->init(pdev)) {
127                 retval = -ENODEV;
128                 goto err4;
129         }
130
131         /* Enable USB controller, 83xx or 8536 */
132         if (pdata->have_sysif_regs)
133                 setbits32(hcd->regs + FSL_SOC_USB_CTRL, 0x4);
134
135         /* Don't need to set host mode here. It will be done by tdi_reset() */
136
137         retval = usb_add_hcd(hcd, irq, IRQF_SHARED);
138         if (retval != 0)
139                 goto err4;
140
141 #ifdef CONFIG_USB_OTG
142         if (pdata->operating_mode == FSL_USB2_DR_OTG) {
143                 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
144
145                 hcd->phy = usb_get_transceiver();
146                 dev_dbg(&pdev->dev, "hcd=0x%p  ehci=0x%p, phy=0x%p\n",
147                         hcd, ehci, hcd->phy);
148
149                 if (hcd->phy) {
150                         retval = otg_set_host(hcd->phy->otg,
151                                               &ehci_to_hcd(ehci)->self);
152                         if (retval) {
153                                 usb_put_transceiver(hcd->phy);
154                                 goto err4;
155                         }
156                 } else {
157                         dev_err(&pdev->dev, "can't find phy\n");
158                         retval = -ENODEV;
159                         goto err4;
160                 }
161         }
162 #endif
163         return retval;
164
165       err4:
166         iounmap(hcd->regs);
167       err3:
168         release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
169       err2:
170         usb_put_hcd(hcd);
171       err1:
172         dev_err(&pdev->dev, "init %s fail, %d\n", dev_name(&pdev->dev), retval);
173         if (pdata->exit)
174                 pdata->exit(pdev);
175         return retval;
176 }
177
178 /* may be called without controller electrically present */
179 /* may be called with controller, bus, and devices active */
180
181 /**
182  * usb_hcd_fsl_remove - shutdown processing for FSL-based HCDs
183  * @dev: USB Host Controller being removed
184  * Context: !in_interrupt()
185  *
186  * Reverses the effect of usb_hcd_fsl_probe().
187  *
188  */
189 static void usb_hcd_fsl_remove(struct usb_hcd *hcd,
190                                struct platform_device *pdev)
191 {
192         struct fsl_usb2_platform_data *pdata = pdev->dev.platform_data;
193
194         if (hcd->phy) {
195                 otg_set_host(hcd->phy->otg, NULL);
196                 usb_put_transceiver(hcd->phy);
197         }
198
199         usb_remove_hcd(hcd);
200
201         /*
202          * do platform specific un-initialization:
203          * release iomux pins, disable clock, etc.
204          */
205         if (pdata->exit)
206                 pdata->exit(pdev);
207         iounmap(hcd->regs);
208         release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
209         usb_put_hcd(hcd);
210 }
211
212 static void ehci_fsl_setup_phy(struct usb_hcd *hcd,
213                                enum fsl_usb2_phy_modes phy_mode,
214                                unsigned int port_offset)
215 {
216         u32 portsc, temp;
217         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
218         void __iomem *non_ehci = hcd->regs;
219         struct device *dev = hcd->self.controller;
220         struct fsl_usb2_platform_data *pdata = dev->platform_data;
221
222         if (pdata->controller_ver < 0) {
223                 dev_warn(hcd->self.controller, "Could not get controller version\n");
224                 return;
225         }
226
227         portsc = ehci_readl(ehci, &ehci->regs->port_status[port_offset]);
228         portsc &= ~(PORT_PTS_MSK | PORT_PTS_PTW);
229
230         switch (phy_mode) {
231         case FSL_USB2_PHY_ULPI:
232                 if (pdata->controller_ver) {
233                         /* controller version 1.6 or above */
234                         temp = in_be32(non_ehci + FSL_SOC_USB_CTRL);
235                         out_be32(non_ehci + FSL_SOC_USB_CTRL, temp |
236                                 USB_CTRL_USB_EN | ULPI_PHY_CLK_SEL);
237                 }
238                 portsc |= PORT_PTS_ULPI;
239                 break;
240         case FSL_USB2_PHY_SERIAL:
241                 portsc |= PORT_PTS_SERIAL;
242                 break;
243         case FSL_USB2_PHY_UTMI_WIDE:
244                 portsc |= PORT_PTS_PTW;
245                 /* fall through */
246         case FSL_USB2_PHY_UTMI:
247                 if (pdata->controller_ver) {
248                         /* controller version 1.6 or above */
249                         temp = in_be32(non_ehci + FSL_SOC_USB_CTRL);
250                         out_be32(non_ehci + FSL_SOC_USB_CTRL, temp |
251                                 UTMI_PHY_EN | USB_CTRL_USB_EN);
252                         mdelay(FSL_UTMI_PHY_DLY);  /* Delay for UTMI PHY CLK to
253                                                 become stable - 10ms*/
254                 }
255                 /* enable UTMI PHY */
256                 if (pdata->have_sysif_regs)
257                         setbits32(non_ehci + FSL_SOC_USB_CTRL,
258                                   CTRL_UTMI_PHY_EN);
259                 portsc |= PORT_PTS_UTMI;
260                 break;
261         case FSL_USB2_PHY_NONE:
262                 break;
263         }
264         ehci_writel(ehci, portsc, &ehci->regs->port_status[port_offset]);
265 }
266
267 static void ehci_fsl_usb_setup(struct ehci_hcd *ehci)
268 {
269         struct usb_hcd *hcd = ehci_to_hcd(ehci);
270         struct fsl_usb2_platform_data *pdata;
271         void __iomem *non_ehci = hcd->regs;
272         u32 temp;
273
274         pdata = hcd->self.controller->platform_data;
275
276         /* Enable PHY interface in the control reg. */
277         if (pdata->have_sysif_regs) {
278                 temp = in_be32(non_ehci + FSL_SOC_USB_CTRL);
279                 out_be32(non_ehci + FSL_SOC_USB_CTRL, temp | 0x00000004);
280
281                 /*
282                 * Turn on cache snooping hardware, since some PowerPC platforms
283                 * wholly rely on hardware to deal with cache coherent
284                 */
285
286                 /* Setup Snooping for all the 4GB space */
287                 /* SNOOP1 starts from 0x0, size 2G */
288                 out_be32(non_ehci + FSL_SOC_USB_SNOOP1, 0x0 | SNOOP_SIZE_2GB);
289                 /* SNOOP2 starts from 0x80000000, size 2G */
290                 out_be32(non_ehci + FSL_SOC_USB_SNOOP2, 0x80000000 | SNOOP_SIZE_2GB);
291         }
292
293         if ((pdata->operating_mode == FSL_USB2_DR_HOST) ||
294                         (pdata->operating_mode == FSL_USB2_DR_OTG))
295                 ehci_fsl_setup_phy(hcd, pdata->phy_mode, 0);
296
297         if (pdata->operating_mode == FSL_USB2_MPH_HOST) {
298                 unsigned int chip, rev, svr;
299
300                 svr = mfspr(SPRN_SVR);
301                 chip = svr >> 16;
302                 rev = (svr >> 4) & 0xf;
303
304                 /* Deal with USB Erratum #14 on MPC834x Rev 1.0 & 1.1 chips */
305                 if ((rev == 1) && (chip >= 0x8050) && (chip <= 0x8055))
306                         ehci->has_fsl_port_bug = 1;
307
308                 if (pdata->port_enables & FSL_USB2_PORT0_ENABLED)
309                         ehci_fsl_setup_phy(hcd, pdata->phy_mode, 0);
310                 if (pdata->port_enables & FSL_USB2_PORT1_ENABLED)
311                         ehci_fsl_setup_phy(hcd, pdata->phy_mode, 1);
312         }
313
314         if (pdata->have_sysif_regs) {
315 #ifdef CONFIG_PPC_85xx
316                 out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x00000008);
317                 out_be32(non_ehci + FSL_SOC_USB_AGECNTTHRSH, 0x00000080);
318 #else
319                 out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x0000000c);
320                 out_be32(non_ehci + FSL_SOC_USB_AGECNTTHRSH, 0x00000040);
321 #endif
322                 out_be32(non_ehci + FSL_SOC_USB_SICTRL, 0x00000001);
323         }
324 }
325
326 /* called after powerup, by probe or system-pm "wakeup" */
327 static int ehci_fsl_reinit(struct ehci_hcd *ehci)
328 {
329         ehci_fsl_usb_setup(ehci);
330         ehci_port_power(ehci, 0);
331
332         return 0;
333 }
334
335 /* called during probe() after chip reset completes */
336 static int ehci_fsl_setup(struct usb_hcd *hcd)
337 {
338         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
339         int retval;
340         struct fsl_usb2_platform_data *pdata;
341         struct device *dev;
342
343         dev = hcd->self.controller;
344         pdata = hcd->self.controller->platform_data;
345         ehci->big_endian_desc = pdata->big_endian_desc;
346         ehci->big_endian_mmio = pdata->big_endian_mmio;
347
348         /* EHCI registers start at offset 0x100 */
349         ehci->caps = hcd->regs + 0x100;
350         ehci->regs = hcd->regs + 0x100 +
351                 HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
352         dbg_hcs_params(ehci, "reset");
353         dbg_hcc_params(ehci, "reset");
354
355         /* cache this readonly data; minimize chip reads */
356         ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
357
358         hcd->has_tt = 1;
359
360         retval = ehci_halt(ehci);
361         if (retval)
362                 return retval;
363
364         /* data structure init */
365         retval = ehci_init(hcd);
366         if (retval)
367                 return retval;
368
369         ehci->sbrn = 0x20;
370
371         ehci_reset(ehci);
372
373         if (of_device_is_compatible(dev->parent->of_node,
374                                     "fsl,mpc5121-usb2-dr")) {
375                 /*
376                  * set SBUSCFG:AHBBRST so that control msgs don't
377                  * fail when doing heavy PATA writes.
378                  */
379                 ehci_writel(ehci, SBUSCFG_INCR8,
380                             hcd->regs + FSL_SOC_USB_SBUSCFG);
381         }
382
383         retval = ehci_fsl_reinit(ehci);
384         return retval;
385 }
386
387 struct ehci_fsl {
388         struct ehci_hcd ehci;
389
390 #ifdef CONFIG_PM
391         /* Saved USB PHY settings, need to restore after deep sleep. */
392         u32 usb_ctrl;
393 #endif
394 };
395
396 #ifdef CONFIG_PM
397
398 #ifdef CONFIG_PPC_MPC512x
399 static int ehci_fsl_mpc512x_drv_suspend(struct device *dev)
400 {
401         struct usb_hcd *hcd = dev_get_drvdata(dev);
402         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
403         struct fsl_usb2_platform_data *pdata = dev->platform_data;
404         u32 tmp;
405
406 #ifdef DEBUG
407         u32 mode = ehci_readl(ehci, hcd->regs + FSL_SOC_USB_USBMODE);
408         mode &= USBMODE_CM_MASK;
409         tmp = ehci_readl(ehci, hcd->regs + 0x140);      /* usbcmd */
410
411         dev_dbg(dev, "suspend=%d already_suspended=%d "
412                 "mode=%d  usbcmd %08x\n", pdata->suspended,
413                 pdata->already_suspended, mode, tmp);
414 #endif
415
416         /*
417          * If the controller is already suspended, then this must be a
418          * PM suspend.  Remember this fact, so that we will leave the
419          * controller suspended at PM resume time.
420          */
421         if (pdata->suspended) {
422                 dev_dbg(dev, "already suspended, leaving early\n");
423                 pdata->already_suspended = 1;
424                 return 0;
425         }
426
427         dev_dbg(dev, "suspending...\n");
428
429         ehci->rh_state = EHCI_RH_SUSPENDED;
430         dev->power.power_state = PMSG_SUSPEND;
431
432         /* ignore non-host interrupts */
433         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
434
435         /* stop the controller */
436         tmp = ehci_readl(ehci, &ehci->regs->command);
437         tmp &= ~CMD_RUN;
438         ehci_writel(ehci, tmp, &ehci->regs->command);
439
440         /* save EHCI registers */
441         pdata->pm_command = ehci_readl(ehci, &ehci->regs->command);
442         pdata->pm_command &= ~CMD_RUN;
443         pdata->pm_status  = ehci_readl(ehci, &ehci->regs->status);
444         pdata->pm_intr_enable  = ehci_readl(ehci, &ehci->regs->intr_enable);
445         pdata->pm_frame_index  = ehci_readl(ehci, &ehci->regs->frame_index);
446         pdata->pm_segment  = ehci_readl(ehci, &ehci->regs->segment);
447         pdata->pm_frame_list  = ehci_readl(ehci, &ehci->regs->frame_list);
448         pdata->pm_async_next  = ehci_readl(ehci, &ehci->regs->async_next);
449         pdata->pm_configured_flag  =
450                 ehci_readl(ehci, &ehci->regs->configured_flag);
451         pdata->pm_portsc = ehci_readl(ehci, &ehci->regs->port_status[0]);
452         pdata->pm_usbgenctrl = ehci_readl(ehci,
453                                           hcd->regs + FSL_SOC_USB_USBGENCTRL);
454
455         /* clear the W1C bits */
456         pdata->pm_portsc &= cpu_to_hc32(ehci, ~PORT_RWC_BITS);
457
458         pdata->suspended = 1;
459
460         /* clear PP to cut power to the port */
461         tmp = ehci_readl(ehci, &ehci->regs->port_status[0]);
462         tmp &= ~PORT_POWER;
463         ehci_writel(ehci, tmp, &ehci->regs->port_status[0]);
464
465         return 0;
466 }
467
468 static int ehci_fsl_mpc512x_drv_resume(struct device *dev)
469 {
470         struct usb_hcd *hcd = dev_get_drvdata(dev);
471         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
472         struct fsl_usb2_platform_data *pdata = dev->platform_data;
473         u32 tmp;
474
475         dev_dbg(dev, "suspend=%d already_suspended=%d\n",
476                 pdata->suspended, pdata->already_suspended);
477
478         /*
479          * If the controller was already suspended at suspend time,
480          * then don't resume it now.
481          */
482         if (pdata->already_suspended) {
483                 dev_dbg(dev, "already suspended, leaving early\n");
484                 pdata->already_suspended = 0;
485                 return 0;
486         }
487
488         if (!pdata->suspended) {
489                 dev_dbg(dev, "not suspended, leaving early\n");
490                 return 0;
491         }
492
493         pdata->suspended = 0;
494
495         dev_dbg(dev, "resuming...\n");
496
497         /* set host mode */
498         tmp = USBMODE_CM_HOST | (pdata->es ? USBMODE_ES : 0);
499         ehci_writel(ehci, tmp, hcd->regs + FSL_SOC_USB_USBMODE);
500
501         ehci_writel(ehci, pdata->pm_usbgenctrl,
502                     hcd->regs + FSL_SOC_USB_USBGENCTRL);
503         ehci_writel(ehci, ISIPHYCTRL_PXE | ISIPHYCTRL_PHYE,
504                     hcd->regs + FSL_SOC_USB_ISIPHYCTRL);
505
506         ehci_writel(ehci, SBUSCFG_INCR8, hcd->regs + FSL_SOC_USB_SBUSCFG);
507
508         /* restore EHCI registers */
509         ehci_writel(ehci, pdata->pm_command, &ehci->regs->command);
510         ehci_writel(ehci, pdata->pm_intr_enable, &ehci->regs->intr_enable);
511         ehci_writel(ehci, pdata->pm_frame_index, &ehci->regs->frame_index);
512         ehci_writel(ehci, pdata->pm_segment, &ehci->regs->segment);
513         ehci_writel(ehci, pdata->pm_frame_list, &ehci->regs->frame_list);
514         ehci_writel(ehci, pdata->pm_async_next, &ehci->regs->async_next);
515         ehci_writel(ehci, pdata->pm_configured_flag,
516                     &ehci->regs->configured_flag);
517         ehci_writel(ehci, pdata->pm_portsc, &ehci->regs->port_status[0]);
518
519         set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
520         ehci->rh_state = EHCI_RH_RUNNING;
521         dev->power.power_state = PMSG_ON;
522
523         tmp = ehci_readl(ehci, &ehci->regs->command);
524         tmp |= CMD_RUN;
525         ehci_writel(ehci, tmp, &ehci->regs->command);
526
527         usb_hcd_resume_root_hub(hcd);
528
529         return 0;
530 }
531 #else
532 static inline int ehci_fsl_mpc512x_drv_suspend(struct device *dev)
533 {
534         return 0;
535 }
536
537 static inline int ehci_fsl_mpc512x_drv_resume(struct device *dev)
538 {
539         return 0;
540 }
541 #endif /* CONFIG_PPC_MPC512x */
542
543 static struct ehci_fsl *hcd_to_ehci_fsl(struct usb_hcd *hcd)
544 {
545         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
546
547         return container_of(ehci, struct ehci_fsl, ehci);
548 }
549
550 static int ehci_fsl_drv_suspend(struct device *dev)
551 {
552         struct usb_hcd *hcd = dev_get_drvdata(dev);
553         struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd);
554         void __iomem *non_ehci = hcd->regs;
555
556         if (of_device_is_compatible(dev->parent->of_node,
557                                     "fsl,mpc5121-usb2-dr")) {
558                 return ehci_fsl_mpc512x_drv_suspend(dev);
559         }
560
561         ehci_prepare_ports_for_controller_suspend(hcd_to_ehci(hcd),
562                         device_may_wakeup(dev));
563         if (!fsl_deep_sleep())
564                 return 0;
565
566         ehci_fsl->usb_ctrl = in_be32(non_ehci + FSL_SOC_USB_CTRL);
567         return 0;
568 }
569
570 static int ehci_fsl_drv_resume(struct device *dev)
571 {
572         struct usb_hcd *hcd = dev_get_drvdata(dev);
573         struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd);
574         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
575         void __iomem *non_ehci = hcd->regs;
576
577         if (of_device_is_compatible(dev->parent->of_node,
578                                     "fsl,mpc5121-usb2-dr")) {
579                 return ehci_fsl_mpc512x_drv_resume(dev);
580         }
581
582         ehci_prepare_ports_for_controller_resume(ehci);
583         if (!fsl_deep_sleep())
584                 return 0;
585
586         usb_root_hub_lost_power(hcd->self.root_hub);
587
588         /* Restore USB PHY settings and enable the controller. */
589         out_be32(non_ehci + FSL_SOC_USB_CTRL, ehci_fsl->usb_ctrl);
590
591         ehci_reset(ehci);
592         ehci_fsl_reinit(ehci);
593
594         return 0;
595 }
596
597 static int ehci_fsl_drv_restore(struct device *dev)
598 {
599         struct usb_hcd *hcd = dev_get_drvdata(dev);
600
601         usb_root_hub_lost_power(hcd->self.root_hub);
602         return 0;
603 }
604
605 static struct dev_pm_ops ehci_fsl_pm_ops = {
606         .suspend = ehci_fsl_drv_suspend,
607         .resume = ehci_fsl_drv_resume,
608         .restore = ehci_fsl_drv_restore,
609 };
610
611 #define EHCI_FSL_PM_OPS         (&ehci_fsl_pm_ops)
612 #else
613 #define EHCI_FSL_PM_OPS         NULL
614 #endif /* CONFIG_PM */
615
616 #ifdef CONFIG_USB_OTG
617 static int ehci_start_port_reset(struct usb_hcd *hcd, unsigned port)
618 {
619         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
620         u32 status;
621
622         if (!port)
623                 return -EINVAL;
624
625         port--;
626
627         /* start port reset before HNP protocol time out */
628         status = readl(&ehci->regs->port_status[port]);
629         if (!(status & PORT_CONNECT))
630                 return -ENODEV;
631
632         /* khubd will finish the reset later */
633         if (ehci_is_TDI(ehci)) {
634                 writel(PORT_RESET |
635                        (status & ~(PORT_CSC | PORT_PEC | PORT_OCC)),
636                        &ehci->regs->port_status[port]);
637         } else {
638                 writel(PORT_RESET, &ehci->regs->port_status[port]);
639         }
640
641         return 0;
642 }
643 #else
644 #define ehci_start_port_reset   NULL
645 #endif /* CONFIG_USB_OTG */
646
647
648 static const struct hc_driver ehci_fsl_hc_driver = {
649         .description = hcd_name,
650         .product_desc = "Freescale On-Chip EHCI Host Controller",
651         .hcd_priv_size = sizeof(struct ehci_fsl),
652
653         /*
654          * generic hardware linkage
655          */
656         .irq = ehci_irq,
657         .flags = HCD_USB2 | HCD_MEMORY,
658
659         /*
660          * basic lifecycle operations
661          */
662         .reset = ehci_fsl_setup,
663         .start = ehci_run,
664         .stop = ehci_stop,
665         .shutdown = ehci_shutdown,
666
667         /*
668          * managing i/o requests and associated device resources
669          */
670         .urb_enqueue = ehci_urb_enqueue,
671         .urb_dequeue = ehci_urb_dequeue,
672         .endpoint_disable = ehci_endpoint_disable,
673         .endpoint_reset = ehci_endpoint_reset,
674
675         /*
676          * scheduling support
677          */
678         .get_frame_number = ehci_get_frame,
679
680         /*
681          * root hub support
682          */
683         .hub_status_data = ehci_hub_status_data,
684         .hub_control = ehci_hub_control,
685         .bus_suspend = ehci_bus_suspend,
686         .bus_resume = ehci_bus_resume,
687         .start_port_reset = ehci_start_port_reset,
688         .relinquish_port = ehci_relinquish_port,
689         .port_handed_over = ehci_port_handed_over,
690
691         .clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
692 };
693
694 static int ehci_fsl_drv_probe(struct platform_device *pdev)
695 {
696         if (usb_disabled())
697                 return -ENODEV;
698
699         /* FIXME we only want one one probe() not two */
700         return usb_hcd_fsl_probe(&ehci_fsl_hc_driver, pdev);
701 }
702
703 static int ehci_fsl_drv_remove(struct platform_device *pdev)
704 {
705         struct usb_hcd *hcd = platform_get_drvdata(pdev);
706
707         /* FIXME we only want one one remove() not two */
708         usb_hcd_fsl_remove(hcd, pdev);
709         return 0;
710 }
711
712 MODULE_ALIAS("platform:fsl-ehci");
713
714 static struct platform_driver ehci_fsl_driver = {
715         .probe = ehci_fsl_drv_probe,
716         .remove = ehci_fsl_drv_remove,
717         .shutdown = usb_hcd_platform_shutdown,
718         .driver = {
719                 .name = "fsl-ehci",
720                 .pm = EHCI_FSL_PM_OPS,
721         },
722 };