3 #include "usbdev_grf_regs.h"
4 #include "dwc_otg_regs.h"
5 static struct dwc_otg_control_usb *control_usb;
7 #ifdef CONFIG_USB20_OTG
8 static void usb20otg_hw_init(void)
10 #ifndef CONFIG_USB20_HOST
11 /* enable soft control */
12 control_usb->grf_uoc2_base->CON2 = (0x01 << 2) | ((0x01 << 2) << 16);
14 control_usb->grf_uoc2_base->CON3 = 0x2A | (0x3F << 16);
16 /* usb phy config init
17 * usb phy enter usb mode */
18 control_usb->grf_uoc0_base->CON3 = (0x00c0 << 16);
20 /* other haredware init,include:
21 * DRV_VBUS GPIO init */
22 if (gpio_is_valid(control_usb->otg_gpios->gpio)) {
23 if (gpio_get_value(control_usb->otg_gpios->gpio))
24 gpio_set_value(control_usb->otg_gpios->gpio, 0);
28 static void usb20otg_phy_suspend(void *pdata, int suspend)
30 struct dwc_otg_platform_data *usbpdata = pdata;
33 /* enable soft control */
34 control_usb->grf_uoc0_base->CON2 =
35 (0x01 << 2) | ((0x01 << 2) << 16);
37 control_usb->grf_uoc0_base->CON3 = 0x2A | (0x3F << 16);
38 usbpdata->phy_status = 1;
41 control_usb->grf_uoc0_base->CON2 = ((0x01 << 2) << 16);
42 usbpdata->phy_status = 0;
46 static void usb20otg_soft_reset(void)
48 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBOTG_H, true);
49 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBOTGPHY, true);
50 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBOTGC, true);
53 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBOTG_H, false);
54 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBOTGPHY, false);
55 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBOTGC, false);
59 static void usb20otg_clock_init(void *pdata)
61 struct dwc_otg_platform_data *usbpdata = pdata;
62 struct clk *ahbclk, *phyclk;
64 ahbclk = devm_clk_get(usbpdata->dev, "hclk_usb0");
66 dev_err(usbpdata->dev, "Failed to get hclk_usb0\n");
70 phyclk = devm_clk_get(usbpdata->dev, "clk_usbphy0");
72 dev_err(usbpdata->dev, "Failed to get clk_usbphy0\n");
76 usbpdata->phyclk = phyclk;
77 usbpdata->ahbclk = ahbclk;
80 static void usb20otg_clock_enable(void *pdata, int enable)
82 struct dwc_otg_platform_data *usbpdata = pdata;
85 clk_prepare_enable(usbpdata->ahbclk);
86 clk_prepare_enable(usbpdata->phyclk);
88 clk_disable_unprepare(usbpdata->ahbclk);
89 clk_disable_unprepare(usbpdata->phyclk);
93 static int usb20otg_get_status(int id)
98 case USB_STATUS_BVABLID:
100 ret = control_usb->grf_soc_status2_rk3288->otg_bvalid;
102 case USB_STATUS_DPDM:
104 ret = control_usb->grf_soc_status2_rk3288->otg_linestate;
108 ret = control_usb->grf_soc_status2_rk3288->otg_iddig;
111 ret = control_usb->chip_id;
113 case USB_REMOTE_WAKEUP:
114 ret = control_usb->remote_wakeup;
117 ret = control_usb->usb_irq_wakeup;
126 #ifdef CONFIG_RK_USB_UART
127 static void dwc_otg_uart_mode(void *pdata, int enter_usb_uart_mode)
129 if (1 == enter_usb_uart_mode) {
130 /* bypass dm, enter uart mode */
131 control_usb->grf_uoc0_base->CON3 = (0x00c0 | (0x00c0 << 16));
133 } else if (0 == enter_usb_uart_mode) {
135 control_usb->grf_uoc0_base->CON3 = (0x00c0 << 16);
140 static void usb20otg_power_enable(int enable)
143 /* disable otg_drv power */
144 if (gpio_is_valid(control_usb->otg_gpios->gpio))
145 gpio_set_value(control_usb->otg_gpios->gpio, 0);
146 } else if (1 == enable) {
147 /* enable otg_drv power */
148 if (gpio_is_valid(control_usb->otg_gpios->gpio))
149 gpio_set_value(control_usb->otg_gpios->gpio, 1);
153 struct dwc_otg_platform_data usb20otg_pdata_rk3288 = {
158 .hw_init = usb20otg_hw_init,
159 .phy_suspend = usb20otg_phy_suspend,
160 .soft_reset = usb20otg_soft_reset,
161 .clock_init = usb20otg_clock_init,
162 .clock_enable = usb20otg_clock_enable,
163 .get_status = usb20otg_get_status,
164 .power_enable = usb20otg_power_enable,
165 #ifdef CONFIG_RK_USB_UART
166 .dwc_otg_uart_mode = dwc_otg_uart_mode,
168 .bc_detect_cb = usb20otg_battery_charger_detect_cb,
173 #ifdef CONFIG_USB20_HOST
175 static void usb20host_hw_init(void)
177 /* usb phy config init
178 * set common_on = 0, in suspend mode, host1 PLL blocks remain powered.
179 * for RK3288, hsic and other modules use host1 (DWC_OTG) 480M phy clk.
181 control_usb->grf_uoc2_base->CON0 = (1 << 16) | 0;
183 /* other haredware init,include:
184 * DRV_VBUS GPIO init */
185 if (gpio_is_valid(control_usb->host_gpios->gpio)) {
186 if (!gpio_get_value(control_usb->host_gpios->gpio))
187 gpio_set_value(control_usb->host_gpios->gpio, 1);
191 static void usb20host_phy_suspend(void *pdata, int suspend)
193 struct dwc_otg_platform_data *usbpdata = pdata;
196 /* enable soft control */
197 control_usb->grf_uoc2_base->CON2 =
198 (0x01 << 2) | ((0x01 << 2) << 16);
200 control_usb->grf_uoc2_base->CON3 = 0x2A | (0x3F << 16);
201 usbpdata->phy_status = 1;
204 control_usb->grf_uoc2_base->CON2 = ((0x01 << 2) << 16);
205 usbpdata->phy_status = 0;
209 static void usb20host_soft_reset(void)
211 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST1_H, true);
212 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST1PHY, true);
213 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST1C, true);
216 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST1_H, false);
217 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST1PHY, false);
218 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST1C, false);
222 static void usb20host_clock_init(void *pdata)
224 struct dwc_otg_platform_data *usbpdata = pdata;
225 struct clk *ahbclk, *phyclk, *phyclk_480m;
227 ahbclk = devm_clk_get(usbpdata->dev, "hclk_usb1");
228 if (IS_ERR(ahbclk)) {
229 dev_err(usbpdata->dev, "Failed to get hclk_usb1\n");
233 phyclk = devm_clk_get(usbpdata->dev, "clk_usbphy1");
234 if (IS_ERR(phyclk)) {
235 dev_err(usbpdata->dev, "Failed to get clk_usbphy1\n");
239 phyclk_480m = devm_clk_get(usbpdata->dev, "usbphy_480m");
240 if (IS_ERR(phyclk_480m)) {
241 dev_err(usbpdata->dev, "Failed to get usbphy_480m\n");
245 usbpdata->phyclk = phyclk;
246 usbpdata->ahbclk = ahbclk;
247 usbpdata->phyclk_480m = phyclk_480m;
250 static void usb20host_clock_enable(void *pdata, int enable)
252 struct dwc_otg_platform_data *usbpdata = pdata;
255 clk_prepare_enable(usbpdata->ahbclk);
256 clk_prepare_enable(usbpdata->phyclk);
258 clk_disable_unprepare(usbpdata->ahbclk);
259 clk_disable_unprepare(usbpdata->phyclk);
263 static int usb20host_get_status(int id)
268 case USB_STATUS_BVABLID:
270 ret = control_usb->grf_soc_status2_rk3288->host1_bvalid;
272 case USB_STATUS_DPDM:
274 ret = control_usb->grf_soc_status2_rk3288->host1_linestate;
278 ret = control_usb->grf_soc_status2_rk3288->host1_iddig;
281 ret = control_usb->chip_id;
283 case USB_REMOTE_WAKEUP:
284 ret = control_usb->remote_wakeup;
287 ret = control_usb->usb_irq_wakeup;
296 static void usb20host_power_enable(int enable)
299 /* disable host_drv power */
300 /* do not disable power in default */
301 } else if (1 == enable) {
302 /* enable host_drv power */
303 if (gpio_is_valid(control_usb->host_gpios->gpio))
304 gpio_set_value(control_usb->host_gpios->gpio, 1);
308 struct dwc_otg_platform_data usb20host_pdata_rk3288 = {
313 .hw_init = usb20host_hw_init,
314 .phy_suspend = usb20host_phy_suspend,
315 .soft_reset = usb20host_soft_reset,
316 .clock_init = usb20host_clock_init,
317 .clock_enable = usb20host_clock_enable,
318 .get_status = usb20host_get_status,
319 .power_enable = usb20host_power_enable,
324 #ifdef CONFIG_USB_EHCI_RKHSIC
325 static void rk_hsic_hw_init(void)
327 /* usb phy config init
328 * hsic phy config init, set hsicphy_txsrtune */
329 control_usb->grf_uoc3_base->CON0 = ((0xf << 6) << 16) | (0xf << 6);
331 /* other haredware init
332 * set common_on = 0, in suspend mode,
333 * otg/host PLL blocks remain powered
334 * for RK3288, use host1 (DWC_OTG) 480M phy clk
336 control_usb->grf_uoc2_base->CON0 = (1 << 16) | 0;
338 /* change INCR to INCR16 or INCR8(beats less than 16)
339 * or INCR4(beats less than 8) or SINGLE(beats less than 4)
341 control_usb->grf_uoc4_base->CON0 = 0x00ff00bc;
344 static void rk_hsic_clock_init(void *pdata)
346 /* By default, hsicphy_480m's parent is otg phy 480MHz clk
347 * rk3188 must use host phy 480MHz clk, because if otg bypass
348 * to uart mode, otg phy 480MHz clk will be closed automatically
350 struct rkehci_platform_data *usbpdata = pdata;
351 struct clk *ahbclk, *phyclk480m_hsic, *phyclk12m_hsic;
353 phyclk480m_hsic = devm_clk_get(usbpdata->dev, "hsicphy_480m");
354 if (IS_ERR(phyclk480m_hsic)) {
355 dev_err(usbpdata->dev, "Failed to get hsicphy_480m\n");
359 phyclk12m_hsic = devm_clk_get(usbpdata->dev, "hsicphy_12m");
360 if (IS_ERR(phyclk12m_hsic)) {
361 dev_err(usbpdata->dev, "Failed to get hsicphy_12m\n");
365 ahbclk = devm_clk_get(usbpdata->dev, "hclk_hsic");
366 if (IS_ERR(ahbclk)) {
367 dev_err(usbpdata->dev, "Failed to get hclk_hsic\n");
371 usbpdata->hclk_hsic = ahbclk;
372 usbpdata->hsic_phy_480m = phyclk480m_hsic;
373 usbpdata->hsic_phy_12m = phyclk12m_hsic;
376 static void rk_hsic_clock_enable(void *pdata, int enable)
378 struct rkehci_platform_data *usbpdata = pdata;
380 if (enable == usbpdata->clk_status)
383 clk_prepare_enable(usbpdata->hclk_hsic);
384 clk_prepare_enable(usbpdata->hsic_phy_480m);
385 clk_prepare_enable(usbpdata->hsic_phy_12m);
386 usbpdata->clk_status = 1;
388 clk_disable_unprepare(usbpdata->hclk_hsic);
389 clk_disable_unprepare(usbpdata->hsic_phy_480m);
390 clk_disable_unprepare(usbpdata->hsic_phy_12m);
391 usbpdata->clk_status = 0;
395 static void rk_hsic_soft_reset(void)
397 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_HSIC, true);
398 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_HSIC_AUX, true);
399 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_HSICPHY, true);
402 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_HSIC, false);
403 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_HSIC_AUX, false);
404 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_HSICPHY, false);
407 /* HSIC per-port reset */
408 control_usb->grf_uoc3_base->CON0 = ((1 << 10) << 16) | (1 << 10);
410 control_usb->grf_uoc3_base->CON0 = ((1 << 10) << 16) | (0 << 10);
414 struct rkehci_platform_data rkhsic_pdata_rk3288 = {
416 .hsic_phy_12m = NULL,
417 .hsic_phy_480m = NULL,
419 .hw_init = rk_hsic_hw_init,
420 .clock_init = rk_hsic_clock_init,
421 .clock_enable = rk_hsic_clock_enable,
422 .soft_reset = rk_hsic_soft_reset,
426 #ifdef CONFIG_USB_EHCI_RK
427 static void rk_ehci_hw_init(void)
429 /* usb phy config init */
431 /* DRV_VBUS GPIO init */
432 if (gpio_is_valid(control_usb->host_gpios->gpio)) {
433 if (!gpio_get_value(control_usb->host_gpios->gpio))
434 gpio_set_value(control_usb->host_gpios->gpio, 1);
438 static void rk_ehci_phy_suspend(void *pdata, int suspend)
440 struct rkehci_platform_data *usbpdata = pdata;
443 /* enable soft control */
444 control_usb->grf_uoc1_base->CON2 =
445 (0x01 << 2) | ((0x01 << 2) << 16);
447 control_usb->grf_uoc1_base->CON3 = 0x2A | (0x3F << 16);
448 usbpdata->phy_status = 1;
451 control_usb->grf_uoc1_base->CON2 = ((0x01 << 2) << 16);
452 usbpdata->phy_status = 0;
456 static void rk_ehci_clock_init(void *pdata)
458 struct rkehci_platform_data *usbpdata = pdata;
459 struct clk *ahbclk, *phyclk;
461 ahbclk = devm_clk_get(usbpdata->dev, "hclk_usb2");
462 if (IS_ERR(ahbclk)) {
463 dev_err(usbpdata->dev, "Failed to get hclk_usb2\n");
467 phyclk = devm_clk_get(usbpdata->dev, "clk_usbphy2");
468 if (IS_ERR(phyclk)) {
469 dev_err(usbpdata->dev, "Failed to get clk_usbphy2\n");
473 usbpdata->phyclk = phyclk;
474 usbpdata->ahbclk = ahbclk;
477 static void rk_ehci_clock_enable(void *pdata, int enable)
479 struct rkehci_platform_data *usbpdata = pdata;
481 if (enable == usbpdata->clk_status)
484 clk_prepare_enable(usbpdata->ahbclk);
485 clk_prepare_enable(usbpdata->phyclk);
486 usbpdata->clk_status = 1;
488 clk_disable_unprepare(usbpdata->ahbclk);
489 clk_disable_unprepare(usbpdata->phyclk);
490 usbpdata->clk_status = 0;
494 static void rk_ehci_soft_reset(void)
496 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST0_H, true);
497 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST0PHY, true);
498 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST0C, true);
499 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USB_HOST0, true);
502 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST0_H, false);
503 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST0PHY, false);
504 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST0C, false);
505 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USB_HOST0, false);
509 static int rk_ehci_get_status(int id)
514 case USB_STATUS_DPDM:
516 ret = control_usb->grf_soc_status2_rk3288->host0_linestate;
519 ret = control_usb->chip_id;
521 case USB_REMOTE_WAKEUP:
522 ret = control_usb->remote_wakeup;
525 ret = control_usb->usb_irq_wakeup;
534 struct rkehci_platform_data rkehci_pdata_rk3288 = {
539 .hw_init = rk_ehci_hw_init,
540 .phy_suspend = rk_ehci_phy_suspend,
541 .clock_init = rk_ehci_clock_init,
542 .clock_enable = rk_ehci_clock_enable,
543 .soft_reset = rk_ehci_soft_reset,
544 .get_status = rk_ehci_get_status,
548 #ifdef CONFIG_USB_OHCI_HCD_RK
549 static void rk_ohci_hw_init(void)
551 /* usb phy config init */
553 /* DRV_VBUS GPIO init */
554 if (gpio_is_valid(control_usb->host_gpios->gpio)) {
555 if (!gpio_get_value(control_usb->host_gpios->gpio))
556 gpio_set_value(control_usb->host_gpios->gpio, 1);
560 static void rk_ohci_clock_init(void *pdata)
562 struct rkehci_platform_data *usbpdata = pdata;
563 struct clk *ahbclk, *phyclk;
565 ahbclk = devm_clk_get(usbpdata->dev, "hclk_usb3");
566 if (IS_ERR(ahbclk)) {
567 dev_err(usbpdata->dev, "Failed to get hclk_usb3\n");
571 phyclk = devm_clk_get(usbpdata->dev, "clk_usbphy3");
572 if (IS_ERR(phyclk)) {
573 dev_err(usbpdata->dev, "Failed to get clk_usbphy3\n");
577 usbpdata->phyclk = phyclk;
578 usbpdata->ahbclk = ahbclk;
581 static void rk_ohci_clock_enable(void *pdata, int enable)
583 struct rkehci_platform_data *usbpdata = pdata;
585 if (enable == usbpdata->clk_status)
588 clk_prepare_enable(usbpdata->ahbclk);
589 clk_prepare_enable(usbpdata->phyclk);
590 usbpdata->clk_status = 1;
592 clk_disable_unprepare(usbpdata->ahbclk);
593 clk_disable_unprepare(usbpdata->phyclk);
594 usbpdata->clk_status = 0;
598 static void rk_ohci_soft_reset(void)
602 struct rkehci_platform_data rkohci_pdata_rk3288 = {
606 .hw_init = rk_ohci_hw_init,
607 .clock_init = rk_ohci_clock_init,
608 .clock_enable = rk_ohci_clock_enable,
609 .soft_reset = rk_ohci_soft_reset,
613 /*********************************************************************
614 rk3288 usb detections
615 *********************************************************************/
617 #define WAKE_LOCK_TIMEOUT (HZ * 10)
618 static inline void do_wakeup(struct work_struct *work)
620 /* wake up the system */
621 rk_send_wakeup_key();
624 static void usb_battery_charger_detect_work(struct work_struct *work)
626 rk_usb_charger_status = usb_battery_charger_detect(0);
629 /********** handler for bvalid irq **********/
630 static irqreturn_t bvalid_irq_handler(int irq, void *dev_id)
633 control_usb->grf_uoc0_base->CON4 = (0x0008 | (0x0008 << 16));
635 #ifdef CONFIG_RK_USB_UART
636 /* usb otg dp/dm switch to usb phy */
637 dwc_otg_uart_mode(NULL, PHY_USB_MODE);
640 if (control_usb->usb_irq_wakeup) {
641 wake_lock_timeout(&control_usb->usb_wakelock,
643 schedule_delayed_work(&control_usb->usb_det_wakeup_work,
647 rk_usb_charger_status = USB_BC_TYPE_SDP;
648 schedule_delayed_work(&control_usb->usb_charger_det_work, HZ / 10);
653 /***** handler for otg id rise and fall edge *****/
654 static irqreturn_t id_irq_handler(int irq, void *dev_id)
656 unsigned int uoc_con;
659 uoc_con = control_usb->grf_uoc0_base->CON4;
662 if (uoc_con & (1 << 5)) {
663 /* clear id rise irq pandding */
664 control_usb->grf_uoc0_base->CON4 = ((1 << 5) | (1 << 21));
668 if (uoc_con & (1 << 7)) {
669 #ifdef CONFIG_RK_USB_UART
670 /* usb otg dp/dm switch to usb phy */
671 dwc_otg_uart_mode(NULL, PHY_USB_MODE);
673 /* clear id fall irq pandding */
674 control_usb->grf_uoc0_base->CON4 = ((1 << 7) | (1 << 23));
677 if (control_usb->usb_irq_wakeup) {
678 wake_lock_timeout(&control_usb->usb_wakelock,
680 schedule_delayed_work(&control_usb->usb_det_wakeup_work,
687 /***** handler for otg line status change *****/
689 static irqreturn_t line_irq_handler(int irq, void *dev_id)
693 if (control_usb->grf_uoc0_base->CON0 & 1 << 15)
694 control_usb->grf_uoc0_base->CON0 = (1 << 15 | 1 << 31);
696 if (control_usb->grf_uoc1_base->CON0 & 1 << 15)
697 control_usb->grf_uoc1_base->CON0 = (1 << 15 | 1 << 31);
699 if (control_usb->grf_uoc2_base->CON0 & 1 << 15)
700 control_usb->grf_uoc2_base->CON0 = (1 << 15 | 1 << 31);
702 if (control_usb->usb_irq_wakeup) {
703 wake_lock_timeout(&control_usb->usb_wakelock,
705 schedule_delayed_work(&control_usb->usb_det_wakeup_work,
712 /************* register usb detection irqs **************/
713 static int otg_irq_detect_init(struct platform_device *pdev)
718 if (control_usb->usb_irq_wakeup) {
719 wake_lock_init(&control_usb->usb_wakelock, WAKE_LOCK_SUSPEND,
721 INIT_DELAYED_WORK(&control_usb->usb_det_wakeup_work, do_wakeup);
724 /*register otg_bvalid irq */
725 irq = platform_get_irq_byname(pdev, "otg_bvalid");
728 request_irq(irq, bvalid_irq_handler, 0, "otg_bvalid", NULL);
730 dev_err(&pdev->dev, "request_irq %d failed!\n", irq);
733 /* enable bvalid irq */
734 control_usb->grf_uoc0_base->CON4 = 0x000c000c;
735 if (control_usb->usb_irq_wakeup)
736 enable_irq_wake(irq);
740 /*register otg_id irq */
741 irq = platform_get_irq_byname(pdev, "otg_id");
743 ret = request_irq(irq, id_irq_handler, 0, "otg_id", NULL);
745 dev_err(&pdev->dev, "request_irq %d failed!\n", irq);
748 control_usb->grf_uoc0_base->CON4 = 0x00f000f0;
749 if (control_usb->usb_irq_wakeup)
750 enable_irq_wake(irq);
754 /*register otg_linestate irq */
755 irq = platform_get_irq_byname(pdev, "otg_linestate");
758 request_irq(irq, line_irq_handler, 0, "otg_linestate",
761 dev_err(&pdev->dev, "request_irq %d failed!\n", irq);
764 control_usb->grf_uoc0_base->CON0 = 0xc000c000;
765 if (control_usb->usb_irq_wakeup)
766 enable_irq_wake(irq);
770 /*register host0_linestate irq */
771 irq = platform_get_irq_byname(pdev, "host0_linestate");
774 request_irq(irq, line_irq_handler, 0, "host0_linestate",
777 dev_err(&pdev->dev, "request_irq %d failed!\n", irq);
780 control_usb->grf_uoc1_base->CON0 = 0xc000c000;
781 if (control_usb->usb_irq_wakeup)
782 enable_irq_wake(irq);
786 /*register host1_linestate irq */
787 irq = platform_get_irq_byname(pdev, "host1_linestate");
790 request_irq(irq, line_irq_handler, 0, "host1_linestate",
793 dev_err(&pdev->dev, "request_irq %d failed!\n", irq);
796 control_usb->grf_uoc2_base->CON0 = 0xc000c000;
797 if (control_usb->usb_irq_wakeup)
798 enable_irq_wake(irq);
805 /********** end of rk3288 usb detections **********/
807 static int usb_grf_ioremap(struct platform_device *pdev)
810 struct resource *res;
811 void *grf_soc_status1;
812 void *grf_soc_status2;
813 void *grf_soc_status19;
814 void *grf_soc_status21;
821 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
823 grf_soc_status1 = devm_ioremap_resource(&pdev->dev, res);
824 if (IS_ERR(grf_soc_status1)) {
825 ret = PTR_ERR(grf_soc_status1);
828 control_usb->grf_soc_status1_rk3288 =
829 (pGRF_SOC_STATUS1_RK3288) grf_soc_status1;
831 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
833 grf_soc_status2 = devm_ioremap_resource(&pdev->dev, res);
834 if (IS_ERR(grf_soc_status2)) {
835 ret = PTR_ERR(grf_soc_status2);
838 control_usb->grf_soc_status2_rk3288 =
839 (pGRF_SOC_STATUS2_RK3288) grf_soc_status2;
841 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
843 grf_soc_status19 = devm_ioremap_resource(&pdev->dev, res);
844 if (IS_ERR(grf_soc_status19)) {
845 ret = PTR_ERR(grf_soc_status19);
848 control_usb->grf_soc_status19_rk3288 =
849 (pGRF_SOC_STATUS19_RK3288) grf_soc_status19;
851 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
853 grf_soc_status21 = devm_ioremap_resource(&pdev->dev, res);
854 if (IS_ERR(grf_soc_status21)) {
855 ret = PTR_ERR(grf_soc_status21);
858 control_usb->grf_soc_status21_rk3288 =
859 (pGRF_SOC_STATUS21_RK3288) grf_soc_status21;
861 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
863 grf_uoc0_base = devm_ioremap_resource(&pdev->dev, res);
864 if (IS_ERR(grf_uoc0_base)) {
865 ret = PTR_ERR(grf_uoc0_base);
868 control_usb->grf_uoc0_base = (pGRF_UOC0_REG) grf_uoc0_base;
870 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
872 grf_uoc1_base = devm_ioremap_resource(&pdev->dev, res);
873 if (IS_ERR(grf_uoc1_base)) {
874 ret = PTR_ERR(grf_uoc1_base);
877 control_usb->grf_uoc1_base = (pGRF_UOC1_REG) grf_uoc1_base;
879 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
881 grf_uoc2_base = devm_ioremap_resource(&pdev->dev, res);
882 if (IS_ERR(grf_uoc2_base)) {
883 ret = PTR_ERR(grf_uoc2_base);
886 control_usb->grf_uoc2_base = (pGRF_UOC2_REG) grf_uoc2_base;
888 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
890 grf_uoc3_base = devm_ioremap_resource(&pdev->dev, res);
891 if (IS_ERR(grf_uoc3_base)) {
892 ret = PTR_ERR(grf_uoc3_base);
895 control_usb->grf_uoc3_base = (pGRF_UOC3_REG) grf_uoc3_base;
897 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
899 grf_uoc4_base = devm_ioremap_resource(&pdev->dev, res);
900 if (IS_ERR(grf_uoc4_base)) {
901 ret = PTR_ERR(grf_uoc4_base);
904 control_usb->grf_uoc4_base = (pGRF_UOC4_REG) grf_uoc4_base;
911 static const struct of_device_id rk_usb_control_id_table[] = {
913 .compatible = "rockchip,rk3288-usb-control",
920 static int rk_usb_control_probe(struct platform_device *pdev)
923 struct device_node *np = pdev->dev.of_node;
927 devm_kzalloc(&pdev->dev, sizeof(*control_usb), GFP_KERNEL);
929 dev_err(&pdev->dev, "unable to alloc memory for control usb\n");
934 control_usb->chip_id = RK3288_USB_CTLR;
935 control_usb->remote_wakeup = of_property_read_bool(np,
936 "rockchip,remote_wakeup");
937 control_usb->usb_irq_wakeup = of_property_read_bool(np,
938 "rockchip,usb_irq_wakeup");
940 INIT_DELAYED_WORK(&control_usb->usb_charger_det_work,
941 usb_battery_charger_detect_work);
943 control_usb->host_gpios =
944 devm_kzalloc(&pdev->dev, sizeof(struct gpio), GFP_KERNEL);
945 if (!control_usb->host_gpios) {
946 dev_err(&pdev->dev, "unable to alloc memory for host_gpios\n");
951 gpio = of_get_named_gpio(np, "host_drv_gpio", 0);
952 control_usb->host_gpios->gpio = gpio;
954 if (!gpio_is_valid(gpio)) {
955 dev_err(&pdev->dev, "invalid host gpio%d\n", gpio);
957 err = devm_gpio_request(&pdev->dev, gpio, "host_drv_gpio");
960 "failed to request GPIO%d for host_drv\n",
965 gpio_direction_output(control_usb->host_gpios->gpio, 1);
968 control_usb->otg_gpios =
969 devm_kzalloc(&pdev->dev, sizeof(struct gpio), GFP_KERNEL);
970 if (!control_usb->otg_gpios) {
971 dev_err(&pdev->dev, "unable to alloc memory for otg_gpios\n");
976 gpio = of_get_named_gpio(np, "otg_drv_gpio", 0);
977 control_usb->otg_gpios->gpio = gpio;
979 if (!gpio_is_valid(gpio)) {
980 dev_err(&pdev->dev, "invalid otg gpio%d\n", gpio);
982 err = devm_gpio_request(&pdev->dev, gpio, "otg_drv_gpio");
985 "failed to request GPIO%d for otg_drv\n", gpio);
989 gpio_direction_output(control_usb->otg_gpios->gpio, 0);
996 static int rk_usb_control_remove(struct platform_device *pdev)
1001 static struct platform_driver rk_usb_control_driver = {
1002 .probe = rk_usb_control_probe,
1003 .remove = rk_usb_control_remove,
1005 .name = "rk3288-usb-control",
1006 .owner = THIS_MODULE,
1007 .of_match_table = of_match_ptr(rk_usb_control_id_table),
1013 static const struct of_device_id dwc_otg_control_usb_id_table[] = {
1015 .compatible = "rockchip,rk3288-dwc-control-usb",
1022 static int dwc_otg_control_usb_probe(struct platform_device *pdev)
1024 struct clk *hclk_usb_peri, *phyclk_480m, *phyclk480m_parent;
1028 dev_err(&pdev->dev, "unable to alloc memory for control usb\n");
1033 hclk_usb_peri = devm_clk_get(&pdev->dev, "hclk_usb_peri");
1034 if (IS_ERR(hclk_usb_peri)) {
1035 dev_err(&pdev->dev, "Failed to get hclk_usb_peri\n");
1040 control_usb->hclk_usb_peri = hclk_usb_peri;
1041 clk_prepare_enable(hclk_usb_peri);
1043 phyclk480m_parent = devm_clk_get(&pdev->dev, "usbphy2_480m");
1044 if (IS_ERR(phyclk480m_parent)) {
1045 dev_err(&pdev->dev, "Failed to get usbphy2_480m\n");
1049 phyclk_480m = devm_clk_get(&pdev->dev, "usbphy_480m");
1050 if (IS_ERR(phyclk_480m)) {
1051 dev_err(&pdev->dev, "Failed to get usbphy_480m\n");
1055 clk_set_parent(phyclk_480m, phyclk480m_parent);
1057 ret = usb_grf_ioremap(pdev);
1059 dev_err(&pdev->dev, "Failed to ioremap usb grf\n");
1062 #ifdef CONFIG_USB20_OTG
1063 if (usb20otg_get_status(USB_STATUS_BVABLID)) {
1064 rk_usb_charger_status = USB_BC_TYPE_SDP;
1065 schedule_delayed_work(&control_usb->usb_charger_det_work,
1070 ret = otg_irq_detect_init(pdev);
1077 clk_disable_unprepare(hclk_usb_peri);
1082 static int dwc_otg_control_usb_remove(struct platform_device *pdev)
1084 clk_disable_unprepare(control_usb->hclk_usb_peri);
1088 static struct platform_driver dwc_otg_control_usb_driver = {
1089 .probe = dwc_otg_control_usb_probe,
1090 .remove = dwc_otg_control_usb_remove,
1092 .name = "rk3288-dwc-control-usb",
1093 .owner = THIS_MODULE,
1094 .of_match_table = of_match_ptr(dwc_otg_control_usb_id_table),
1098 static int __init dwc_otg_control_usb_init(void)
1102 retval = platform_driver_register(&rk_usb_control_driver);
1104 printk(KERN_ERR "%s retval=%d\n", __func__, retval);
1108 retval = platform_driver_register(&dwc_otg_control_usb_driver);
1111 printk(KERN_ERR "%s retval=%d\n", __func__, retval);
1117 subsys_initcall(dwc_otg_control_usb_init);
1119 static void __exit dwc_otg_control_usb_exit(void)
1121 platform_driver_unregister(&rk_usb_control_driver);
1122 platform_driver_unregister(&dwc_otg_control_usb_driver);
1125 module_exit(dwc_otg_control_usb_exit);
1126 MODULE_ALIAS("platform: dwc_control_usb");
1127 MODULE_AUTHOR("RockChip Inc.");
1128 MODULE_DESCRIPTION("RockChip Control Module USB Driver");
1129 MODULE_LICENSE("GPL v2");