3 #include "usbdev_grf_regs.h"
4 #include "dwc_otg_regs.h"
5 static struct dwc_otg_control_usb *control_usb;
7 #ifdef CONFIG_USB20_OTG
8 static void usb20otg_hw_init(void)
10 #ifndef CONFIG_USB20_HOST
12 control_usb->grf_uoc2_base->CON2 = (0x01<<2)|((0x01<<2)<<16);
14 control_usb->grf_uoc2_base->CON3 = 0x2A|(0x3F<<16);
16 /* usb phy config init
17 * usb phy enter usb mode */
18 control_usb->grf_uoc0_base->CON3 = (0x00c0 << 16);
20 /* other haredware init,include:
21 * DRV_VBUS GPIO init */
22 if(gpio_get_value(control_usb->otg_gpios->gpio)){
23 gpio_set_value(control_usb->otg_gpios->gpio, 0);
27 static void usb20otg_phy_suspend(void* pdata, int suspend)
29 struct dwc_otg_platform_data *usbpdata=pdata;
33 control_usb->grf_uoc0_base->CON2 = (0x01<<2)|((0x01<<2)<<16);
35 control_usb->grf_uoc0_base->CON3 = 0x2A|(0x3F<<16);
36 usbpdata->phy_status = 1;
39 control_usb->grf_uoc0_base->CON2 = ((0x01<<2)<<16);
40 usbpdata->phy_status = 0;
44 static void usb20otg_soft_reset(void)
46 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBOTG_H, true);
47 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBOTGPHY, true);
48 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBOTGC, true);
51 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBOTG_H, false);
52 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBOTGPHY, false);
53 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBOTGC, false);
57 static void usb20otg_clock_init(void* pdata)
59 struct dwc_otg_platform_data *usbpdata=pdata;
60 struct clk* ahbclk,*phyclk;
62 ahbclk = devm_clk_get(usbpdata->dev, "hclk_usb0");
64 dev_err(usbpdata->dev, "Failed to get hclk_usb0\n");
68 phyclk = devm_clk_get(usbpdata->dev, "clk_usbphy0");
70 dev_err(usbpdata->dev, "Failed to get clk_usbphy0\n");
74 usbpdata->phyclk = phyclk;
75 usbpdata->ahbclk = ahbclk;
78 static void usb20otg_clock_enable(void* pdata, int enable)
80 struct dwc_otg_platform_data *usbpdata=pdata;
83 clk_prepare_enable(usbpdata->ahbclk);
84 clk_prepare_enable(usbpdata->phyclk);
86 clk_disable_unprepare(usbpdata->ahbclk);
87 clk_disable_unprepare(usbpdata->phyclk);
91 static int usb20otg_get_status(int id)
96 case USB_STATUS_BVABLID:
98 ret = control_usb->grf_soc_status2_rk3288->otg_bvalid;
100 case USB_STATUS_DPDM:
102 ret = control_usb->grf_soc_status2_rk3288->otg_linestate;
106 ret = control_usb->grf_soc_status2_rk3288->otg_iddig;
109 ret = control_usb->chip_id;
111 case USB_REMOTE_WAKEUP:
112 ret = control_usb->remote_wakeup;
115 ret = control_usb->usb_irq_wakeup;
124 #ifdef CONFIG_RK_USB_UART
125 static void dwc_otg_uart_mode(void* pdata, int enter_usb_uart_mode)
127 if(1 == enter_usb_uart_mode){
128 /* bypass dm, enter uart mode*/
129 control_usb->grf_uoc0_base->CON3 = (0x00c0 | (0x00c0 << 16));
131 }else if(0 == enter_usb_uart_mode){
133 control_usb->grf_uoc0_base->CON3 = (0x00c0 << 16);
138 static void usb20otg_power_enable(int enable)
140 if(0 == enable){//disable otg_drv power
141 gpio_set_value(control_usb->otg_gpios->gpio, 0);
142 }else if(1 == enable){//enable otg_drv power
143 gpio_set_value(control_usb->otg_gpios->gpio, 1);
148 struct dwc_otg_platform_data usb20otg_pdata_rk3288 = {
153 .hw_init = usb20otg_hw_init,
154 .phy_suspend = usb20otg_phy_suspend,
155 .soft_reset = usb20otg_soft_reset,
156 .clock_init = usb20otg_clock_init,
157 .clock_enable = usb20otg_clock_enable,
158 .get_status = usb20otg_get_status,
159 .power_enable = usb20otg_power_enable,
160 #ifdef CONFIG_RK_USB_UART
161 .dwc_otg_uart_mode = dwc_otg_uart_mode,
163 .bc_detect_cb=usb20otg_battery_charger_detect_cb,
168 #ifdef CONFIG_USB20_HOST
170 static void usb20host_hw_init(void)
172 /* usb phy config init
173 * set common_on = 0, in suspend mode, host1 PLL blocks remain powered.
174 * for RK3288, hsic and other modules use host1 (DWC_OTG) 480M phy clk.
176 control_usb->grf_uoc2_base->CON0 = (1<<16)|0;
178 /* other haredware init,include:
179 * DRV_VBUS GPIO init */
180 if(!gpio_get_value(control_usb->host_gpios->gpio)){
181 gpio_set_value(control_usb->host_gpios->gpio, 1);
185 static void usb20host_phy_suspend(void* pdata, int suspend)
187 struct dwc_otg_platform_data *usbpdata=pdata;
190 // enable soft control
191 control_usb->grf_uoc2_base->CON2 = (0x01<<2)|((0x01<<2)<<16);
193 control_usb->grf_uoc2_base->CON3 = 0x2A|(0x3F<<16);
194 usbpdata->phy_status = 1;
197 control_usb->grf_uoc2_base->CON2 = ((0x01<<2)<<16);
198 usbpdata->phy_status = 0;
202 static void usb20host_soft_reset(void)
204 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST1_H, true);
205 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST1PHY, true);
206 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST1C, true);
209 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST1_H, false);
210 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST1PHY, false);
211 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST1C, false);
215 static void usb20host_clock_init(void* pdata)
217 struct dwc_otg_platform_data *usbpdata=pdata;
218 struct clk* ahbclk, *phyclk, *phyclk_480m;
220 ahbclk = devm_clk_get(usbpdata->dev, "hclk_usb1");
221 if (IS_ERR(ahbclk)) {
222 dev_err(usbpdata->dev, "Failed to get hclk_usb1\n");
226 phyclk = devm_clk_get(usbpdata->dev, "clk_usbphy1");
227 if (IS_ERR(phyclk)) {
228 dev_err(usbpdata->dev, "Failed to get clk_usbphy1\n");
232 phyclk_480m = devm_clk_get(usbpdata->dev, "usbphy_480m");
233 if (IS_ERR(phyclk_480m)) {
234 dev_err(usbpdata->dev, "Failed to get usbphy_480m\n");
238 usbpdata->phyclk = phyclk;
239 usbpdata->ahbclk = ahbclk;
240 usbpdata->phyclk_480m = phyclk_480m;
243 static void usb20host_clock_enable(void* pdata, int enable)
245 struct dwc_otg_platform_data *usbpdata=pdata;
248 clk_prepare_enable(usbpdata->ahbclk);
249 clk_prepare_enable(usbpdata->phyclk);
251 clk_disable_unprepare(usbpdata->ahbclk);
252 clk_disable_unprepare(usbpdata->phyclk);
256 static int usb20host_get_status(int id)
261 case USB_STATUS_BVABLID:
263 ret = control_usb->grf_soc_status2_rk3288->host1_bvalid;
265 case USB_STATUS_DPDM:
267 ret = control_usb->grf_soc_status2_rk3288->host1_linestate;
271 ret = control_usb->grf_soc_status2_rk3288->host1_iddig;
274 ret = control_usb->chip_id;
276 case USB_REMOTE_WAKEUP:
277 ret = control_usb->remote_wakeup;
280 ret = control_usb->usb_irq_wakeup;
289 static void usb20host_power_enable(int enable)
291 if(0 == enable){//disable host_drv power
292 //do not disable power in default
293 }else if(1 == enable){//enable host_drv power
294 gpio_set_value(control_usb->host_gpios->gpio, 1);
299 struct dwc_otg_platform_data usb20host_pdata_rk3288 = {
304 .hw_init = usb20host_hw_init,
305 .phy_suspend = usb20host_phy_suspend,
306 .soft_reset = usb20host_soft_reset,
307 .clock_init = usb20host_clock_init,
308 .clock_enable = usb20host_clock_enable,
309 .get_status = usb20host_get_status,
310 .power_enable = usb20host_power_enable,
315 #ifdef CONFIG_USB_EHCI_RKHSIC
316 static void rk_hsic_hw_init(void)
318 // usb phy config init
319 // hsic phy config init, set hsicphy_txsrtune
320 control_usb->grf_uoc3_base->CON0 = ((0xf<<6)<<16)|(0xf<<6);
322 /* other haredware init
323 * set common_on = 0, in suspend mode, otg/host PLL blocks remain powered
324 * for RK3288, use host1 (DWC_OTG) 480M phy clk
326 control_usb->grf_uoc2_base->CON0 = (1<<16)|0;
328 /* change INCR to INCR16 or INCR8(beats less than 16)
329 * or INCR4(beats less than 8) or SINGLE(beats less than 4)
331 control_usb->grf_uoc4_base->CON0 = 0x00ff00bc;
334 static void rk_hsic_clock_init(void* pdata)
336 /* By default, hsicphy_480m's parent is otg phy 480MHz clk
337 * rk3188 must use host phy 480MHz clk, because if otg bypass
338 * to uart mode, otg phy 480MHz clk will be closed automatically
340 struct rkehci_platform_data *usbpdata=pdata;
341 struct clk *ahbclk, *phyclk480m_hsic, *phyclk12m_hsic;
343 phyclk480m_hsic = devm_clk_get(usbpdata->dev, "hsicphy_480m");
344 if (IS_ERR(phyclk480m_hsic)) {
345 dev_err(usbpdata->dev, "Failed to get hsicphy_480m\n");
349 phyclk12m_hsic = devm_clk_get(usbpdata->dev, "hsicphy_12m");
350 if (IS_ERR(phyclk12m_hsic)) {
351 dev_err(usbpdata->dev, "Failed to get hsicphy_12m\n");
355 ahbclk = devm_clk_get(usbpdata->dev, "hclk_hsic");
356 if (IS_ERR(ahbclk)) {
357 dev_err(usbpdata->dev, "Failed to get hclk_hsic\n");
361 usbpdata->hclk_hsic = ahbclk;
362 usbpdata->hsic_phy_480m = phyclk480m_hsic;
363 usbpdata->hsic_phy_12m = phyclk12m_hsic;
366 static void rk_hsic_clock_enable(void* pdata, int enable)
368 struct rkehci_platform_data *usbpdata=pdata;
370 if(enable == usbpdata->clk_status)
373 clk_prepare_enable(usbpdata->hclk_hsic);
374 clk_prepare_enable(usbpdata->hsic_phy_480m);
375 clk_prepare_enable(usbpdata->hsic_phy_12m);
376 usbpdata->clk_status = 1;
378 clk_disable_unprepare(usbpdata->hclk_hsic);
379 clk_disable_unprepare(usbpdata->hsic_phy_480m);
380 clk_disable_unprepare(usbpdata->hsic_phy_12m);
381 usbpdata->clk_status = 0;
385 static void rk_hsic_soft_reset(void)
387 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_HSIC, true);
388 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_HSIC_AUX, true);
389 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_HSICPHY, true);
392 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_HSIC, false);
393 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_HSIC_AUX, false);
394 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_HSICPHY, false);
397 /* HSIC per-port reset */
398 control_usb->grf_uoc3_base->CON0 = ((1<<10)<<16)|(1<<10);
400 control_usb->grf_uoc3_base->CON0 = ((1<<10)<<16)|(0<<10);
404 struct rkehci_platform_data rkhsic_pdata_rk3288 = {
406 .hsic_phy_12m = NULL,
407 .hsic_phy_480m = NULL,
409 .hw_init = rk_hsic_hw_init,
410 .clock_init = rk_hsic_clock_init,
411 .clock_enable = rk_hsic_clock_enable,
412 .soft_reset = rk_hsic_soft_reset,
416 #ifdef CONFIG_USB_EHCI_RK
417 static void rk_ehci_hw_init(void)
419 /* usb phy config init */
421 /* DRV_VBUS GPIO init */
422 if(!gpio_get_value(control_usb->host_gpios->gpio)){
423 gpio_set_value(control_usb->host_gpios->gpio, 1);
427 static void rk_ehci_phy_suspend(void* pdata, int suspend)
429 struct rkehci_platform_data *usbpdata=pdata;
432 // enable soft control
433 control_usb->grf_uoc1_base->CON2 = (0x01<<2)|((0x01<<2)<<16);
435 control_usb->grf_uoc1_base->CON3 = 0x2A|(0x3F<<16);
436 usbpdata->phy_status = 1;
439 control_usb->grf_uoc1_base->CON2 = ((0x01<<2)<<16);
440 usbpdata->phy_status = 0;
444 static void rk_ehci_clock_init(void* pdata)
446 struct rkehci_platform_data *usbpdata=pdata;
447 struct clk* ahbclk,*phyclk;
449 ahbclk = devm_clk_get(usbpdata->dev, "hclk_usb2");
450 if (IS_ERR(ahbclk)) {
451 dev_err(usbpdata->dev, "Failed to get hclk_usb2\n");
455 phyclk = devm_clk_get(usbpdata->dev, "clk_usbphy2");
456 if (IS_ERR(phyclk)) {
457 dev_err(usbpdata->dev, "Failed to get clk_usbphy2\n");
461 usbpdata->phyclk = phyclk;
462 usbpdata->ahbclk = ahbclk;
465 static void rk_ehci_clock_enable(void* pdata, int enable)
467 struct rkehci_platform_data *usbpdata=pdata;
469 if(enable == usbpdata->clk_status)
472 clk_prepare_enable(usbpdata->ahbclk);
473 clk_prepare_enable(usbpdata->phyclk);
474 usbpdata->clk_status = 1;
476 clk_disable_unprepare(usbpdata->ahbclk);
477 clk_disable_unprepare(usbpdata->phyclk);
478 usbpdata->clk_status = 0;
482 static void rk_ehci_soft_reset(void)
484 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST0_H, true);
485 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST0PHY, true);
486 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST0C, true);
487 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USB_HOST0, true);
490 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST0_H, false);
491 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST0PHY, false);
492 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST0C, false);
493 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USB_HOST0, false);
497 static int rk_ehci_get_status(int id)
502 case USB_STATUS_DPDM:
504 ret = control_usb->grf_soc_status2_rk3288->host0_linestate;
507 ret = control_usb->chip_id;
509 case USB_REMOTE_WAKEUP:
510 ret = control_usb->remote_wakeup;
513 ret = control_usb->usb_irq_wakeup;
522 struct rkehci_platform_data rkehci_pdata_rk3288 = {
527 .hw_init = rk_ehci_hw_init,
528 .phy_suspend = rk_ehci_phy_suspend,
529 .clock_init = rk_ehci_clock_init,
530 .clock_enable = rk_ehci_clock_enable,
531 .soft_reset = rk_ehci_soft_reset,
532 .get_status = rk_ehci_get_status,
536 #ifdef CONFIG_USB_OHCI_HCD_RK
537 static void rk_ohci_hw_init(void)
539 /* usb phy config init */
541 /* DRV_VBUS GPIO init */
542 if(!gpio_get_value(control_usb->host_gpios->gpio)){
543 gpio_set_value(control_usb->host_gpios->gpio, 1);
547 static void rk_ohci_clock_init(void* pdata)
549 struct rkehci_platform_data *usbpdata=pdata;
550 struct clk* ahbclk,*phyclk;
552 ahbclk =devm_clk_get(usbpdata->dev, "hclk_usb3");
553 if (IS_ERR(ahbclk)) {
554 dev_err(usbpdata->dev, "Failed to get hclk_usb3\n");
558 phyclk = devm_clk_get(usbpdata->dev, "clk_usbphy3");;
559 if (IS_ERR(phyclk)) {
560 dev_err(usbpdata->dev, "Failed to get clk_usbphy3\n");
564 usbpdata->phyclk = phyclk;
565 usbpdata->ahbclk = ahbclk;
568 static void rk_ohci_clock_enable(void* pdata, int enable)
570 struct rkehci_platform_data *usbpdata=pdata;
572 if(enable == usbpdata->clk_status)
575 clk_prepare_enable(usbpdata->ahbclk);
576 clk_prepare_enable(usbpdata->phyclk);
577 usbpdata->clk_status = 1;
579 clk_disable_unprepare(usbpdata->ahbclk);
580 clk_disable_unprepare(usbpdata->phyclk);
581 usbpdata->clk_status = 0;
585 static void rk_ohci_soft_reset(void)
589 struct rkehci_platform_data rkohci_pdata_rk3288 = {
593 .hw_init = rk_ohci_hw_init,
594 .clock_init = rk_ohci_clock_init,
595 .clock_enable = rk_ohci_clock_enable,
596 .soft_reset = rk_ohci_soft_reset,
600 /*********************************************************************
601 rk3288 usb detections
602 *********************************************************************/
604 #define WAKE_LOCK_TIMEOUT (HZ * 10)
605 inline static void do_wakeup(struct work_struct *work)
607 rk_send_wakeup_key(); // wake up the system
610 static void usb_battery_charger_detect_work(struct work_struct *work)
612 rk_usb_charger_status = usb_battery_charger_detect(0);
614 /********** handler for bvalid irq **********/
615 static irqreturn_t bvalid_irq_handler(int irq, void *dev_id)
618 control_usb->grf_uoc0_base->CON4 = (0x0008 | (0x0008 << 16));
620 #ifdef CONFIG_RK_USB_UART
621 /* usb otg dp/dm switch to usb phy */
622 dwc_otg_uart_mode(NULL, PHY_USB_MODE);
625 if(control_usb->usb_irq_wakeup){
626 wake_lock_timeout(&control_usb->usb_wakelock, WAKE_LOCK_TIMEOUT);
627 schedule_delayed_work(&control_usb->usb_det_wakeup_work, HZ/10);
630 rk_usb_charger_status = USB_BC_TYPE_SDP;
631 schedule_delayed_work(&control_usb->usb_charger_det_work, HZ/10);
636 /***** handler for otg id rise and fall edge *****/
637 static irqreturn_t id_irq_handler(int irq, void *dev_id)
639 unsigned int uoc_con;
642 uoc_con = control_usb->grf_uoc0_base->CON4;
644 if(uoc_con & (1<<5))//id rise
646 control_usb->grf_uoc0_base->CON4 = ((1<<5)|(1<<21)); //clear id rise irq pandding
649 if(uoc_con & (1<<7))//id fall
651 #ifdef CONFIG_RK_USB_UART
652 /* usb otg dp/dm switch to usb phy */
653 dwc_otg_uart_mode(NULL, PHY_USB_MODE);
655 control_usb->grf_uoc0_base->CON4 = ((1<<7)|(1<<23));//clear id fall irq pandding
658 if(control_usb->usb_irq_wakeup){
659 wake_lock_timeout(&control_usb->usb_wakelock, WAKE_LOCK_TIMEOUT);
660 schedule_delayed_work(&control_usb->usb_det_wakeup_work, HZ/10);
666 /***** handler for otg line status change *****/
668 static irqreturn_t line_irq_handler(int irq, void *dev_id)
672 if(control_usb->grf_uoc0_base->CON0 & 1<<15){
673 control_usb->grf_uoc0_base->CON0 = (1<<15 | 1<<31);
676 if(control_usb->grf_uoc1_base->CON0 & 1<<15){
677 control_usb->grf_uoc1_base->CON0 = (1<<15 | 1<<31);
680 if(control_usb->grf_uoc2_base->CON0 & 1<<15){
681 control_usb->grf_uoc2_base->CON0 = (1<<15 | 1<<31);
684 if(control_usb->usb_irq_wakeup){
685 wake_lock_timeout(&control_usb->usb_wakelock, WAKE_LOCK_TIMEOUT);
686 schedule_delayed_work(&control_usb->usb_det_wakeup_work, HZ/10);
692 /************* register usb detection irqs **************/
693 static int otg_irq_detect_init(struct platform_device *pdev)
698 if(control_usb->usb_irq_wakeup){
699 wake_lock_init(&control_usb->usb_wakelock, WAKE_LOCK_SUSPEND, "usb_detect");
700 INIT_DELAYED_WORK(&control_usb->usb_det_wakeup_work, do_wakeup);
703 /*register otg_bvalid irq*/
704 irq = platform_get_irq_byname(pdev, "otg_bvalid");
706 ret = request_irq(irq, bvalid_irq_handler, 0, "otg_bvalid", NULL);
708 dev_err(&pdev->dev, "request_irq %d failed!\n", irq);
711 control_usb->grf_uoc0_base->CON4 = 0x000c000c;// enable bvalid irq
712 if(control_usb->usb_irq_wakeup){
713 enable_irq_wake(irq);
718 /*register otg_id irq*/
719 irq = platform_get_irq_byname(pdev, "otg_id");
721 ret = request_irq(irq, id_irq_handler, 0, "otg_id", NULL);
723 dev_err(&pdev->dev, "request_irq %d failed!\n", irq);
726 control_usb->grf_uoc0_base->CON4 = 0x00f000f0;
727 if(control_usb->usb_irq_wakeup){
728 enable_irq_wake(irq);
733 /*register otg_linestate irq*/
734 irq = platform_get_irq_byname(pdev, "otg_linestate");
736 ret = request_irq(irq, line_irq_handler, 0, "otg_linestate", NULL);
738 dev_err(&pdev->dev, "request_irq %d failed!\n", irq);
741 control_usb->grf_uoc0_base->CON0 = 0xc000c000;
742 if(control_usb->usb_irq_wakeup){
743 enable_irq_wake(irq);
748 /*register host0_linestate irq*/
749 irq = platform_get_irq_byname(pdev, "host0_linestate");
751 ret = request_irq(irq, line_irq_handler, 0, "host0_linestate", NULL);
753 dev_err(&pdev->dev, "request_irq %d failed!\n", irq);
756 control_usb->grf_uoc1_base->CON0 = 0xc000c000;
757 if(control_usb->usb_irq_wakeup){
758 enable_irq_wake(irq);
763 /*register host1_linestate irq*/
764 irq = platform_get_irq_byname(pdev, "host1_linestate");
766 ret = request_irq(irq, line_irq_handler, 0, "host1_linestate", NULL);
768 dev_err(&pdev->dev, "request_irq %d failed!\n", irq);
771 control_usb->grf_uoc2_base->CON0 = 0xc000c000;
772 if(control_usb->usb_irq_wakeup){
773 enable_irq_wake(irq);
781 /********** end of rk3288 usb detections **********/
783 static int usb_grf_ioremap(struct platform_device *pdev)
786 struct resource *res;
787 void *grf_soc_status1;
788 void *grf_soc_status2;
789 void *grf_soc_status19;
790 void *grf_soc_status21;
797 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
799 grf_soc_status1 = devm_ioremap_resource(&pdev->dev, res);
800 if (IS_ERR(grf_soc_status1)){
801 ret = PTR_ERR(grf_soc_status1);
804 control_usb->grf_soc_status1_rk3288 = (pGRF_SOC_STATUS1_RK3288)grf_soc_status1;
806 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
808 grf_soc_status2 = devm_ioremap_resource(&pdev->dev, res);
809 if (IS_ERR(grf_soc_status2)){
810 ret = PTR_ERR(grf_soc_status2);
813 control_usb->grf_soc_status2_rk3288 = (pGRF_SOC_STATUS2_RK3288)grf_soc_status2;
815 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
817 grf_soc_status19 = devm_ioremap_resource(&pdev->dev, res);
818 if (IS_ERR(grf_soc_status19)){
819 ret = PTR_ERR(grf_soc_status19);
822 control_usb->grf_soc_status19_rk3288 = (pGRF_SOC_STATUS19_RK3288)grf_soc_status19;
824 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
826 grf_soc_status21 = devm_ioremap_resource(&pdev->dev, res);
827 if (IS_ERR(grf_soc_status21)){
828 ret = PTR_ERR(grf_soc_status21);
831 control_usb->grf_soc_status21_rk3288 = (pGRF_SOC_STATUS21_RK3288)grf_soc_status21;
833 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
835 grf_uoc0_base = devm_ioremap_resource(&pdev->dev, res);
836 if (IS_ERR(grf_uoc0_base)){
837 ret = PTR_ERR(grf_uoc0_base);
840 control_usb->grf_uoc0_base = (pGRF_UOC0_REG)grf_uoc0_base;
842 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
844 grf_uoc1_base = devm_ioremap_resource(&pdev->dev, res);
845 if (IS_ERR(grf_uoc1_base)){
846 ret = PTR_ERR(grf_uoc1_base);
849 control_usb->grf_uoc1_base = (pGRF_UOC1_REG)grf_uoc1_base;
851 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
853 grf_uoc2_base = devm_ioremap_resource(&pdev->dev, res);
854 if (IS_ERR(grf_uoc2_base)){
855 ret = PTR_ERR(grf_uoc2_base);
858 control_usb->grf_uoc2_base = (pGRF_UOC2_REG)grf_uoc2_base;
860 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
862 grf_uoc3_base = devm_ioremap_resource(&pdev->dev, res);
863 if (IS_ERR(grf_uoc3_base)){
864 ret = PTR_ERR(grf_uoc3_base);
867 control_usb->grf_uoc3_base = (pGRF_UOC3_REG)grf_uoc3_base;
869 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
871 grf_uoc4_base = devm_ioremap_resource(&pdev->dev, res);
872 if (IS_ERR(grf_uoc4_base)){
873 ret = PTR_ERR(grf_uoc4_base);
876 control_usb->grf_uoc4_base = (pGRF_UOC4_REG)grf_uoc4_base;
883 static const struct of_device_id dwc_otg_control_usb_id_table[] = {
885 .compatible = "rockchip,rk3288-dwc-control-usb",
892 static int dwc_otg_control_usb_probe(struct platform_device *pdev)
895 struct device_node *np = pdev->dev.of_node;
896 struct clk* hclk_usb_peri, *phyclk_480m, *phyclk480m_parent;
899 control_usb = devm_kzalloc(&pdev->dev, sizeof(*control_usb),GFP_KERNEL);
901 dev_err(&pdev->dev, "unable to alloc memory for control usb\n");
906 control_usb->chip_id = RK3288_USB_CTLR;
907 control_usb->remote_wakeup = of_property_read_bool(np,
908 "rockchip,remote_wakeup");
909 control_usb->usb_irq_wakeup = of_property_read_bool(np,
910 "rockchip,usb_irq_wakeup");
912 INIT_DELAYED_WORK(&control_usb->usb_charger_det_work, usb_battery_charger_detect_work);
914 hclk_usb_peri = devm_clk_get(&pdev->dev, "hclk_usb_peri");
915 if (IS_ERR(hclk_usb_peri)) {
916 dev_err(&pdev->dev, "Failed to get hclk_usb_peri\n");
921 control_usb->hclk_usb_peri = hclk_usb_peri;
922 clk_prepare_enable(hclk_usb_peri);
924 phyclk480m_parent = devm_clk_get(&pdev->dev, "usbphy2_480m");
925 if (IS_ERR(phyclk480m_parent)) {
926 dev_err(&pdev->dev, "Failed to get usbphy2_480m\n");
930 phyclk_480m = devm_clk_get(&pdev->dev, "usbphy_480m");
931 if (IS_ERR(phyclk_480m)) {
932 dev_err(&pdev->dev, "Failed to get usbphy_480m\n");
936 clk_set_parent(phyclk_480m, phyclk480m_parent);
938 ret = usb_grf_ioremap(pdev);
940 dev_err(&pdev->dev, "Failed to ioremap usb grf\n");
944 control_usb->host_gpios = devm_kzalloc(&pdev->dev, sizeof(struct gpio), GFP_KERNEL);
945 if(!control_usb->host_gpios){
946 dev_err(&pdev->dev, "unable to alloc memory for host_gpios\n");
951 gpio = of_get_named_gpio(np, "gpios", 0);
952 if(!gpio_is_valid(gpio)){
953 dev_err(&pdev->dev, "invalid host gpio%d\n", gpio);
957 control_usb->host_gpios->gpio = gpio;
958 err = devm_gpio_request(&pdev->dev, gpio, "host_drv_gpio");
961 "failed to request GPIO%d for host_drv\n",
966 gpio_direction_output(control_usb->host_gpios->gpio, 1);
968 control_usb->otg_gpios = devm_kzalloc(&pdev->dev, sizeof(struct gpio), GFP_KERNEL);
969 if(!control_usb->otg_gpios){
970 dev_err(&pdev->dev, "unable to alloc memory for otg_gpios\n");
975 gpio = of_get_named_gpio(np, "gpios", 1);
976 if(!gpio_is_valid(gpio)){
977 dev_err(&pdev->dev, "invalid otg gpio%d\n", gpio);
981 control_usb->otg_gpios->gpio = gpio;
982 err = devm_gpio_request(&pdev->dev, gpio, "otg_drv_gpio");
985 "failed to request GPIO%d for otg_drv\n",
990 gpio_direction_output(control_usb->otg_gpios->gpio, 0);
992 #ifdef CONFIG_USB20_OTG
993 if(usb20otg_get_status(USB_STATUS_BVABLID)){
994 rk_usb_charger_status = USB_BC_TYPE_SDP;
995 schedule_delayed_work(&control_usb->usb_charger_det_work, HZ/10);
999 ret = otg_irq_detect_init(pdev);
1006 clk_disable_unprepare(hclk_usb_peri);
1011 static int dwc_otg_control_usb_remove(struct platform_device *pdev)
1013 clk_disable_unprepare(control_usb->hclk_usb_peri);
1017 static struct platform_driver dwc_otg_control_usb_driver = {
1018 .probe = dwc_otg_control_usb_probe,
1019 .remove = dwc_otg_control_usb_remove,
1021 .name = "rk3288-dwc-control-usb",
1022 .owner = THIS_MODULE,
1023 .of_match_table = of_match_ptr(dwc_otg_control_usb_id_table),
1027 static int __init dwc_otg_control_usb_init(void)
1029 return platform_driver_register(&dwc_otg_control_usb_driver);
1032 subsys_initcall(dwc_otg_control_usb_init);
1034 static void __exit dwc_otg_control_usb_exit(void)
1036 platform_driver_unregister(&dwc_otg_control_usb_driver);
1039 module_exit(dwc_otg_control_usb_exit);
1040 MODULE_ALIAS("platform: dwc_control_usb");
1041 MODULE_AUTHOR("RockChip Inc.");
1042 MODULE_DESCRIPTION("RockChip Control Module USB Driver");
1043 MODULE_LICENSE("GPL v2");