drivers/usb/dwc3/gadget.c

   1 /**
   2  * gadget.c - DesignWare USB3 DRD Controller Gadget Framework Link
   3  *
   4  * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com
   5  *
   6  * Authors: Felipe Balbi <balbi@ti.com>,
   7  *          Sebastian Andrzej Siewior <bigeasy@linutronix.de>
   8  *
   9  * This program is free software: you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2  of
  11  * the License as published by the Free Software Foundation.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  */
  18
  19 #include <linux/kernel.h>
  20 #include <linux/delay.h>
  21 #include <linux/slab.h>
  22 #include <linux/spinlock.h>
  23 #include <linux/platform_device.h>
  24 #include <linux/pm_runtime.h>
  25 #include <linux/interrupt.h>
  26 #include <linux/io.h>
  27 #include <linux/list.h>
  28 #include <linux/dma-mapping.h>
  29
  30 #include <linux/usb/ch9.h>
  31 #include <linux/usb/gadget.h>
  32
  33 #include "debug.h"
  34 #include "core.h"
  35 #include "gadget.h"
  36 #include "io.h"
  37
  38 /**
  39  * dwc3_gadget_set_test_mode - Enables USB2 Test Modes
  40  * @dwc: pointer to our context structure
  41  * @mode: the mode to set (J, K SE0 NAK, Force Enable)
  42  *
  43  * Caller should take care of locking. This function will
  44  * return 0 on success or -EINVAL if wrong Test Selector
  45  * is passed
  46  */
  47 int dwc3_gadget_set_test_mode(struct dwc3 *dwc, int mode)
  48 {
  49         u32             reg;
  50
  51         reg = dwc3_readl(dwc->regs, DWC3_DCTL);
  52         reg &= ~DWC3_DCTL_TSTCTRL_MASK;
  53
  54         switch (mode) {
  55         case TEST_J:
  56         case TEST_K:
  57         case TEST_SE0_NAK:
  58         case TEST_PACKET:
  59         case TEST_FORCE_EN:
  60                 reg |= mode << 1;
  61                 break;
  62         default:
  63                 return -EINVAL;
  64         }
  65
  66         dwc3_writel(dwc->regs, DWC3_DCTL, reg);
  67
  68         return 0;
  69 }
  70
  71 /**
  72  * dwc3_gadget_get_link_state - Gets current state of USB Link
  73  * @dwc: pointer to our context structure
  74  *
  75  * Caller should take care of locking. This function will
  76  * return the link state on success (>= 0) or -ETIMEDOUT.
  77  */
  78 int dwc3_gadget_get_link_state(struct dwc3 *dwc)
  79 {
  80         u32             reg;
  81
  82         reg = dwc3_readl(dwc->regs, DWC3_DSTS);
  83
  84         return DWC3_DSTS_USBLNKST(reg);
  85 }
  86
  87 /**
  88  * dwc3_gadget_set_link_state - Sets USB Link to a particular State
  89  * @dwc: pointer to our context structure
  90  * @state: the state to put link into
  91  *
  92  * Caller should take care of locking. This function will
  93  * return 0 on success or -ETIMEDOUT.
  94  */
  95 int dwc3_gadget_set_link_state(struct dwc3 *dwc, enum dwc3_link_state state)
  96 {
  97         int             retries = 10000;
  98         u32             reg;
  99
 100         /*
 101          * Wait until device controller is ready. Only applies to 1.94a and
 102          * later RTL.
 103          */
 104         if (dwc->revision >= DWC3_REVISION_194A) {
 105                 while (--retries) {
 106                         reg = dwc3_readl(dwc->regs, DWC3_DSTS);
 107                         if (reg & DWC3_DSTS_DCNRD)
 108                                 udelay(5);
 109                         else
 110                                 break;
 111                 }
 112
 113                 if (retries <= 0)
 114                         return -ETIMEDOUT;
 115         }
 116
 117         reg = dwc3_readl(dwc->regs, DWC3_DCTL);
 118         reg &= ~DWC3_DCTL_ULSTCHNGREQ_MASK;
 119
 120         /* set requested state */
 121         reg |= DWC3_DCTL_ULSTCHNGREQ(state);
 122         dwc3_writel(dwc->regs, DWC3_DCTL, reg);
 123
 124         /*
 125          * The following code is racy when called from dwc3_gadget_wakeup,
 126          * and is not needed, at least on newer versions
 127          */
 128         if (dwc->revision >= DWC3_REVISION_194A)
 129                 return 0;
 130
 131         /* wait for a change in DSTS */
 132         retries = 10000;
 133         while (--retries) {
 134                 reg = dwc3_readl(dwc->regs, DWC3_DSTS);
 135
 136                 if (DWC3_DSTS_USBLNKST(reg) == state)
 137                         return 0;
 138
 139                 udelay(5);
 140         }
 141
 142         dwc3_trace(trace_dwc3_gadget,
 143                         "link state change request timed out");
 144
 145         return -ETIMEDOUT;
 146 }
 147
 148 static void dwc3_ep_inc_enq(struct dwc3_ep *dep)
 149 {
 150         dep->trb_enqueue++;
 151         dep->trb_enqueue %= DWC3_TRB_NUM;
 152 }
 153
 154 static void dwc3_ep_inc_deq(struct dwc3_ep *dep)
 155 {
 156         dep->trb_dequeue++;
 157         dep->trb_dequeue %= DWC3_TRB_NUM;
 158 }
 159
 160 static int dwc3_ep_is_last_trb(unsigned int index)
 161 {
 162         return index == DWC3_TRB_NUM - 1;
 163 }
 164
 165 void dwc3_gadget_giveback(struct dwc3_ep *dep, struct dwc3_request *req,
 166                 int status)
 167 {
 168         struct dwc3                     *dwc = dep->dwc;
 169         int                             i;
 170
 171         if (req->started) {
 172                 i = 0;
 173                 do {
 174                         dwc3_ep_inc_deq(dep);
 175                         /*
 176                          * Skip LINK TRB. We can't use req->trb and check for
 177                          * DWC3_TRBCTL_LINK_TRB because it points the TRB we
 178                          * just completed (not the LINK TRB).
 179                          */
 180                         if (dwc3_ep_is_last_trb(dep->trb_dequeue) &&
 181                                 usb_endpoint_xfer_isoc(dep->endpoint.desc))
 182                                 dwc3_ep_inc_deq(dep);
 183                 } while(++i < req->request.num_mapped_sgs);
 184                 req->started = false;
 185         }
 186         list_del(&req->list);
 187         req->trb = NULL;
 188
 189         if (req->request.status == -EINPROGRESS)
 190                 req->request.status = status;
 191
 192         if (dwc->ep0_bounced && dep->number == 0)
 193                 dwc->ep0_bounced = false;
 194         else
 195                 usb_gadget_unmap_request(&dwc->gadget, &req->request,
 196                                 req->direction);
 197
 198         trace_dwc3_gadget_giveback(req);
 199
 200         spin_unlock(&dwc->lock);
 201         usb_gadget_giveback_request(&dep->endpoint, &req->request);
 202         spin_lock(&dwc->lock);
 203 }
 204
 205 int dwc3_send_gadget_generic_command(struct dwc3 *dwc, unsigned cmd, u32 param)
 206 {
 207         u32             timeout = 500;
 208         u32             reg;
 209
 210         trace_dwc3_gadget_generic_cmd(cmd, param);
 211
 212         dwc3_writel(dwc->regs, DWC3_DGCMDPAR, param);
 213         dwc3_writel(dwc->regs, DWC3_DGCMD, cmd | DWC3_DGCMD_CMDACT);
 214
 215         do {
 216                 reg = dwc3_readl(dwc->regs, DWC3_DGCMD);
 217                 if (!(reg & DWC3_DGCMD_CMDACT)) {
 218                         dwc3_trace(trace_dwc3_gadget,
 219                                         "Command Complete --> %d",
 220                                         DWC3_DGCMD_STATUS(reg));
 221                         if (DWC3_DGCMD_STATUS(reg))
 222                                 return -EINVAL;
 223                         return 0;
 224                 }
 225
 226                 /*
 227                  * We can't sleep here, because it's also called from
 228                  * interrupt context.
 229                  */
 230                 timeout--;
 231                 if (!timeout) {
 232                         dwc3_trace(trace_dwc3_gadget,
 233                                         "Command Timed Out");
 234                         return -ETIMEDOUT;
 235                 }
 236                 udelay(1);
 237         } while (1);
 238 }
 239
 240 static int __dwc3_gadget_wakeup(struct dwc3 *dwc);
 241
 242 int dwc3_send_gadget_ep_cmd(struct dwc3 *dwc, unsigned ep,
 243                 unsigned cmd, struct dwc3_gadget_ep_cmd_params *params)
 244 {
 245         struct dwc3_ep          *dep = dwc->eps[ep];
 246         u32                     timeout = 500;
 247         u32                     reg;
 248
 249         int                     susphy = false;
 250         int                     ret = -EINVAL;
 251
 252         trace_dwc3_gadget_ep_cmd(dep, cmd, params);
 253
 254         /*
 255          * Synopsys Databook 2.60a states, on section 6.3.2.5.[1-8], that if
 256          * we're issuing an endpoint command, we must check if
 257          * GUSB2PHYCFG.SUSPHY bit is set. If it is, then we need to clear it.
 258          *
 259          * We will also set SUSPHY bit to what it was before returning as stated
 260          * by the same section on Synopsys databook.
 261          */
 262         reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
 263         if (unlikely(reg & DWC3_GUSB2PHYCFG_SUSPHY)) {
 264                 susphy = true;
 265                 reg &= ~DWC3_GUSB2PHYCFG_SUSPHY;
 266                 dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
 267         }
 268
 269         if (cmd == DWC3_DEPCMD_STARTTRANSFER) {
 270                 int             needs_wakeup;
 271
 272                 needs_wakeup = (dwc->link_state == DWC3_LINK_STATE_U1 ||
 273                                 dwc->link_state == DWC3_LINK_STATE_U2 ||
 274                                 dwc->link_state == DWC3_LINK_STATE_U3);
 275
 276                 if (unlikely(needs_wakeup)) {
 277                         ret = __dwc3_gadget_wakeup(dwc);
 278                         dev_WARN_ONCE(dwc->dev, ret, "wakeup failed --> %d\n",
 279                                         ret);
 280                 }
 281         }
 282
 283         dwc3_writel(dwc->regs, DWC3_DEPCMDPAR0(ep), params->param0);
 284         dwc3_writel(dwc->regs, DWC3_DEPCMDPAR1(ep), params->param1);
 285         dwc3_writel(dwc->regs, DWC3_DEPCMDPAR2(ep), params->param2);
 286
 287         dwc3_writel(dwc->regs, DWC3_DEPCMD(ep), cmd | DWC3_DEPCMD_CMDACT);
 288         do {
 289                 reg = dwc3_readl(dwc->regs, DWC3_DEPCMD(ep));
 290                 if (!(reg & DWC3_DEPCMD_CMDACT)) {
 291                         dwc3_trace(trace_dwc3_gadget,
 292                                         "Command Complete --> %d",
 293                                         DWC3_DEPCMD_STATUS(reg));
 294                         if (DWC3_DEPCMD_STATUS(reg))
 295                                 break;
 296                         ret = 0;
 297                         break;
 298                 }
 299
 300                 /*
 301                  * We can't sleep here, because it is also called from
 302                  * interrupt context.
 303                  */
 304                 timeout--;
 305                 if (!timeout) {
 306                         dwc3_trace(trace_dwc3_gadget,
 307                                         "Command Timed Out");
 308                         ret = -ETIMEDOUT;
 309                         break;
 310                 }
 311
 312                 udelay(1);
 313         } while (1);
 314
 315         if (unlikely(susphy)) {
 316                 reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
 317                 reg |= DWC3_GUSB2PHYCFG_SUSPHY;
 318                 dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
 319         }
 320
 321         return ret;
 322 }
 323
 324 static dma_addr_t dwc3_trb_dma_offset(struct dwc3_ep *dep,
 325                 struct dwc3_trb *trb)
 326 {
 327         u32             offset = (char *) trb - (char *) dep->trb_pool;
 328
 329         return dep->trb_pool_dma + offset;
 330 }
 331
 332 static int dwc3_alloc_trb_pool(struct dwc3_ep *dep)
 333 {
 334         struct dwc3             *dwc = dep->dwc;
 335
 336         if (dep->trb_pool)
 337                 return 0;
 338
 339         dep->trb_pool = dma_alloc_coherent(dwc->dev,
 340                         sizeof(struct dwc3_trb) * DWC3_TRB_NUM,
 341                         &dep->trb_pool_dma, GFP_KERNEL);
 342         if (!dep->trb_pool) {
 343                 dev_err(dep->dwc->dev, "failed to allocate trb pool for %s\n",
 344                                 dep->name);
 345                 return -ENOMEM;
 346         }
 347
 348         return 0;
 349 }
 350
 351 static void dwc3_free_trb_pool(struct dwc3_ep *dep)
 352 {
 353         struct dwc3             *dwc = dep->dwc;
 354
 355         dma_free_coherent(dwc->dev, sizeof(struct dwc3_trb) * DWC3_TRB_NUM,
 356                         dep->trb_pool, dep->trb_pool_dma);
 357
 358         dep->trb_pool = NULL;
 359         dep->trb_pool_dma = 0;
 360 }
 361
 362 static int dwc3_gadget_set_xfer_resource(struct dwc3 *dwc, struct dwc3_ep *dep);
 363
 364 /**
 365  * dwc3_gadget_start_config - Configure EP resources
 366  * @dwc: pointer to our controller context structure
 367  * @dep: endpoint that is being enabled
 368  *
 369  * The assignment of transfer resources cannot perfectly follow the
 370  * data book due to the fact that the controller driver does not have
 371  * all knowledge of the configuration in advance. It is given this
 372  * information piecemeal by the composite gadget framework after every
 373  * SET_CONFIGURATION and SET_INTERFACE. Trying to follow the databook
 374  * programming model in this scenario can cause errors. For two
 375  * reasons:
 376  *
 377  * 1) The databook says to do DEPSTARTCFG for every SET_CONFIGURATION
 378  * and SET_INTERFACE (8.1.5). This is incorrect in the scenario of
 379  * multiple interfaces.
 380  *
 381  * 2) The databook does not mention doing more DEPXFERCFG for new
 382  * endpoint on alt setting (8.1.6).
 383  *
 384  * The following simplified method is used instead:
 385  *
 386  * All hardware endpoints can be assigned a transfer resource and this
 387  * setting will stay persistent until either a core reset or
 388  * hibernation. So whenever we do a DEPSTARTCFG(0) we can go ahead and
 389  * do DEPXFERCFG for every hardware endpoint as well. We are
 390  * guaranteed that there are as many transfer resources as endpoints.
 391  *
 392  * This function is called for each endpoint when it is being enabled
 393  * but is triggered only when called for EP0-out, which always happens
 394  * first, and which should only happen in one of the above conditions.
 395  */
 396 static int dwc3_gadget_start_config(struct dwc3 *dwc, struct dwc3_ep *dep)
 397 {
 398         struct dwc3_gadget_ep_cmd_params params;
 399         u32                     cmd;
 400         int                     i;
 401         int                     ret;
 402
 403         if (dep->number)
 404                 return 0;
 405
 406         memset(&params, 0x00, sizeof(params));
 407         cmd = DWC3_DEPCMD_DEPSTARTCFG;
 408
 409         ret = dwc3_send_gadget_ep_cmd(dwc, 0, cmd, &params);
 410         if (ret)
 411                 return ret;
 412
 413         for (i = 0; i < DWC3_ENDPOINTS_NUM; i++) {
 414                 struct dwc3_ep *dep = dwc->eps[i];
 415
 416                 if (!dep)
 417                         continue;
 418
 419                 ret = dwc3_gadget_set_xfer_resource(dwc, dep);
 420                 if (ret)
 421                         return ret;
 422         }
 423
 424         return 0;
 425 }
 426
 427 static int dwc3_gadget_set_ep_config(struct dwc3 *dwc, struct dwc3_ep *dep,
 428                 const struct usb_endpoint_descriptor *desc,
 429                 const struct usb_ss_ep_comp_descriptor *comp_desc,
 430                 bool ignore, bool restore)
 431 {
 432         struct dwc3_gadget_ep_cmd_params params;
 433
 434         memset(&params, 0x00, sizeof(params));
 435
 436         params.param0 = DWC3_DEPCFG_EP_TYPE(usb_endpoint_type(desc))
 437                 | DWC3_DEPCFG_MAX_PACKET_SIZE(usb_endpoint_maxp(desc));
 438
 439         /* Burst size is only needed in SuperSpeed mode */
 440         if (dwc->gadget.speed == USB_SPEED_SUPER) {
 441                 u32 burst = dep->endpoint.maxburst - 1;
 442
 443                 params.param0 |= DWC3_DEPCFG_BURST_SIZE(burst);
 444         }
 445
 446         if (ignore)
 447                 params.param0 |= DWC3_DEPCFG_IGN_SEQ_NUM;
 448
 449         if (restore) {
 450                 params.param0 |= DWC3_DEPCFG_ACTION_RESTORE;
 451                 params.param2 |= dep->saved_state;
 452         }
 453
 454         params.param1 = DWC3_DEPCFG_XFER_COMPLETE_EN
 455                 | DWC3_DEPCFG_XFER_NOT_READY_EN;
 456
 457         if (usb_ss_max_streams(comp_desc) && usb_endpoint_xfer_bulk(desc)) {
 458                 params.param1 |= DWC3_DEPCFG_STREAM_CAPABLE
 459                         | DWC3_DEPCFG_STREAM_EVENT_EN;
 460                 dep->stream_capable = true;
 461         }
 462
 463         if (!usb_endpoint_xfer_control(desc))
 464                 params.param1 |= DWC3_DEPCFG_XFER_IN_PROGRESS_EN;
 465
 466         /*
 467          * We are doing 1:1 mapping for endpoints, meaning
 468          * Physical Endpoints 2 maps to Logical Endpoint 2 and
 469          * so on. We consider the direction bit as part of the physical
 470          * endpoint number. So USB endpoint 0x81 is 0x03.
 471          */
 472         params.param1 |= DWC3_DEPCFG_EP_NUMBER(dep->number);
 473
 474         /*
 475          * We must use the lower 16 TX FIFOs even though
 476          * HW might have more
 477          */
 478         if (dep->direction)
 479                 params.param0 |= DWC3_DEPCFG_FIFO_NUMBER(dep->number >> 1);
 480
 481         if (desc->bInterval) {
 482                 params.param1 |= DWC3_DEPCFG_BINTERVAL_M1(desc->bInterval - 1);
 483                 dep->interval = 1 << (desc->bInterval - 1);
 484         }
 485
 486         return dwc3_send_gadget_ep_cmd(dwc, dep->number,
 487                         DWC3_DEPCMD_SETEPCONFIG, &params);
 488 }
 489
 490 static int dwc3_gadget_set_xfer_resource(struct dwc3 *dwc, struct dwc3_ep *dep)
 491 {
 492         struct dwc3_gadget_ep_cmd_params params;
 493
 494         memset(&params, 0x00, sizeof(params));
 495
 496         params.param0 = DWC3_DEPXFERCFG_NUM_XFER_RES(1);
 497
 498         return dwc3_send_gadget_ep_cmd(dwc, dep->number,
 499                         DWC3_DEPCMD_SETTRANSFRESOURCE, &params);
 500 }
 501
 502 /**
 503  * __dwc3_gadget_ep_enable - Initializes a HW endpoint
 504  * @dep: endpoint to be initialized
 505  * @desc: USB Endpoint Descriptor
 506  *
 507  * Caller should take care of locking
 508  */
 509 static int __dwc3_gadget_ep_enable(struct dwc3_ep *dep,
 510                 const struct usb_endpoint_descriptor *desc,
 511                 const struct usb_ss_ep_comp_descriptor *comp_desc,
 512                 bool ignore, bool restore)
 513 {
 514         struct dwc3             *dwc = dep->dwc;
 515         u32                     reg;
 516         int                     ret;
 517
 518         dwc3_trace(trace_dwc3_gadget, "Enabling %s", dep->name);
 519
 520         if (!(dep->flags & DWC3_EP_ENABLED)) {
 521                 ret = dwc3_gadget_start_config(dwc, dep);
 522                 if (ret)
 523                         return ret;
 524         }
 525
 526         ret = dwc3_gadget_set_ep_config(dwc, dep, desc, comp_desc, ignore,
 527                         restore);
 528         if (ret)
 529                 return ret;
 530
 531         if (!(dep->flags & DWC3_EP_ENABLED)) {
 532                 struct dwc3_trb *trb_st_hw;
 533                 struct dwc3_trb *trb_link;
 534
 535                 dep->endpoint.desc = desc;
 536                 dep->comp_desc = comp_desc;
 537                 dep->type = usb_endpoint_type(desc);
 538                 dep->flags |= DWC3_EP_ENABLED;
 539
 540                 reg = dwc3_readl(dwc->regs, DWC3_DALEPENA);
 541                 reg |= DWC3_DALEPENA_EP(dep->number);
 542                 dwc3_writel(dwc->regs, DWC3_DALEPENA, reg);
 543
 544                 if (!usb_endpoint_xfer_isoc(desc))
 545                         goto out;
 546
 547                 /* Link TRB for ISOC. The HWO bit is never reset */
 548                 trb_st_hw = &dep->trb_pool[0];
 549
 550                 trb_link = &dep->trb_pool[DWC3_TRB_NUM - 1];
 551                 memset(trb_link, 0, sizeof(*trb_link));
 552
 553                 trb_link->bpl = lower_32_bits(dwc3_trb_dma_offset(dep, trb_st_hw));
 554                 trb_link->bph = upper_32_bits(dwc3_trb_dma_offset(dep, trb_st_hw));
 555                 trb_link->ctrl |= DWC3_TRBCTL_LINK_TRB;
 556                 trb_link->ctrl |= DWC3_TRB_CTRL_HWO;
 557         }
 558
 559 out:
 560         switch (usb_endpoint_type(desc)) {
 561         case USB_ENDPOINT_XFER_CONTROL:
 562                 /* don't change name */
 563                 break;
 564         case USB_ENDPOINT_XFER_ISOC:
 565                 strlcat(dep->name, "-isoc", sizeof(dep->name));
 566                 break;
 567         case USB_ENDPOINT_XFER_BULK:
 568                 strlcat(dep->name, "-bulk", sizeof(dep->name));
 569                 break;
 570         case USB_ENDPOINT_XFER_INT:
 571                 strlcat(dep->name, "-int", sizeof(dep->name));
 572                 break;
 573         default:
 574                 dev_err(dwc->dev, "invalid endpoint transfer type\n");
 575         }
 576
 577         return 0;
 578 }
 579
 580 static void dwc3_stop_active_transfer(struct dwc3 *dwc, u32 epnum, bool force);
 581 static void dwc3_remove_requests(struct dwc3 *dwc, struct dwc3_ep *dep)
 582 {
 583         struct dwc3_request             *req;
 584
 585         if (!list_empty(&dep->started_list)) {
 586                 dwc3_stop_active_transfer(dwc, dep->number, true);
 587
 588                 /* - giveback all requests to gadget driver */
 589                 while (!list_empty(&dep->started_list)) {
 590                         req = next_request(&dep->started_list);
 591
 592                         dwc3_gadget_giveback(dep, req, -ESHUTDOWN);
 593                 }
 594         }
 595
 596         while (!list_empty(&dep->pending_list)) {
 597                 req = next_request(&dep->pending_list);
 598
 599                 dwc3_gadget_giveback(dep, req, -ESHUTDOWN);
 600         }
 601 }
 602
 603 /**
 604  * __dwc3_gadget_ep_disable - Disables a HW endpoint
 605  * @dep: the endpoint to disable
 606  *
 607  * This function also removes requests which are currently processed ny the
 608  * hardware and those which are not yet scheduled.
 609  * Caller should take care of locking.
 610  */
 611 static int __dwc3_gadget_ep_disable(struct dwc3_ep *dep)
 612 {
 613         struct dwc3             *dwc = dep->dwc;
 614         u32                     reg;
 615
 616         dwc3_trace(trace_dwc3_gadget, "Disabling %s", dep->name);
 617
 618         dwc3_remove_requests(dwc, dep);
 619
 620         /* make sure HW endpoint isn't stalled */
 621         if (dep->flags & DWC3_EP_STALL)
 622                 __dwc3_gadget_ep_set_halt(dep, 0, false);
 623
 624         reg = dwc3_readl(dwc->regs, DWC3_DALEPENA);
 625         reg &= ~DWC3_DALEPENA_EP(dep->number);
 626         dwc3_writel(dwc->regs, DWC3_DALEPENA, reg);
 627
 628         dep->stream_capable = false;
 629         dep->endpoint.desc = NULL;
 630         dep->comp_desc = NULL;
 631         dep->type = 0;
 632         dep->flags = 0;
 633
 634         snprintf(dep->name, sizeof(dep->name), "ep%d%s",
 635                         dep->number >> 1,
 636                         (dep->number & 1) ? "in" : "out");
 637
 638         return 0;
 639 }
 640
 641 /* -------------------------------------------------------------------------- */
 642
 643 static int dwc3_gadget_ep0_enable(struct usb_ep *ep,
 644                 const struct usb_endpoint_descriptor *desc)
 645 {
 646         return -EINVAL;
 647 }
 648
 649 static int dwc3_gadget_ep0_disable(struct usb_ep *ep)
 650 {
 651         return -EINVAL;
 652 }
 653
 654 /* -------------------------------------------------------------------------- */
 655
 656 static int dwc3_gadget_ep_enable(struct usb_ep *ep,
 657                 const struct usb_endpoint_descriptor *desc)
 658 {
 659         struct dwc3_ep                  *dep;
 660         struct dwc3                     *dwc;
 661         unsigned long                   flags;
 662         int                             ret;
 663
 664         if (!ep || !desc || desc->bDescriptorType != USB_DT_ENDPOINT) {
 665                 pr_debug("dwc3: invalid parameters\n");
 666                 return -EINVAL;
 667         }
 668
 669         if (!desc->wMaxPacketSize) {
 670                 pr_debug("dwc3: missing wMaxPacketSize\n");
 671                 return -EINVAL;
 672         }
 673
 674         dep = to_dwc3_ep(ep);
 675         dwc = dep->dwc;
 676
 677         if (dev_WARN_ONCE(dwc->dev, dep->flags & DWC3_EP_ENABLED,
 678                                         "%s is already enabled\n",
 679                                         dep->name))
 680                 return 0;
 681
 682         spin_lock_irqsave(&dwc->lock, flags);
 683         ret = __dwc3_gadget_ep_enable(dep, desc, ep->comp_desc, false, false);
 684         spin_unlock_irqrestore(&dwc->lock, flags);
 685
 686         return ret;
 687 }
 688
 689 static int dwc3_gadget_ep_disable(struct usb_ep *ep)
 690 {
 691         struct dwc3_ep                  *dep;
 692         struct dwc3                     *dwc;
 693         unsigned long                   flags;
 694         int                             ret;
 695
 696         if (!ep) {
 697                 pr_debug("dwc3: invalid parameters\n");
 698                 return -EINVAL;
 699         }
 700
 701         dep = to_dwc3_ep(ep);
 702         dwc = dep->dwc;
 703
 704         if (dev_WARN_ONCE(dwc->dev, !(dep->flags & DWC3_EP_ENABLED),
 705                                         "%s is already disabled\n",
 706                                         dep->name))
 707                 return 0;
 708
 709         spin_lock_irqsave(&dwc->lock, flags);
 710         ret = __dwc3_gadget_ep_disable(dep);
 711         spin_unlock_irqrestore(&dwc->lock, flags);
 712
 713         return ret;
 714 }
 715
 716 static struct usb_request *dwc3_gadget_ep_alloc_request(struct usb_ep *ep,
 717         gfp_t gfp_flags)
 718 {
 719         struct dwc3_request             *req;
 720         struct dwc3_ep                  *dep = to_dwc3_ep(ep);
 721
 722         req = kzalloc(sizeof(*req), gfp_flags);
 723         if (!req)
 724                 return NULL;
 725
 726         req->epnum      = dep->number;
 727         req->dep        = dep;
 728
 729         trace_dwc3_alloc_request(req);
 730
 731         return &req->request;
 732 }
 733
 734 static void dwc3_gadget_ep_free_request(struct usb_ep *ep,
 735                 struct usb_request *request)
 736 {
 737         struct dwc3_request             *req = to_dwc3_request(request);
 738
 739         trace_dwc3_free_request(req);
 740         kfree(req);
 741 }
 742
 743 /**
 744  * dwc3_prepare_one_trb - setup one TRB from one request
 745  * @dep: endpoint for which this request is prepared
 746  * @req: dwc3_request pointer
 747  */
 748 static void dwc3_prepare_one_trb(struct dwc3_ep *dep,
 749                 struct dwc3_request *req, dma_addr_t dma,
 750                 unsigned length, unsigned last, unsigned chain, unsigned node)
 751 {
 752         struct dwc3_trb         *trb;
 753
 754         dwc3_trace(trace_dwc3_gadget, "%s: req %p dma %08llx length %d%s%s",
 755                         dep->name, req, (unsigned long long) dma,
 756                         length, last ? " last" : "",
 757                         chain ? " chain" : "");
 758
 759
 760         trb = &dep->trb_pool[dep->trb_enqueue];
 761
 762         if (!req->trb) {
 763                 dwc3_gadget_move_started_request(req);
 764                 req->trb = trb;
 765                 req->trb_dma = dwc3_trb_dma_offset(dep, trb);
 766                 req->first_trb_index = dep->trb_enqueue;
 767         }
 768
 769         dwc3_ep_inc_enq(dep);
 770         /* Skip the LINK-TRB on ISOC */
 771         if (dwc3_ep_is_last_trb(dep->trb_enqueue) &&
 772                         usb_endpoint_xfer_isoc(dep->endpoint.desc))
 773                 dwc3_ep_inc_enq(dep);
 774
 775         trb->size = DWC3_TRB_SIZE_LENGTH(length);
 776         trb->bpl = lower_32_bits(dma);
 777         trb->bph = upper_32_bits(dma);
 778
 779         switch (usb_endpoint_type(dep->endpoint.desc)) {
 780         case USB_ENDPOINT_XFER_CONTROL:
 781                 trb->ctrl = DWC3_TRBCTL_CONTROL_SETUP;
 782                 break;
 783
 784         case USB_ENDPOINT_XFER_ISOC:
 785                 if (!node)
 786                         trb->ctrl = DWC3_TRBCTL_ISOCHRONOUS_FIRST;
 787                 else
 788                         trb->ctrl = DWC3_TRBCTL_ISOCHRONOUS;
 789
 790                 /* always enable Interrupt on Missed ISOC */
 791                 trb->ctrl |= DWC3_TRB_CTRL_ISP_IMI;
 792                 break;
 793
 794         case USB_ENDPOINT_XFER_BULK:
 795         case USB_ENDPOINT_XFER_INT:
 796                 trb->ctrl = DWC3_TRBCTL_NORMAL;
 797                 break;
 798         default:
 799                 /*
 800                  * This is only possible with faulty memory because we
 801                  * checked it already :)
 802                  */
 803                 BUG();
 804         }
 805
 806         /* always enable Continue on Short Packet */
 807         trb->ctrl |= DWC3_TRB_CTRL_CSP;
 808
 809         if (!req->request.no_interrupt)
 810                 trb->ctrl |= DWC3_TRB_CTRL_IOC | DWC3_TRB_CTRL_ISP_IMI;
 811
 812         if (last)
 813                 trb->ctrl |= DWC3_TRB_CTRL_LST;
 814
 815         if (chain)
 816                 trb->ctrl |= DWC3_TRB_CTRL_CHN;
 817
 818         if (usb_endpoint_xfer_bulk(dep->endpoint.desc) && dep->stream_capable)
 819                 trb->ctrl |= DWC3_TRB_CTRL_SID_SOFN(req->request.stream_id);
 820
 821         trb->ctrl |= DWC3_TRB_CTRL_HWO;
 822
 823         trace_dwc3_prepare_trb(dep, trb);
 824 }
 825
 826 /*
 827  * dwc3_prepare_trbs - setup TRBs from requests
 828  * @dep: endpoint for which requests are being prepared
 829  * @starting: true if the endpoint is idle and no requests are queued.
 830  *
 831  * The function goes through the requests list and sets up TRBs for the
 832  * transfers. The function returns once there are no more TRBs available or
 833  * it runs out of requests.
 834  */
 835 static void dwc3_prepare_trbs(struct dwc3_ep *dep, bool starting)
 836 {
 837         struct dwc3_request     *req, *n;
 838         u32                     trbs_left;
 839         u32                     max;
 840         unsigned int            last_one = 0;
 841
 842         BUILD_BUG_ON_NOT_POWER_OF_2(DWC3_TRB_NUM);
 843
 844         /* the first request must not be queued */
 845         trbs_left = dep->trb_dequeue - dep->trb_enqueue;
 846
 847         /* Can't wrap around on a non-isoc EP since there's no link TRB */
 848         if (!usb_endpoint_xfer_isoc(dep->endpoint.desc)) {
 849                 max = DWC3_TRB_NUM - dep->trb_enqueue;
 850                 if (trbs_left > max)
 851                         trbs_left = max;
 852         }
 853
 854         /*
 855          * If busy & slot are equal than it is either full or empty. If we are
 856          * starting to process requests then we are empty. Otherwise we are
 857          * full and don't do anything
 858          */
 859         if (!trbs_left) {
 860                 if (!starting)
 861                         return;
 862                 trbs_left = DWC3_TRB_NUM;
 863                 /*
 864                  * In case we start from scratch, we queue the ISOC requests
 865                  * starting from slot 1. This is done because we use ring
 866                  * buffer and have no LST bit to stop us. Instead, we place
 867                  * IOC bit every TRB_NUM/4. We try to avoid having an interrupt
 868                  * after the first request so we start at slot 1 and have
 869                  * 7 requests proceed before we hit the first IOC.
 870                  * Other transfer types don't use the ring buffer and are
 871                  * processed from the first TRB until the last one. Since we
 872                  * don't wrap around we have to start at the beginning.
 873                  */
 874                 if (usb_endpoint_xfer_isoc(dep->endpoint.desc)) {
 875                         dep->trb_dequeue = 1;
 876                         dep->trb_enqueue = 1;
 877                 } else {
 878                         dep->trb_dequeue = 0;
 879                         dep->trb_enqueue = 0;
 880                 }
 881         }
 882
 883         /* The last TRB is a link TRB, not used for xfer */
 884         if ((trbs_left <= 1) && usb_endpoint_xfer_isoc(dep->endpoint.desc))
 885                 return;
 886
 887         list_for_each_entry_safe(req, n, &dep->pending_list, list) {
 888                 unsigned        length;
 889                 dma_addr_t      dma;
 890                 last_one = false;
 891
 892                 if (req->request.num_mapped_sgs > 0) {
 893                         struct usb_request *request = &req->request;
 894                         struct scatterlist *sg = request->sg;
 895                         struct scatterlist *s;
 896                         int             i;
 897
 898                         for_each_sg(sg, s, request->num_mapped_sgs, i) {
 899                                 unsigned chain = true;
 900
 901                                 length = sg_dma_len(s);
 902                                 dma = sg_dma_address(s);
 903
 904                                 if (i == (request->num_mapped_sgs - 1) ||
 905                                                 sg_is_last(s)) {
 906                                         if (list_empty(&dep->pending_list))
 907                                                 last_one = true;
 908                                         chain = false;
 909                                 }
 910
 911                                 trbs_left--;
 912                                 if (!trbs_left)
 913                                         last_one = true;
 914
 915                                 if (last_one)
 916                                         chain = false;
 917
 918                                 dwc3_prepare_one_trb(dep, req, dma, length,
 919                                                 last_one, chain, i);
 920
 921                                 if (last_one)
 922                                         break;
 923                         }
 924
 925                         if (last_one)
 926                                 break;
 927                 } else {
 928                         dma = req->request.dma;
 929                         length = req->request.length;
 930                         trbs_left--;
 931
 932                         if (!trbs_left)
 933                                 last_one = 1;
 934
 935                         /* Is this the last request? */
 936                         if (list_is_last(&req->list, &dep->pending_list))
 937                                 last_one = 1;
 938
 939                         dwc3_prepare_one_trb(dep, req, dma, length,
 940                                         last_one, false, 0);
 941
 942                         if (last_one)
 943                                 break;
 944                 }
 945         }
 946 }
 947
 948 static int __dwc3_gadget_kick_transfer(struct dwc3_ep *dep, u16 cmd_param,
 949                 int start_new)
 950 {
 951         struct dwc3_gadget_ep_cmd_params params;
 952         struct dwc3_request             *req;
 953         struct dwc3                     *dwc = dep->dwc;
 954         int                             ret;
 955         u32                             cmd;
 956
 957         if (start_new && (dep->flags & DWC3_EP_BUSY)) {
 958                 dwc3_trace(trace_dwc3_gadget, "%s: endpoint busy", dep->name);
 959                 return -EBUSY;
 960         }
 961
 962         /*
 963          * If we are getting here after a short-out-packet we don't enqueue any
 964          * new requests as we try to set the IOC bit only on the last request.
 965          */
 966         if (start_new) {
 967                 if (list_empty(&dep->started_list))
 968                         dwc3_prepare_trbs(dep, start_new);
 969
 970                 /* req points to the first request which will be sent */
 971                 req = next_request(&dep->started_list);
 972         } else {
 973                 dwc3_prepare_trbs(dep, start_new);
 974
 975                 /*
 976                  * req points to the first request where HWO changed from 0 to 1
 977                  */
 978                 req = next_request(&dep->started_list);
 979         }
 980         if (!req) {
 981                 dep->flags |= DWC3_EP_PENDING_REQUEST;
 982                 return 0;
 983         }
 984
 985         memset(&params, 0, sizeof(params));
 986
 987         if (start_new) {
 988                 params.param0 = upper_32_bits(req->trb_dma);
 989                 params.param1 = lower_32_bits(req->trb_dma);
 990                 cmd = DWC3_DEPCMD_STARTTRANSFER;
 991         } else {
 992                 cmd = DWC3_DEPCMD_UPDATETRANSFER;
 993         }
 994
 995         cmd |= DWC3_DEPCMD_PARAM(cmd_param);
 996         ret = dwc3_send_gadget_ep_cmd(dwc, dep->number, cmd, &params);
 997         if (ret < 0) {
 998                 /*
 999                  * FIXME we need to iterate over the list of requests
1000                  * here and stop, unmap, free and del each of the linked
1001                  * requests instead of what we do now.
1002                  */
1003                 usb_gadget_unmap_request(&dwc->gadget, &req->request,
1004                                 req->direction);
1005                 list_del(&req->list);
1006                 return ret;
1007         }
1008
1009         dep->flags |= DWC3_EP_BUSY;
1010
1011         if (start_new) {
1012                 dep->resource_index = dwc3_gadget_ep_get_transfer_index(dwc,
1013                                 dep->number);
1014                 WARN_ON_ONCE(!dep->resource_index);
1015         }
1016
1017         return 0;
1018 }
1019
1020 static void __dwc3_gadget_start_isoc(struct dwc3 *dwc,
1021                 struct dwc3_ep *dep, u32 cur_uf)
1022 {
1023         u32 uf;
1024
1025         if (list_empty(&dep->pending_list)) {
1026                 dwc3_trace(trace_dwc3_gadget,
1027                                 "ISOC ep %s run out for requests",
1028                                 dep->name);
1029                 dep->flags |= DWC3_EP_PENDING_REQUEST;
1030                 return;
1031         }
1032
1033         /* 4 micro frames in the future */
1034         uf = cur_uf + dep->interval * 4;
1035
1036         __dwc3_gadget_kick_transfer(dep, uf, 1);
1037 }
1038
1039 static void dwc3_gadget_start_isoc(struct dwc3 *dwc,
1040                 struct dwc3_ep *dep, const struct dwc3_event_depevt *event)
1041 {
1042         u32 cur_uf, mask;
1043
1044         mask = ~(dep->interval - 1);
1045         cur_uf = event->parameters & mask;
1046
1047         __dwc3_gadget_start_isoc(dwc, dep, cur_uf);
1048 }
1049
1050 static int __dwc3_gadget_ep_queue(struct dwc3_ep *dep, struct dwc3_request *req)
1051 {
1052         struct dwc3             *dwc = dep->dwc;
1053         int                     ret;
1054
1055         if (!dep->endpoint.desc) {
1056                 dwc3_trace(trace_dwc3_gadget,
1057                                 "trying to queue request %p to disabled %s\n",
1058                                 &req->request, dep->endpoint.name);
1059                 return -ESHUTDOWN;
1060         }
1061
1062         if (WARN(req->dep != dep, "request %p belongs to '%s'\n",
1063                                 &req->request, req->dep->name)) {
1064                 dwc3_trace(trace_dwc3_gadget, "request %p belongs to '%s'\n",
1065                                 &req->request, req->dep->name);
1066                 return -EINVAL;
1067         }
1068
1069         req->request.actual     = 0;
1070         req->request.status     = -EINPROGRESS;
1071         req->direction          = dep->direction;
1072         req->epnum              = dep->number;
1073
1074         trace_dwc3_ep_queue(req);
1075
1076         /*
1077          * Per databook, the total size of buffer must be a multiple
1078          * of MaxPacketSize for OUT endpoints. And MaxPacketSize is
1079          * configed for endpoints in dwc3_gadget_set_ep_config(),
1080          * set to usb_endpoint_descriptor->wMaxPacketSize.
1081          */
1082         if (dep->direction == 0 &&
1083             req->request.length % dep->endpoint.desc->wMaxPacketSize)
1084                 req->request.length = roundup(req->request.length,
1085                                         dep->endpoint.desc->wMaxPacketSize);
1086
1087         /*
1088          * We only add to our list of requests now and
1089          * start consuming the list once we get XferNotReady
1090          * IRQ.
1091          *
1092          * That way, we avoid doing anything that we don't need
1093          * to do now and defer it until the point we receive a
1094          * particular token from the Host side.
1095          *
1096          * This will also avoid Host cancelling URBs due to too
1097          * many NAKs.
1098          */
1099         ret = usb_gadget_map_request(&dwc->gadget, &req->request,
1100                         dep->direction);
1101         if (ret)
1102                 return ret;
1103
1104         list_add_tail(&req->list, &dep->pending_list);
1105
1106         /*
1107          * If there are no pending requests and the endpoint isn't already
1108          * busy, we will just start the request straight away.
1109          *
1110          * This will save one IRQ (XFER_NOT_READY) and possibly make it a
1111          * little bit faster.
1112          */
1113         if (!usb_endpoint_xfer_isoc(dep->endpoint.desc) &&
1114                         !usb_endpoint_xfer_int(dep->endpoint.desc) &&
1115                         !(dep->flags & DWC3_EP_BUSY)) {
1116                 ret = __dwc3_gadget_kick_transfer(dep, 0, true);
1117                 goto out;
1118         }
1119
1120         /*
1121          * There are a few special cases:
1122          *
1123          * 1. XferNotReady with empty list of requests. We need to kick the
1124          *    transfer here in that situation, otherwise we will be NAKing
1125          *    forever. If we get XferNotReady before gadget driver has a
1126          *    chance to queue a request, we will ACK the IRQ but won't be
1127          *    able to receive the data until the next request is queued.
1128          *    The following code is handling exactly that.
1129          *
1130          */
1131         if (dep->flags & DWC3_EP_PENDING_REQUEST) {
1132                 /*
1133                  * If xfernotready is already elapsed and it is a case
1134                  * of isoc transfer, then issue END TRANSFER, so that
1135                  * you can receive xfernotready again and can have
1136                  * notion of current microframe.
1137                  */
1138                 if (usb_endpoint_xfer_isoc(dep->endpoint.desc)) {
1139                         if (list_empty(&dep->started_list)) {
1140                                 dwc3_stop_active_transfer(dwc, dep->number, true);
1141                                 dep->flags = DWC3_EP_ENABLED;
1142                         }
1143                         return 0;
1144                 }
1145
1146                 ret = __dwc3_gadget_kick_transfer(dep, 0, true);
1147                 if (!ret)
1148                         dep->flags &= ~DWC3_EP_PENDING_REQUEST;
1149
1150                 goto out;
1151         }
1152
1153         /*
1154          * 2. XferInProgress on Isoc EP with an active transfer. We need to
1155          *    kick the transfer here after queuing a request, otherwise the
1156          *    core may not see the modified TRB(s).
1157          */
1158         if (usb_endpoint_xfer_isoc(dep->endpoint.desc) &&
1159                         (dep->flags & DWC3_EP_BUSY) &&
1160                         !(dep->flags & DWC3_EP_MISSED_ISOC)) {
1161                 WARN_ON_ONCE(!dep->resource_index);
1162                 ret = __dwc3_gadget_kick_transfer(dep, dep->resource_index,
1163                                 false);
1164                 goto out;
1165         }
1166
1167         /*
1168          * 4. Stream Capable Bulk Endpoints. We need to start the transfer
1169          * right away, otherwise host will not know we have streams to be
1170          * handled.
1171          */
1172         if (dep->stream_capable)
1173                 ret = __dwc3_gadget_kick_transfer(dep, 0, true);
1174
1175 out:
1176         if (ret && ret != -EBUSY)
1177                 dwc3_trace(trace_dwc3_gadget,
1178                                 "%s: failed to kick transfers\n",
1179                                 dep->name);
1180         if (ret == -EBUSY)
1181                 ret = 0;
1182
1183         return ret;
1184 }
1185
1186 static void __dwc3_gadget_ep_zlp_complete(struct usb_ep *ep,
1187                 struct usb_request *request)
1188 {
1189         dwc3_gadget_ep_free_request(ep, request);
1190 }
1191
1192 static int __dwc3_gadget_ep_queue_zlp(struct dwc3 *dwc, struct dwc3_ep *dep)
1193 {
1194         struct dwc3_request             *req;
1195         struct usb_request              *request;
1196         struct usb_ep                   *ep = &dep->endpoint;
1197
1198         dwc3_trace(trace_dwc3_gadget, "queueing ZLP\n");
1199         request = dwc3_gadget_ep_alloc_request(ep, GFP_ATOMIC);
1200         if (!request)
1201                 return -ENOMEM;
1202
1203         request->length = 0;
1204         request->buf = dwc->zlp_buf;
1205         request->complete = __dwc3_gadget_ep_zlp_complete;
1206
1207         req = to_dwc3_request(request);
1208
1209         return __dwc3_gadget_ep_queue(dep, req);
1210 }
1211
1212 static int dwc3_gadget_ep_queue(struct usb_ep *ep, struct usb_request *request,
1213         gfp_t gfp_flags)
1214 {
1215         struct dwc3_request             *req = to_dwc3_request(request);
1216         struct dwc3_ep                  *dep = to_dwc3_ep(ep);
1217         struct dwc3                     *dwc = dep->dwc;
1218
1219         unsigned long                   flags;
1220
1221         int                             ret;
1222
1223         spin_lock_irqsave(&dwc->lock, flags);
1224         ret = __dwc3_gadget_ep_queue(dep, req);
1225
1226         /*
1227          * Okay, here's the thing, if gadget driver has requested for a ZLP by
1228          * setting request->zero, instead of doing magic, we will just queue an
1229          * extra usb_request ourselves so that it gets handled the same way as
1230          * any other request.
1231          */
1232         if (ret == 0 && request->zero && request->length &&
1233             (request->length % ep->desc->wMaxPacketSize == 0))
1234                 ret = __dwc3_gadget_ep_queue_zlp(dwc, dep);
1235
1236         spin_unlock_irqrestore(&dwc->lock, flags);
1237
1238         return ret;
1239 }
1240
1241 static int dwc3_gadget_ep_dequeue(struct usb_ep *ep,
1242                 struct usb_request *request)
1243 {
1244         struct dwc3_request             *req = to_dwc3_request(request);
1245         struct dwc3_request             *r = NULL;
1246
1247         struct dwc3_ep                  *dep = to_dwc3_ep(ep);
1248         struct dwc3                     *dwc = dep->dwc;
1249
1250         unsigned long                   flags;
1251         int                             ret = 0;
1252
1253         trace_dwc3_ep_dequeue(req);
1254
1255         spin_lock_irqsave(&dwc->lock, flags);
1256
1257         list_for_each_entry(r, &dep->pending_list, list) {
1258                 if (r == req)
1259                         break;
1260         }
1261
1262         if (r != req) {
1263                 list_for_each_entry(r, &dep->started_list, list) {
1264                         if (r == req)
1265                                 break;
1266                 }
1267                 if (r == req) {
1268                         /* wait until it is processed */
1269                         dwc3_stop_active_transfer(dwc, dep->number, true);
1270                         goto out1;
1271                 }
1272                 dev_err(dwc->dev, "request %p was not queued to %s\n",
1273                                 request, ep->name);
1274                 ret = -EINVAL;
1275                 goto out0;
1276         }
1277
1278 out1:
1279         /* giveback the request */
1280         dwc3_gadget_giveback(dep, req, -ECONNRESET);
1281
1282 out0:
1283         spin_unlock_irqrestore(&dwc->lock, flags);
1284
1285         return ret;
1286 }
1287
1288 int __dwc3_gadget_ep_set_halt(struct dwc3_ep *dep, int value, int protocol)
1289 {
1290         struct dwc3_gadget_ep_cmd_params        params;
1291         struct dwc3                             *dwc = dep->dwc;
1292         int                                     ret;
1293
1294         if (usb_endpoint_xfer_isoc(dep->endpoint.desc)) {
1295                 dev_err(dwc->dev, "%s is of Isochronous type\n", dep->name);
1296                 return -EINVAL;
1297         }
1298
1299         memset(&params, 0x00, sizeof(params));
1300
1301         if (value) {
1302                 if (!protocol && ((dep->direction && dep->flags & DWC3_EP_BUSY) ||
1303                                 (!list_empty(&dep->started_list) ||
1304                                  !list_empty(&dep->pending_list)))) {
1305                         dwc3_trace(trace_dwc3_gadget,
1306                                         "%s: pending request, cannot halt\n",
1307                                         dep->name);
1308                         return -EAGAIN;
1309                 }
1310
1311                 ret = dwc3_send_gadget_ep_cmd(dwc, dep->number,
1312                         DWC3_DEPCMD_SETSTALL, &params);
1313                 if (ret)
1314                         dev_err(dwc->dev, "failed to set STALL on %s\n",
1315                                         dep->name);
1316                 else
1317                         dep->flags |= DWC3_EP_STALL;
1318         } else {
1319                 ret = dwc3_send_gadget_ep_cmd(dwc, dep->number,
1320                         DWC3_DEPCMD_CLEARSTALL, &params);
1321                 if (ret)
1322                         dev_err(dwc->dev, "failed to clear STALL on %s\n",
1323                                         dep->name);
1324                 else
1325                         dep->flags &= ~(DWC3_EP_STALL | DWC3_EP_WEDGE);
1326         }
1327
1328         return ret;
1329 }
1330
1331 static int dwc3_gadget_ep_set_halt(struct usb_ep *ep, int value)
1332 {
1333         struct dwc3_ep                  *dep = to_dwc3_ep(ep);
1334         struct dwc3                     *dwc = dep->dwc;
1335
1336         unsigned long                   flags;
1337
1338         int                             ret;
1339
1340         spin_lock_irqsave(&dwc->lock, flags);
1341         ret = __dwc3_gadget_ep_set_halt(dep, value, false);
1342         spin_unlock_irqrestore(&dwc->lock, flags);
1343
1344         return ret;
1345 }
1346
1347 static int dwc3_gadget_ep_set_wedge(struct usb_ep *ep)
1348 {
1349         struct dwc3_ep                  *dep = to_dwc3_ep(ep);
1350         struct dwc3                     *dwc = dep->dwc;
1351         unsigned long                   flags;
1352         int                             ret;
1353
1354         spin_lock_irqsave(&dwc->lock, flags);
1355         dep->flags |= DWC3_EP_WEDGE;
1356
1357         if (dep->number == 0 || dep->number == 1)
1358                 ret = __dwc3_gadget_ep0_set_halt(ep, 1);
1359         else
1360                 ret = __dwc3_gadget_ep_set_halt(dep, 1, false);
1361         spin_unlock_irqrestore(&dwc->lock, flags);
1362
1363         return ret;
1364 }
1365
1366 /* -------------------------------------------------------------------------- */
1367
1368 static struct usb_endpoint_descriptor dwc3_gadget_ep0_desc = {
1369         .bLength        = USB_DT_ENDPOINT_SIZE,
1370         .bDescriptorType = USB_DT_ENDPOINT,
1371         .bmAttributes   = USB_ENDPOINT_XFER_CONTROL,
1372 };
1373
1374 static const struct usb_ep_ops dwc3_gadget_ep0_ops = {
1375         .enable         = dwc3_gadget_ep0_enable,
1376         .disable        = dwc3_gadget_ep0_disable,
1377         .alloc_request  = dwc3_gadget_ep_alloc_request,
1378         .free_request   = dwc3_gadget_ep_free_request,
1379         .queue          = dwc3_gadget_ep0_queue,
1380         .dequeue        = dwc3_gadget_ep_dequeue,
1381         .set_halt       = dwc3_gadget_ep0_set_halt,
1382         .set_wedge      = dwc3_gadget_ep_set_wedge,
1383 };
1384
1385 static const struct usb_ep_ops dwc3_gadget_ep_ops = {
1386         .enable         = dwc3_gadget_ep_enable,
1387         .disable        = dwc3_gadget_ep_disable,
1388         .alloc_request  = dwc3_gadget_ep_alloc_request,
1389         .free_request   = dwc3_gadget_ep_free_request,
1390         .queue          = dwc3_gadget_ep_queue,
1391         .dequeue        = dwc3_gadget_ep_dequeue,
1392         .set_halt       = dwc3_gadget_ep_set_halt,
1393         .set_wedge      = dwc3_gadget_ep_set_wedge,
1394 };
1395
1396 /* -------------------------------------------------------------------------- */
1397
1398 static int dwc3_gadget_get_frame(struct usb_gadget *g)
1399 {
1400         struct dwc3             *dwc = gadget_to_dwc(g);
1401         u32                     reg;
1402
1403         reg = dwc3_readl(dwc->regs, DWC3_DSTS);
1404         return DWC3_DSTS_SOFFN(reg);
1405 }
1406
1407 static int __dwc3_gadget_wakeup(struct dwc3 *dwc)
1408 {
1409         unsigned long           timeout;
1410
1411         int                     ret;
1412         u32                     reg;
1413
1414         u8                      link_state;
1415         u8                      speed;
1416
1417         /*
1418          * According to the Databook Remote wakeup request should
1419          * be issued only when the device is in early suspend state.
1420          *
1421          * We can check that via USB Link State bits in DSTS register.
1422          */
1423         reg = dwc3_readl(dwc->regs, DWC3_DSTS);
1424
1425         speed = reg & DWC3_DSTS_CONNECTSPD;
1426         if (speed == DWC3_DSTS_SUPERSPEED) {
1427                 dwc3_trace(trace_dwc3_gadget, "no wakeup on SuperSpeed\n");
1428                 return -EINVAL;
1429         }
1430
1431         link_state = DWC3_DSTS_USBLNKST(reg);
1432
1433         switch (link_state) {
1434         case DWC3_LINK_STATE_RX_DET:    /* in HS, means Early Suspend */
1435         case DWC3_LINK_STATE_U3:        /* in HS, means SUSPEND */
1436                 break;
1437         default:
1438                 dwc3_trace(trace_dwc3_gadget,
1439                                 "can't wakeup from '%s'\n",
1440                                 dwc3_gadget_link_string(link_state));
1441                 return -EINVAL;
1442         }
1443
1444         ret = dwc3_gadget_set_link_state(dwc, DWC3_LINK_STATE_RECOV);
1445         if (ret < 0) {
1446                 dev_err(dwc->dev, "failed to put link in Recovery\n");
1447                 return ret;
1448         }
1449
1450         /* Recent versions do this automatically */
1451         if (dwc->revision < DWC3_REVISION_194A) {
1452                 /* write zeroes to Link Change Request */
1453                 reg = dwc3_readl(dwc->regs, DWC3_DCTL);
1454                 reg &= ~DWC3_DCTL_ULSTCHNGREQ_MASK;
1455                 dwc3_writel(dwc->regs, DWC3_DCTL, reg);
1456         }
1457
1458         /* poll until Link State changes to ON */
1459         timeout = jiffies + msecs_to_jiffies(100);
1460
1461         while (!time_after(jiffies, timeout)) {
1462                 reg = dwc3_readl(dwc->regs, DWC3_DSTS);
1463
1464                 /* in HS, means ON */
1465                 if (DWC3_DSTS_USBLNKST(reg) == DWC3_LINK_STATE_U0)
1466                         break;
1467         }
1468
1469         if (DWC3_DSTS_USBLNKST(reg) != DWC3_LINK_STATE_U0) {
1470                 dev_err(dwc->dev, "failed to send remote wakeup\n");
1471                 return -EINVAL;
1472         }
1473
1474         return 0;
1475 }
1476
1477 static int dwc3_gadget_wakeup(struct usb_gadget *g)
1478 {
1479         struct dwc3             *dwc = gadget_to_dwc(g);
1480         unsigned long           flags;
1481         int                     ret;
1482
1483         spin_lock_irqsave(&dwc->lock, flags);
1484         ret = __dwc3_gadget_wakeup(dwc);
1485         spin_unlock_irqrestore(&dwc->lock, flags);
1486
1487         return ret;
1488 }
1489
1490 static int dwc3_gadget_set_selfpowered(struct usb_gadget *g,
1491                 int is_selfpowered)
1492 {
1493         struct dwc3             *dwc = gadget_to_dwc(g);
1494         unsigned long           flags;
1495
1496         spin_lock_irqsave(&dwc->lock, flags);
1497         g->is_selfpowered = !!is_selfpowered;
1498         spin_unlock_irqrestore(&dwc->lock, flags);
1499
1500         return 0;
1501 }
1502
1503 static int dwc3_gadget_run_stop(struct dwc3 *dwc, int is_on, int suspend)
1504 {
1505         u32                     reg;
1506         u32                     timeout = 500;
1507
1508         reg = dwc3_readl(dwc->regs, DWC3_DCTL);
1509         if (is_on) {
1510                 if (dwc->revision <= DWC3_REVISION_187A) {
1511                         reg &= ~DWC3_DCTL_TRGTULST_MASK;
1512                         reg |= DWC3_DCTL_TRGTULST_RX_DET;
1513                 }
1514
1515                 if (dwc->revision >= DWC3_REVISION_194A)
1516                         reg &= ~DWC3_DCTL_KEEP_CONNECT;
1517                 reg |= DWC3_DCTL_RUN_STOP;
1518
1519                 if (dwc->has_hibernation)
1520                         reg |= DWC3_DCTL_KEEP_CONNECT;
1521
1522                 dwc->pullups_connected = true;
1523         } else {
1524                 reg &= ~DWC3_DCTL_RUN_STOP;
1525
1526                 if (dwc->has_hibernation && !suspend)
1527                         reg &= ~DWC3_DCTL_KEEP_CONNECT;
1528
1529                 dwc->pullups_connected = false;
1530         }
1531
1532         dwc3_writel(dwc->regs, DWC3_DCTL, reg);
1533
1534         do {
1535                 reg = dwc3_readl(dwc->regs, DWC3_DSTS);
1536                 if (is_on) {
1537                         if (!(reg & DWC3_DSTS_DEVCTRLHLT))
1538                                 break;
1539                 } else {
1540                         if (reg & DWC3_DSTS_DEVCTRLHLT)
1541                                 break;
1542                 }
1543                 timeout--;
1544                 if (!timeout)
1545                         return -ETIMEDOUT;
1546                 udelay(1);
1547         } while (1);
1548
1549         dwc3_trace(trace_dwc3_gadget, "gadget %s data soft-%s",
1550                         dwc->gadget_driver
1551                         ? dwc->gadget_driver->function : "no-function",
1552                         is_on ? "connect" : "disconnect");
1553
1554         return 0;
1555 }
1556
1557 static int dwc3_gadget_pullup(struct usb_gadget *g, int is_on)
1558 {
1559         struct dwc3             *dwc = gadget_to_dwc(g);
1560         unsigned long           flags;
1561         int                     ret;
1562
1563         is_on = !!is_on;
1564
1565         spin_lock_irqsave(&dwc->lock, flags);
1566         ret = dwc3_gadget_run_stop(dwc, is_on, false);
1567         spin_unlock_irqrestore(&dwc->lock, flags);
1568
1569         return ret;
1570 }
1571
1572 static void dwc3_gadget_enable_irq(struct dwc3 *dwc)
1573 {
1574         u32                     reg;
1575
1576         /* Enable all but Start and End of Frame IRQs */
1577         reg = (DWC3_DEVTEN_VNDRDEVTSTRCVEDEN |
1578                         DWC3_DEVTEN_EVNTOVERFLOWEN |
1579                         DWC3_DEVTEN_CMDCMPLTEN |
1580                         DWC3_DEVTEN_ERRTICERREN |
1581                         DWC3_DEVTEN_WKUPEVTEN |
1582                         DWC3_DEVTEN_ULSTCNGEN |
1583                         DWC3_DEVTEN_CONNECTDONEEN |
1584                         DWC3_DEVTEN_USBRSTEN |
1585                         DWC3_DEVTEN_DISCONNEVTEN);
1586
1587         dwc3_writel(dwc->regs, DWC3_DEVTEN, reg);
1588 }
1589
1590 static void dwc3_gadget_disable_irq(struct dwc3 *dwc)
1591 {
1592         /* mask all interrupts */
1593         dwc3_writel(dwc->regs, DWC3_DEVTEN, 0x00);
1594 }
1595
1596 static irqreturn_t dwc3_interrupt(int irq, void *_dwc);
1597 static irqreturn_t dwc3_thread_interrupt(int irq, void *_dwc);
1598
1599 static int dwc3_gadget_start(struct usb_gadget *g,
1600                 struct usb_gadget_driver *driver)
1601 {
1602         struct dwc3             *dwc = gadget_to_dwc(g);
1603         struct dwc3_ep          *dep;
1604         unsigned long           flags;
1605         int                     ret = 0;
1606         int                     irq;
1607         u32                     reg;
1608
1609         irq = platform_get_irq(to_platform_device(dwc->dev), 0);
1610         ret = request_threaded_irq(irq, dwc3_interrupt, dwc3_thread_interrupt,
1611                         IRQF_SHARED, "dwc3", dwc->ev_buf);
1612         if (ret) {
1613                 dev_err(dwc->dev, "failed to request irq #%d --> %d\n",
1614                                 irq, ret);
1615                 goto err0;
1616         }
1617
1618         spin_lock_irqsave(&dwc->lock, flags);
1619
1620         if (dwc->gadget_driver) {
1621                 dev_err(dwc->dev, "%s is already bound to %s\n",
1622                                 dwc->gadget.name,
1623                                 dwc->gadget_driver->driver.name);
1624                 ret = -EBUSY;
1625                 goto err1;
1626         }
1627
1628         dwc->gadget_driver      = driver;
1629
1630         reg = dwc3_readl(dwc->regs, DWC3_DCFG);
1631         reg &= ~(DWC3_DCFG_SPEED_MASK);
1632
1633         /**
1634          * WORKAROUND: DWC3 revision < 2.20a have an issue
1635          * which would cause metastability state on Run/Stop
1636          * bit if we try to force the IP to USB2-only mode.
1637          *
1638          * Because of that, we cannot configure the IP to any
1639          * speed other than the SuperSpeed
1640          *
1641          * Refers to:
1642          *
1643          * STAR#9000525659: Clock Domain Crossing on DCTL in
1644          * USB 2.0 Mode
1645          */
1646         if (dwc->revision < DWC3_REVISION_220A) {
1647                 reg |= DWC3_DCFG_SUPERSPEED;
1648         } else {
1649                 switch (dwc->maximum_speed) {
1650                 case USB_SPEED_LOW:
1651                         reg |= DWC3_DSTS_LOWSPEED;
1652                         break;
1653                 case USB_SPEED_FULL:
1654                         reg |= DWC3_DSTS_FULLSPEED1;
1655                         break;
1656                 case USB_SPEED_HIGH:
1657                         reg |= DWC3_DSTS_HIGHSPEED;
1658                         break;
1659                 case USB_SPEED_SUPER:   /* FALLTHROUGH */
1660                 case USB_SPEED_UNKNOWN: /* FALTHROUGH */
1661                 default:
1662                         reg |= DWC3_DSTS_SUPERSPEED;
1663                 }
1664         }
1665         dwc3_writel(dwc->regs, DWC3_DCFG, reg);
1666
1667         /* Start with SuperSpeed Default */
1668         dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(512);
1669
1670         dep = dwc->eps[0];
1671         ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc, NULL, false,
1672                         false);
1673         if (ret) {
1674                 dev_err(dwc->dev, "failed to enable %s\n", dep->name);
1675                 goto err2;
1676         }
1677
1678         dep = dwc->eps[1];
1679         ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc, NULL, false,
1680                         false);
1681         if (ret) {
1682                 dev_err(dwc->dev, "failed to enable %s\n", dep->name);
1683                 goto err3;
1684         }
1685
1686         /* begin to receive SETUP packets */
1687         dwc->ep0state = EP0_SETUP_PHASE;
1688         dwc3_ep0_out_start(dwc);
1689
1690         dwc3_gadget_enable_irq(dwc);
1691
1692         spin_unlock_irqrestore(&dwc->lock, flags);
1693
1694         return 0;
1695
1696 err3:
1697         __dwc3_gadget_ep_disable(dwc->eps[0]);
1698
1699 err2:
1700         dwc->gadget_driver = NULL;
1701
1702 err1:
1703         spin_unlock_irqrestore(&dwc->lock, flags);
1704
1705         free_irq(irq, dwc->ev_buf);
1706
1707 err0:
1708         return ret;
1709 }
1710
1711 static int dwc3_gadget_stop(struct usb_gadget *g)
1712 {
1713         struct dwc3             *dwc = gadget_to_dwc(g);
1714         unsigned long           flags;
1715         int                     irq;
1716
1717         spin_lock_irqsave(&dwc->lock, flags);
1718
1719         dwc3_gadget_disable_irq(dwc);
1720         __dwc3_gadget_ep_disable(dwc->eps[0]);
1721         __dwc3_gadget_ep_disable(dwc->eps[1]);
1722
1723         dwc->gadget_driver      = NULL;
1724
1725         spin_unlock_irqrestore(&dwc->lock, flags);
1726
1727         irq = platform_get_irq(to_platform_device(dwc->dev), 0);
1728         free_irq(irq, dwc->ev_buf);
1729
1730         return 0;
1731 }
1732
1733 static const struct usb_gadget_ops dwc3_gadget_ops = {
1734         .get_frame              = dwc3_gadget_get_frame,
1735         .wakeup                 = dwc3_gadget_wakeup,
1736         .set_selfpowered        = dwc3_gadget_set_selfpowered,
1737         .pullup                 = dwc3_gadget_pullup,
1738         .udc_start              = dwc3_gadget_start,
1739         .udc_stop               = dwc3_gadget_stop,
1740 };
1741
1742 /* -------------------------------------------------------------------------- */
1743
1744 static int dwc3_gadget_init_hw_endpoints(struct dwc3 *dwc,
1745                 u8 num, u32 direction)
1746 {
1747         struct dwc3_ep                  *dep;
1748         u8                              i;
1749
1750         for (i = 0; i < num; i++) {
1751                 u8 epnum = (i << 1) | (!!direction);
1752
1753                 dep = kzalloc(sizeof(*dep), GFP_KERNEL);
1754                 if (!dep)
1755                         return -ENOMEM;
1756
1757                 dep->dwc = dwc;
1758                 dep->number = epnum;
1759                 dep->direction = !!direction;
1760                 dwc->eps[epnum] = dep;
1761
1762                 snprintf(dep->name, sizeof(dep->name), "ep%d%s", epnum >> 1,
1763                                 (epnum & 1) ? "in" : "out");
1764
1765                 dep->endpoint.name = dep->name;
1766
1767                 dwc3_trace(trace_dwc3_gadget, "initializing %s", dep->name);
1768
1769                 if (epnum == 0 || epnum == 1) {
1770                         usb_ep_set_maxpacket_limit(&dep->endpoint, 512);
1771                         dep->endpoint.maxburst = 1;
1772                         dep->endpoint.ops = &dwc3_gadget_ep0_ops;
1773                         if (!epnum)
1774                                 dwc->gadget.ep0 = &dep->endpoint;
1775                 } else {
1776                         int             ret;
1777
1778                         usb_ep_set_maxpacket_limit(&dep->endpoint, 1024);
1779                         dep->endpoint.max_streams = 15;
1780                         dep->endpoint.ops = &dwc3_gadget_ep_ops;
1781                         list_add_tail(&dep->endpoint.ep_list,
1782                                         &dwc->gadget.ep_list);
1783
1784                         ret = dwc3_alloc_trb_pool(dep);
1785                         if (ret)
1786                                 return ret;
1787                 }
1788
1789                 if (epnum == 0 || epnum == 1) {
1790                         dep->endpoint.caps.type_control = true;
1791                 } else {
1792                         dep->endpoint.caps.type_iso = true;
1793                         dep->endpoint.caps.type_bulk = true;
1794                         dep->endpoint.caps.type_int = true;
1795                 }
1796
1797                 dep->endpoint.caps.dir_in = !!direction;
1798                 dep->endpoint.caps.dir_out = !direction;
1799
1800                 INIT_LIST_HEAD(&dep->pending_list);
1801                 INIT_LIST_HEAD(&dep->started_list);
1802         }
1803
1804         return 0;
1805 }
1806
1807 static int dwc3_gadget_init_endpoints(struct dwc3 *dwc)
1808 {
1809         int                             ret;
1810
1811         INIT_LIST_HEAD(&dwc->gadget.ep_list);
1812
1813         ret = dwc3_gadget_init_hw_endpoints(dwc, dwc->num_out_eps, 0);
1814         if (ret < 0) {
1815                 dwc3_trace(trace_dwc3_gadget,
1816                                 "failed to allocate OUT endpoints");
1817                 return ret;
1818         }
1819
1820         ret = dwc3_gadget_init_hw_endpoints(dwc, dwc->num_in_eps, 1);
1821         if (ret < 0) {
1822                 dwc3_trace(trace_dwc3_gadget,
1823                                 "failed to allocate IN endpoints");
1824                 return ret;
1825         }
1826
1827         return 0;
1828 }
1829
1830 static void dwc3_gadget_free_endpoints(struct dwc3 *dwc)
1831 {
1832         struct dwc3_ep                  *dep;
1833         u8                              epnum;
1834
1835         for (epnum = 0; epnum < DWC3_ENDPOINTS_NUM; epnum++) {
1836                 dep = dwc->eps[epnum];
1837                 if (!dep)
1838                         continue;
1839                 /*
1840                  * Physical endpoints 0 and 1 are special; they form the
1841                  * bi-directional USB endpoint 0.
1842                  *
1843                  * For those two physical endpoints, we don't allocate a TRB
1844                  * pool nor do we add them the endpoints list. Due to that, we
1845                  * shouldn't do these two operations otherwise we would end up
1846                  * with all sorts of bugs when removing dwc3.ko.
1847                  */
1848                 if (epnum != 0 && epnum != 1) {
1849                         dwc3_free_trb_pool(dep);
1850                         list_del(&dep->endpoint.ep_list);
1851                 }
1852
1853                 kfree(dep);
1854         }
1855 }
1856
1857 /* -------------------------------------------------------------------------- */
1858
1859 static int __dwc3_cleanup_done_trbs(struct dwc3 *dwc, struct dwc3_ep *dep,
1860                 struct dwc3_request *req, struct dwc3_trb *trb,
1861                 const struct dwc3_event_depevt *event, int status)
1862 {
1863         unsigned int            count;
1864         unsigned int            s_pkt = 0;
1865         unsigned int            trb_status;
1866
1867         trace_dwc3_complete_trb(dep, trb);
1868
1869         if ((trb->ctrl & DWC3_TRB_CTRL_HWO) && status != -ESHUTDOWN)
1870                 /*
1871                  * We continue despite the error. There is not much we
1872                  * can do. If we don't clean it up we loop forever. If
1873                  * we skip the TRB then it gets overwritten after a
1874                  * while since we use them in a ring buffer. A BUG()
1875                  * would help. Lets hope that if this occurs, someone
1876                  * fixes the root cause instead of looking away :)
1877                  */
1878                 dev_err(dwc->dev, "%s's TRB (%p) still owned by HW\n",
1879                                 dep->name, trb);
1880         count = trb->size & DWC3_TRB_SIZE_MASK;
1881
1882         if (dep->direction) {
1883                 if (count) {
1884                         trb_status = DWC3_TRB_SIZE_TRBSTS(trb->size);
1885                         if (trb_status == DWC3_TRBSTS_MISSED_ISOC) {
1886                                 dwc3_trace(trace_dwc3_gadget,
1887                                                 "%s: incomplete IN transfer\n",
1888                                                 dep->name);
1889                                 /*
1890                                  * If missed isoc occurred and there is
1891                                  * no request queued then issue END
1892                                  * TRANSFER, so that core generates
1893                                  * next xfernotready and we will issue
1894                                  * a fresh START TRANSFER.
1895                                  * If there are still queued request
1896                                  * then wait, do not issue either END
1897                                  * or UPDATE TRANSFER, just attach next
1898                                  * request in pending_list during
1899                                  * giveback.If any future queued request
1900                                  * is successfully transferred then we
1901                                  * will issue UPDATE TRANSFER for all
1902                                  * request in the pending_list.
1903                                  */
1904                                 dep->flags |= DWC3_EP_MISSED_ISOC;
1905                         } else {
1906                                 dev_err(dwc->dev, "incomplete IN transfer %s\n",
1907                                                 dep->name);
1908                                 status = -ECONNRESET;
1909                         }
1910                 } else {
1911                         dep->flags &= ~DWC3_EP_MISSED_ISOC;
1912                 }
1913         } else {
1914                 if (count && (event->status & DEPEVT_STATUS_SHORT))
1915                         s_pkt = 1;
1916         }
1917
1918         /*
1919          * We assume here we will always receive the entire data block
1920          * which we should receive. Meaning, if we program RX to
1921          * receive 4K but we receive only 2K, we assume that's all we
1922          * should receive and we simply bounce the request back to the
1923          * gadget driver for further processing.
1924          */
1925         req->request.actual += req->request.length - count;
1926         if (s_pkt)
1927                 return 1;
1928         if ((event->status & DEPEVT_STATUS_LST) &&
1929                         (trb->ctrl & (DWC3_TRB_CTRL_LST |
1930                                 DWC3_TRB_CTRL_HWO)))
1931                 return 1;
1932         if ((event->status & DEPEVT_STATUS_IOC) &&
1933                         (trb->ctrl & DWC3_TRB_CTRL_IOC))
1934                 return 1;
1935         return 0;
1936 }
1937
1938 static int dwc3_cleanup_done_reqs(struct dwc3 *dwc, struct dwc3_ep *dep,
1939                 const struct dwc3_event_depevt *event, int status)
1940 {
1941         struct dwc3_request     *req;
1942         struct dwc3_trb         *trb;
1943         unsigned int            slot;
1944         unsigned int            i;
1945         int                     ret;
1946
1947         do {
1948                 req = next_request(&dep->started_list);
1949                 if (WARN_ON_ONCE(!req))
1950                         return 1;
1951
1952                 i = 0;
1953                 do {
1954                         slot = req->first_trb_index + i;
1955                         if ((slot == DWC3_TRB_NUM - 1) &&
1956                                 usb_endpoint_xfer_isoc(dep->endpoint.desc))
1957                                 slot++;
1958                         slot %= DWC3_TRB_NUM;
1959                         trb = &dep->trb_pool[slot];
1960
1961                         ret = __dwc3_cleanup_done_trbs(dwc, dep, req, trb,
1962                                         event, status);
1963                         if (ret)
1964                                 break;
1965                 } while (++i < req->request.num_mapped_sgs);
1966
1967                 dwc3_gadget_giveback(dep, req, status);
1968
1969                 if (ret)
1970                         break;
1971         } while (1);
1972
1973         if (usb_endpoint_xfer_isoc(dep->endpoint.desc) &&
1974                         list_empty(&dep->started_list)) {
1975                 if (list_empty(&dep->pending_list)) {
1976                         /*
1977                          * If there is no entry in request list then do
1978                          * not issue END TRANSFER now. Just set PENDING
1979                          * flag, so that END TRANSFER is issued when an
1980                          * entry is added into request list.
1981                          */
1982                         dep->flags = DWC3_EP_PENDING_REQUEST;
1983                 } else {
1984                         dwc3_stop_active_transfer(dwc, dep->number, true);
1985                         dep->flags = DWC3_EP_ENABLED;
1986                 }
1987                 return 1;
1988         }
1989
1990         return 1;
1991 }
1992
1993 static void dwc3_endpoint_transfer_complete(struct dwc3 *dwc,
1994                 struct dwc3_ep *dep, const struct dwc3_event_depevt *event)
1995 {
1996         unsigned                status = 0;
1997         int                     clean_busy;
1998         u32                     is_xfer_complete;
1999
2000         is_xfer_complete = (event->endpoint_event == DWC3_DEPEVT_XFERCOMPLETE);
2001
2002         if (event->status & DEPEVT_STATUS_BUSERR)
2003                 status = -ECONNRESET;
2004
2005         clean_busy = dwc3_cleanup_done_reqs(dwc, dep, event, status);
2006         if (clean_busy && (is_xfer_complete ||
2007                                 usb_endpoint_xfer_isoc(dep->endpoint.desc)))
2008                 dep->flags &= ~DWC3_EP_BUSY;
2009
2010         /*
2011          * WORKAROUND: This is the 2nd half of U1/U2 -> U0 workaround.
2012          * See dwc3_gadget_linksts_change_interrupt() for 1st half.
2013          */
2014         if (dwc->revision < DWC3_REVISION_183A) {
2015                 u32             reg;
2016                 int             i;
2017
2018                 for (i = 0; i < DWC3_ENDPOINTS_NUM; i++) {
2019                         dep = dwc->eps[i];
2020
2021                         if (!(dep->flags & DWC3_EP_ENABLED))
2022                                 continue;
2023
2024                         if (!list_empty(&dep->started_list))
2025                                 return;
2026                 }
2027
2028                 reg = dwc3_readl(dwc->regs, DWC3_DCTL);
2029                 reg |= dwc->u1u2;
2030                 dwc3_writel(dwc->regs, DWC3_DCTL, reg);
2031
2032                 dwc->u1u2 = 0;
2033         }
2034
2035         if (!usb_endpoint_xfer_isoc(dep->endpoint.desc)) {
2036                 int ret;
2037
2038                 ret = __dwc3_gadget_kick_transfer(dep, 0, is_xfer_complete);
2039                 if (!ret || ret == -EBUSY)
2040                         return;
2041         }
2042 }
2043
2044 static void dwc3_endpoint_interrupt(struct dwc3 *dwc,
2045                 const struct dwc3_event_depevt *event)
2046 {
2047         struct dwc3_ep          *dep;
2048         u8                      epnum = event->endpoint_number;
2049
2050         dep = dwc->eps[epnum];
2051
2052         if (!(dep->flags & DWC3_EP_ENABLED))
2053                 return;
2054
2055         if (epnum == 0 || epnum == 1) {
2056                 dwc3_ep0_interrupt(dwc, event);
2057                 return;
2058         }
2059
2060         switch (event->endpoint_event) {
2061         case DWC3_DEPEVT_XFERCOMPLETE:
2062                 dep->resource_index = 0;
2063
2064                 if (usb_endpoint_xfer_isoc(dep->endpoint.desc)) {
2065                         dwc3_trace(trace_dwc3_gadget,
2066                                         "%s is an Isochronous endpoint\n",
2067                                         dep->name);
2068                         return;
2069                 }
2070
2071                 dwc3_endpoint_transfer_complete(dwc, dep, event);
2072                 break;
2073         case DWC3_DEPEVT_XFERINPROGRESS:
2074                 dwc3_endpoint_transfer_complete(dwc, dep, event);
2075                 break;
2076         case DWC3_DEPEVT_XFERNOTREADY:
2077                 if (usb_endpoint_xfer_isoc(dep->endpoint.desc)) {
2078                         dwc3_gadget_start_isoc(dwc, dep, event);
2079                 } else {
2080                         int active;
2081                         int ret;
2082
2083                         active = event->status & DEPEVT_STATUS_TRANSFER_ACTIVE;
2084
2085                         dwc3_trace(trace_dwc3_gadget, "%s: reason %s",
2086                                         dep->name, active ? "Transfer Active"
2087                                         : "Transfer Not Active");
2088
2089                         ret = __dwc3_gadget_kick_transfer(dep, 0, !active);
2090                         if (!ret || ret == -EBUSY)
2091                                 return;
2092
2093                         dwc3_trace(trace_dwc3_gadget,
2094                                         "%s: failed to kick transfers\n",
2095                                         dep->name);
2096                 }
2097
2098                 break;
2099         case DWC3_DEPEVT_STREAMEVT:
2100                 if (!usb_endpoint_xfer_bulk(dep->endpoint.desc)) {
2101                         dev_err(dwc->dev, "Stream event for non-Bulk %s\n",
2102                                         dep->name);
2103                         return;
2104                 }
2105
2106                 switch (event->status) {
2107                 case DEPEVT_STREAMEVT_FOUND:
2108                         dwc3_trace(trace_dwc3_gadget,
2109                                         "Stream %d found and started",
2110                                         event->parameters);
2111
2112                         break;
2113                 case DEPEVT_STREAMEVT_NOTFOUND:
2114                         /* FALLTHROUGH */
2115                 default:
2116                         dwc3_trace(trace_dwc3_gadget,
2117                                         "unable to find suitable stream\n");
2118                 }
2119                 break;
2120         case DWC3_DEPEVT_RXTXFIFOEVT:
2121                 dwc3_trace(trace_dwc3_gadget, "%s FIFO Overrun\n", dep->name);
2122                 break;
2123         case DWC3_DEPEVT_EPCMDCMPLT:
2124                 dwc3_trace(trace_dwc3_gadget, "Endpoint Command Complete");
2125                 break;
2126         }
2127 }
2128
2129 static void dwc3_disconnect_gadget(struct dwc3 *dwc)
2130 {
2131         if (dwc->gadget_driver && dwc->gadget_driver->disconnect) {
2132                 spin_unlock(&dwc->lock);
2133                 dwc->gadget_driver->disconnect(&dwc->gadget);
2134                 spin_lock(&dwc->lock);
2135         }
2136 }
2137
2138 static void dwc3_suspend_gadget(struct dwc3 *dwc)
2139 {
2140         if (dwc->gadget_driver && dwc->gadget_driver->suspend) {
2141                 spin_unlock(&dwc->lock);
2142                 dwc->gadget_driver->suspend(&dwc->gadget);
2143                 spin_lock(&dwc->lock);
2144         }
2145 }
2146
2147 static void dwc3_resume_gadget(struct dwc3 *dwc)
2148 {
2149         if (dwc->gadget_driver && dwc->gadget_driver->resume) {
2150                 spin_unlock(&dwc->lock);
2151                 dwc->gadget_driver->resume(&dwc->gadget);
2152                 spin_lock(&dwc->lock);
2153         }
2154 }
2155
2156 static void dwc3_reset_gadget(struct dwc3 *dwc)
2157 {
2158         if (!dwc->gadget_driver)
2159                 return;
2160
2161         if (dwc->gadget.speed != USB_SPEED_UNKNOWN) {
2162                 spin_unlock(&dwc->lock);
2163                 usb_gadget_udc_reset(&dwc->gadget, dwc->gadget_driver);
2164                 spin_lock(&dwc->lock);
2165         }
2166 }
2167
2168 static void dwc3_stop_active_transfer(struct dwc3 *dwc, u32 epnum, bool force)
2169 {
2170         struct dwc3_ep *dep;
2171         struct dwc3_gadget_ep_cmd_params params;
2172         u32 cmd;
2173         int ret;
2174
2175         dep = dwc->eps[epnum];
2176
2177         if (!dep->resource_index)
2178                 return;
2179
2180         /*
2181          * NOTICE: We are violating what the Databook says about the
2182          * EndTransfer command. Ideally we would _always_ wait for the
2183          * EndTransfer Command Completion IRQ, but that's causing too
2184          * much trouble synchronizing between us and gadget driver.
2185          *
2186          * We have discussed this with the IP Provider and it was
2187          * suggested to giveback all requests here, but give HW some
2188          * extra time to synchronize with the interconnect. We're using
2189          * an arbitrary 100us delay for that.
2190          *
2191          * Note also that a similar handling was tested by Synopsys
2192          * (thanks a lot Paul) and nothing bad has come out of it.
2193          * In short, what we're doing is:
2194          *
2195          * - Issue EndTransfer WITH CMDIOC bit set
2196          * - Wait 100us
2197          */
2198
2199         cmd = DWC3_DEPCMD_ENDTRANSFER;
2200         cmd |= force ? DWC3_DEPCMD_HIPRI_FORCERM : 0;
2201         cmd |= DWC3_DEPCMD_CMDIOC;
2202         cmd |= DWC3_DEPCMD_PARAM(dep->resource_index);
2203         memset(&params, 0, sizeof(params));
2204         ret = dwc3_send_gadget_ep_cmd(dwc, dep->number, cmd, &params);
2205         WARN_ON_ONCE(ret);
2206         dep->resource_index = 0;
2207         dep->flags &= ~DWC3_EP_BUSY;
2208         udelay(100);
2209 }
2210
2211 static void dwc3_stop_active_transfers(struct dwc3 *dwc)
2212 {
2213         u32 epnum;
2214
2215         for (epnum = 2; epnum < DWC3_ENDPOINTS_NUM; epnum++) {
2216                 struct dwc3_ep *dep;
2217
2218                 dep = dwc->eps[epnum];
2219                 if (!dep)
2220                         continue;
2221
2222                 if (!(dep->flags & DWC3_EP_ENABLED))
2223                         continue;
2224
2225                 dwc3_remove_requests(dwc, dep);
2226         }
2227 }
2228
2229 static void dwc3_clear_stall_all_ep(struct dwc3 *dwc)
2230 {
2231         u32 epnum;
2232
2233         for (epnum = 1; epnum < DWC3_ENDPOINTS_NUM; epnum++) {
2234                 struct dwc3_ep *dep;
2235                 struct dwc3_gadget_ep_cmd_params params;
2236                 int ret;
2237
2238                 dep = dwc->eps[epnum];
2239                 if (!dep)
2240                         continue;
2241
2242                 if (!(dep->flags & DWC3_EP_STALL))
2243                         continue;
2244
2245                 dep->flags &= ~DWC3_EP_STALL;
2246
2247                 memset(&params, 0, sizeof(params));
2248                 ret = dwc3_send_gadget_ep_cmd(dwc, dep->number,
2249                                 DWC3_DEPCMD_CLEARSTALL, &params);
2250                 WARN_ON_ONCE(ret);
2251         }
2252 }
2253
2254 static void dwc3_gadget_disconnect_interrupt(struct dwc3 *dwc)
2255 {
2256         int                     reg;
2257
2258         reg = dwc3_readl(dwc->regs, DWC3_DCTL);
2259         reg &= ~DWC3_DCTL_INITU1ENA;
2260         dwc3_writel(dwc->regs, DWC3_DCTL, reg);
2261
2262         reg &= ~DWC3_DCTL_INITU2ENA;
2263         dwc3_writel(dwc->regs, DWC3_DCTL, reg);
2264
2265         dwc3_disconnect_gadget(dwc);
2266
2267         dwc->gadget.speed = USB_SPEED_UNKNOWN;
2268         dwc->setup_packet_pending = false;
2269         usb_gadget_set_state(&dwc->gadget, USB_STATE_NOTATTACHED);
2270 }
2271
2272 static void dwc3_gadget_reset_interrupt(struct dwc3 *dwc)
2273 {
2274         u32                     reg;
2275
2276         /*
2277          * WORKAROUND: DWC3 revisions <1.88a have an issue which
2278          * would cause a missing Disconnect Event if there's a
2279          * pending Setup Packet in the FIFO.
2280          *
2281          * There's no suggested workaround on the official Bug
2282          * report, which states that "unless the driver/application
2283          * is doing any special handling of a disconnect event,
2284          * there is no functional issue".
2285          *
2286          * Unfortunately, it turns out that we _do_ some special
2287          * handling of a disconnect event, namely complete all
2288          * pending transfers, notify gadget driver of the
2289          * disconnection, and so on.
2290          *
2291          * Our suggested workaround is to follow the Disconnect
2292          * Event steps here, instead, based on a setup_packet_pending
2293          * flag. Such flag gets set whenever we have a SETUP_PENDING
2294          * status for EP0 TRBs and gets cleared on XferComplete for the
2295          * same endpoint.
2296          *
2297          * Refers to:
2298          *
2299          * STAR#9000466709: RTL: Device : Disconnect event not
2300          * generated if setup packet pending in FIFO
2301          */
2302         if (dwc->revision < DWC3_REVISION_188A) {
2303                 if (dwc->setup_packet_pending)
2304                         dwc3_gadget_disconnect_interrupt(dwc);
2305         }
2306
2307         dwc3_reset_gadget(dwc);
2308
2309         reg = dwc3_readl(dwc->regs, DWC3_DCTL);
2310         reg &= ~DWC3_DCTL_TSTCTRL_MASK;
2311         dwc3_writel(dwc->regs, DWC3_DCTL, reg);
2312         dwc->test_mode = false;
2313
2314         dwc3_stop_active_transfers(dwc);
2315         dwc3_clear_stall_all_ep(dwc);
2316
2317         /* Reset device address to zero */
2318         reg = dwc3_readl(dwc->regs, DWC3_DCFG);
2319         reg &= ~(DWC3_DCFG_DEVADDR_MASK);
2320         dwc3_writel(dwc->regs, DWC3_DCFG, reg);
2321 }
2322
2323 static void dwc3_update_ram_clk_sel(struct dwc3 *dwc, u32 speed)
2324 {
2325         u32 reg;
2326         u32 usb30_clock = DWC3_GCTL_CLK_BUS;
2327
2328         /*
2329          * We change the clock only at SS but I dunno why I would want to do
2330          * this. Maybe it becomes part of the power saving plan.
2331          */
2332
2333         if (speed != DWC3_DSTS_SUPERSPEED)
2334                 return;
2335
2336         /*
2337          * RAMClkSel is reset to 0 after USB reset, so it must be reprogrammed
2338          * each time on Connect Done.
2339          */
2340         if (!usb30_clock)
2341                 return;
2342
2343         reg = dwc3_readl(dwc->regs, DWC3_GCTL);
2344         reg |= DWC3_GCTL_RAMCLKSEL(usb30_clock);
2345         dwc3_writel(dwc->regs, DWC3_GCTL, reg);
2346 }
2347
2348 static void dwc3_gadget_conndone_interrupt(struct dwc3 *dwc)
2349 {
2350         struct dwc3_ep          *dep;
2351         int                     ret;
2352         u32                     reg;
2353         u8                      speed;
2354
2355         reg = dwc3_readl(dwc->regs, DWC3_DSTS);
2356         speed = reg & DWC3_DSTS_CONNECTSPD;
2357         dwc->speed = speed;
2358
2359         dwc3_update_ram_clk_sel(dwc, speed);
2360
2361         switch (speed) {
2362         case DWC3_DCFG_SUPERSPEED:
2363                 /*
2364                  * WORKAROUND: DWC3 revisions <1.90a have an issue which
2365                  * would cause a missing USB3 Reset event.
2366                  *
2367                  * In such situations, we should force a USB3 Reset
2368                  * event by calling our dwc3_gadget_reset_interrupt()
2369                  * routine.
2370                  *
2371                  * Refers to:
2372                  *
2373                  * STAR#9000483510: RTL: SS : USB3 reset event may
2374                  * not be generated always when the link enters poll
2375                  */
2376                 if (dwc->revision < DWC3_REVISION_190A)
2377                         dwc3_gadget_reset_interrupt(dwc);
2378
2379                 dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(512);
2380                 dwc->gadget.ep0->maxpacket = 512;
2381                 dwc->gadget.speed = USB_SPEED_SUPER;
2382                 break;
2383         case DWC3_DCFG_HIGHSPEED:
2384                 dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(64);
2385                 dwc->gadget.ep0->maxpacket = 64;
2386                 dwc->gadget.speed = USB_SPEED_HIGH;
2387                 break;
2388         case DWC3_DCFG_FULLSPEED2:
2389         case DWC3_DCFG_FULLSPEED1:
2390                 dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(64);
2391                 dwc->gadget.ep0->maxpacket = 64;
2392                 dwc->gadget.speed = USB_SPEED_FULL;
2393                 break;
2394         case DWC3_DCFG_LOWSPEED:
2395                 dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(8);
2396                 dwc->gadget.ep0->maxpacket = 8;
2397                 dwc->gadget.speed = USB_SPEED_LOW;
2398                 break;
2399         }
2400
2401         /* Enable USB2 LPM Capability */
2402
2403         if ((dwc->revision > DWC3_REVISION_194A)
2404                         && (speed != DWC3_DCFG_SUPERSPEED)) {
2405                 reg = dwc3_readl(dwc->regs, DWC3_DCFG);
2406                 reg |= DWC3_DCFG_LPM_CAP;
2407                 dwc3_writel(dwc->regs, DWC3_DCFG, reg);
2408
2409                 reg = dwc3_readl(dwc->regs, DWC3_DCTL);
2410                 reg &= ~(DWC3_DCTL_HIRD_THRES_MASK | DWC3_DCTL_L1_HIBER_EN);
2411
2412                 reg |= DWC3_DCTL_HIRD_THRES(dwc->hird_threshold);
2413
2414                 /*
2415                  * When dwc3 revisions >= 2.40a, LPM Erratum is enabled and
2416                  * DCFG.LPMCap is set, core responses with an ACK and the
2417                  * BESL value in the LPM token is less than or equal to LPM
2418                  * NYET threshold.
2419                  */
2420                 WARN_ONCE(dwc->revision < DWC3_REVISION_240A
2421                                 && dwc->has_lpm_erratum,
2422                                 "LPM Erratum not available on dwc3 revisisions < 2.40a\n");
2423
2424                 if (dwc->has_lpm_erratum && dwc->revision >= DWC3_REVISION_240A)
2425                         reg |= DWC3_DCTL_LPM_ERRATA(dwc->lpm_nyet_threshold);
2426
2427                 dwc3_writel(dwc->regs, DWC3_DCTL, reg);
2428         } else {
2429                 reg = dwc3_readl(dwc->regs, DWC3_DCTL);
2430                 reg &= ~DWC3_DCTL_HIRD_THRES_MASK;
2431                 dwc3_writel(dwc->regs, DWC3_DCTL, reg);
2432         }
2433
2434         dep = dwc->eps[0];
2435         ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc, NULL, true,
2436                         false);
2437         if (ret) {
2438                 dev_err(dwc->dev, "failed to enable %s\n", dep->name);
2439                 return;
2440         }
2441
2442         dep = dwc->eps[1];
2443         ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc, NULL, true,
2444                         false);
2445         if (ret) {
2446                 dev_err(dwc->dev, "failed to enable %s\n", dep->name);
2447                 return;
2448         }
2449
2450         /*
2451          * Configure PHY via GUSB3PIPECTLn if required.
2452          *
2453          * Update GTXFIFOSIZn
2454          *
2455          * In both cases reset values should be sufficient.
2456          */
2457 }
2458
2459 static void dwc3_gadget_wakeup_interrupt(struct dwc3 *dwc)
2460 {
2461         /*
2462          * TODO take core out of low power mode when that's
2463          * implemented.
2464          */
2465
2466         if (dwc->gadget_driver && dwc->gadget_driver->resume) {
2467                 spin_unlock(&dwc->lock);
2468                 dwc->gadget_driver->resume(&dwc->gadget);
2469                 spin_lock(&dwc->lock);
2470         }
2471 }
2472
2473 static void dwc3_gadget_linksts_change_interrupt(struct dwc3 *dwc,
2474                 unsigned int evtinfo)
2475 {
2476         enum dwc3_link_state    next = evtinfo & DWC3_LINK_STATE_MASK;
2477         unsigned int            pwropt;
2478
2479         /*
2480          * WORKAROUND: DWC3 < 2.50a have an issue when configured without
2481          * Hibernation mode enabled which would show up when device detects
2482          * host-initiated U3 exit.
2483          *
2484          * In that case, device will generate a Link State Change Interrupt
2485          * from U3 to RESUME which is only necessary if Hibernation is
2486          * configured in.
2487          *
2488          * There are no functional changes due to such spurious event and we
2489          * just need to ignore it.
2490          *
2491          * Refers to:
2492          *
2493          * STAR#9000570034 RTL: SS Resume event generated in non-Hibernation
2494          * operational mode
2495          */
2496         pwropt = DWC3_GHWPARAMS1_EN_PWROPT(dwc->hwparams.hwparams1);
2497         if ((dwc->revision < DWC3_REVISION_250A) &&
2498                         (pwropt != DWC3_GHWPARAMS1_EN_PWROPT_HIB)) {
2499                 if ((dwc->link_state == DWC3_LINK_STATE_U3) &&
2500                                 (next == DWC3_LINK_STATE_RESUME)) {
2501                         dwc3_trace(trace_dwc3_gadget,
2502                                         "ignoring transition U3 -> Resume");
2503                         return;
2504                 }
2505         }
2506
2507         /*
2508          * WORKAROUND: DWC3 Revisions <1.83a have an issue which, depending
2509          * on the link partner, the USB session might do multiple entry/exit
2510          * of low power states before a transfer takes place.
2511          *
2512          * Due to this problem, we might experience lower throughput. The
2513          * suggested workaround is to disable DCTL[12:9] bits if we're
2514          * transitioning from U1/U2 to U0 and enable those bits again
2515          * after a transfer completes and there are no pending transfers
2516          * on any of the enabled endpoints.
2517          *
2518          * This is the first half of that workaround.
2519          *
2520          * Refers to:
2521          *
2522          * STAR#9000446952: RTL: Device SS : if U1/U2 ->U0 takes >128us
2523          * core send LGO_Ux entering U0
2524          */
2525         if (dwc->revision < DWC3_REVISION_183A) {
2526                 if (next == DWC3_LINK_STATE_U0) {
2527                         u32     u1u2;
2528                         u32     reg;
2529
2530                         switch (dwc->link_state) {
2531                         case DWC3_LINK_STATE_U1:
2532                         case DWC3_LINK_STATE_U2:
2533                                 reg = dwc3_readl(dwc->regs, DWC3_DCTL);
2534                                 u1u2 = reg & (DWC3_DCTL_INITU2ENA
2535                                                 | DWC3_DCTL_ACCEPTU2ENA
2536                                                 | DWC3_DCTL_INITU1ENA
2537                                                 | DWC3_DCTL_ACCEPTU1ENA);
2538
2539                                 if (!dwc->u1u2)
2540                                         dwc->u1u2 = reg & u1u2;
2541
2542                                 reg &= ~u1u2;
2543
2544                                 dwc3_writel(dwc->regs, DWC3_DCTL, reg);
2545                                 break;
2546                         default:
2547                                 /* do nothing */
2548                                 break;
2549                         }
2550                 }
2551         }
2552
2553         switch (next) {
2554         case DWC3_LINK_STATE_U1:
2555                 if (dwc->speed == USB_SPEED_SUPER)
2556                         dwc3_suspend_gadget(dwc);
2557                 break;
2558         case DWC3_LINK_STATE_U2:
2559         case DWC3_LINK_STATE_U3:
2560                 dwc3_suspend_gadget(dwc);
2561                 break;
2562         case DWC3_LINK_STATE_RESUME:
2563                 dwc3_resume_gadget(dwc);
2564                 break;
2565         default:
2566                 /* do nothing */
2567                 break;
2568         }
2569
2570         dwc->link_state = next;
2571 }
2572
2573 static void dwc3_gadget_hibernation_interrupt(struct dwc3 *dwc,
2574                 unsigned int evtinfo)
2575 {
2576         unsigned int is_ss = evtinfo & BIT(4);
2577
2578         /**
2579          * WORKAROUND: DWC3 revison 2.20a with hibernation support
2580          * have a known issue which can cause USB CV TD.9.23 to fail
2581          * randomly.
2582          *
2583          * Because of this issue, core could generate bogus hibernation
2584          * events which SW needs to ignore.
2585          *
2586          * Refers to:
2587          *
2588          * STAR#9000546576: Device Mode Hibernation: Issue in USB 2.0
2589          * Device Fallback from SuperSpeed
2590          */
2591         if (is_ss ^ (dwc->speed == USB_SPEED_SUPER))
2592                 return;
2593
2594         /* enter hibernation here */
2595 }
2596
2597 static void dwc3_gadget_interrupt(struct dwc3 *dwc,
2598                 const struct dwc3_event_devt *event)
2599 {
2600         switch (event->type) {
2601         case DWC3_DEVICE_EVENT_DISCONNECT:
2602                 dwc3_gadget_disconnect_interrupt(dwc);
2603                 break;
2604         case DWC3_DEVICE_EVENT_RESET:
2605                 dwc3_gadget_reset_interrupt(dwc);
2606                 break;
2607         case DWC3_DEVICE_EVENT_CONNECT_DONE:
2608                 dwc3_gadget_conndone_interrupt(dwc);
2609                 break;
2610         case DWC3_DEVICE_EVENT_WAKEUP:
2611                 dwc3_gadget_wakeup_interrupt(dwc);
2612                 break;
2613         case DWC3_DEVICE_EVENT_HIBER_REQ:
2614                 if (dev_WARN_ONCE(dwc->dev, !dwc->has_hibernation,
2615                                         "unexpected hibernation event\n"))
2616                         break;
2617
2618                 dwc3_gadget_hibernation_interrupt(dwc, event->event_info);
2619                 break;
2620         case DWC3_DEVICE_EVENT_LINK_STATUS_CHANGE:
2621                 dwc3_gadget_linksts_change_interrupt(dwc, event->event_info);
2622                 break;
2623         case DWC3_DEVICE_EVENT_EOPF:
2624                 dwc3_trace(trace_dwc3_gadget, "End of Periodic Frame");
2625                 break;
2626         case DWC3_DEVICE_EVENT_SOF:
2627                 dwc3_trace(trace_dwc3_gadget, "Start of Periodic Frame");
2628                 break;
2629         case DWC3_DEVICE_EVENT_ERRATIC_ERROR:
2630                 dwc3_trace(trace_dwc3_gadget, "Erratic Error");
2631                 break;
2632         case DWC3_DEVICE_EVENT_CMD_CMPL:
2633                 dwc3_trace(trace_dwc3_gadget, "Command Complete");
2634                 break;
2635         case DWC3_DEVICE_EVENT_OVERFLOW:
2636                 dwc3_trace(trace_dwc3_gadget, "Overflow");
2637                 break;
2638         default:
2639                 dev_WARN(dwc->dev, "UNKNOWN IRQ %d\n", event->type);
2640         }
2641 }
2642
2643 static void dwc3_process_event_entry(struct dwc3 *dwc,
2644                 const union dwc3_event *event)
2645 {
2646         trace_dwc3_event(event->raw);
2647
2648         /* Endpoint IRQ, handle it and return early */
2649         if (event->type.is_devspec == 0) {
2650                 /* depevt */
2651                 return dwc3_endpoint_interrupt(dwc, &event->depevt);
2652         }
2653
2654         switch (event->type.type) {
2655         case DWC3_EVENT_TYPE_DEV:
2656                 dwc3_gadget_interrupt(dwc, &event->devt);
2657                 break;
2658         /* REVISIT what to do with Carkit and I2C events ? */
2659         default:
2660                 dev_err(dwc->dev, "UNKNOWN IRQ type %d\n", event->raw);
2661         }
2662 }
2663
2664 static irqreturn_t dwc3_process_event_buf(struct dwc3_event_buffer *evt)
2665 {
2666         struct dwc3 *dwc = evt->dwc;
2667         irqreturn_t ret = IRQ_NONE;
2668         int left;
2669         u32 reg;
2670
2671         left = evt->count;
2672
2673         if (!(evt->flags & DWC3_EVENT_PENDING))
2674                 return IRQ_NONE;
2675
2676         while (left > 0) {
2677                 union dwc3_event event;
2678
2679                 event.raw = *(u32 *) (evt->buf + evt->lpos);
2680
2681                 dwc3_process_event_entry(dwc, &event);
2682
2683                 /*
2684                  * FIXME we wrap around correctly to the next entry as
2685                  * almost all entries are 4 bytes in size. There is one
2686                  * entry which has 12 bytes which is a regular entry
2687                  * followed by 8 bytes data. ATM I don't know how
2688                  * things are organized if we get next to the a
2689                  * boundary so I worry about that once we try to handle
2690                  * that.
2691                  */
2692                 evt->lpos = (evt->lpos + 4) % DWC3_EVENT_BUFFERS_SIZE;
2693                 left -= 4;
2694
2695                 dwc3_writel(dwc->regs, DWC3_GEVNTCOUNT(0), 4);
2696         }
2697
2698         evt->count = 0;
2699         evt->flags &= ~DWC3_EVENT_PENDING;
2700         ret = IRQ_HANDLED;
2701
2702         /* Unmask interrupt */
2703         reg = dwc3_readl(dwc->regs, DWC3_GEVNTSIZ(0));
2704         reg &= ~DWC3_GEVNTSIZ_INTMASK;
2705         dwc3_writel(dwc->regs, DWC3_GEVNTSIZ(0), reg);
2706
2707         return ret;
2708 }
2709
2710 static irqreturn_t dwc3_thread_interrupt(int irq, void *_evt)
2711 {
2712         struct dwc3_event_buffer *evt = _evt;
2713         struct dwc3 *dwc = evt->dwc;
2714         unsigned long flags;
2715         irqreturn_t ret = IRQ_NONE;
2716
2717         spin_lock_irqsave(&dwc->lock, flags);
2718         ret = dwc3_process_event_buf(evt);
2719         spin_unlock_irqrestore(&dwc->lock, flags);
2720
2721         return ret;
2722 }
2723
2724 static irqreturn_t dwc3_check_event_buf(struct dwc3_event_buffer *evt)
2725 {
2726         struct dwc3 *dwc = evt->dwc;
2727         u32 count;
2728         u32 reg;
2729
2730         count = dwc3_readl(dwc->regs, DWC3_GEVNTCOUNT(0));
2731         count &= DWC3_GEVNTCOUNT_MASK;
2732         if (!count)
2733                 return IRQ_NONE;
2734
2735         evt->count = count;
2736         evt->flags |= DWC3_EVENT_PENDING;
2737
2738         /* Mask interrupt */
2739         reg = dwc3_readl(dwc->regs, DWC3_GEVNTSIZ(0));
2740         reg |= DWC3_GEVNTSIZ_INTMASK;
2741         dwc3_writel(dwc->regs, DWC3_GEVNTSIZ(0), reg);
2742
2743         return IRQ_WAKE_THREAD;
2744 }
2745
2746 static irqreturn_t dwc3_interrupt(int irq, void *_evt)
2747 {
2748         struct dwc3_event_buffer        *evt = _evt;
2749
2750         return dwc3_check_event_buf(evt);
2751 }
2752
2753 /**
2754  * dwc3_gadget_init - Initializes gadget related registers
2755  * @dwc: pointer to our controller context structure
2756  *
2757  * Returns 0 on success otherwise negative errno.
2758  */
2759 int dwc3_gadget_init(struct dwc3 *dwc)
2760 {
2761         int                                     ret;
2762
2763         dwc->ctrl_req = dma_alloc_coherent(dwc->dev, sizeof(*dwc->ctrl_req),
2764                         &dwc->ctrl_req_addr, GFP_KERNEL);
2765         if (!dwc->ctrl_req) {
2766                 dev_err(dwc->dev, "failed to allocate ctrl request\n");
2767                 ret = -ENOMEM;
2768                 goto err0;
2769         }
2770
2771         dwc->ep0_trb = dma_alloc_coherent(dwc->dev, sizeof(*dwc->ep0_trb) * 2,
2772                         &dwc->ep0_trb_addr, GFP_KERNEL);
2773         if (!dwc->ep0_trb) {
2774                 dev_err(dwc->dev, "failed to allocate ep0 trb\n");
2775                 ret = -ENOMEM;
2776                 goto err1;
2777         }
2778
2779         dwc->setup_buf = kzalloc(DWC3_EP0_BOUNCE_SIZE, GFP_KERNEL);
2780         if (!dwc->setup_buf) {
2781                 ret = -ENOMEM;
2782                 goto err2;
2783         }
2784
2785         dwc->ep0_bounce = dma_alloc_coherent(dwc->dev,
2786                         DWC3_EP0_BOUNCE_SIZE, &dwc->ep0_bounce_addr,
2787                         GFP_KERNEL);
2788         if (!dwc->ep0_bounce) {
2789                 dev_err(dwc->dev, "failed to allocate ep0 bounce buffer\n");
2790                 ret = -ENOMEM;
2791                 goto err3;
2792         }
2793
2794         dwc->zlp_buf = kzalloc(DWC3_ZLP_BUF_SIZE, GFP_KERNEL);
2795         if (!dwc->zlp_buf) {
2796                 ret = -ENOMEM;
2797                 goto err4;
2798         }
2799
2800         dwc->gadget.ops                 = &dwc3_gadget_ops;
2801         dwc->gadget.speed               = USB_SPEED_UNKNOWN;
2802         dwc->gadget.sg_supported        = true;
2803         dwc->gadget.name                = "dwc3-gadget";
2804         dwc->gadget.is_otg              = dwc->dr_mode == USB_DR_MODE_OTG;
2805
2806         /*
2807          * FIXME We might be setting max_speed to <SUPER, however versions
2808          * <2.20a of dwc3 have an issue with metastability (documented
2809          * elsewhere in this driver) which tells us we can't set max speed to
2810          * anything lower than SUPER.
2811          *
2812          * Because gadget.max_speed is only used by composite.c and function
2813          * drivers (i.e. it won't go into dwc3's registers) we are allowing this
2814          * to happen so we avoid sending SuperSpeed Capability descriptor
2815          * together with our BOS descriptor as that could confuse host into
2816          * thinking we can handle super speed.
2817          *
2818          * Note that, in fact, we won't even support GetBOS requests when speed
2819          * is less than super speed because we don't have means, yet, to tell
2820          * composite.c that we are USB 2.0 + LPM ECN.
2821          */
2822         if (dwc->revision < DWC3_REVISION_220A)
2823                 dwc3_trace(trace_dwc3_gadget,
2824                                 "Changing max_speed on rev %08x\n",
2825                                 dwc->revision);
2826
2827         dwc->gadget.max_speed           = dwc->maximum_speed;
2828
2829         /*
2830          * Per databook, DWC3 needs buffer size to be aligned to MaxPacketSize
2831          * on ep out.
2832          */
2833         dwc->gadget.quirk_ep_out_aligned_size = true;
2834
2835         /*
2836          * REVISIT: Here we should clear all pending IRQs to be
2837          * sure we're starting from a well known location.
2838          */
2839
2840         ret = dwc3_gadget_init_endpoints(dwc);
2841         if (ret)
2842                 goto err5;
2843
2844         ret = usb_add_gadget_udc(dwc->dev, &dwc->gadget);
2845         if (ret) {
2846                 dev_err(dwc->dev, "failed to register udc\n");
2847                 goto err5;
2848         }
2849
2850         return 0;
2851
2852 err5:
2853         kfree(dwc->zlp_buf);
2854
2855 err4:
2856         dwc3_gadget_free_endpoints(dwc);
2857         dma_free_coherent(dwc->dev, DWC3_EP0_BOUNCE_SIZE,
2858                         dwc->ep0_bounce, dwc->ep0_bounce_addr);
2859
2860 err3:
2861         kfree(dwc->setup_buf);
2862
2863 err2:
2864         dma_free_coherent(dwc->dev, sizeof(*dwc->ep0_trb),
2865                         dwc->ep0_trb, dwc->ep0_trb_addr);
2866
2867 err1:
2868         dma_free_coherent(dwc->dev, sizeof(*dwc->ctrl_req),
2869                         dwc->ctrl_req, dwc->ctrl_req_addr);
2870
2871 err0:
2872         return ret;
2873 }
2874
2875 /* -------------------------------------------------------------------------- */
2876
2877 void dwc3_gadget_exit(struct dwc3 *dwc)
2878 {
2879         usb_del_gadget_udc(&dwc->gadget);
2880
2881         dwc3_gadget_free_endpoints(dwc);
2882
2883         dma_free_coherent(dwc->dev, DWC3_EP0_BOUNCE_SIZE,
2884                         dwc->ep0_bounce, dwc->ep0_bounce_addr);
2885
2886         kfree(dwc->setup_buf);
2887         kfree(dwc->zlp_buf);
2888
2889         dma_free_coherent(dwc->dev, sizeof(*dwc->ep0_trb),
2890                         dwc->ep0_trb, dwc->ep0_trb_addr);
2891
2892         dma_free_coherent(dwc->dev, sizeof(*dwc->ctrl_req),
2893                         dwc->ctrl_req, dwc->ctrl_req_addr);
2894 }
2895
2896 int dwc3_gadget_suspend(struct dwc3 *dwc)
2897 {
2898         if (!dwc->gadget_driver)
2899                 return 0;
2900
2901         if (dwc->pullups_connected) {
2902                 dwc3_gadget_disable_irq(dwc);
2903                 dwc3_gadget_run_stop(dwc, true, true);
2904         }
2905
2906         __dwc3_gadget_ep_disable(dwc->eps[0]);
2907         __dwc3_gadget_ep_disable(dwc->eps[1]);
2908
2909         dwc->dcfg = dwc3_readl(dwc->regs, DWC3_DCFG);
2910
2911         return 0;
2912 }
2913
2914 int dwc3_gadget_resume(struct dwc3 *dwc)
2915 {
2916         struct dwc3_ep          *dep;
2917         int                     ret;
2918
2919         if (!dwc->gadget_driver)
2920                 return 0;
2921
2922         /* Start with SuperSpeed Default */
2923         dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(512);
2924
2925         dep = dwc->eps[0];
2926         ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc, NULL, false,
2927                         false);
2928         if (ret)
2929                 goto err0;
2930
2931         dep = dwc->eps[1];
2932         ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc, NULL, false,
2933                         false);
2934         if (ret)
2935                 goto err1;
2936
2937         /* begin to receive SETUP packets */
2938         dwc->ep0state = EP0_SETUP_PHASE;
2939         dwc3_ep0_out_start(dwc);
2940
2941         dwc3_writel(dwc->regs, DWC3_DCFG, dwc->dcfg);
2942
2943         if (dwc->pullups_connected) {
2944                 dwc3_gadget_enable_irq(dwc);
2945                 dwc3_gadget_run_stop(dwc, true, false);
2946         }
2947
2948         return 0;
2949
2950 err1:
2951         __dwc3_gadget_ep_disable(dwc->eps[0]);
2952
2953 err0:
2954         return ret;
2955 }