drivers/usb/dwc3/gadget.c

   1 /**
   2  * gadget.c - DesignWare USB3 DRD Controller Gadget Framework Link
   3  *
   4  * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com
   5  *
   6  * Authors: Felipe Balbi <balbi@ti.com>,
   7  *          Sebastian Andrzej Siewior <bigeasy@linutronix.de>
   8  *
   9  * Redistribution and use in source and binary forms, with or without
  10  * modification, are permitted provided that the following conditions
  11  * are met:
  12  * 1. Redistributions of source code must retain the above copyright
  13  *    notice, this list of conditions, and the following disclaimer,
  14  *    without modification.
  15  * 2. Redistributions in binary form must reproduce the above copyright
  16  *    notice, this list of conditions and the following disclaimer in the
  17  *    documentation and/or other materials provided with the distribution.
  18  * 3. The names of the above-listed copyright holders may not be used
  19  *    to endorse or promote products derived from this software without
  20  *    specific prior written permission.
  21  *
  22  * ALTERNATIVELY, this software may be distributed under the terms of the
  23  * GNU General Public License ("GPL") version 2, as published by the Free
  24  * Software Foundation.
  25  *
  26  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
  27  * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
  28  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  29  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
  30  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
  31  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
  32  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
  33  * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
  34  * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
  35  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  36  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  37  */
  38
  39 #include <linux/kernel.h>
  40 #include <linux/delay.h>
  41 #include <linux/slab.h>
  42 #include <linux/spinlock.h>
  43 #include <linux/platform_device.h>
  44 #include <linux/pm_runtime.h>
  45 #include <linux/interrupt.h>
  46 #include <linux/io.h>
  47 #include <linux/list.h>
  48 #include <linux/dma-mapping.h>
  49
  50 #include <linux/usb/ch9.h>
  51 #include <linux/usb/gadget.h>
  52
  53 #include "core.h"
  54 #include "gadget.h"
  55 #include "io.h"
  56
  57 void dwc3_gadget_giveback(struct dwc3_ep *dep, struct dwc3_request *req,
  58                 int status)
  59 {
  60         struct dwc3                     *dwc = dep->dwc;
  61
  62         if (req->queued) {
  63                 if (req->request.num_mapped_sgs)
  64                         dep->busy_slot += req->request.num_mapped_sgs;
  65                 else
  66                         dep->busy_slot++;
  67
  68                 /*
  69                  * Skip LINK TRB. We can't use req->trb and check for
  70                  * DWC3_TRBCTL_LINK_TRB because it points the TRB we just
  71                  * completed (not the LINK TRB).
  72                  */
  73                 if (((dep->busy_slot & DWC3_TRB_MASK) == DWC3_TRB_NUM - 1) &&
  74                                 usb_endpoint_xfer_isoc(dep->desc))
  75                         dep->busy_slot++;
  76         }
  77         list_del(&req->list);
  78         req->trb = NULL;
  79
  80         if (req->request.status == -EINPROGRESS)
  81                 req->request.status = status;
  82
  83         usb_gadget_unmap_request(&dwc->gadget, &req->request,
  84                         req->direction);
  85
  86         dev_dbg(dwc->dev, "request %p from %s completed %d/%d ===> %d\n",
  87                         req, dep->name, req->request.actual,
  88                         req->request.length, status);
  89
  90         spin_unlock(&dwc->lock);
  91         req->request.complete(&dep->endpoint, &req->request);
  92         spin_lock(&dwc->lock);
  93 }
  94
  95 static const char *dwc3_gadget_ep_cmd_string(u8 cmd)
  96 {
  97         switch (cmd) {
  98         case DWC3_DEPCMD_DEPSTARTCFG:
  99                 return "Start New Configuration";
 100         case DWC3_DEPCMD_ENDTRANSFER:
 101                 return "End Transfer";
 102         case DWC3_DEPCMD_UPDATETRANSFER:
 103                 return "Update Transfer";
 104         case DWC3_DEPCMD_STARTTRANSFER:
 105                 return "Start Transfer";
 106         case DWC3_DEPCMD_CLEARSTALL:
 107                 return "Clear Stall";
 108         case DWC3_DEPCMD_SETSTALL:
 109                 return "Set Stall";
 110         case DWC3_DEPCMD_GETSEQNUMBER:
 111                 return "Get Data Sequence Number";
 112         case DWC3_DEPCMD_SETTRANSFRESOURCE:
 113                 return "Set Endpoint Transfer Resource";
 114         case DWC3_DEPCMD_SETEPCONFIG:
 115                 return "Set Endpoint Configuration";
 116         default:
 117                 return "UNKNOWN command";
 118         }
 119 }
 120
 121 int dwc3_send_gadget_ep_cmd(struct dwc3 *dwc, unsigned ep,
 122                 unsigned cmd, struct dwc3_gadget_ep_cmd_params *params)
 123 {
 124         struct dwc3_ep          *dep = dwc->eps[ep];
 125         u32                     timeout = 500;
 126         u32                     reg;
 127
 128         dev_vdbg(dwc->dev, "%s: cmd '%s' params %08x %08x %08x\n",
 129                         dep->name,
 130                         dwc3_gadget_ep_cmd_string(cmd), params->param0,
 131                         params->param1, params->param2);
 132
 133         dwc3_writel(dwc->regs, DWC3_DEPCMDPAR0(ep), params->param0);
 134         dwc3_writel(dwc->regs, DWC3_DEPCMDPAR1(ep), params->param1);
 135         dwc3_writel(dwc->regs, DWC3_DEPCMDPAR2(ep), params->param2);
 136
 137         dwc3_writel(dwc->regs, DWC3_DEPCMD(ep), cmd | DWC3_DEPCMD_CMDACT);
 138         do {
 139                 reg = dwc3_readl(dwc->regs, DWC3_DEPCMD(ep));
 140                 if (!(reg & DWC3_DEPCMD_CMDACT)) {
 141                         dev_vdbg(dwc->dev, "Command Complete --> %d\n",
 142                                         DWC3_DEPCMD_STATUS(reg));
 143                         return 0;
 144                 }
 145
 146                 /*
 147                  * We can't sleep here, because it is also called from
 148                  * interrupt context.
 149                  */
 150                 timeout--;
 151                 if (!timeout)
 152                         return -ETIMEDOUT;
 153
 154                 udelay(1);
 155         } while (1);
 156 }
 157
 158 static dma_addr_t dwc3_trb_dma_offset(struct dwc3_ep *dep,
 159                 struct dwc3_trb_hw *trb)
 160 {
 161         u32             offset = (char *) trb - (char *) dep->trb_pool;
 162
 163         return dep->trb_pool_dma + offset;
 164 }
 165
 166 static int dwc3_alloc_trb_pool(struct dwc3_ep *dep)
 167 {
 168         struct dwc3             *dwc = dep->dwc;
 169
 170         if (dep->trb_pool)
 171                 return 0;
 172
 173         if (dep->number == 0 || dep->number == 1)
 174                 return 0;
 175
 176         dep->trb_pool = dma_alloc_coherent(dwc->dev,
 177                         sizeof(struct dwc3_trb) * DWC3_TRB_NUM,
 178                         &dep->trb_pool_dma, GFP_KERNEL);
 179         if (!dep->trb_pool) {
 180                 dev_err(dep->dwc->dev, "failed to allocate trb pool for %s\n",
 181                                 dep->name);
 182                 return -ENOMEM;
 183         }
 184
 185         return 0;
 186 }
 187
 188 static void dwc3_free_trb_pool(struct dwc3_ep *dep)
 189 {
 190         struct dwc3             *dwc = dep->dwc;
 191
 192         dma_free_coherent(dwc->dev, sizeof(struct dwc3_trb) * DWC3_TRB_NUM,
 193                         dep->trb_pool, dep->trb_pool_dma);
 194
 195         dep->trb_pool = NULL;
 196         dep->trb_pool_dma = 0;
 197 }
 198
 199 static int dwc3_gadget_start_config(struct dwc3 *dwc, struct dwc3_ep *dep)
 200 {
 201         struct dwc3_gadget_ep_cmd_params params;
 202         u32                     cmd;
 203
 204         memset(&params, 0x00, sizeof(params));
 205
 206         if (dep->number != 1) {
 207                 cmd = DWC3_DEPCMD_DEPSTARTCFG;
 208                 /* XferRscIdx == 0 for ep0 and 2 for the remaining */
 209                 if (dep->number > 1) {
 210                         if (dwc->start_config_issued)
 211                                 return 0;
 212                         dwc->start_config_issued = true;
 213                         cmd |= DWC3_DEPCMD_PARAM(2);
 214                 }
 215
 216                 return dwc3_send_gadget_ep_cmd(dwc, 0, cmd, &params);
 217         }
 218
 219         return 0;
 220 }
 221
 222 static int dwc3_gadget_set_ep_config(struct dwc3 *dwc, struct dwc3_ep *dep,
 223                 const struct usb_endpoint_descriptor *desc,
 224                 const struct usb_ss_ep_comp_descriptor *comp_desc)
 225 {
 226         struct dwc3_gadget_ep_cmd_params params;
 227
 228         memset(&params, 0x00, sizeof(params));
 229
 230         params.param0 = DWC3_DEPCFG_EP_TYPE(usb_endpoint_type(desc))
 231                 | DWC3_DEPCFG_MAX_PACKET_SIZE(usb_endpoint_maxp(desc))
 232                 | DWC3_DEPCFG_BURST_SIZE(dep->endpoint.maxburst);
 233
 234         params.param1 = DWC3_DEPCFG_XFER_COMPLETE_EN
 235                 | DWC3_DEPCFG_XFER_NOT_READY_EN;
 236
 237         if (usb_ss_max_streams(comp_desc) && usb_endpoint_xfer_bulk(desc)) {
 238                 params.param1 |= DWC3_DEPCFG_STREAM_CAPABLE
 239                         | DWC3_DEPCFG_STREAM_EVENT_EN;
 240                 dep->stream_capable = true;
 241         }
 242
 243         if (usb_endpoint_xfer_isoc(desc))
 244                 params.param1 |= DWC3_DEPCFG_XFER_IN_PROGRESS_EN;
 245
 246         /*
 247          * We are doing 1:1 mapping for endpoints, meaning
 248          * Physical Endpoints 2 maps to Logical Endpoint 2 and
 249          * so on. We consider the direction bit as part of the physical
 250          * endpoint number. So USB endpoint 0x81 is 0x03.
 251          */
 252         params.param1 |= DWC3_DEPCFG_EP_NUMBER(dep->number);
 253
 254         /*
 255          * We must use the lower 16 TX FIFOs even though
 256          * HW might have more
 257          */
 258         if (dep->direction)
 259                 params.param0 |= DWC3_DEPCFG_FIFO_NUMBER(dep->number >> 1);
 260
 261         if (desc->bInterval) {
 262                 params.param1 |= DWC3_DEPCFG_BINTERVAL_M1(desc->bInterval - 1);
 263                 dep->interval = 1 << (desc->bInterval - 1);
 264         }
 265
 266         return dwc3_send_gadget_ep_cmd(dwc, dep->number,
 267                         DWC3_DEPCMD_SETEPCONFIG, &params);
 268 }
 269
 270 static int dwc3_gadget_set_xfer_resource(struct dwc3 *dwc, struct dwc3_ep *dep)
 271 {
 272         struct dwc3_gadget_ep_cmd_params params;
 273
 274         memset(&params, 0x00, sizeof(params));
 275
 276         params.param0 = DWC3_DEPXFERCFG_NUM_XFER_RES(1);
 277
 278         return dwc3_send_gadget_ep_cmd(dwc, dep->number,
 279                         DWC3_DEPCMD_SETTRANSFRESOURCE, &params);
 280 }
 281
 282 /**
 283  * __dwc3_gadget_ep_enable - Initializes a HW endpoint
 284  * @dep: endpoint to be initialized
 285  * @desc: USB Endpoint Descriptor
 286  *
 287  * Caller should take care of locking
 288  */
 289 static int __dwc3_gadget_ep_enable(struct dwc3_ep *dep,
 290                 const struct usb_endpoint_descriptor *desc,
 291                 const struct usb_ss_ep_comp_descriptor *comp_desc)
 292 {
 293         struct dwc3             *dwc = dep->dwc;
 294         u32                     reg;
 295         int                     ret = -ENOMEM;
 296
 297         if (!(dep->flags & DWC3_EP_ENABLED)) {
 298                 ret = dwc3_gadget_start_config(dwc, dep);
 299                 if (ret)
 300                         return ret;
 301         }
 302
 303         ret = dwc3_gadget_set_ep_config(dwc, dep, desc, comp_desc);
 304         if (ret)
 305                 return ret;
 306
 307         if (!(dep->flags & DWC3_EP_ENABLED)) {
 308                 struct dwc3_trb_hw      *trb_st_hw;
 309                 struct dwc3_trb_hw      *trb_link_hw;
 310                 struct dwc3_trb         trb_link;
 311
 312                 ret = dwc3_gadget_set_xfer_resource(dwc, dep);
 313                 if (ret)
 314                         return ret;
 315
 316                 dep->desc = desc;
 317                 dep->comp_desc = comp_desc;
 318                 dep->type = usb_endpoint_type(desc);
 319                 dep->flags |= DWC3_EP_ENABLED;
 320
 321                 reg = dwc3_readl(dwc->regs, DWC3_DALEPENA);
 322                 reg |= DWC3_DALEPENA_EP(dep->number);
 323                 dwc3_writel(dwc->regs, DWC3_DALEPENA, reg);
 324
 325                 if (!usb_endpoint_xfer_isoc(desc))
 326                         return 0;
 327
 328                 memset(&trb_link, 0, sizeof(trb_link));
 329
 330                 /* Link TRB for ISOC. The HWO but is never reset */
 331                 trb_st_hw = &dep->trb_pool[0];
 332
 333                 trb_link.bplh = dwc3_trb_dma_offset(dep, trb_st_hw);
 334                 trb_link.trbctl = DWC3_TRBCTL_LINK_TRB;
 335                 trb_link.hwo = true;
 336
 337                 trb_link_hw = &dep->trb_pool[DWC3_TRB_NUM - 1];
 338                 dwc3_trb_to_hw(&trb_link, trb_link_hw);
 339         }
 340
 341         return 0;
 342 }
 343
 344 static void dwc3_stop_active_transfer(struct dwc3 *dwc, u32 epnum);
 345 static void dwc3_remove_requests(struct dwc3 *dwc, struct dwc3_ep *dep)
 346 {
 347         struct dwc3_request             *req;
 348
 349         if (!list_empty(&dep->req_queued))
 350                 dwc3_stop_active_transfer(dwc, dep->number);
 351
 352         while (!list_empty(&dep->request_list)) {
 353                 req = next_request(&dep->request_list);
 354
 355                 dwc3_gadget_giveback(dep, req, -ESHUTDOWN);
 356         }
 357 }
 358
 359 /**
 360  * __dwc3_gadget_ep_disable - Disables a HW endpoint
 361  * @dep: the endpoint to disable
 362  *
 363  * This function also removes requests which are currently processed ny the
 364  * hardware and those which are not yet scheduled.
 365  * Caller should take care of locking.
 366  */
 367 static int __dwc3_gadget_ep_disable(struct dwc3_ep *dep)
 368 {
 369         struct dwc3             *dwc = dep->dwc;
 370         u32                     reg;
 371
 372         dwc3_remove_requests(dwc, dep);
 373
 374         reg = dwc3_readl(dwc->regs, DWC3_DALEPENA);
 375         reg &= ~DWC3_DALEPENA_EP(dep->number);
 376         dwc3_writel(dwc->regs, DWC3_DALEPENA, reg);
 377
 378         dep->stream_capable = false;
 379         dep->desc = NULL;
 380         dep->endpoint.desc = NULL;
 381         dep->comp_desc = NULL;
 382         dep->type = 0;
 383         dep->flags = 0;
 384
 385         return 0;
 386 }
 387
 388 /* -------------------------------------------------------------------------- */
 389
 390 static int dwc3_gadget_ep0_enable(struct usb_ep *ep,
 391                 const struct usb_endpoint_descriptor *desc)
 392 {
 393         return -EINVAL;
 394 }
 395
 396 static int dwc3_gadget_ep0_disable(struct usb_ep *ep)
 397 {
 398         return -EINVAL;
 399 }
 400
 401 /* -------------------------------------------------------------------------- */
 402
 403 static int dwc3_gadget_ep_enable(struct usb_ep *ep,
 404                 const struct usb_endpoint_descriptor *desc)
 405 {
 406         struct dwc3_ep                  *dep;
 407         struct dwc3                     *dwc;
 408         unsigned long                   flags;
 409         int                             ret;
 410
 411         if (!ep || !desc || desc->bDescriptorType != USB_DT_ENDPOINT) {
 412                 pr_debug("dwc3: invalid parameters\n");
 413                 return -EINVAL;
 414         }
 415
 416         if (!desc->wMaxPacketSize) {
 417                 pr_debug("dwc3: missing wMaxPacketSize\n");
 418                 return -EINVAL;
 419         }
 420
 421         dep = to_dwc3_ep(ep);
 422         dwc = dep->dwc;
 423
 424         switch (usb_endpoint_type(desc)) {
 425         case USB_ENDPOINT_XFER_CONTROL:
 426                 strncat(dep->name, "-control", sizeof(dep->name));
 427                 break;
 428         case USB_ENDPOINT_XFER_ISOC:
 429                 strncat(dep->name, "-isoc", sizeof(dep->name));
 430                 break;
 431         case USB_ENDPOINT_XFER_BULK:
 432                 strncat(dep->name, "-bulk", sizeof(dep->name));
 433                 break;
 434         case USB_ENDPOINT_XFER_INT:
 435                 strncat(dep->name, "-int", sizeof(dep->name));
 436                 break;
 437         default:
 438                 dev_err(dwc->dev, "invalid endpoint transfer type\n");
 439         }
 440
 441         if (dep->flags & DWC3_EP_ENABLED) {
 442                 dev_WARN_ONCE(dwc->dev, true, "%s is already enabled\n",
 443                                 dep->name);
 444                 return 0;
 445         }
 446
 447         dev_vdbg(dwc->dev, "Enabling %s\n", dep->name);
 448
 449         spin_lock_irqsave(&dwc->lock, flags);
 450         ret = __dwc3_gadget_ep_enable(dep, desc, ep->comp_desc);
 451         spin_unlock_irqrestore(&dwc->lock, flags);
 452
 453         return ret;
 454 }
 455
 456 static int dwc3_gadget_ep_disable(struct usb_ep *ep)
 457 {
 458         struct dwc3_ep                  *dep;
 459         struct dwc3                     *dwc;
 460         unsigned long                   flags;
 461         int                             ret;
 462
 463         if (!ep) {
 464                 pr_debug("dwc3: invalid parameters\n");
 465                 return -EINVAL;
 466         }
 467
 468         dep = to_dwc3_ep(ep);
 469         dwc = dep->dwc;
 470
 471         if (!(dep->flags & DWC3_EP_ENABLED)) {
 472                 dev_WARN_ONCE(dwc->dev, true, "%s is already disabled\n",
 473                                 dep->name);
 474                 return 0;
 475         }
 476
 477         snprintf(dep->name, sizeof(dep->name), "ep%d%s",
 478                         dep->number >> 1,
 479                         (dep->number & 1) ? "in" : "out");
 480
 481         spin_lock_irqsave(&dwc->lock, flags);
 482         ret = __dwc3_gadget_ep_disable(dep);
 483         spin_unlock_irqrestore(&dwc->lock, flags);
 484
 485         return ret;
 486 }
 487
 488 static struct usb_request *dwc3_gadget_ep_alloc_request(struct usb_ep *ep,
 489         gfp_t gfp_flags)
 490 {
 491         struct dwc3_request             *req;
 492         struct dwc3_ep                  *dep = to_dwc3_ep(ep);
 493         struct dwc3                     *dwc = dep->dwc;
 494
 495         req = kzalloc(sizeof(*req), gfp_flags);
 496         if (!req) {
 497                 dev_err(dwc->dev, "not enough memory\n");
 498                 return NULL;
 499         }
 500
 501         req->epnum      = dep->number;
 502         req->dep        = dep;
 503
 504         return &req->request;
 505 }
 506
 507 static void dwc3_gadget_ep_free_request(struct usb_ep *ep,
 508                 struct usb_request *request)
 509 {
 510         struct dwc3_request             *req = to_dwc3_request(request);
 511
 512         kfree(req);
 513 }
 514
 515 /**
 516  * dwc3_prepare_one_trb - setup one TRB from one request
 517  * @dep: endpoint for which this request is prepared
 518  * @req: dwc3_request pointer
 519  */
 520 static void dwc3_prepare_one_trb(struct dwc3_ep *dep,
 521                 struct dwc3_request *req, dma_addr_t dma,
 522                 unsigned length, unsigned last, unsigned chain)
 523 {
 524         struct dwc3             *dwc = dep->dwc;
 525         struct dwc3_trb_hw      *trb_hw;
 526         struct dwc3_trb         trb;
 527
 528         unsigned int            cur_slot;
 529
 530         dev_vdbg(dwc->dev, "%s: req %p dma %08llx length %d%s%s\n",
 531                         dep->name, req, (unsigned long long) dma,
 532                         length, last ? " last" : "",
 533                         chain ? " chain" : "");
 534
 535         trb_hw = &dep->trb_pool[dep->free_slot & DWC3_TRB_MASK];
 536         cur_slot = dep->free_slot;
 537         dep->free_slot++;
 538
 539         /* Skip the LINK-TRB on ISOC */
 540         if (((cur_slot & DWC3_TRB_MASK) == DWC3_TRB_NUM - 1) &&
 541                         usb_endpoint_xfer_isoc(dep->desc))
 542                 return;
 543
 544         memset(&trb, 0, sizeof(trb));
 545         if (!req->trb) {
 546                 dwc3_gadget_move_request_queued(req);
 547                 req->trb = trb_hw;
 548                 req->trb_dma = dwc3_trb_dma_offset(dep, trb_hw);
 549         }
 550
 551         if (usb_endpoint_xfer_isoc(dep->desc)) {
 552                 trb.isp_imi = true;
 553                 trb.csp = true;
 554         } else {
 555                 trb.chn = chain;
 556                 trb.lst = last;
 557         }
 558
 559         if (usb_endpoint_xfer_bulk(dep->desc) && dep->stream_capable)
 560                 trb.sid_sofn = req->request.stream_id;
 561
 562         switch (usb_endpoint_type(dep->desc)) {
 563         case USB_ENDPOINT_XFER_CONTROL:
 564                 trb.trbctl = DWC3_TRBCTL_CONTROL_SETUP;
 565                 break;
 566
 567         case USB_ENDPOINT_XFER_ISOC:
 568                 trb.trbctl = DWC3_TRBCTL_ISOCHRONOUS_FIRST;
 569
 570                 /* IOC every DWC3_TRB_NUM / 4 so we can refill */
 571                 if (!(cur_slot % (DWC3_TRB_NUM / 4)))
 572                         trb.ioc = last;
 573                 break;
 574
 575         case USB_ENDPOINT_XFER_BULK:
 576         case USB_ENDPOINT_XFER_INT:
 577                 trb.trbctl = DWC3_TRBCTL_NORMAL;
 578                 break;
 579         default:
 580                 /*
 581                  * This is only possible with faulty memory because we
 582                  * checked it already :)
 583                  */
 584                 BUG();
 585         }
 586
 587         trb.length      = length;
 588         trb.bplh        = dma;
 589         trb.hwo         = true;
 590
 591         dwc3_trb_to_hw(&trb, trb_hw);
 592 }
 593
 594 /*
 595  * dwc3_prepare_trbs - setup TRBs from requests
 596  * @dep: endpoint for which requests are being prepared
 597  * @starting: true if the endpoint is idle and no requests are queued.
 598  *
 599  * The functions goes through the requests list and setups TRBs for the
 600  * transfers. The functions returns once there are not more TRBs available or
 601  * it run out of requests.
 602  */
 603 static void dwc3_prepare_trbs(struct dwc3_ep *dep, bool starting)
 604 {
 605         struct dwc3_request     *req, *n;
 606         u32                     trbs_left;
 607         unsigned int            last_one = 0;
 608
 609         BUILD_BUG_ON_NOT_POWER_OF_2(DWC3_TRB_NUM);
 610
 611         /* the first request must not be queued */
 612         trbs_left = (dep->busy_slot - dep->free_slot) & DWC3_TRB_MASK;
 613
 614         /*
 615          * if busy & slot are equal than it is either full or empty. If we are
 616          * starting to proceed requests then we are empty. Otherwise we ar
 617          * full and don't do anything
 618          */
 619         if (!trbs_left) {
 620                 if (!starting)
 621                         return;
 622                 trbs_left = DWC3_TRB_NUM;
 623                 /*
 624                  * In case we start from scratch, we queue the ISOC requests
 625                  * starting from slot 1. This is done because we use ring
 626                  * buffer and have no LST bit to stop us. Instead, we place
 627                  * IOC bit TRB_NUM/4. We try to avoid to having an interrupt
 628                  * after the first request so we start at slot 1 and have
 629                  * 7 requests proceed before we hit the first IOC.
 630                  * Other transfer types don't use the ring buffer and are
 631                  * processed from the first TRB until the last one. Since we
 632                  * don't wrap around we have to start at the beginning.
 633                  */
 634                 if (usb_endpoint_xfer_isoc(dep->desc)) {
 635                         dep->busy_slot = 1;
 636                         dep->free_slot = 1;
 637                 } else {
 638                         dep->busy_slot = 0;
 639                         dep->free_slot = 0;
 640                 }
 641         }
 642
 643         /* The last TRB is a link TRB, not used for xfer */
 644         if ((trbs_left <= 1) && usb_endpoint_xfer_isoc(dep->desc))
 645                 return;
 646
 647         list_for_each_entry_safe(req, n, &dep->request_list, list) {
 648                 unsigned        length;
 649                 dma_addr_t      dma;
 650
 651                 if (req->request.num_mapped_sgs > 0) {
 652                         struct usb_request *request = &req->request;
 653                         struct scatterlist *sg = request->sg;
 654                         struct scatterlist *s;
 655                         int             i;
 656
 657                         for_each_sg(sg, s, request->num_mapped_sgs, i) {
 658                                 unsigned chain = true;
 659
 660                                 length = sg_dma_len(s);
 661                                 dma = sg_dma_address(s);
 662
 663                                 if (i == (request->num_mapped_sgs - 1)
 664                                                 || sg_is_last(s)) {
 665                                         last_one = true;
 666                                         chain = false;
 667                                 }
 668
 669                                 trbs_left--;
 670                                 if (!trbs_left)
 671                                         last_one = true;
 672
 673                                 if (last_one)
 674                                         chain = false;
 675
 676                                 dwc3_prepare_one_trb(dep, req, dma, length,
 677                                                 last_one, chain);
 678
 679                                 if (last_one)
 680                                         break;
 681                         }
 682                 } else {
 683                         dma = req->request.dma;
 684                         length = req->request.length;
 685                         trbs_left--;
 686
 687                         if (!trbs_left)
 688                                 last_one = 1;
 689
 690                         /* Is this the last request? */
 691                         if (list_is_last(&req->list, &dep->request_list))
 692                                 last_one = 1;
 693
 694                         dwc3_prepare_one_trb(dep, req, dma, length,
 695                                         last_one, false);
 696
 697                         if (last_one)
 698                                 break;
 699                 }
 700         }
 701 }
 702
 703 static int __dwc3_gadget_kick_transfer(struct dwc3_ep *dep, u16 cmd_param,
 704                 int start_new)
 705 {
 706         struct dwc3_gadget_ep_cmd_params params;
 707         struct dwc3_request             *req;
 708         struct dwc3                     *dwc = dep->dwc;
 709         int                             ret;
 710         u32                             cmd;
 711
 712         if (start_new && (dep->flags & DWC3_EP_BUSY)) {
 713                 dev_vdbg(dwc->dev, "%s: endpoint busy\n", dep->name);
 714                 return -EBUSY;
 715         }
 716         dep->flags &= ~DWC3_EP_PENDING_REQUEST;
 717
 718         /*
 719          * If we are getting here after a short-out-packet we don't enqueue any
 720          * new requests as we try to set the IOC bit only on the last request.
 721          */
 722         if (start_new) {
 723                 if (list_empty(&dep->req_queued))
 724                         dwc3_prepare_trbs(dep, start_new);
 725
 726                 /* req points to the first request which will be sent */
 727                 req = next_request(&dep->req_queued);
 728         } else {
 729                 dwc3_prepare_trbs(dep, start_new);
 730
 731                 /*
 732                  * req points to the first request where HWO changed
 733                  * from 0 to 1
 734                  */
 735                 req = next_request(&dep->req_queued);
 736         }
 737         if (!req) {
 738                 dep->flags |= DWC3_EP_PENDING_REQUEST;
 739                 return 0;
 740         }
 741
 742         memset(&params, 0, sizeof(params));
 743         params.param0 = upper_32_bits(req->trb_dma);
 744         params.param1 = lower_32_bits(req->trb_dma);
 745
 746         if (start_new)
 747                 cmd = DWC3_DEPCMD_STARTTRANSFER;
 748         else
 749                 cmd = DWC3_DEPCMD_UPDATETRANSFER;
 750
 751         cmd |= DWC3_DEPCMD_PARAM(cmd_param);
 752         ret = dwc3_send_gadget_ep_cmd(dwc, dep->number, cmd, &params);
 753         if (ret < 0) {
 754                 dev_dbg(dwc->dev, "failed to send STARTTRANSFER command\n");
 755
 756                 /*
 757                  * FIXME we need to iterate over the list of requests
 758                  * here and stop, unmap, free and del each of the linked
 759                  * requests instead of we do now.
 760                  */
 761                 usb_gadget_unmap_request(&dwc->gadget, &req->request,
 762                                 req->direction);
 763                 list_del(&req->list);
 764                 return ret;
 765         }
 766
 767         dep->flags |= DWC3_EP_BUSY;
 768         dep->res_trans_idx = dwc3_gadget_ep_get_transfer_index(dwc,
 769                         dep->number);
 770
 771         WARN_ON_ONCE(!dep->res_trans_idx);
 772
 773         return 0;
 774 }
 775
 776 static int __dwc3_gadget_ep_queue(struct dwc3_ep *dep, struct dwc3_request *req)
 777 {
 778         struct dwc3             *dwc = dep->dwc;
 779         int                     ret;
 780
 781         req->request.actual     = 0;
 782         req->request.status     = -EINPROGRESS;
 783         req->direction          = dep->direction;
 784         req->epnum              = dep->number;
 785
 786         /*
 787          * We only add to our list of requests now and
 788          * start consuming the list once we get XferNotReady
 789          * IRQ.
 790          *
 791          * That way, we avoid doing anything that we don't need
 792          * to do now and defer it until the point we receive a
 793          * particular token from the Host side.
 794          *
 795          * This will also avoid Host cancelling URBs due to too
 796          * many NACKs.
 797          */
 798         ret = usb_gadget_map_request(&dwc->gadget, &req->request,
 799                         dep->direction);
 800         if (ret)
 801                 return ret;
 802
 803         list_add_tail(&req->list, &dep->request_list);
 804
 805         /*
 806          * There is one special case: XferNotReady with
 807          * empty list of requests. We need to kick the
 808          * transfer here in that situation, otherwise
 809          * we will be NAKing forever.
 810          *
 811          * If we get XferNotReady before gadget driver
 812          * has a chance to queue a request, we will ACK
 813          * the IRQ but won't be able to receive the data
 814          * until the next request is queued. The following
 815          * code is handling exactly that.
 816          */
 817         if (dep->flags & DWC3_EP_PENDING_REQUEST) {
 818                 int ret;
 819                 int start_trans;
 820
 821                 start_trans = 1;
 822                 if (usb_endpoint_xfer_isoc(dep->endpoint.desc) &&
 823                                 dep->flags & DWC3_EP_BUSY)
 824                         start_trans = 0;
 825
 826                 ret =  __dwc3_gadget_kick_transfer(dep, 0, start_trans);
 827                 if (ret && ret != -EBUSY) {
 828                         struct dwc3     *dwc = dep->dwc;
 829
 830                         dev_dbg(dwc->dev, "%s: failed to kick transfers\n",
 831                                         dep->name);
 832                 }
 833         };
 834
 835         return 0;
 836 }
 837
 838 static int dwc3_gadget_ep_queue(struct usb_ep *ep, struct usb_request *request,
 839         gfp_t gfp_flags)
 840 {
 841         struct dwc3_request             *req = to_dwc3_request(request);
 842         struct dwc3_ep                  *dep = to_dwc3_ep(ep);
 843         struct dwc3                     *dwc = dep->dwc;
 844
 845         unsigned long                   flags;
 846
 847         int                             ret;
 848
 849         if (!dep->desc) {
 850                 dev_dbg(dwc->dev, "trying to queue request %p to disabled %s\n",
 851                                 request, ep->name);
 852                 return -ESHUTDOWN;
 853         }
 854
 855         dev_vdbg(dwc->dev, "queing request %p to %s length %d\n",
 856                         request, ep->name, request->length);
 857
 858         spin_lock_irqsave(&dwc->lock, flags);
 859         ret = __dwc3_gadget_ep_queue(dep, req);
 860         spin_unlock_irqrestore(&dwc->lock, flags);
 861
 862         return ret;
 863 }
 864
 865 static int dwc3_gadget_ep_dequeue(struct usb_ep *ep,
 866                 struct usb_request *request)
 867 {
 868         struct dwc3_request             *req = to_dwc3_request(request);
 869         struct dwc3_request             *r = NULL;
 870
 871         struct dwc3_ep                  *dep = to_dwc3_ep(ep);
 872         struct dwc3                     *dwc = dep->dwc;
 873
 874         unsigned long                   flags;
 875         int                             ret = 0;
 876
 877         spin_lock_irqsave(&dwc->lock, flags);
 878
 879         list_for_each_entry(r, &dep->request_list, list) {
 880                 if (r == req)
 881                         break;
 882         }
 883
 884         if (r != req) {
 885                 list_for_each_entry(r, &dep->req_queued, list) {
 886                         if (r == req)
 887                                 break;
 888                 }
 889                 if (r == req) {
 890                         /* wait until it is processed */
 891                         dwc3_stop_active_transfer(dwc, dep->number);
 892                         goto out0;
 893                 }
 894                 dev_err(dwc->dev, "request %p was not queued to %s\n",
 895                                 request, ep->name);
 896                 ret = -EINVAL;
 897                 goto out0;
 898         }
 899
 900         /* giveback the request */
 901         dwc3_gadget_giveback(dep, req, -ECONNRESET);
 902
 903 out0:
 904         spin_unlock_irqrestore(&dwc->lock, flags);
 905
 906         return ret;
 907 }
 908
 909 int __dwc3_gadget_ep_set_halt(struct dwc3_ep *dep, int value)
 910 {
 911         struct dwc3_gadget_ep_cmd_params        params;
 912         struct dwc3                             *dwc = dep->dwc;
 913         int                                     ret;
 914
 915         memset(&params, 0x00, sizeof(params));
 916
 917         if (value) {
 918                 if (dep->number == 0 || dep->number == 1) {
 919                         /*
 920                          * Whenever EP0 is stalled, we will restart
 921                          * the state machine, thus moving back to
 922                          * Setup Phase
 923                          */
 924                         dwc->ep0state = EP0_SETUP_PHASE;
 925                 }
 926
 927                 ret = dwc3_send_gadget_ep_cmd(dwc, dep->number,
 928                         DWC3_DEPCMD_SETSTALL, &params);
 929                 if (ret)
 930                         dev_err(dwc->dev, "failed to %s STALL on %s\n",
 931                                         value ? "set" : "clear",
 932                                         dep->name);
 933                 else
 934                         dep->flags |= DWC3_EP_STALL;
 935         } else {
 936                 if (dep->flags & DWC3_EP_WEDGE)
 937                         return 0;
 938
 939                 ret = dwc3_send_gadget_ep_cmd(dwc, dep->number,
 940                         DWC3_DEPCMD_CLEARSTALL, &params);
 941                 if (ret)
 942                         dev_err(dwc->dev, "failed to %s STALL on %s\n",
 943                                         value ? "set" : "clear",
 944                                         dep->name);
 945                 else
 946                         dep->flags &= ~DWC3_EP_STALL;
 947         }
 948
 949         return ret;
 950 }
 951
 952 static int dwc3_gadget_ep_set_halt(struct usb_ep *ep, int value)
 953 {
 954         struct dwc3_ep                  *dep = to_dwc3_ep(ep);
 955         struct dwc3                     *dwc = dep->dwc;
 956
 957         unsigned long                   flags;
 958
 959         int                             ret;
 960
 961         spin_lock_irqsave(&dwc->lock, flags);
 962
 963         if (usb_endpoint_xfer_isoc(dep->desc)) {
 964                 dev_err(dwc->dev, "%s is of Isochronous type\n", dep->name);
 965                 ret = -EINVAL;
 966                 goto out;
 967         }
 968
 969         ret = __dwc3_gadget_ep_set_halt(dep, value);
 970 out:
 971         spin_unlock_irqrestore(&dwc->lock, flags);
 972
 973         return ret;
 974 }
 975
 976 static int dwc3_gadget_ep_set_wedge(struct usb_ep *ep)
 977 {
 978         struct dwc3_ep                  *dep = to_dwc3_ep(ep);
 979
 980         dep->flags |= DWC3_EP_WEDGE;
 981
 982         return dwc3_gadget_ep_set_halt(ep, 1);
 983 }
 984
 985 /* -------------------------------------------------------------------------- */
 986
 987 static struct usb_endpoint_descriptor dwc3_gadget_ep0_desc = {
 988         .bLength        = USB_DT_ENDPOINT_SIZE,
 989         .bDescriptorType = USB_DT_ENDPOINT,
 990         .bmAttributes   = USB_ENDPOINT_XFER_CONTROL,
 991 };
 992
 993 static const struct usb_ep_ops dwc3_gadget_ep0_ops = {
 994         .enable         = dwc3_gadget_ep0_enable,
 995         .disable        = dwc3_gadget_ep0_disable,
 996         .alloc_request  = dwc3_gadget_ep_alloc_request,
 997         .free_request   = dwc3_gadget_ep_free_request,
 998         .queue          = dwc3_gadget_ep0_queue,
 999         .dequeue        = dwc3_gadget_ep_dequeue,
1000         .set_halt       = dwc3_gadget_ep_set_halt,
1001         .set_wedge      = dwc3_gadget_ep_set_wedge,
1002 };
1003
1004 static const struct usb_ep_ops dwc3_gadget_ep_ops = {
1005         .enable         = dwc3_gadget_ep_enable,
1006         .disable        = dwc3_gadget_ep_disable,
1007         .alloc_request  = dwc3_gadget_ep_alloc_request,
1008         .free_request   = dwc3_gadget_ep_free_request,
1009         .queue          = dwc3_gadget_ep_queue,
1010         .dequeue        = dwc3_gadget_ep_dequeue,
1011         .set_halt       = dwc3_gadget_ep_set_halt,
1012         .set_wedge      = dwc3_gadget_ep_set_wedge,
1013 };
1014
1015 /* -------------------------------------------------------------------------- */
1016
1017 static int dwc3_gadget_get_frame(struct usb_gadget *g)
1018 {
1019         struct dwc3             *dwc = gadget_to_dwc(g);
1020         u32                     reg;
1021
1022         reg = dwc3_readl(dwc->regs, DWC3_DSTS);
1023         return DWC3_DSTS_SOFFN(reg);
1024 }
1025
1026 static int dwc3_gadget_wakeup(struct usb_gadget *g)
1027 {
1028         struct dwc3             *dwc = gadget_to_dwc(g);
1029
1030         unsigned long           timeout;
1031         unsigned long           flags;
1032
1033         u32                     reg;
1034
1035         int                     ret = 0;
1036
1037         u8                      link_state;
1038         u8                      speed;
1039
1040         spin_lock_irqsave(&dwc->lock, flags);
1041
1042         /*
1043          * According to the Databook Remote wakeup request should
1044          * be issued only when the device is in early suspend state.
1045          *
1046          * We can check that via USB Link State bits in DSTS register.
1047          */
1048         reg = dwc3_readl(dwc->regs, DWC3_DSTS);
1049
1050         speed = reg & DWC3_DSTS_CONNECTSPD;
1051         if (speed == DWC3_DSTS_SUPERSPEED) {
1052                 dev_dbg(dwc->dev, "no wakeup on SuperSpeed\n");
1053                 ret = -EINVAL;
1054                 goto out;
1055         }
1056
1057         link_state = DWC3_DSTS_USBLNKST(reg);
1058
1059         switch (link_state) {
1060         case DWC3_LINK_STATE_RX_DET:    /* in HS, means Early Suspend */
1061         case DWC3_LINK_STATE_U3:        /* in HS, means SUSPEND */
1062                 break;
1063         default:
1064                 dev_dbg(dwc->dev, "can't wakeup from link state %d\n",
1065                                 link_state);
1066                 ret = -EINVAL;
1067                 goto out;
1068         }
1069
1070         reg = dwc3_readl(dwc->regs, DWC3_DCTL);
1071
1072         /*
1073          * Switch link state to Recovery. In HS/FS/LS this means
1074          * RemoteWakeup Request
1075          */
1076         reg |= DWC3_DCTL_ULSTCHNG_RECOVERY;
1077         dwc3_writel(dwc->regs, DWC3_DCTL, reg);
1078
1079         /* wait for at least 2000us */
1080         usleep_range(2000, 2500);
1081
1082         /* write zeroes to Link Change Request */
1083         reg &= ~DWC3_DCTL_ULSTCHNGREQ_MASK;
1084         dwc3_writel(dwc->regs, DWC3_DCTL, reg);
1085
1086         /* pool until Link State change to ON */
1087         timeout = jiffies + msecs_to_jiffies(100);
1088
1089         while (!(time_after(jiffies, timeout))) {
1090                 reg = dwc3_readl(dwc->regs, DWC3_DSTS);
1091
1092                 /* in HS, means ON */
1093                 if (DWC3_DSTS_USBLNKST(reg) == DWC3_LINK_STATE_U0)
1094                         break;
1095         }
1096
1097         if (DWC3_DSTS_USBLNKST(reg) != DWC3_LINK_STATE_U0) {
1098                 dev_err(dwc->dev, "failed to send remote wakeup\n");
1099                 ret = -EINVAL;
1100         }
1101
1102 out:
1103         spin_unlock_irqrestore(&dwc->lock, flags);
1104
1105         return ret;
1106 }
1107
1108 static int dwc3_gadget_set_selfpowered(struct usb_gadget *g,
1109                 int is_selfpowered)
1110 {
1111         struct dwc3             *dwc = gadget_to_dwc(g);
1112
1113         dwc->is_selfpowered = !!is_selfpowered;
1114
1115         return 0;
1116 }
1117
1118 static void dwc3_gadget_run_stop(struct dwc3 *dwc, int is_on)
1119 {
1120         u32                     reg;
1121         u32                     timeout = 500;
1122
1123         reg = dwc3_readl(dwc->regs, DWC3_DCTL);
1124         if (is_on)
1125                 reg |= DWC3_DCTL_RUN_STOP;
1126         else
1127                 reg &= ~DWC3_DCTL_RUN_STOP;
1128
1129         dwc3_writel(dwc->regs, DWC3_DCTL, reg);
1130
1131         do {
1132                 reg = dwc3_readl(dwc->regs, DWC3_DSTS);
1133                 if (is_on) {
1134                         if (!(reg & DWC3_DSTS_DEVCTRLHLT))
1135                                 break;
1136                 } else {
1137                         if (reg & DWC3_DSTS_DEVCTRLHLT)
1138                                 break;
1139                 }
1140                 timeout--;
1141                 if (!timeout)
1142                         break;
1143                 udelay(1);
1144         } while (1);
1145
1146         dev_vdbg(dwc->dev, "gadget %s data soft-%s\n",
1147                         dwc->gadget_driver
1148                         ? dwc->gadget_driver->function : "no-function",
1149                         is_on ? "connect" : "disconnect");
1150 }
1151
1152 static int dwc3_gadget_pullup(struct usb_gadget *g, int is_on)
1153 {
1154         struct dwc3             *dwc = gadget_to_dwc(g);
1155         unsigned long           flags;
1156
1157         is_on = !!is_on;
1158
1159         spin_lock_irqsave(&dwc->lock, flags);
1160         dwc3_gadget_run_stop(dwc, is_on);
1161         spin_unlock_irqrestore(&dwc->lock, flags);
1162
1163         return 0;
1164 }
1165
1166 static int dwc3_gadget_start(struct usb_gadget *g,
1167                 struct usb_gadget_driver *driver)
1168 {
1169         struct dwc3             *dwc = gadget_to_dwc(g);
1170         struct dwc3_ep          *dep;
1171         unsigned long           flags;
1172         int                     ret = 0;
1173         u32                     reg;
1174
1175         spin_lock_irqsave(&dwc->lock, flags);
1176
1177         if (dwc->gadget_driver) {
1178                 dev_err(dwc->dev, "%s is already bound to %s\n",
1179                                 dwc->gadget.name,
1180                                 dwc->gadget_driver->driver.name);
1181                 ret = -EBUSY;
1182                 goto err0;
1183         }
1184
1185         dwc->gadget_driver      = driver;
1186         dwc->gadget.dev.driver  = &driver->driver;
1187
1188         reg = dwc3_readl(dwc->regs, DWC3_DCFG);
1189         reg &= ~(DWC3_DCFG_SPEED_MASK);
1190         reg |= dwc->maximum_speed;
1191         dwc3_writel(dwc->regs, DWC3_DCFG, reg);
1192
1193         dwc->start_config_issued = false;
1194
1195         /* Start with SuperSpeed Default */
1196         dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(512);
1197
1198         dep = dwc->eps[0];
1199         ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc, NULL);
1200         if (ret) {
1201                 dev_err(dwc->dev, "failed to enable %s\n", dep->name);
1202                 goto err0;
1203         }
1204
1205         dep = dwc->eps[1];
1206         ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc, NULL);
1207         if (ret) {
1208                 dev_err(dwc->dev, "failed to enable %s\n", dep->name);
1209                 goto err1;
1210         }
1211
1212         /* begin to receive SETUP packets */
1213         dwc->ep0state = EP0_SETUP_PHASE;
1214         dwc3_ep0_out_start(dwc);
1215
1216         spin_unlock_irqrestore(&dwc->lock, flags);
1217
1218         return 0;
1219
1220 err1:
1221         __dwc3_gadget_ep_disable(dwc->eps[0]);
1222
1223 err0:
1224         spin_unlock_irqrestore(&dwc->lock, flags);
1225
1226         return ret;
1227 }
1228
1229 static int dwc3_gadget_stop(struct usb_gadget *g,
1230                 struct usb_gadget_driver *driver)
1231 {
1232         struct dwc3             *dwc = gadget_to_dwc(g);
1233         unsigned long           flags;
1234
1235         spin_lock_irqsave(&dwc->lock, flags);
1236
1237         __dwc3_gadget_ep_disable(dwc->eps[0]);
1238         __dwc3_gadget_ep_disable(dwc->eps[1]);
1239
1240         dwc->gadget_driver      = NULL;
1241         dwc->gadget.dev.driver  = NULL;
1242
1243         spin_unlock_irqrestore(&dwc->lock, flags);
1244
1245         return 0;
1246 }
1247 static const struct usb_gadget_ops dwc3_gadget_ops = {
1248         .get_frame              = dwc3_gadget_get_frame,
1249         .wakeup                 = dwc3_gadget_wakeup,
1250         .set_selfpowered        = dwc3_gadget_set_selfpowered,
1251         .pullup                 = dwc3_gadget_pullup,
1252         .udc_start              = dwc3_gadget_start,
1253         .udc_stop               = dwc3_gadget_stop,
1254 };
1255
1256 /* -------------------------------------------------------------------------- */
1257
1258 static int __devinit dwc3_gadget_init_endpoints(struct dwc3 *dwc)
1259 {
1260         struct dwc3_ep                  *dep;
1261         u8                              epnum;
1262
1263         INIT_LIST_HEAD(&dwc->gadget.ep_list);
1264
1265         for (epnum = 0; epnum < DWC3_ENDPOINTS_NUM; epnum++) {
1266                 dep = kzalloc(sizeof(*dep), GFP_KERNEL);
1267                 if (!dep) {
1268                         dev_err(dwc->dev, "can't allocate endpoint %d\n",
1269                                         epnum);
1270                         return -ENOMEM;
1271                 }
1272
1273                 dep->dwc = dwc;
1274                 dep->number = epnum;
1275                 dwc->eps[epnum] = dep;
1276
1277                 snprintf(dep->name, sizeof(dep->name), "ep%d%s", epnum >> 1,
1278                                 (epnum & 1) ? "in" : "out");
1279                 dep->endpoint.name = dep->name;
1280                 dep->direction = (epnum & 1);
1281
1282                 if (epnum == 0 || epnum == 1) {
1283                         dep->endpoint.maxpacket = 512;
1284                         dep->endpoint.ops = &dwc3_gadget_ep0_ops;
1285                         if (!epnum)
1286                                 dwc->gadget.ep0 = &dep->endpoint;
1287                 } else {
1288                         int             ret;
1289
1290                         dep->endpoint.maxpacket = 1024;
1291                         dep->endpoint.max_streams = 15;
1292                         dep->endpoint.ops = &dwc3_gadget_ep_ops;
1293                         list_add_tail(&dep->endpoint.ep_list,
1294                                         &dwc->gadget.ep_list);
1295
1296                         ret = dwc3_alloc_trb_pool(dep);
1297                         if (ret)
1298                                 return ret;
1299                 }
1300
1301                 INIT_LIST_HEAD(&dep->request_list);
1302                 INIT_LIST_HEAD(&dep->req_queued);
1303         }
1304
1305         return 0;
1306 }
1307
1308 static void dwc3_gadget_free_endpoints(struct dwc3 *dwc)
1309 {
1310         struct dwc3_ep                  *dep;
1311         u8                              epnum;
1312
1313         for (epnum = 0; epnum < DWC3_ENDPOINTS_NUM; epnum++) {
1314                 dep = dwc->eps[epnum];
1315                 dwc3_free_trb_pool(dep);
1316
1317                 if (epnum != 0 && epnum != 1)
1318                         list_del(&dep->endpoint.ep_list);
1319
1320                 kfree(dep);
1321         }
1322 }
1323
1324 static void dwc3_gadget_release(struct device *dev)
1325 {
1326         dev_dbg(dev, "%s\n", __func__);
1327 }
1328
1329 /* -------------------------------------------------------------------------- */
1330 static int dwc3_cleanup_done_reqs(struct dwc3 *dwc, struct dwc3_ep *dep,
1331                 const struct dwc3_event_depevt *event, int status)
1332 {
1333         struct dwc3_request     *req;
1334         struct dwc3_trb         trb;
1335         unsigned int            count;
1336         unsigned int            s_pkt = 0;
1337
1338         do {
1339                 req = next_request(&dep->req_queued);
1340                 if (!req) {
1341                         WARN_ON_ONCE(1);
1342                         return 1;
1343                 }
1344
1345                 dwc3_trb_to_nat(req->trb, &trb);
1346
1347                 if (trb.hwo && status != -ESHUTDOWN)
1348                         /*
1349                          * We continue despite the error. There is not much we
1350                          * can do. If we don't clean in up we loop for ever. If
1351                          * we skip the TRB than it gets overwritten reused after
1352                          * a while since we use them in a ring buffer. a BUG()
1353                          * would help. Lets hope that if this occures, someone
1354                          * fixes the root cause instead of looking away :)
1355                          */
1356                         dev_err(dwc->dev, "%s's TRB (%p) still owned by HW\n",
1357                                         dep->name, req->trb);
1358                 count = trb.length;
1359
1360                 if (dep->direction) {
1361                         if (count) {
1362                                 dev_err(dwc->dev, "incomplete IN transfer %s\n",
1363                                                 dep->name);
1364                                 status = -ECONNRESET;
1365                         }
1366                 } else {
1367                         if (count && (event->status & DEPEVT_STATUS_SHORT))
1368                                 s_pkt = 1;
1369                 }
1370
1371                 /*
1372                  * We assume here we will always receive the entire data block
1373                  * which we should receive. Meaning, if we program RX to
1374                  * receive 4K but we receive only 2K, we assume that's all we
1375                  * should receive and we simply bounce the request back to the
1376                  * gadget driver for further processing.
1377                  */
1378                 req->request.actual += req->request.length - count;
1379                 dwc3_gadget_giveback(dep, req, status);
1380                 if (s_pkt)
1381                         break;
1382                 if ((event->status & DEPEVT_STATUS_LST) && trb.lst)
1383                         break;
1384                 if ((event->status & DEPEVT_STATUS_IOC) && trb.ioc)
1385                         break;
1386         } while (1);
1387
1388         if ((event->status & DEPEVT_STATUS_IOC) && trb.ioc)
1389                 return 0;
1390         return 1;
1391 }
1392
1393 static void dwc3_endpoint_transfer_complete(struct dwc3 *dwc,
1394                 struct dwc3_ep *dep, const struct dwc3_event_depevt *event,
1395                 int start_new)
1396 {
1397         unsigned                status = 0;
1398         int                     clean_busy;
1399
1400         if (event->status & DEPEVT_STATUS_BUSERR)
1401                 status = -ECONNRESET;
1402
1403         clean_busy =  dwc3_cleanup_done_reqs(dwc, dep, event, status);
1404         if (clean_busy) {
1405                 dep->flags &= ~DWC3_EP_BUSY;
1406                 dep->res_trans_idx = 0;
1407         }
1408
1409         /*
1410          * WORKAROUND: This is the 2nd half of U1/U2 -> U0 workaround.
1411          * See dwc3_gadget_linksts_change_interrupt() for 1st half.
1412          */
1413         if (dwc->revision < DWC3_REVISION_183A) {
1414                 u32             reg;
1415                 int             i;
1416
1417                 for (i = 0; i < DWC3_ENDPOINTS_NUM; i++) {
1418                         struct dwc3_ep  *dep = dwc->eps[i];
1419
1420                         if (!(dep->flags & DWC3_EP_ENABLED))
1421                                 continue;
1422
1423                         if (!list_empty(&dep->req_queued))
1424                                 return;
1425                 }
1426
1427                 reg = dwc3_readl(dwc->regs, DWC3_DCTL);
1428                 reg |= dwc->u1u2;
1429                 dwc3_writel(dwc->regs, DWC3_DCTL, reg);
1430
1431                 dwc->u1u2 = 0;
1432         }
1433 }
1434
1435 static void dwc3_gadget_start_isoc(struct dwc3 *dwc,
1436                 struct dwc3_ep *dep, const struct dwc3_event_depevt *event)
1437 {
1438         u32 uf;
1439
1440         if (list_empty(&dep->request_list)) {
1441                 dev_vdbg(dwc->dev, "ISOC ep %s run out for requests.\n",
1442                         dep->name);
1443                 return;
1444         }
1445
1446         if (event->parameters) {
1447                 u32 mask;
1448
1449                 mask = ~(dep->interval - 1);
1450                 uf = event->parameters & mask;
1451                 /* 4 micro frames in the future */
1452                 uf += dep->interval * 4;
1453         } else {
1454                 uf = 0;
1455         }
1456
1457         __dwc3_gadget_kick_transfer(dep, uf, 1);
1458 }
1459
1460 static void dwc3_process_ep_cmd_complete(struct dwc3_ep *dep,
1461                 const struct dwc3_event_depevt *event)
1462 {
1463         struct dwc3 *dwc = dep->dwc;
1464         struct dwc3_event_depevt mod_ev = *event;
1465
1466         /*
1467          * We were asked to remove one requests. It is possible that this
1468          * request and a few other were started together and have the same
1469          * transfer index. Since we stopped the complete endpoint we don't
1470          * know how many requests were already completed (and not yet)
1471          * reported and how could be done (later). We purge them all until
1472          * the end of the list.
1473          */
1474         mod_ev.status = DEPEVT_STATUS_LST;
1475         dwc3_cleanup_done_reqs(dwc, dep, &mod_ev, -ESHUTDOWN);
1476         dep->flags &= ~DWC3_EP_BUSY;
1477         /* pending requets are ignored and are queued on XferNotReady */
1478 }
1479
1480 static void dwc3_ep_cmd_compl(struct dwc3_ep *dep,
1481                 const struct dwc3_event_depevt *event)
1482 {
1483         u32 param = event->parameters;
1484         u32 cmd_type = (param >> 8) & ((1 << 5) - 1);
1485
1486         switch (cmd_type) {
1487         case DWC3_DEPCMD_ENDTRANSFER:
1488                 dwc3_process_ep_cmd_complete(dep, event);
1489                 break;
1490         case DWC3_DEPCMD_STARTTRANSFER:
1491                 dep->res_trans_idx = param & 0x7f;
1492                 break;
1493         default:
1494                 printk(KERN_ERR "%s() unknown /unexpected type: %d\n",
1495                                 __func__, cmd_type);
1496                 break;
1497         };
1498 }
1499
1500 static void dwc3_endpoint_interrupt(struct dwc3 *dwc,
1501                 const struct dwc3_event_depevt *event)
1502 {
1503         struct dwc3_ep          *dep;
1504         u8                      epnum = event->endpoint_number;
1505
1506         dep = dwc->eps[epnum];
1507
1508         dev_vdbg(dwc->dev, "%s: %s\n", dep->name,
1509                         dwc3_ep_event_string(event->endpoint_event));
1510
1511         if (epnum == 0 || epnum == 1) {
1512                 dwc3_ep0_interrupt(dwc, event);
1513                 return;
1514         }
1515
1516         switch (event->endpoint_event) {
1517         case DWC3_DEPEVT_XFERCOMPLETE:
1518                 if (usb_endpoint_xfer_isoc(dep->desc)) {
1519                         dev_dbg(dwc->dev, "%s is an Isochronous endpoint\n",
1520                                         dep->name);
1521                         return;
1522                 }
1523
1524                 dwc3_endpoint_transfer_complete(dwc, dep, event, 1);
1525                 break;
1526         case DWC3_DEPEVT_XFERINPROGRESS:
1527                 if (!usb_endpoint_xfer_isoc(dep->desc)) {
1528                         dev_dbg(dwc->dev, "%s is not an Isochronous endpoint\n",
1529                                         dep->name);
1530                         return;
1531                 }
1532
1533                 dwc3_endpoint_transfer_complete(dwc, dep, event, 0);
1534                 break;
1535         case DWC3_DEPEVT_XFERNOTREADY:
1536                 if (usb_endpoint_xfer_isoc(dep->desc)) {
1537                         dwc3_gadget_start_isoc(dwc, dep, event);
1538                 } else {
1539                         int ret;
1540
1541                         dev_vdbg(dwc->dev, "%s: reason %s\n",
1542                                         dep->name, event->status
1543                                         ? "Transfer Active"
1544                                         : "Transfer Not Active");
1545
1546                         ret = __dwc3_gadget_kick_transfer(dep, 0, 1);
1547                         if (!ret || ret == -EBUSY)
1548                                 return;
1549
1550                         dev_dbg(dwc->dev, "%s: failed to kick transfers\n",
1551                                         dep->name);
1552                 }
1553
1554                 break;
1555         case DWC3_DEPEVT_STREAMEVT:
1556                 if (!usb_endpoint_xfer_bulk(dep->desc)) {
1557                         dev_err(dwc->dev, "Stream event for non-Bulk %s\n",
1558                                         dep->name);
1559                         return;
1560                 }
1561
1562                 switch (event->status) {
1563                 case DEPEVT_STREAMEVT_FOUND:
1564                         dev_vdbg(dwc->dev, "Stream %d found and started\n",
1565                                         event->parameters);
1566
1567                         break;
1568                 case DEPEVT_STREAMEVT_NOTFOUND:
1569                         /* FALLTHROUGH */
1570                 default:
1571                         dev_dbg(dwc->dev, "Couldn't find suitable stream\n");
1572                 }
1573                 break;
1574         case DWC3_DEPEVT_RXTXFIFOEVT:
1575                 dev_dbg(dwc->dev, "%s FIFO Overrun\n", dep->name);
1576                 break;
1577         case DWC3_DEPEVT_EPCMDCMPLT:
1578                 dwc3_ep_cmd_compl(dep, event);
1579                 break;
1580         }
1581 }
1582
1583 static void dwc3_disconnect_gadget(struct dwc3 *dwc)
1584 {
1585         if (dwc->gadget_driver && dwc->gadget_driver->disconnect) {
1586                 spin_unlock(&dwc->lock);
1587                 dwc->gadget_driver->disconnect(&dwc->gadget);
1588                 spin_lock(&dwc->lock);
1589         }
1590 }
1591
1592 static void dwc3_stop_active_transfer(struct dwc3 *dwc, u32 epnum)
1593 {
1594         struct dwc3_ep *dep;
1595         struct dwc3_gadget_ep_cmd_params params;
1596         u32 cmd;
1597         int ret;
1598
1599         dep = dwc->eps[epnum];
1600
1601         WARN_ON(!dep->res_trans_idx);
1602         if (dep->res_trans_idx) {
1603                 cmd = DWC3_DEPCMD_ENDTRANSFER;
1604                 cmd |= DWC3_DEPCMD_HIPRI_FORCERM | DWC3_DEPCMD_CMDIOC;
1605                 cmd |= DWC3_DEPCMD_PARAM(dep->res_trans_idx);
1606                 memset(&params, 0, sizeof(params));
1607                 ret = dwc3_send_gadget_ep_cmd(dwc, dep->number, cmd, &params);
1608                 WARN_ON_ONCE(ret);
1609                 dep->res_trans_idx = 0;
1610         }
1611 }
1612
1613 static void dwc3_stop_active_transfers(struct dwc3 *dwc)
1614 {
1615         u32 epnum;
1616
1617         for (epnum = 2; epnum < DWC3_ENDPOINTS_NUM; epnum++) {
1618                 struct dwc3_ep *dep;
1619
1620                 dep = dwc->eps[epnum];
1621                 if (!(dep->flags & DWC3_EP_ENABLED))
1622                         continue;
1623
1624                 dwc3_remove_requests(dwc, dep);
1625         }
1626 }
1627
1628 static void dwc3_clear_stall_all_ep(struct dwc3 *dwc)
1629 {
1630         u32 epnum;
1631
1632         for (epnum = 1; epnum < DWC3_ENDPOINTS_NUM; epnum++) {
1633                 struct dwc3_ep *dep;
1634                 struct dwc3_gadget_ep_cmd_params params;
1635                 int ret;
1636
1637                 dep = dwc->eps[epnum];
1638
1639                 if (!(dep->flags & DWC3_EP_STALL))
1640                         continue;
1641
1642                 dep->flags &= ~DWC3_EP_STALL;
1643
1644                 memset(&params, 0, sizeof(params));
1645                 ret = dwc3_send_gadget_ep_cmd(dwc, dep->number,
1646                                 DWC3_DEPCMD_CLEARSTALL, &params);
1647                 WARN_ON_ONCE(ret);
1648         }
1649 }
1650
1651 static void dwc3_gadget_disconnect_interrupt(struct dwc3 *dwc)
1652 {
1653         dev_vdbg(dwc->dev, "%s\n", __func__);
1654 #if 0
1655         XXX
1656         U1/U2 is powersave optimization. Skip it for now. Anyway we need to
1657         enable it before we can disable it.
1658
1659         reg = dwc3_readl(dwc->regs, DWC3_DCTL);
1660         reg &= ~DWC3_DCTL_INITU1ENA;
1661         dwc3_writel(dwc->regs, DWC3_DCTL, reg);
1662
1663         reg &= ~DWC3_DCTL_INITU2ENA;
1664         dwc3_writel(dwc->regs, DWC3_DCTL, reg);
1665 #endif
1666
1667         dwc3_stop_active_transfers(dwc);
1668         dwc3_disconnect_gadget(dwc);
1669         dwc->start_config_issued = false;
1670
1671         dwc->gadget.speed = USB_SPEED_UNKNOWN;
1672         dwc->setup_packet_pending = false;
1673 }
1674
1675 static void dwc3_gadget_usb3_phy_power(struct dwc3 *dwc, int on)
1676 {
1677         u32                     reg;
1678
1679         reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0));
1680
1681         if (on)
1682                 reg &= ~DWC3_GUSB3PIPECTL_SUSPHY;
1683         else
1684                 reg |= DWC3_GUSB3PIPECTL_SUSPHY;
1685
1686         dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg);
1687 }
1688
1689 static void dwc3_gadget_usb2_phy_power(struct dwc3 *dwc, int on)
1690 {
1691         u32                     reg;
1692
1693         reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
1694
1695         if (on)
1696                 reg &= ~DWC3_GUSB2PHYCFG_SUSPHY;
1697         else
1698                 reg |= DWC3_GUSB2PHYCFG_SUSPHY;
1699
1700         dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
1701 }
1702
1703 static void dwc3_gadget_reset_interrupt(struct dwc3 *dwc)
1704 {
1705         u32                     reg;
1706
1707         dev_vdbg(dwc->dev, "%s\n", __func__);
1708
1709         /*
1710          * WORKAROUND: DWC3 revisions <1.88a have an issue which
1711          * would cause a missing Disconnect Event if there's a
1712          * pending Setup Packet in the FIFO.
1713          *
1714          * There's no suggested workaround on the official Bug
1715          * report, which states that "unless the driver/application
1716          * is doing any special handling of a disconnect event,
1717          * there is no functional issue".
1718          *
1719          * Unfortunately, it turns out that we _do_ some special
1720          * handling of a disconnect event, namely complete all
1721          * pending transfers, notify gadget driver of the
1722          * disconnection, and so on.
1723          *
1724          * Our suggested workaround is to follow the Disconnect
1725          * Event steps here, instead, based on a setup_packet_pending
1726          * flag. Such flag gets set whenever we have a XferNotReady
1727          * event on EP0 and gets cleared on XferComplete for the
1728          * same endpoint.
1729          *
1730          * Refers to:
1731          *
1732          * STAR#9000466709: RTL: Device : Disconnect event not
1733          * generated if setup packet pending in FIFO
1734          */
1735         if (dwc->revision < DWC3_REVISION_188A) {
1736                 if (dwc->setup_packet_pending)
1737                         dwc3_gadget_disconnect_interrupt(dwc);
1738         }
1739
1740         /* after reset -> Default State */
1741         dwc->dev_state = DWC3_DEFAULT_STATE;
1742
1743         /* Enable PHYs */
1744         dwc3_gadget_usb2_phy_power(dwc, true);
1745         dwc3_gadget_usb3_phy_power(dwc, true);
1746
1747         if (dwc->gadget.speed != USB_SPEED_UNKNOWN)
1748                 dwc3_disconnect_gadget(dwc);
1749
1750         reg = dwc3_readl(dwc->regs, DWC3_DCTL);
1751         reg &= ~DWC3_DCTL_TSTCTRL_MASK;
1752         dwc3_writel(dwc->regs, DWC3_DCTL, reg);
1753
1754         dwc3_stop_active_transfers(dwc);
1755         dwc3_clear_stall_all_ep(dwc);
1756         dwc->start_config_issued = false;
1757
1758         /* Reset device address to zero */
1759         reg = dwc3_readl(dwc->regs, DWC3_DCFG);
1760         reg &= ~(DWC3_DCFG_DEVADDR_MASK);
1761         dwc3_writel(dwc->regs, DWC3_DCFG, reg);
1762 }
1763
1764 static void dwc3_update_ram_clk_sel(struct dwc3 *dwc, u32 speed)
1765 {
1766         u32 reg;
1767         u32 usb30_clock = DWC3_GCTL_CLK_BUS;
1768
1769         /*
1770          * We change the clock only at SS but I dunno why I would want to do
1771          * this. Maybe it becomes part of the power saving plan.
1772          */
1773
1774         if (speed != DWC3_DSTS_SUPERSPEED)
1775                 return;
1776
1777         /*
1778          * RAMClkSel is reset to 0 after USB reset, so it must be reprogrammed
1779          * each time on Connect Done.
1780          */
1781         if (!usb30_clock)
1782                 return;
1783
1784         reg = dwc3_readl(dwc->regs, DWC3_GCTL);
1785         reg |= DWC3_GCTL_RAMCLKSEL(usb30_clock);
1786         dwc3_writel(dwc->regs, DWC3_GCTL, reg);
1787 }
1788
1789 static void dwc3_gadget_disable_phy(struct dwc3 *dwc, u8 speed)
1790 {
1791         switch (speed) {
1792         case USB_SPEED_SUPER:
1793                 dwc3_gadget_usb2_phy_power(dwc, false);
1794                 break;
1795         case USB_SPEED_HIGH:
1796         case USB_SPEED_FULL:
1797         case USB_SPEED_LOW:
1798                 dwc3_gadget_usb3_phy_power(dwc, false);
1799                 break;
1800         }
1801 }
1802
1803 static void dwc3_gadget_conndone_interrupt(struct dwc3 *dwc)
1804 {
1805         struct dwc3_gadget_ep_cmd_params params;
1806         struct dwc3_ep          *dep;
1807         int                     ret;
1808         u32                     reg;
1809         u8                      speed;
1810
1811         dev_vdbg(dwc->dev, "%s\n", __func__);
1812
1813         memset(&params, 0x00, sizeof(params));
1814
1815         reg = dwc3_readl(dwc->regs, DWC3_DSTS);
1816         speed = reg & DWC3_DSTS_CONNECTSPD;
1817         dwc->speed = speed;
1818
1819         dwc3_update_ram_clk_sel(dwc, speed);
1820
1821         switch (speed) {
1822         case DWC3_DCFG_SUPERSPEED:
1823                 /*
1824                  * WORKAROUND: DWC3 revisions <1.90a have an issue which
1825                  * would cause a missing USB3 Reset event.
1826                  *
1827                  * In such situations, we should force a USB3 Reset
1828                  * event by calling our dwc3_gadget_reset_interrupt()
1829                  * routine.
1830                  *
1831                  * Refers to:
1832                  *
1833                  * STAR#9000483510: RTL: SS : USB3 reset event may
1834                  * not be generated always when the link enters poll
1835                  */
1836                 if (dwc->revision < DWC3_REVISION_190A)
1837                         dwc3_gadget_reset_interrupt(dwc);
1838
1839                 dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(512);
1840                 dwc->gadget.ep0->maxpacket = 512;
1841                 dwc->gadget.speed = USB_SPEED_SUPER;
1842                 break;
1843         case DWC3_DCFG_HIGHSPEED:
1844                 dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(64);
1845                 dwc->gadget.ep0->maxpacket = 64;
1846                 dwc->gadget.speed = USB_SPEED_HIGH;
1847                 break;
1848         case DWC3_DCFG_FULLSPEED2:
1849         case DWC3_DCFG_FULLSPEED1:
1850                 dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(64);
1851                 dwc->gadget.ep0->maxpacket = 64;
1852                 dwc->gadget.speed = USB_SPEED_FULL;
1853                 break;
1854         case DWC3_DCFG_LOWSPEED:
1855                 dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(8);
1856                 dwc->gadget.ep0->maxpacket = 8;
1857                 dwc->gadget.speed = USB_SPEED_LOW;
1858                 break;
1859         }
1860
1861         /* Disable unneded PHY */
1862         dwc3_gadget_disable_phy(dwc, dwc->gadget.speed);
1863
1864         dep = dwc->eps[0];
1865         ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc, NULL);
1866         if (ret) {
1867                 dev_err(dwc->dev, "failed to enable %s\n", dep->name);
1868                 return;
1869         }
1870
1871         dep = dwc->eps[1];
1872         ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc, NULL);
1873         if (ret) {
1874                 dev_err(dwc->dev, "failed to enable %s\n", dep->name);
1875                 return;
1876         }
1877
1878         /*
1879          * Configure PHY via GUSB3PIPECTLn if required.
1880          *
1881          * Update GTXFIFOSIZn
1882          *
1883          * In both cases reset values should be sufficient.
1884          */
1885 }
1886
1887 static void dwc3_gadget_wakeup_interrupt(struct dwc3 *dwc)
1888 {
1889         dev_vdbg(dwc->dev, "%s\n", __func__);
1890
1891         /*
1892          * TODO take core out of low power mode when that's
1893          * implemented.
1894          */
1895
1896         dwc->gadget_driver->resume(&dwc->gadget);
1897 }
1898
1899 static void dwc3_gadget_linksts_change_interrupt(struct dwc3 *dwc,
1900                 unsigned int evtinfo)
1901 {
1902         enum dwc3_link_state    next = evtinfo & DWC3_LINK_STATE_MASK;
1903
1904         /*
1905          * WORKAROUND: DWC3 Revisions <1.83a have an issue which, depending
1906          * on the link partner, the USB session might do multiple entry/exit
1907          * of low power states before a transfer takes place.
1908          *
1909          * Due to this problem, we might experience lower throughput. The
1910          * suggested workaround is to disable DCTL[12:9] bits if we're
1911          * transitioning from U1/U2 to U0 and enable those bits again
1912          * after a transfer completes and there are no pending transfers
1913          * on any of the enabled endpoints.
1914          *
1915          * This is the first half of that workaround.
1916          *
1917          * Refers to:
1918          *
1919          * STAR#9000446952: RTL: Device SS : if U1/U2 ->U0 takes >128us
1920          * core send LGO_Ux entering U0
1921          */
1922         if (dwc->revision < DWC3_REVISION_183A) {
1923                 if (next == DWC3_LINK_STATE_U0) {
1924                         u32     u1u2;
1925                         u32     reg;
1926
1927                         switch (dwc->link_state) {
1928                         case DWC3_LINK_STATE_U1:
1929                         case DWC3_LINK_STATE_U2:
1930                                 reg = dwc3_readl(dwc->regs, DWC3_DCTL);
1931                                 u1u2 = reg & (DWC3_DCTL_INITU2ENA
1932                                                 | DWC3_DCTL_ACCEPTU2ENA
1933                                                 | DWC3_DCTL_INITU1ENA
1934                                                 | DWC3_DCTL_ACCEPTU1ENA);
1935
1936                                 if (!dwc->u1u2)
1937                                         dwc->u1u2 = reg & u1u2;
1938
1939                                 reg &= ~u1u2;
1940
1941                                 dwc3_writel(dwc->regs, DWC3_DCTL, reg);
1942                                 break;
1943                         default:
1944                                 /* do nothing */
1945                                 break;
1946                         }
1947                 }
1948         }
1949
1950         dwc->link_state = next;
1951
1952         dev_vdbg(dwc->dev, "%s link %d\n", __func__, dwc->link_state);
1953 }
1954
1955 static void dwc3_gadget_interrupt(struct dwc3 *dwc,
1956                 const struct dwc3_event_devt *event)
1957 {
1958         switch (event->type) {
1959         case DWC3_DEVICE_EVENT_DISCONNECT:
1960                 dwc3_gadget_disconnect_interrupt(dwc);
1961                 break;
1962         case DWC3_DEVICE_EVENT_RESET:
1963                 dwc3_gadget_reset_interrupt(dwc);
1964                 break;
1965         case DWC3_DEVICE_EVENT_CONNECT_DONE:
1966                 dwc3_gadget_conndone_interrupt(dwc);
1967                 break;
1968         case DWC3_DEVICE_EVENT_WAKEUP:
1969                 dwc3_gadget_wakeup_interrupt(dwc);
1970                 break;
1971         case DWC3_DEVICE_EVENT_LINK_STATUS_CHANGE:
1972                 dwc3_gadget_linksts_change_interrupt(dwc, event->event_info);
1973                 break;
1974         case DWC3_DEVICE_EVENT_EOPF:
1975                 dev_vdbg(dwc->dev, "End of Periodic Frame\n");
1976                 break;
1977         case DWC3_DEVICE_EVENT_SOF:
1978                 dev_vdbg(dwc->dev, "Start of Periodic Frame\n");
1979                 break;
1980         case DWC3_DEVICE_EVENT_ERRATIC_ERROR:
1981                 dev_vdbg(dwc->dev, "Erratic Error\n");
1982                 break;
1983         case DWC3_DEVICE_EVENT_CMD_CMPL:
1984                 dev_vdbg(dwc->dev, "Command Complete\n");
1985                 break;
1986         case DWC3_DEVICE_EVENT_OVERFLOW:
1987                 dev_vdbg(dwc->dev, "Overflow\n");
1988                 break;
1989         default:
1990                 dev_dbg(dwc->dev, "UNKNOWN IRQ %d\n", event->type);
1991         }
1992 }
1993
1994 static void dwc3_process_event_entry(struct dwc3 *dwc,
1995                 const union dwc3_event *event)
1996 {
1997         /* Endpoint IRQ, handle it and return early */
1998         if (event->type.is_devspec == 0) {
1999                 /* depevt */
2000                 return dwc3_endpoint_interrupt(dwc, &event->depevt);
2001         }
2002
2003         switch (event->type.type) {
2004         case DWC3_EVENT_TYPE_DEV:
2005                 dwc3_gadget_interrupt(dwc, &event->devt);
2006                 break;
2007         /* REVISIT what to do with Carkit and I2C events ? */
2008         default:
2009                 dev_err(dwc->dev, "UNKNOWN IRQ type %d\n", event->raw);
2010         }
2011 }
2012
2013 static irqreturn_t dwc3_process_event_buf(struct dwc3 *dwc, u32 buf)
2014 {
2015         struct dwc3_event_buffer *evt;
2016         int left;
2017         u32 count;
2018
2019         count = dwc3_readl(dwc->regs, DWC3_GEVNTCOUNT(buf));
2020         count &= DWC3_GEVNTCOUNT_MASK;
2021         if (!count)
2022                 return IRQ_NONE;
2023
2024         evt = dwc->ev_buffs[buf];
2025         left = count;
2026
2027         while (left > 0) {
2028                 union dwc3_event event;
2029
2030                 memcpy(&event.raw, (evt->buf + evt->lpos), sizeof(event.raw));
2031                 dwc3_process_event_entry(dwc, &event);
2032                 /*
2033                  * XXX we wrap around correctly to the next entry as almost all
2034                  * entries are 4 bytes in size. There is one entry which has 12
2035                  * bytes which is a regular entry followed by 8 bytes data. ATM
2036                  * I don't know how things are organized if were get next to the
2037                  * a boundary so I worry about that once we try to handle that.
2038                  */
2039                 evt->lpos = (evt->lpos + 4) % DWC3_EVENT_BUFFERS_SIZE;
2040                 left -= 4;
2041
2042                 dwc3_writel(dwc->regs, DWC3_GEVNTCOUNT(buf), 4);
2043         }
2044
2045         return IRQ_HANDLED;
2046 }
2047
2048 static irqreturn_t dwc3_interrupt(int irq, void *_dwc)
2049 {
2050         struct dwc3                     *dwc = _dwc;
2051         int                             i;
2052         irqreturn_t                     ret = IRQ_NONE;
2053
2054         spin_lock(&dwc->lock);
2055
2056         for (i = 0; i < dwc->num_event_buffers; i++) {
2057                 irqreturn_t status;
2058
2059                 status = dwc3_process_event_buf(dwc, i);
2060                 if (status == IRQ_HANDLED)
2061                         ret = status;
2062         }
2063
2064         spin_unlock(&dwc->lock);
2065
2066         return ret;
2067 }
2068
2069 /**
2070  * dwc3_gadget_init - Initializes gadget related registers
2071  * @dwc: Pointer to out controller context structure
2072  *
2073  * Returns 0 on success otherwise negative errno.
2074  */
2075 int __devinit dwc3_gadget_init(struct dwc3 *dwc)
2076 {
2077         u32                                     reg;
2078         int                                     ret;
2079         int                                     irq;
2080
2081         dwc->ctrl_req = dma_alloc_coherent(dwc->dev, sizeof(*dwc->ctrl_req),
2082                         &dwc->ctrl_req_addr, GFP_KERNEL);
2083         if (!dwc->ctrl_req) {
2084                 dev_err(dwc->dev, "failed to allocate ctrl request\n");
2085                 ret = -ENOMEM;
2086                 goto err0;
2087         }
2088
2089         dwc->ep0_trb = dma_alloc_coherent(dwc->dev, sizeof(*dwc->ep0_trb),
2090                         &dwc->ep0_trb_addr, GFP_KERNEL);
2091         if (!dwc->ep0_trb) {
2092                 dev_err(dwc->dev, "failed to allocate ep0 trb\n");
2093                 ret = -ENOMEM;
2094                 goto err1;
2095         }
2096
2097         dwc->setup_buf = kzalloc(sizeof(*dwc->setup_buf) * 2,
2098                         GFP_KERNEL);
2099         if (!dwc->setup_buf) {
2100                 dev_err(dwc->dev, "failed to allocate setup buffer\n");
2101                 ret = -ENOMEM;
2102                 goto err2;
2103         }
2104
2105         dwc->ep0_bounce = dma_alloc_coherent(dwc->dev,
2106                         512, &dwc->ep0_bounce_addr, GFP_KERNEL);
2107         if (!dwc->ep0_bounce) {
2108                 dev_err(dwc->dev, "failed to allocate ep0 bounce buffer\n");
2109                 ret = -ENOMEM;
2110                 goto err3;
2111         }
2112
2113         dev_set_name(&dwc->gadget.dev, "gadget");
2114
2115         dwc->gadget.ops                 = &dwc3_gadget_ops;
2116         dwc->gadget.max_speed           = USB_SPEED_SUPER;
2117         dwc->gadget.speed               = USB_SPEED_UNKNOWN;
2118         dwc->gadget.dev.parent          = dwc->dev;
2119         dwc->gadget.sg_supported        = true;
2120
2121         dma_set_coherent_mask(&dwc->gadget.dev, dwc->dev->coherent_dma_mask);
2122
2123         dwc->gadget.dev.dma_parms       = dwc->dev->dma_parms;
2124         dwc->gadget.dev.dma_mask        = dwc->dev->dma_mask;
2125         dwc->gadget.dev.release         = dwc3_gadget_release;
2126         dwc->gadget.name                = "dwc3-gadget";
2127
2128         /*
2129          * REVISIT: Here we should clear all pending IRQs to be
2130          * sure we're starting from a well known location.
2131          */
2132
2133         ret = dwc3_gadget_init_endpoints(dwc);
2134         if (ret)
2135                 goto err4;
2136
2137         irq = platform_get_irq(to_platform_device(dwc->dev), 0);
2138
2139         ret = request_irq(irq, dwc3_interrupt, IRQF_SHARED,
2140                         "dwc3", dwc);
2141         if (ret) {
2142                 dev_err(dwc->dev, "failed to request irq #%d --> %d\n",
2143                                 irq, ret);
2144                 goto err5;
2145         }
2146
2147         /* Enable all but Start and End of Frame IRQs */
2148         reg = (DWC3_DEVTEN_VNDRDEVTSTRCVEDEN |
2149                         DWC3_DEVTEN_EVNTOVERFLOWEN |
2150                         DWC3_DEVTEN_CMDCMPLTEN |
2151                         DWC3_DEVTEN_ERRTICERREN |
2152                         DWC3_DEVTEN_WKUPEVTEN |
2153                         DWC3_DEVTEN_ULSTCNGEN |
2154                         DWC3_DEVTEN_CONNECTDONEEN |
2155                         DWC3_DEVTEN_USBRSTEN |
2156                         DWC3_DEVTEN_DISCONNEVTEN);
2157         dwc3_writel(dwc->regs, DWC3_DEVTEN, reg);
2158
2159         ret = device_register(&dwc->gadget.dev);
2160         if (ret) {
2161                 dev_err(dwc->dev, "failed to register gadget device\n");
2162                 put_device(&dwc->gadget.dev);
2163                 goto err6;
2164         }
2165
2166         ret = usb_add_gadget_udc(dwc->dev, &dwc->gadget);
2167         if (ret) {
2168                 dev_err(dwc->dev, "failed to register udc\n");
2169                 goto err7;
2170         }
2171
2172         return 0;
2173
2174 err7:
2175         device_unregister(&dwc->gadget.dev);
2176
2177 err6:
2178         dwc3_writel(dwc->regs, DWC3_DEVTEN, 0x00);
2179         free_irq(irq, dwc);
2180
2181 err5:
2182         dwc3_gadget_free_endpoints(dwc);
2183
2184 err4:
2185         dma_free_coherent(dwc->dev, 512, dwc->ep0_bounce,
2186                         dwc->ep0_bounce_addr);
2187
2188 err3:
2189         kfree(dwc->setup_buf);
2190
2191 err2:
2192         dma_free_coherent(dwc->dev, sizeof(*dwc->ep0_trb),
2193                         dwc->ep0_trb, dwc->ep0_trb_addr);
2194
2195 err1:
2196         dma_free_coherent(dwc->dev, sizeof(*dwc->ctrl_req),
2197                         dwc->ctrl_req, dwc->ctrl_req_addr);
2198
2199 err0:
2200         return ret;
2201 }
2202
2203 void dwc3_gadget_exit(struct dwc3 *dwc)
2204 {
2205         int                     irq;
2206
2207         usb_del_gadget_udc(&dwc->gadget);
2208         irq = platform_get_irq(to_platform_device(dwc->dev), 0);
2209
2210         dwc3_writel(dwc->regs, DWC3_DEVTEN, 0x00);
2211         free_irq(irq, dwc);
2212
2213         dwc3_gadget_free_endpoints(dwc);
2214
2215         dma_free_coherent(dwc->dev, 512, dwc->ep0_bounce,
2216                         dwc->ep0_bounce_addr);
2217
2218         kfree(dwc->setup_buf);
2219
2220         dma_free_coherent(dwc->dev, sizeof(*dwc->ep0_trb),
2221                         dwc->ep0_trb, dwc->ep0_trb_addr);
2222
2223         dma_free_coherent(dwc->dev, sizeof(*dwc->ctrl_req),
2224                         dwc->ctrl_req, dwc->ctrl_req_addr);
2225
2226         device_unregister(&dwc->gadget.dev);
2227 }