2 * dwc3-rockchip.c - Rockchip Specific Glue layer
4 * Copyright (C) Fuzhou Rockchip Electronics Co.Ltd
6 * Authors: William Wu <william.wu@rock-chips.com>
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 of
10 * the License as published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
18 #include <linux/module.h>
19 #include <linux/kernel.h>
20 #include <linux/slab.h>
21 #include <linux/platform_device.h>
22 #include <linux/dma-mapping.h>
23 #include <linux/clk.h>
24 #include <linux/clk-provider.h>
26 #include <linux/of_platform.h>
27 #include <linux/pm_runtime.h>
28 #include <linux/extcon.h>
29 #include <linux/reset.h>
30 #include <linux/usb.h>
31 #include <linux/usb/hcd.h>
36 #define DWC3_ROCKCHIP_AUTOSUSPEND_DELAY 500 /* ms */
38 struct dwc3_rockchip {
43 struct reset_control *otg_rst;
44 struct extcon_dev *edev;
45 struct notifier_block device_nb;
46 struct notifier_block host_nb;
47 struct work_struct otg_work;
50 static int dwc3_rockchip_device_notifier(struct notifier_block *nb,
51 unsigned long event, void *ptr)
53 struct dwc3_rockchip *rockchip =
54 container_of(nb, struct dwc3_rockchip, device_nb);
56 schedule_work(&rockchip->otg_work);
61 static int dwc3_rockchip_host_notifier(struct notifier_block *nb,
62 unsigned long event, void *ptr)
64 struct dwc3_rockchip *rockchip =
65 container_of(nb, struct dwc3_rockchip, host_nb);
67 schedule_work(&rockchip->otg_work);
72 static void dwc3_rockchip_otg_extcon_evt_work(struct work_struct *work)
74 struct dwc3_rockchip *rockchip =
75 container_of(work, struct dwc3_rockchip, otg_work);
76 struct dwc3 *dwc = rockchip->dwc;
77 struct extcon_dev *edev = rockchip->edev;
83 if (extcon_get_cable_state_(edev, EXTCON_USB) > 0) {
88 * If dr_mode is host only, never to set
89 * the mode to the peripheral mode.
91 if (WARN_ON(dwc->dr_mode == USB_DR_MODE_HOST))
94 reset_control_deassert(rockchip->otg_rst);
96 pm_runtime_get_sync(dwc->dev);
98 spin_lock_irqsave(&dwc->lock, flags);
99 dwc->connected = true;
100 dwc3_set_mode(dwc, DWC3_GCTL_PRTCAP_DEVICE);
101 spin_unlock_irqrestore(&dwc->lock, flags);
103 pm_runtime_put_sync(dwc->dev);
105 dev_info(rockchip->dev, "USB peripheral connected\n");
106 } else if (extcon_get_cable_state_(edev, EXTCON_USB_HOST) > 0) {
111 * If dr_mode is device only, never to
112 * set the mode to the host mode.
114 if (WARN_ON(dwc->dr_mode == USB_DR_MODE_PERIPHERAL))
117 reset_control_assert(rockchip->otg_rst);
119 ret = phy_power_on(dwc->usb2_generic_phy);
123 ret = phy_power_on(dwc->usb3_generic_phy);
127 reset_control_deassert(rockchip->otg_rst);
131 hcd = dev_get_drvdata(&dwc->xhci->dev);
133 spin_lock_irqsave(&dwc->lock, flags);
134 dwc3_set_mode(dwc, DWC3_GCTL_PRTCAP_HOST);
135 dwc->connected = true;
136 spin_unlock_irqrestore(&dwc->lock, flags);
138 if (hcd->state == HC_STATE_HALT) {
139 usb_add_hcd(hcd, hcd->irq, IRQF_SHARED);
140 usb_add_hcd(hcd->shared_hcd, hcd->irq, IRQF_SHARED);
143 dev_info(rockchip->dev, "USB HOST connected\n");
148 reg = dwc3_readl(dwc->regs, DWC3_GCTL);
150 if (DWC3_GCTL_PRTCAP(reg) == DWC3_GCTL_PRTCAP_HOST ||
151 DWC3_GCTL_PRTCAP(reg) == DWC3_GCTL_PRTCAP_OTG) {
152 hcd = dev_get_drvdata(&dwc->xhci->dev);
154 if (hcd->state != HC_STATE_HALT) {
155 usb_remove_hcd(hcd->shared_hcd);
159 phy_power_off(dwc->usb2_generic_phy);
160 phy_power_off(dwc->usb3_generic_phy);
162 reset_control_assert(rockchip->otg_rst);
165 spin_lock_irqsave(&dwc->lock, flags);
166 dwc->connected = false;
167 spin_unlock_irqrestore(&dwc->lock, flags);
169 dev_info(rockchip->dev, "USB unconnected\n");
173 static int dwc3_rockchip_extcon_register(struct dwc3_rockchip *rockchip)
176 struct device *dev = rockchip->dev;
177 struct extcon_dev *edev;
179 if (device_property_read_bool(dev, "extcon")) {
180 edev = extcon_get_edev_by_phandle(dev, 0);
182 if (PTR_ERR(edev) != -EPROBE_DEFER)
183 dev_err(dev, "couldn't get extcon device\n");
184 return PTR_ERR(edev);
187 INIT_WORK(&rockchip->otg_work,
188 dwc3_rockchip_otg_extcon_evt_work);
190 rockchip->device_nb.notifier_call =
191 dwc3_rockchip_device_notifier;
192 ret = extcon_register_notifier(edev, EXTCON_USB,
193 &rockchip->device_nb);
195 dev_err(dev, "failed to register notifier for USB\n");
199 rockchip->host_nb.notifier_call =
200 dwc3_rockchip_host_notifier;
201 ret = extcon_register_notifier(edev, EXTCON_USB_HOST,
204 dev_err(dev, "failed to register notifier for USB HOST\n");
205 extcon_unregister_notifier(edev, EXTCON_USB,
206 &rockchip->device_nb);
210 rockchip->edev = edev;
216 static void dwc3_rockchip_extcon_unregister(struct dwc3_rockchip *rockchip)
221 extcon_unregister_notifier(rockchip->edev, EXTCON_USB,
222 &rockchip->device_nb);
223 extcon_unregister_notifier(rockchip->edev, EXTCON_USB_HOST,
227 static int dwc3_rockchip_probe(struct platform_device *pdev)
229 struct dwc3_rockchip *rockchip;
230 struct device *dev = &pdev->dev;
231 struct device_node *np = dev->of_node, *child;
232 struct platform_device *child_pdev;
238 rockchip = devm_kzalloc(dev, sizeof(*rockchip), GFP_KERNEL);
243 count = of_clk_get_parent_count(np);
247 rockchip->num_clocks = count;
249 rockchip->clks = devm_kcalloc(dev, rockchip->num_clocks,
250 sizeof(struct clk *), GFP_KERNEL);
254 platform_set_drvdata(pdev, rockchip);
257 rockchip->edev = NULL;
259 pm_runtime_set_active(dev);
260 pm_runtime_enable(dev);
261 ret = pm_runtime_get_sync(dev);
263 dev_err(dev, "get_sync failed with err %d\n", ret);
267 for (i = 0; i < rockchip->num_clocks; i++) {
270 clk = of_clk_get(np, i);
273 clk_put(rockchip->clks[i]);
279 ret = clk_prepare_enable(clk);
282 clk_disable_unprepare(rockchip->clks[i]);
283 clk_put(rockchip->clks[i]);
290 rockchip->clks[i] = clk;
293 rockchip->otg_rst = devm_reset_control_get(dev, "usb3-otg");
294 if (IS_ERR(rockchip->otg_rst)) {
295 dev_err(dev, "could not get reset controller\n");
296 ret = PTR_ERR(rockchip->otg_rst);
300 ret = dwc3_rockchip_extcon_register(rockchip);
304 child = of_get_child_by_name(np, "dwc3");
306 dev_err(dev, "failed to find dwc3 core node\n");
311 /* Allocate and initialize the core */
312 ret = of_platform_populate(np, NULL, NULL, dev);
314 dev_err(dev, "failed to create dwc3 core\n");
318 child_pdev = of_find_device_by_node(child);
320 dev_err(dev, "failed to find dwc3 core device\n");
325 rockchip->dwc = platform_get_drvdata(child_pdev);
327 if (rockchip->edev) {
328 pm_runtime_set_autosuspend_delay(&child_pdev->dev,
329 DWC3_ROCKCHIP_AUTOSUSPEND_DELAY);
330 pm_runtime_allow(&child_pdev->dev);
332 if (rockchip->dwc->dr_mode == USB_DR_MODE_HOST ||
333 rockchip->dwc->dr_mode == USB_DR_MODE_OTG) {
334 struct usb_hcd *hcd =
335 dev_get_drvdata(&rockchip->dwc->xhci->dev);
337 if (hcd->state != HC_STATE_HALT) {
338 usb_remove_hcd(hcd->shared_hcd);
347 of_platform_depopulate(dev);
350 dwc3_rockchip_extcon_unregister(rockchip);
353 for (i = 0; i < rockchip->num_clocks; i++) {
354 clk_disable_unprepare(rockchip->clks[i]);
355 clk_put(rockchip->clks[i]);
359 pm_runtime_put_sync(dev);
360 pm_runtime_disable(dev);
365 static int dwc3_rockchip_remove(struct platform_device *pdev)
367 struct dwc3_rockchip *rockchip = platform_get_drvdata(pdev);
368 struct device *dev = &pdev->dev;
371 for (i = 0; i < rockchip->num_clocks; i++) {
372 clk_disable_unprepare(rockchip->clks[i]);
373 clk_put(rockchip->clks[i]);
376 dwc3_rockchip_extcon_unregister(rockchip);
378 of_platform_depopulate(dev);
380 pm_runtime_put_sync(dev);
381 pm_runtime_disable(dev);
386 #ifdef CONFIG_PM_SLEEP
387 static int dwc3_rockchip_suspend(struct device *dev)
389 struct dwc3_rockchip *rockchip = dev_get_drvdata(dev);
392 for (i = 0; i < rockchip->num_clocks; i++)
393 clk_disable(rockchip->clks[i]);
398 static int dwc3_rockchip_resume(struct device *dev)
400 struct dwc3_rockchip *rockchip = dev_get_drvdata(dev);
403 for (i = 0; i < rockchip->num_clocks; i++)
404 clk_enable(rockchip->clks[i]);
406 /* runtime set active to reflect active state. */
407 pm_runtime_disable(dev);
408 pm_runtime_set_active(dev);
409 pm_runtime_enable(dev);
414 static const struct dev_pm_ops dwc3_rockchip_dev_pm_ops = {
415 SET_SYSTEM_SLEEP_PM_OPS(dwc3_rockchip_suspend, dwc3_rockchip_resume)
418 #define DEV_PM_OPS (&dwc3_rockchip_dev_pm_ops)
420 #define DEV_PM_OPS NULL
421 #endif /* CONFIG_PM_SLEEP */
423 static const struct of_device_id rockchip_dwc3_match[] = {
424 { .compatible = "rockchip,rk3399-dwc3" },
428 MODULE_DEVICE_TABLE(of, rockchip_dwc3_match);
430 static struct platform_driver dwc3_rockchip_driver = {
431 .probe = dwc3_rockchip_probe,
432 .remove = dwc3_rockchip_remove,
434 .name = "rockchip-dwc3",
435 .of_match_table = rockchip_dwc3_match,
440 module_platform_driver(dwc3_rockchip_driver);
442 MODULE_ALIAS("platform:rockchip-dwc3");
443 MODULE_AUTHOR("William Wu <william.wu@rock-chips.com>");
444 MODULE_LICENSE("GPL v2");
445 MODULE_DESCRIPTION("DesignWare USB3 ROCKCHIP Glue Layer");