2 * Driver for CLPS711x serial ports
4 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
6 * Copyright 1999 ARM Limited
7 * Copyright (C) 2000 Deep Blue Solutions Ltd.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 #if defined(CONFIG_SERIAL_CLPS711X_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
28 #include <linux/module.h>
29 #include <linux/ioport.h>
30 #include <linux/init.h>
31 #include <linux/console.h>
32 #include <linux/sysrq.h>
33 #include <linux/spinlock.h>
34 #include <linux/device.h>
35 #include <linux/tty.h>
36 #include <linux/tty_flip.h>
37 #include <linux/serial_core.h>
38 #include <linux/serial.h>
40 #include <linux/clk.h>
41 #include <linux/platform_device.h>
43 #include <mach/hardware.h>
46 #define UART_CLPS711X_NAME "uart-clps711x"
47 #define UART_CLPS711X_NR 2
48 #define UART_CLPS711X_MAJOR 204
49 #define UART_CLPS711X_MINOR 40
51 #define UBRLCR(port) ((port)->line ? UBRLCR2 : UBRLCR1)
52 #define UARTDR(port) ((port)->line ? UARTDR2 : UARTDR1)
53 #define SYSFLG(port) ((port)->line ? SYSFLG2 : SYSFLG1)
54 #define SYSCON(port) ((port)->line ? SYSCON2 : SYSCON1)
55 #define TX_IRQ(port) ((port)->line ? IRQ_UTXINT2 : IRQ_UTXINT1)
56 #define RX_IRQ(port) ((port)->line ? IRQ_URXINT2 : IRQ_URXINT1)
58 #define UART_ANY_ERR (UARTDR_FRMERR | UARTDR_PARERR | UARTDR_OVERR)
60 struct clps711x_port {
61 struct uart_driver uart;
63 struct uart_port port[UART_CLPS711X_NR];
64 int tx_enabled[UART_CLPS711X_NR];
65 #ifdef CONFIG_SERIAL_CLPS711X_CONSOLE
66 struct console console;
70 static void clps711xuart_stop_tx(struct uart_port *port)
72 struct clps711x_port *s = dev_get_drvdata(port->dev);
74 if (s->tx_enabled[port->line]) {
75 disable_irq(TX_IRQ(port));
76 s->tx_enabled[port->line] = 0;
80 static void clps711xuart_start_tx(struct uart_port *port)
82 struct clps711x_port *s = dev_get_drvdata(port->dev);
84 if (!s->tx_enabled[port->line]) {
85 enable_irq(TX_IRQ(port));
86 s->tx_enabled[port->line] = 1;
90 static void clps711xuart_stop_rx(struct uart_port *port)
92 disable_irq(RX_IRQ(port));
95 static void clps711xuart_enable_ms(struct uart_port *port)
99 static irqreturn_t clps711xuart_int_rx(int irq, void *dev_id)
101 struct uart_port *port = dev_id;
102 struct tty_struct *tty = port->state->port.tty;
103 unsigned int status, ch, flg;
105 status = clps_readl(SYSFLG(port));
106 while (!(status & SYSFLG_URXFE)) {
107 ch = clps_readl(UARTDR(port));
114 * Note that the error handling code is
115 * out of the main execution path
117 if (unlikely(ch & UART_ANY_ERR)) {
118 if (ch & UARTDR_PARERR)
119 port->icount.parity++;
120 else if (ch & UARTDR_FRMERR)
121 port->icount.frame++;
122 if (ch & UARTDR_OVERR)
123 port->icount.overrun++;
125 ch &= port->read_status_mask;
127 if (ch & UARTDR_PARERR)
129 else if (ch & UARTDR_FRMERR)
137 if (uart_handle_sysrq_char(port, ch))
141 * CHECK: does overrun affect the current character?
142 * ASSUMPTION: it does not.
144 uart_insert_char(port, ch, UARTDR_OVERR, ch, flg);
147 status = clps_readl(SYSFLG(port));
149 tty_flip_buffer_push(tty);
153 static irqreturn_t clps711xuart_int_tx(int irq, void *dev_id)
155 struct uart_port *port = dev_id;
156 struct clps711x_port *s = dev_get_drvdata(port->dev);
157 struct circ_buf *xmit = &port->state->xmit;
160 clps_writel(port->x_char, UARTDR(port));
166 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
167 disable_irq_nosync(TX_IRQ(port));
168 s->tx_enabled[port->line] = 0;
172 while (!uart_circ_empty(xmit)) {
173 clps_writew(xmit->buf[xmit->tail], UARTDR(port));
174 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
176 if (clps_readl(SYSFLG(port) & SYSFLG_UTXFF))
180 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
181 uart_write_wakeup(port);
186 static unsigned int clps711xuart_tx_empty(struct uart_port *port)
188 unsigned int status = clps_readl(SYSFLG(port));
189 return status & SYSFLG_UBUSY ? 0 : TIOCSER_TEMT;
192 static unsigned int clps711xuart_get_mctrl(struct uart_port *port)
194 unsigned int port_addr;
195 unsigned int result = 0;
198 port_addr = SYSFLG(port);
199 if (port_addr == SYSFLG1) {
200 status = clps_readl(SYSFLG1);
201 if (status & SYSFLG1_DCD)
203 if (status & SYSFLG1_DSR)
205 if (status & SYSFLG1_CTS)
213 clps711xuart_set_mctrl_null(struct uart_port *port, unsigned int mctrl)
217 static void clps711xuart_break_ctl(struct uart_port *port, int break_state)
222 spin_lock_irqsave(&port->lock, flags);
223 ubrlcr = clps_readl(UBRLCR(port));
224 if (break_state == -1)
225 ubrlcr |= UBRLCR_BREAK;
227 ubrlcr &= ~UBRLCR_BREAK;
228 clps_writel(ubrlcr, UBRLCR(port));
229 spin_unlock_irqrestore(&port->lock, flags);
232 static int clps711xuart_startup(struct uart_port *port)
234 struct clps711x_port *s = dev_get_drvdata(port->dev);
238 s->tx_enabled[port->line] = 1;
243 retval = request_irq(TX_IRQ(port), clps711xuart_int_tx, 0,
244 "clps711xuart_tx", port);
248 retval = request_irq(RX_IRQ(port), clps711xuart_int_rx, 0,
249 "clps711xuart_rx", port);
251 free_irq(TX_IRQ(port), port);
258 syscon = clps_readl(SYSCON(port));
259 syscon |= SYSCON_UARTEN;
260 clps_writel(syscon, SYSCON(port));
265 static void clps711xuart_shutdown(struct uart_port *port)
267 unsigned int ubrlcr, syscon;
272 free_irq(TX_IRQ(port), port); /* TX interrupt */
273 free_irq(RX_IRQ(port), port); /* RX interrupt */
278 syscon = clps_readl(SYSCON(port));
279 syscon &= ~SYSCON_UARTEN;
280 clps_writel(syscon, SYSCON(port));
283 * disable break condition and fifos
285 ubrlcr = clps_readl(UBRLCR(port));
286 ubrlcr &= ~(UBRLCR_FIFOEN | UBRLCR_BREAK);
287 clps_writel(ubrlcr, UBRLCR(port));
291 clps711xuart_set_termios(struct uart_port *port, struct ktermios *termios,
292 struct ktermios *old)
294 unsigned int ubrlcr, baud, quot;
298 * We don't implement CREAD.
300 termios->c_cflag |= CREAD;
302 /* Ask the core to calculate the divisor for us */
303 baud = uart_get_baud_rate(port, termios, old, port->uartclk / 4096,
305 quot = uart_get_divisor(port, baud);
307 switch (termios->c_cflag & CSIZE) {
309 ubrlcr = UBRLCR_WRDLEN5;
312 ubrlcr = UBRLCR_WRDLEN6;
315 ubrlcr = UBRLCR_WRDLEN7;
318 ubrlcr = UBRLCR_WRDLEN8;
321 if (termios->c_cflag & CSTOPB)
322 ubrlcr |= UBRLCR_XSTOP;
323 if (termios->c_cflag & PARENB) {
324 ubrlcr |= UBRLCR_PRTEN;
325 if (!(termios->c_cflag & PARODD))
326 ubrlcr |= UBRLCR_EVENPRT;
330 ubrlcr |= UBRLCR_FIFOEN;
332 spin_lock_irqsave(&port->lock, flags);
335 * Update the per-port timeout.
337 uart_update_timeout(port, termios->c_cflag, baud);
339 port->read_status_mask = UARTDR_OVERR;
340 if (termios->c_iflag & INPCK)
341 port->read_status_mask |= UARTDR_PARERR | UARTDR_FRMERR;
344 * Characters to ignore
346 port->ignore_status_mask = 0;
347 if (termios->c_iflag & IGNPAR)
348 port->ignore_status_mask |= UARTDR_FRMERR | UARTDR_PARERR;
349 if (termios->c_iflag & IGNBRK) {
351 * If we're ignoring parity and break indicators,
352 * ignore overruns to (for real raw support).
354 if (termios->c_iflag & IGNPAR)
355 port->ignore_status_mask |= UARTDR_OVERR;
360 clps_writel(ubrlcr | quot, UBRLCR(port));
362 spin_unlock_irqrestore(&port->lock, flags);
365 static const char *clps711xuart_type(struct uart_port *port)
367 return port->type == PORT_CLPS711X ? "CLPS711x" : NULL;
371 * Configure/autoconfigure the port.
373 static void clps711xuart_config_port(struct uart_port *port, int flags)
375 if (flags & UART_CONFIG_TYPE)
376 port->type = PORT_CLPS711X;
379 static void clps711xuart_release_port(struct uart_port *port)
383 static int clps711xuart_request_port(struct uart_port *port)
388 static struct uart_ops uart_clps711x_ops = {
389 .tx_empty = clps711xuart_tx_empty,
390 .set_mctrl = clps711xuart_set_mctrl_null,
391 .get_mctrl = clps711xuart_get_mctrl,
392 .stop_tx = clps711xuart_stop_tx,
393 .start_tx = clps711xuart_start_tx,
394 .stop_rx = clps711xuart_stop_rx,
395 .enable_ms = clps711xuart_enable_ms,
396 .break_ctl = clps711xuart_break_ctl,
397 .startup = clps711xuart_startup,
398 .shutdown = clps711xuart_shutdown,
399 .set_termios = clps711xuart_set_termios,
400 .type = clps711xuart_type,
401 .config_port = clps711xuart_config_port,
402 .release_port = clps711xuart_release_port,
403 .request_port = clps711xuart_request_port,
406 #ifdef CONFIG_SERIAL_CLPS711X_CONSOLE
407 static void uart_clps711x_console_putchar(struct uart_port *port, int ch)
409 while (clps_readl(SYSFLG(port)) & SYSFLG_UTXFF)
412 clps_writew(ch, UARTDR(port));
415 static void uart_clps711x_console_write(struct console *co, const char *c,
418 struct clps711x_port *s = (struct clps711x_port *)co->data;
419 struct uart_port *port = &s->port[co->index];
422 /* Ensure that the port is enabled */
423 syscon = clps_readl(SYSCON(port));
424 clps_writel(syscon | SYSCON_UARTEN, SYSCON(port));
426 uart_console_write(port, c, n, uart_clps711x_console_putchar);
428 /* Wait for transmitter to become empty */
429 while (clps_readl(SYSFLG(port)) & SYSFLG_UBUSY)
432 /* Restore the uart state */
433 clps_writel(syscon, SYSCON(port));
436 static void uart_clps711x_console_get_options(struct uart_port *port,
437 int *baud, int *parity,
440 if (clps_readl(SYSCON(port)) & SYSCON_UARTEN) {
441 unsigned int ubrlcr, quot;
443 ubrlcr = clps_readl(UBRLCR(port));
446 if (ubrlcr & UBRLCR_PRTEN) {
447 if (ubrlcr & UBRLCR_EVENPRT)
453 if ((ubrlcr & UBRLCR_WRDLEN_MASK) == UBRLCR_WRDLEN7)
458 quot = ubrlcr & UBRLCR_BAUD_MASK;
459 *baud = port->uartclk / (16 * (quot + 1));
463 static int uart_clps711x_console_setup(struct console *co, char *options)
465 int baud = 38400, bits = 8, parity = 'n', flow = 'n';
466 struct clps711x_port *s = (struct clps711x_port *)co->data;
467 struct uart_port *port = &s->port[(co->index > 0) ? co->index : 0];
470 uart_parse_options(options, &baud, &parity, &bits, &flow);
472 uart_clps711x_console_get_options(port, &baud, &parity, &bits);
474 return uart_set_options(port, co, baud, parity, bits, flow);
478 static int __devinit uart_clps711x_probe(struct platform_device *pdev)
480 struct clps711x_port *s;
483 s = devm_kzalloc(&pdev->dev, sizeof(struct clps711x_port), GFP_KERNEL);
485 dev_err(&pdev->dev, "Error allocating port structure\n");
488 platform_set_drvdata(pdev, s);
490 s->uart_clk = devm_clk_get(&pdev->dev, "uart");
491 if (IS_ERR(s->uart_clk)) {
492 dev_err(&pdev->dev, "Can't get UART clocks\n");
493 ret = PTR_ERR(s->uart_clk);
497 s->uart.owner = THIS_MODULE;
498 s->uart.dev_name = "ttyCL";
499 s->uart.major = UART_CLPS711X_MAJOR;
500 s->uart.minor = UART_CLPS711X_MINOR;
501 s->uart.nr = UART_CLPS711X_NR;
502 #ifdef CONFIG_SERIAL_CLPS711X_CONSOLE
503 s->uart.cons = &s->console;
504 s->uart.cons->device = uart_console_device;
505 s->uart.cons->write = uart_clps711x_console_write;
506 s->uart.cons->setup = uart_clps711x_console_setup;
507 s->uart.cons->flags = CON_PRINTBUFFER;
508 s->uart.cons->index = -1;
509 s->uart.cons->data = s;
510 strcpy(s->uart.cons->name, "ttyCL");
512 ret = uart_register_driver(&s->uart);
514 dev_err(&pdev->dev, "Registering UART driver failed\n");
515 devm_clk_put(&pdev->dev, s->uart_clk);
519 for (i = 0; i < UART_CLPS711X_NR; i++) {
521 s->port[i].dev = &pdev->dev;
522 s->port[i].irq = TX_IRQ(&s->port[i]);
523 s->port[i].iobase = SYSCON(&s->port[i]);
524 s->port[i].type = PORT_CLPS711X;
525 s->port[i].fifosize = 16;
526 s->port[i].flags = UPF_SKIP_TEST | UPF_FIXED_TYPE;
527 s->port[i].uartclk = clk_get_rate(s->uart_clk);
528 s->port[i].ops = &uart_clps711x_ops;
529 WARN_ON(uart_add_one_port(&s->uart, &s->port[i]));
535 platform_set_drvdata(pdev, NULL);
540 static int __devexit uart_clps711x_remove(struct platform_device *pdev)
542 struct clps711x_port *s = platform_get_drvdata(pdev);
545 for (i = 0; i < UART_CLPS711X_NR; i++)
546 uart_remove_one_port(&s->uart, &s->port[i]);
548 devm_clk_put(&pdev->dev, s->uart_clk);
549 uart_unregister_driver(&s->uart);
550 platform_set_drvdata(pdev, NULL);
555 static struct platform_driver clps711x_uart_driver = {
557 .name = UART_CLPS711X_NAME,
558 .owner = THIS_MODULE,
560 .probe = uart_clps711x_probe,
561 .remove = __devexit_p(uart_clps711x_remove),
563 module_platform_driver(clps711x_uart_driver);
565 static struct platform_device clps711x_uart_device = {
566 .name = UART_CLPS711X_NAME,
569 static int __init uart_clps711x_init(void)
571 return platform_device_register(&clps711x_uart_device);
573 module_init(uart_clps711x_init);
575 static void __exit uart_clps711x_exit(void)
577 platform_device_unregister(&clps711x_uart_device);
579 module_exit(uart_clps711x_exit);
581 MODULE_AUTHOR("Deep Blue Solutions Ltd");
582 MODULE_DESCRIPTION("CLPS711X serial driver");
583 MODULE_LICENSE("GPL");