2 * Driver for Atmel AT91 / AT32 Serial ports
3 * Copyright (C) 2003 Rick Bronson
5 * Based on drivers/char/serial_sa1100.c, by Deep Blue Solutions Ltd.
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
8 * DMA support added by Chip Coldwell.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 #include <linux/module.h>
26 #include <linux/tty.h>
27 #include <linux/ioport.h>
28 #include <linux/slab.h>
29 #include <linux/init.h>
30 #include <linux/serial.h>
31 #include <linux/clk.h>
32 #include <linux/console.h>
33 #include <linux/sysrq.h>
34 #include <linux/tty_flip.h>
35 #include <linux/platform_device.h>
37 #include <linux/of_device.h>
38 #include <linux/of_gpio.h>
39 #include <linux/dma-mapping.h>
40 #include <linux/dmaengine.h>
41 #include <linux/atmel_pdc.h>
42 #include <linux/atmel_serial.h>
43 #include <linux/uaccess.h>
44 #include <linux/platform_data/atmel.h>
45 #include <linux/timer.h>
46 #include <linux/gpio.h>
47 #include <linux/gpio/consumer.h>
48 #include <linux/err.h>
49 #include <linux/irq.h>
52 #include <asm/ioctls.h>
54 #define PDC_BUFFER_SIZE 512
55 /* Revisit: We should calculate this based on the actual port settings */
56 #define PDC_RX_TIMEOUT (3 * 10) /* 3 bytes */
58 #if defined(CONFIG_SERIAL_ATMEL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
62 #include <linux/serial_core.h>
64 #include "serial_mctrl_gpio.h"
66 static void atmel_start_rx(struct uart_port *port);
67 static void atmel_stop_rx(struct uart_port *port);
69 #ifdef CONFIG_SERIAL_ATMEL_TTYAT
71 /* Use device name ttyAT, major 204 and minor 154-169. This is necessary if we
72 * should coexist with the 8250 driver, such as if we have an external 16C550
74 #define SERIAL_ATMEL_MAJOR 204
75 #define MINOR_START 154
76 #define ATMEL_DEVICENAME "ttyAT"
80 /* Use device name ttyS, major 4, minor 64-68. This is the usual serial port
81 * name, but it is legally reserved for the 8250 driver. */
82 #define SERIAL_ATMEL_MAJOR TTY_MAJOR
83 #define MINOR_START 64
84 #define ATMEL_DEVICENAME "ttyS"
88 #define ATMEL_ISR_PASS_LIMIT 256
90 /* UART registers. CR is write-only, hence no GET macro */
91 #define UART_PUT_CR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_CR)
92 #define UART_GET_MR(port) __raw_readl((port)->membase + ATMEL_US_MR)
93 #define UART_PUT_MR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_MR)
94 #define UART_PUT_IER(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IER)
95 #define UART_PUT_IDR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IDR)
96 #define UART_GET_IMR(port) __raw_readl((port)->membase + ATMEL_US_IMR)
97 #define UART_GET_CSR(port) __raw_readl((port)->membase + ATMEL_US_CSR)
98 #define UART_GET_CHAR(port) __raw_readl((port)->membase + ATMEL_US_RHR)
99 #define UART_PUT_CHAR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_THR)
100 #define UART_GET_BRGR(port) __raw_readl((port)->membase + ATMEL_US_BRGR)
101 #define UART_PUT_BRGR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_BRGR)
102 #define UART_PUT_RTOR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_RTOR)
103 #define UART_PUT_TTGR(port, v) __raw_writel(v, (port)->membase + ATMEL_US_TTGR)
104 #define UART_GET_IP_NAME(port) __raw_readl((port)->membase + ATMEL_US_NAME)
105 #define UART_GET_IP_VERSION(port) __raw_readl((port)->membase + ATMEL_US_VERSION)
108 #define UART_PUT_PTCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_PTCR)
109 #define UART_GET_PTSR(port) __raw_readl((port)->membase + ATMEL_PDC_PTSR)
111 #define UART_PUT_RPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RPR)
112 #define UART_GET_RPR(port) __raw_readl((port)->membase + ATMEL_PDC_RPR)
113 #define UART_PUT_RCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RCR)
114 #define UART_PUT_RNPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNPR)
115 #define UART_PUT_RNCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNCR)
117 #define UART_PUT_TPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TPR)
118 #define UART_PUT_TCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TCR)
119 #define UART_GET_TCR(port) __raw_readl((port)->membase + ATMEL_PDC_TCR)
121 struct atmel_dma_buffer {
124 unsigned int dma_size;
128 struct atmel_uart_char {
133 #define ATMEL_SERIAL_RINGSIZE 1024
136 * We wrap our port structure around the generic uart_port.
138 struct atmel_uart_port {
139 struct uart_port uart; /* uart */
140 struct clk *clk; /* uart clock */
141 int may_wakeup; /* cached value of device_may_wakeup for times we need to disable it */
142 u32 backup_imr; /* IMR saved during suspend */
143 int break_active; /* break being received */
145 bool use_dma_rx; /* enable DMA receiver */
146 bool use_pdc_rx; /* enable PDC receiver */
147 short pdc_rx_idx; /* current PDC RX buffer */
148 struct atmel_dma_buffer pdc_rx[2]; /* PDC receier */
150 bool use_dma_tx; /* enable DMA transmitter */
151 bool use_pdc_tx; /* enable PDC transmitter */
152 struct atmel_dma_buffer pdc_tx; /* PDC transmitter */
154 spinlock_t lock_tx; /* port lock */
155 spinlock_t lock_rx; /* port lock */
156 struct dma_chan *chan_tx;
157 struct dma_chan *chan_rx;
158 struct dma_async_tx_descriptor *desc_tx;
159 struct dma_async_tx_descriptor *desc_rx;
160 dma_cookie_t cookie_tx;
161 dma_cookie_t cookie_rx;
162 struct scatterlist sg_tx;
163 struct scatterlist sg_rx;
164 struct tasklet_struct tasklet;
165 unsigned int irq_status;
166 unsigned int irq_status_prev;
168 struct circ_buf rx_ring;
170 struct mctrl_gpios *gpios;
171 int gpio_irq[UART_GPIO_MAX];
172 unsigned int tx_done_mask;
174 bool is_usart; /* usart or uart */
175 struct timer_list uart_timer; /* uart timer */
176 int (*prepare_rx)(struct uart_port *port);
177 int (*prepare_tx)(struct uart_port *port);
178 void (*schedule_rx)(struct uart_port *port);
179 void (*schedule_tx)(struct uart_port *port);
180 void (*release_rx)(struct uart_port *port);
181 void (*release_tx)(struct uart_port *port);
184 static struct atmel_uart_port atmel_ports[ATMEL_MAX_UART];
185 static DECLARE_BITMAP(atmel_ports_in_use, ATMEL_MAX_UART);
188 static struct console atmel_console;
191 #if defined(CONFIG_OF)
192 static const struct of_device_id atmel_serial_dt_ids[] = {
193 { .compatible = "atmel,at91rm9200-usart" },
194 { .compatible = "atmel,at91sam9260-usart" },
198 MODULE_DEVICE_TABLE(of, atmel_serial_dt_ids);
201 static inline struct atmel_uart_port *
202 to_atmel_uart_port(struct uart_port *uart)
204 return container_of(uart, struct atmel_uart_port, uart);
207 #ifdef CONFIG_SERIAL_ATMEL_PDC
208 static bool atmel_use_pdc_rx(struct uart_port *port)
210 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
212 return atmel_port->use_pdc_rx;
215 static bool atmel_use_pdc_tx(struct uart_port *port)
217 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
219 return atmel_port->use_pdc_tx;
222 static bool atmel_use_pdc_rx(struct uart_port *port)
227 static bool atmel_use_pdc_tx(struct uart_port *port)
233 static bool atmel_use_dma_tx(struct uart_port *port)
235 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
237 return atmel_port->use_dma_tx;
240 static bool atmel_use_dma_rx(struct uart_port *port)
242 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
244 return atmel_port->use_dma_rx;
247 static unsigned int atmel_get_lines_status(struct uart_port *port)
249 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
250 unsigned int status, ret = 0;
252 status = UART_GET_CSR(port);
254 mctrl_gpio_get(atmel_port->gpios, &ret);
256 if (!IS_ERR_OR_NULL(mctrl_gpio_to_gpiod(atmel_port->gpios,
259 status &= ~ATMEL_US_CTS;
261 status |= ATMEL_US_CTS;
264 if (!IS_ERR_OR_NULL(mctrl_gpio_to_gpiod(atmel_port->gpios,
267 status &= ~ATMEL_US_DSR;
269 status |= ATMEL_US_DSR;
272 if (!IS_ERR_OR_NULL(mctrl_gpio_to_gpiod(atmel_port->gpios,
275 status &= ~ATMEL_US_RI;
277 status |= ATMEL_US_RI;
280 if (!IS_ERR_OR_NULL(mctrl_gpio_to_gpiod(atmel_port->gpios,
283 status &= ~ATMEL_US_DCD;
285 status |= ATMEL_US_DCD;
291 /* Enable or disable the rs485 support */
292 static int atmel_config_rs485(struct uart_port *port,
293 struct serial_rs485 *rs485conf)
295 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
299 spin_lock_irqsave(&port->lock, flags);
301 /* Disable interrupts */
302 UART_PUT_IDR(port, atmel_port->tx_done_mask);
304 mode = UART_GET_MR(port);
306 /* Resetting serial mode to RS232 (0x0) */
307 mode &= ~ATMEL_US_USMODE;
309 port->rs485 = *rs485conf;
311 if (rs485conf->flags & SER_RS485_ENABLED) {
312 dev_dbg(port->dev, "Setting UART to RS485\n");
313 atmel_port->tx_done_mask = ATMEL_US_TXEMPTY;
314 if ((rs485conf->delay_rts_after_send) > 0)
315 UART_PUT_TTGR(port, rs485conf->delay_rts_after_send);
316 mode |= ATMEL_US_USMODE_RS485;
318 dev_dbg(port->dev, "Setting UART to RS232\n");
319 if (atmel_use_pdc_tx(port))
320 atmel_port->tx_done_mask = ATMEL_US_ENDTX |
323 atmel_port->tx_done_mask = ATMEL_US_TXRDY;
325 UART_PUT_MR(port, mode);
327 /* Enable interrupts */
328 UART_PUT_IER(port, atmel_port->tx_done_mask);
330 spin_unlock_irqrestore(&port->lock, flags);
336 * Return TIOCSER_TEMT when transmitter FIFO and Shift register is empty.
338 static u_int atmel_tx_empty(struct uart_port *port)
340 return (UART_GET_CSR(port) & ATMEL_US_TXEMPTY) ? TIOCSER_TEMT : 0;
344 * Set state of the modem control output lines
346 static void atmel_set_mctrl(struct uart_port *port, u_int mctrl)
348 unsigned int control = 0;
350 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
352 if (mctrl & TIOCM_RTS)
353 control |= ATMEL_US_RTSEN;
355 control |= ATMEL_US_RTSDIS;
357 if (mctrl & TIOCM_DTR)
358 control |= ATMEL_US_DTREN;
360 control |= ATMEL_US_DTRDIS;
362 UART_PUT_CR(port, control);
364 mctrl_gpio_set(atmel_port->gpios, mctrl);
366 /* Local loopback mode? */
367 mode = UART_GET_MR(port) & ~ATMEL_US_CHMODE;
368 if (mctrl & TIOCM_LOOP)
369 mode |= ATMEL_US_CHMODE_LOC_LOOP;
371 mode |= ATMEL_US_CHMODE_NORMAL;
373 /* Resetting serial mode to RS232 (0x0) */
374 mode &= ~ATMEL_US_USMODE;
376 if (port->rs485.flags & SER_RS485_ENABLED) {
377 dev_dbg(port->dev, "Setting UART to RS485\n");
378 if ((port->rs485.delay_rts_after_send) > 0)
379 UART_PUT_TTGR(port, port->rs485.delay_rts_after_send);
380 mode |= ATMEL_US_USMODE_RS485;
382 dev_dbg(port->dev, "Setting UART to RS232\n");
384 UART_PUT_MR(port, mode);
388 * Get state of the modem control input lines
390 static u_int atmel_get_mctrl(struct uart_port *port)
392 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
393 unsigned int ret = 0, status;
395 status = UART_GET_CSR(port);
398 * The control signals are active low.
400 if (!(status & ATMEL_US_DCD))
402 if (!(status & ATMEL_US_CTS))
404 if (!(status & ATMEL_US_DSR))
406 if (!(status & ATMEL_US_RI))
409 return mctrl_gpio_get(atmel_port->gpios, &ret);
415 static void atmel_stop_tx(struct uart_port *port)
417 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
419 if (atmel_use_pdc_tx(port)) {
420 /* disable PDC transmit */
421 UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
423 /* Disable interrupts */
424 UART_PUT_IDR(port, atmel_port->tx_done_mask);
426 if ((port->rs485.flags & SER_RS485_ENABLED) &&
427 !(port->rs485.flags & SER_RS485_RX_DURING_TX))
428 atmel_start_rx(port);
432 * Start transmitting.
434 static void atmel_start_tx(struct uart_port *port)
436 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
438 if (atmel_use_pdc_tx(port)) {
439 if (UART_GET_PTSR(port) & ATMEL_PDC_TXTEN)
440 /* The transmitter is already running. Yes, we
444 if ((port->rs485.flags & SER_RS485_ENABLED) &&
445 !(port->rs485.flags & SER_RS485_RX_DURING_TX))
448 /* re-enable PDC transmit */
449 UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
451 /* Enable interrupts */
452 UART_PUT_IER(port, atmel_port->tx_done_mask);
456 * start receiving - port is in process of being opened.
458 static void atmel_start_rx(struct uart_port *port)
460 UART_PUT_CR(port, ATMEL_US_RSTSTA); /* reset status and receiver */
462 UART_PUT_CR(port, ATMEL_US_RXEN);
464 if (atmel_use_pdc_rx(port)) {
465 /* enable PDC controller */
466 UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT |
467 port->read_status_mask);
468 UART_PUT_PTCR(port, ATMEL_PDC_RXTEN);
470 UART_PUT_IER(port, ATMEL_US_RXRDY);
475 * Stop receiving - port is in process of being closed.
477 static void atmel_stop_rx(struct uart_port *port)
479 UART_PUT_CR(port, ATMEL_US_RXDIS);
481 if (atmel_use_pdc_rx(port)) {
482 /* disable PDC receive */
483 UART_PUT_PTCR(port, ATMEL_PDC_RXTDIS);
484 UART_PUT_IDR(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT |
485 port->read_status_mask);
487 UART_PUT_IDR(port, ATMEL_US_RXRDY);
492 * Enable modem status interrupts
494 static void atmel_enable_ms(struct uart_port *port)
496 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
500 * Interrupt should not be enabled twice
502 if (atmel_port->ms_irq_enabled)
505 atmel_port->ms_irq_enabled = true;
507 if (atmel_port->gpio_irq[UART_GPIO_CTS] >= 0)
508 enable_irq(atmel_port->gpio_irq[UART_GPIO_CTS]);
510 ier |= ATMEL_US_CTSIC;
512 if (atmel_port->gpio_irq[UART_GPIO_DSR] >= 0)
513 enable_irq(atmel_port->gpio_irq[UART_GPIO_DSR]);
515 ier |= ATMEL_US_DSRIC;
517 if (atmel_port->gpio_irq[UART_GPIO_RI] >= 0)
518 enable_irq(atmel_port->gpio_irq[UART_GPIO_RI]);
520 ier |= ATMEL_US_RIIC;
522 if (atmel_port->gpio_irq[UART_GPIO_DCD] >= 0)
523 enable_irq(atmel_port->gpio_irq[UART_GPIO_DCD]);
525 ier |= ATMEL_US_DCDIC;
527 UART_PUT_IER(port, ier);
531 * Disable modem status interrupts
533 static void atmel_disable_ms(struct uart_port *port)
535 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
539 * Interrupt should not be disabled twice
541 if (!atmel_port->ms_irq_enabled)
544 atmel_port->ms_irq_enabled = false;
546 if (atmel_port->gpio_irq[UART_GPIO_CTS] >= 0)
547 disable_irq(atmel_port->gpio_irq[UART_GPIO_CTS]);
549 idr |= ATMEL_US_CTSIC;
551 if (atmel_port->gpio_irq[UART_GPIO_DSR] >= 0)
552 disable_irq(atmel_port->gpio_irq[UART_GPIO_DSR]);
554 idr |= ATMEL_US_DSRIC;
556 if (atmel_port->gpio_irq[UART_GPIO_RI] >= 0)
557 disable_irq(atmel_port->gpio_irq[UART_GPIO_RI]);
559 idr |= ATMEL_US_RIIC;
561 if (atmel_port->gpio_irq[UART_GPIO_DCD] >= 0)
562 disable_irq(atmel_port->gpio_irq[UART_GPIO_DCD]);
564 idr |= ATMEL_US_DCDIC;
566 UART_PUT_IDR(port, idr);
570 * Control the transmission of a break signal
572 static void atmel_break_ctl(struct uart_port *port, int break_state)
574 if (break_state != 0)
575 UART_PUT_CR(port, ATMEL_US_STTBRK); /* start break */
577 UART_PUT_CR(port, ATMEL_US_STPBRK); /* stop break */
581 * Stores the incoming character in the ring buffer
584 atmel_buffer_rx_char(struct uart_port *port, unsigned int status,
587 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
588 struct circ_buf *ring = &atmel_port->rx_ring;
589 struct atmel_uart_char *c;
591 if (!CIRC_SPACE(ring->head, ring->tail, ATMEL_SERIAL_RINGSIZE))
592 /* Buffer overflow, ignore char */
595 c = &((struct atmel_uart_char *)ring->buf)[ring->head];
599 /* Make sure the character is stored before we update head. */
602 ring->head = (ring->head + 1) & (ATMEL_SERIAL_RINGSIZE - 1);
606 * Deal with parity, framing and overrun errors.
608 static void atmel_pdc_rxerr(struct uart_port *port, unsigned int status)
611 UART_PUT_CR(port, ATMEL_US_RSTSTA);
613 if (status & ATMEL_US_RXBRK) {
614 /* ignore side-effect */
615 status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);
618 if (status & ATMEL_US_PARE)
619 port->icount.parity++;
620 if (status & ATMEL_US_FRAME)
621 port->icount.frame++;
622 if (status & ATMEL_US_OVRE)
623 port->icount.overrun++;
627 * Characters received (called from interrupt handler)
629 static void atmel_rx_chars(struct uart_port *port)
631 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
632 unsigned int status, ch;
634 status = UART_GET_CSR(port);
635 while (status & ATMEL_US_RXRDY) {
636 ch = UART_GET_CHAR(port);
639 * note that the error handling code is
640 * out of the main execution path
642 if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
643 | ATMEL_US_OVRE | ATMEL_US_RXBRK)
644 || atmel_port->break_active)) {
647 UART_PUT_CR(port, ATMEL_US_RSTSTA);
649 if (status & ATMEL_US_RXBRK
650 && !atmel_port->break_active) {
651 atmel_port->break_active = 1;
652 UART_PUT_IER(port, ATMEL_US_RXBRK);
655 * This is either the end-of-break
656 * condition or we've received at
657 * least one character without RXBRK
658 * being set. In both cases, the next
659 * RXBRK will indicate start-of-break.
661 UART_PUT_IDR(port, ATMEL_US_RXBRK);
662 status &= ~ATMEL_US_RXBRK;
663 atmel_port->break_active = 0;
667 atmel_buffer_rx_char(port, status, ch);
668 status = UART_GET_CSR(port);
671 tasklet_schedule(&atmel_port->tasklet);
675 * Transmit characters (called from tasklet with TXRDY interrupt
678 static void atmel_tx_chars(struct uart_port *port)
680 struct circ_buf *xmit = &port->state->xmit;
681 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
683 if (port->x_char && UART_GET_CSR(port) & atmel_port->tx_done_mask) {
684 UART_PUT_CHAR(port, port->x_char);
688 if (uart_circ_empty(xmit) || uart_tx_stopped(port))
691 while (UART_GET_CSR(port) & atmel_port->tx_done_mask) {
692 UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
693 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
695 if (uart_circ_empty(xmit))
699 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
700 uart_write_wakeup(port);
702 if (!uart_circ_empty(xmit))
703 /* Enable interrupts */
704 UART_PUT_IER(port, atmel_port->tx_done_mask);
707 static void atmel_complete_tx_dma(void *arg)
709 struct atmel_uart_port *atmel_port = arg;
710 struct uart_port *port = &atmel_port->uart;
711 struct circ_buf *xmit = &port->state->xmit;
712 struct dma_chan *chan = atmel_port->chan_tx;
715 spin_lock_irqsave(&port->lock, flags);
718 dmaengine_terminate_all(chan);
719 xmit->tail += sg_dma_len(&atmel_port->sg_tx);
720 xmit->tail &= UART_XMIT_SIZE - 1;
722 port->icount.tx += sg_dma_len(&atmel_port->sg_tx);
724 spin_lock_irq(&atmel_port->lock_tx);
725 async_tx_ack(atmel_port->desc_tx);
726 atmel_port->cookie_tx = -EINVAL;
727 atmel_port->desc_tx = NULL;
728 spin_unlock_irq(&atmel_port->lock_tx);
730 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
731 uart_write_wakeup(port);
733 /* Do we really need this? */
734 if (!uart_circ_empty(xmit))
735 tasklet_schedule(&atmel_port->tasklet);
737 spin_unlock_irqrestore(&port->lock, flags);
740 static void atmel_release_tx_dma(struct uart_port *port)
742 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
743 struct dma_chan *chan = atmel_port->chan_tx;
746 dmaengine_terminate_all(chan);
747 dma_release_channel(chan);
748 dma_unmap_sg(port->dev, &atmel_port->sg_tx, 1,
752 atmel_port->desc_tx = NULL;
753 atmel_port->chan_tx = NULL;
754 atmel_port->cookie_tx = -EINVAL;
758 * Called from tasklet with TXRDY interrupt is disabled.
760 static void atmel_tx_dma(struct uart_port *port)
762 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
763 struct circ_buf *xmit = &port->state->xmit;
764 struct dma_chan *chan = atmel_port->chan_tx;
765 struct dma_async_tx_descriptor *desc;
766 struct scatterlist *sg = &atmel_port->sg_tx;
768 /* Make sure we have an idle channel */
769 if (atmel_port->desc_tx != NULL)
772 if (!uart_circ_empty(xmit) && !uart_tx_stopped(port)) {
775 * Port xmit buffer is already mapped,
776 * and it is one page... Just adjust
777 * offsets and lengths. Since it is a circular buffer,
778 * we have to transmit till the end, and then the rest.
779 * Take the port lock to get a
780 * consistent xmit buffer state.
782 sg->offset = xmit->tail & (UART_XMIT_SIZE - 1);
783 sg_dma_address(sg) = (sg_dma_address(sg) &
784 ~(UART_XMIT_SIZE - 1))
786 sg_dma_len(sg) = CIRC_CNT_TO_END(xmit->head,
789 BUG_ON(!sg_dma_len(sg));
791 desc = dmaengine_prep_slave_sg(chan,
798 dev_err(port->dev, "Failed to send via dma!\n");
802 dma_sync_sg_for_device(port->dev, sg, 1, DMA_MEM_TO_DEV);
804 atmel_port->desc_tx = desc;
805 desc->callback = atmel_complete_tx_dma;
806 desc->callback_param = atmel_port;
807 atmel_port->cookie_tx = dmaengine_submit(desc);
810 if (port->rs485.flags & SER_RS485_ENABLED) {
811 /* DMA done, stop TX, start RX for RS485 */
812 atmel_start_rx(port);
816 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
817 uart_write_wakeup(port);
820 static int atmel_prepare_tx_dma(struct uart_port *port)
822 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
824 struct dma_slave_config config;
828 dma_cap_set(DMA_SLAVE, mask);
830 atmel_port->chan_tx = dma_request_slave_channel(port->dev, "tx");
831 if (atmel_port->chan_tx == NULL)
833 dev_info(port->dev, "using %s for tx DMA transfers\n",
834 dma_chan_name(atmel_port->chan_tx));
836 spin_lock_init(&atmel_port->lock_tx);
837 sg_init_table(&atmel_port->sg_tx, 1);
838 /* UART circular tx buffer is an aligned page. */
839 BUG_ON((int)port->state->xmit.buf & ~PAGE_MASK);
840 sg_set_page(&atmel_port->sg_tx,
841 virt_to_page(port->state->xmit.buf),
843 (int)port->state->xmit.buf & ~PAGE_MASK);
844 nent = dma_map_sg(port->dev,
850 dev_dbg(port->dev, "need to release resource of dma\n");
853 dev_dbg(port->dev, "%s: mapped %d@%p to %x\n", __func__,
854 sg_dma_len(&atmel_port->sg_tx),
855 port->state->xmit.buf,
856 sg_dma_address(&atmel_port->sg_tx));
859 /* Configure the slave DMA */
860 memset(&config, 0, sizeof(config));
861 config.direction = DMA_MEM_TO_DEV;
862 config.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
863 config.dst_addr = port->mapbase + ATMEL_US_THR;
865 ret = dmaengine_slave_config(atmel_port->chan_tx,
868 dev_err(port->dev, "DMA tx slave configuration failed\n");
875 dev_err(port->dev, "TX channel not available, switch to pio\n");
876 atmel_port->use_dma_tx = 0;
877 if (atmel_port->chan_tx)
878 atmel_release_tx_dma(port);
882 static void atmel_complete_rx_dma(void *arg)
884 struct uart_port *port = arg;
885 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
887 tasklet_schedule(&atmel_port->tasklet);
890 static void atmel_release_rx_dma(struct uart_port *port)
892 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
893 struct dma_chan *chan = atmel_port->chan_rx;
896 dmaengine_terminate_all(chan);
897 dma_release_channel(chan);
898 dma_unmap_sg(port->dev, &atmel_port->sg_rx, 1,
902 atmel_port->desc_rx = NULL;
903 atmel_port->chan_rx = NULL;
904 atmel_port->cookie_rx = -EINVAL;
907 static void atmel_rx_from_dma(struct uart_port *port)
909 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
910 struct tty_port *tport = &port->state->port;
911 struct circ_buf *ring = &atmel_port->rx_ring;
912 struct dma_chan *chan = atmel_port->chan_rx;
913 struct dma_tx_state state;
914 enum dma_status dmastat;
918 /* Reset the UART timeout early so that we don't miss one */
919 UART_PUT_CR(port, ATMEL_US_STTTO);
920 dmastat = dmaengine_tx_status(chan,
921 atmel_port->cookie_rx,
923 /* Restart a new tasklet if DMA status is error */
924 if (dmastat == DMA_ERROR) {
925 dev_dbg(port->dev, "Get residue error, restart tasklet\n");
926 UART_PUT_IER(port, ATMEL_US_TIMEOUT);
927 tasklet_schedule(&atmel_port->tasklet);
931 /* CPU claims ownership of RX DMA buffer */
932 dma_sync_sg_for_cpu(port->dev,
938 * ring->head points to the end of data already written by the DMA.
939 * ring->tail points to the beginning of data to be read by the
941 * The current transfer size should not be larger than the dma buffer
944 ring->head = sg_dma_len(&atmel_port->sg_rx) - state.residue;
945 BUG_ON(ring->head > sg_dma_len(&atmel_port->sg_rx));
947 * At this point ring->head may point to the first byte right after the
948 * last byte of the dma buffer:
949 * 0 <= ring->head <= sg_dma_len(&atmel_port->sg_rx)
951 * However ring->tail must always points inside the dma buffer:
952 * 0 <= ring->tail <= sg_dma_len(&atmel_port->sg_rx) - 1
954 * Since we use a ring buffer, we have to handle the case
955 * where head is lower than tail. In such a case, we first read from
956 * tail to the end of the buffer then reset tail.
958 if (ring->head < ring->tail) {
959 count = sg_dma_len(&atmel_port->sg_rx) - ring->tail;
961 tty_insert_flip_string(tport, ring->buf + ring->tail, count);
963 port->icount.rx += count;
966 /* Finally we read data from tail to head */
967 if (ring->tail < ring->head) {
968 count = ring->head - ring->tail;
970 tty_insert_flip_string(tport, ring->buf + ring->tail, count);
971 /* Wrap ring->head if needed */
972 if (ring->head >= sg_dma_len(&atmel_port->sg_rx))
974 ring->tail = ring->head;
975 port->icount.rx += count;
978 /* USART retreives ownership of RX DMA buffer */
979 dma_sync_sg_for_device(port->dev,
985 * Drop the lock here since it might end up calling
986 * uart_start(), which takes the lock.
988 spin_unlock(&port->lock);
989 tty_flip_buffer_push(tport);
990 spin_lock(&port->lock);
992 UART_PUT_IER(port, ATMEL_US_TIMEOUT);
995 static int atmel_prepare_rx_dma(struct uart_port *port)
997 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
998 struct dma_async_tx_descriptor *desc;
1000 struct dma_slave_config config;
1001 struct circ_buf *ring;
1004 ring = &atmel_port->rx_ring;
1007 dma_cap_set(DMA_CYCLIC, mask);
1009 atmel_port->chan_rx = dma_request_slave_channel(port->dev, "rx");
1010 if (atmel_port->chan_rx == NULL)
1012 dev_info(port->dev, "using %s for rx DMA transfers\n",
1013 dma_chan_name(atmel_port->chan_rx));
1015 spin_lock_init(&atmel_port->lock_rx);
1016 sg_init_table(&atmel_port->sg_rx, 1);
1017 /* UART circular rx buffer is an aligned page. */
1018 BUG_ON((int)port->state->xmit.buf & ~PAGE_MASK);
1019 sg_set_page(&atmel_port->sg_rx,
1020 virt_to_page(ring->buf),
1021 ATMEL_SERIAL_RINGSIZE,
1022 (int)ring->buf & ~PAGE_MASK);
1023 nent = dma_map_sg(port->dev,
1029 dev_dbg(port->dev, "need to release resource of dma\n");
1032 dev_dbg(port->dev, "%s: mapped %d@%p to %x\n", __func__,
1033 sg_dma_len(&atmel_port->sg_rx),
1035 sg_dma_address(&atmel_port->sg_rx));
1038 /* Configure the slave DMA */
1039 memset(&config, 0, sizeof(config));
1040 config.direction = DMA_DEV_TO_MEM;
1041 config.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
1042 config.src_addr = port->mapbase + ATMEL_US_RHR;
1044 ret = dmaengine_slave_config(atmel_port->chan_rx,
1047 dev_err(port->dev, "DMA rx slave configuration failed\n");
1051 * Prepare a cyclic dma transfer, assign 2 descriptors,
1052 * each one is half ring buffer size
1054 desc = dmaengine_prep_dma_cyclic(atmel_port->chan_rx,
1055 sg_dma_address(&atmel_port->sg_rx),
1056 sg_dma_len(&atmel_port->sg_rx),
1057 sg_dma_len(&atmel_port->sg_rx)/2,
1059 DMA_PREP_INTERRUPT);
1060 desc->callback = atmel_complete_rx_dma;
1061 desc->callback_param = port;
1062 atmel_port->desc_rx = desc;
1063 atmel_port->cookie_rx = dmaengine_submit(desc);
1068 dev_err(port->dev, "RX channel not available, switch to pio\n");
1069 atmel_port->use_dma_rx = 0;
1070 if (atmel_port->chan_rx)
1071 atmel_release_rx_dma(port);
1075 static void atmel_uart_timer_callback(unsigned long data)
1077 struct uart_port *port = (void *)data;
1078 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1080 tasklet_schedule(&atmel_port->tasklet);
1081 mod_timer(&atmel_port->uart_timer, jiffies + uart_poll_timeout(port));
1085 * receive interrupt handler.
1088 atmel_handle_receive(struct uart_port *port, unsigned int pending)
1090 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1092 if (atmel_use_pdc_rx(port)) {
1094 * PDC receive. Just schedule the tasklet and let it
1095 * figure out the details.
1097 * TODO: We're not handling error flags correctly at
1100 if (pending & (ATMEL_US_ENDRX | ATMEL_US_TIMEOUT)) {
1101 UART_PUT_IDR(port, (ATMEL_US_ENDRX
1102 | ATMEL_US_TIMEOUT));
1103 tasklet_schedule(&atmel_port->tasklet);
1106 if (pending & (ATMEL_US_RXBRK | ATMEL_US_OVRE |
1107 ATMEL_US_FRAME | ATMEL_US_PARE))
1108 atmel_pdc_rxerr(port, pending);
1111 if (atmel_use_dma_rx(port)) {
1112 if (pending & ATMEL_US_TIMEOUT) {
1113 UART_PUT_IDR(port, ATMEL_US_TIMEOUT);
1114 tasklet_schedule(&atmel_port->tasklet);
1118 /* Interrupt receive */
1119 if (pending & ATMEL_US_RXRDY)
1120 atmel_rx_chars(port);
1121 else if (pending & ATMEL_US_RXBRK) {
1123 * End of break detected. If it came along with a
1124 * character, atmel_rx_chars will handle it.
1126 UART_PUT_CR(port, ATMEL_US_RSTSTA);
1127 UART_PUT_IDR(port, ATMEL_US_RXBRK);
1128 atmel_port->break_active = 0;
1133 * transmit interrupt handler. (Transmit is IRQF_NODELAY safe)
1136 atmel_handle_transmit(struct uart_port *port, unsigned int pending)
1138 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1140 if (pending & atmel_port->tx_done_mask) {
1141 /* Either PDC or interrupt transmission */
1142 UART_PUT_IDR(port, atmel_port->tx_done_mask);
1143 tasklet_schedule(&atmel_port->tasklet);
1148 * status flags interrupt handler.
1151 atmel_handle_status(struct uart_port *port, unsigned int pending,
1152 unsigned int status)
1154 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1156 if (pending & (ATMEL_US_RIIC | ATMEL_US_DSRIC | ATMEL_US_DCDIC
1157 | ATMEL_US_CTSIC)) {
1158 atmel_port->irq_status = status;
1159 tasklet_schedule(&atmel_port->tasklet);
1166 static irqreturn_t atmel_interrupt(int irq, void *dev_id)
1168 struct uart_port *port = dev_id;
1169 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1170 unsigned int status, pending, pass_counter = 0;
1171 bool gpio_handled = false;
1174 status = atmel_get_lines_status(port);
1175 pending = status & UART_GET_IMR(port);
1176 if (!gpio_handled) {
1178 * Dealing with GPIO interrupt
1180 if (irq == atmel_port->gpio_irq[UART_GPIO_CTS])
1181 pending |= ATMEL_US_CTSIC;
1183 if (irq == atmel_port->gpio_irq[UART_GPIO_DSR])
1184 pending |= ATMEL_US_DSRIC;
1186 if (irq == atmel_port->gpio_irq[UART_GPIO_RI])
1187 pending |= ATMEL_US_RIIC;
1189 if (irq == atmel_port->gpio_irq[UART_GPIO_DCD])
1190 pending |= ATMEL_US_DCDIC;
1192 gpio_handled = true;
1197 atmel_handle_receive(port, pending);
1198 atmel_handle_status(port, pending, status);
1199 atmel_handle_transmit(port, pending);
1200 } while (pass_counter++ < ATMEL_ISR_PASS_LIMIT);
1202 return pass_counter ? IRQ_HANDLED : IRQ_NONE;
1205 static void atmel_release_tx_pdc(struct uart_port *port)
1207 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1208 struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
1210 dma_unmap_single(port->dev,
1217 * Called from tasklet with ENDTX and TXBUFE interrupts disabled.
1219 static void atmel_tx_pdc(struct uart_port *port)
1221 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1222 struct circ_buf *xmit = &port->state->xmit;
1223 struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
1226 /* nothing left to transmit? */
1227 if (UART_GET_TCR(port))
1230 xmit->tail += pdc->ofs;
1231 xmit->tail &= UART_XMIT_SIZE - 1;
1233 port->icount.tx += pdc->ofs;
1236 /* more to transmit - setup next transfer */
1238 /* disable PDC transmit */
1239 UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
1241 if (!uart_circ_empty(xmit) && !uart_tx_stopped(port)) {
1242 dma_sync_single_for_device(port->dev,
1247 count = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE);
1250 UART_PUT_TPR(port, pdc->dma_addr + xmit->tail);
1251 UART_PUT_TCR(port, count);
1252 /* re-enable PDC transmit */
1253 UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
1254 /* Enable interrupts */
1255 UART_PUT_IER(port, atmel_port->tx_done_mask);
1257 if ((port->rs485.flags & SER_RS485_ENABLED) &&
1258 !(port->rs485.flags & SER_RS485_RX_DURING_TX)) {
1259 /* DMA done, stop TX, start RX for RS485 */
1260 atmel_start_rx(port);
1264 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
1265 uart_write_wakeup(port);
1268 static int atmel_prepare_tx_pdc(struct uart_port *port)
1270 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1271 struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
1272 struct circ_buf *xmit = &port->state->xmit;
1274 pdc->buf = xmit->buf;
1275 pdc->dma_addr = dma_map_single(port->dev,
1279 pdc->dma_size = UART_XMIT_SIZE;
1285 static void atmel_rx_from_ring(struct uart_port *port)
1287 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1288 struct circ_buf *ring = &atmel_port->rx_ring;
1290 unsigned int status;
1292 while (ring->head != ring->tail) {
1293 struct atmel_uart_char c;
1295 /* Make sure c is loaded after head. */
1298 c = ((struct atmel_uart_char *)ring->buf)[ring->tail];
1300 ring->tail = (ring->tail + 1) & (ATMEL_SERIAL_RINGSIZE - 1);
1307 * note that the error handling code is
1308 * out of the main execution path
1310 if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
1311 | ATMEL_US_OVRE | ATMEL_US_RXBRK))) {
1312 if (status & ATMEL_US_RXBRK) {
1313 /* ignore side-effect */
1314 status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);
1317 if (uart_handle_break(port))
1320 if (status & ATMEL_US_PARE)
1321 port->icount.parity++;
1322 if (status & ATMEL_US_FRAME)
1323 port->icount.frame++;
1324 if (status & ATMEL_US_OVRE)
1325 port->icount.overrun++;
1327 status &= port->read_status_mask;
1329 if (status & ATMEL_US_RXBRK)
1331 else if (status & ATMEL_US_PARE)
1333 else if (status & ATMEL_US_FRAME)
1338 if (uart_handle_sysrq_char(port, c.ch))
1341 uart_insert_char(port, status, ATMEL_US_OVRE, c.ch, flg);
1345 * Drop the lock here since it might end up calling
1346 * uart_start(), which takes the lock.
1348 spin_unlock(&port->lock);
1349 tty_flip_buffer_push(&port->state->port);
1350 spin_lock(&port->lock);
1353 static void atmel_release_rx_pdc(struct uart_port *port)
1355 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1358 for (i = 0; i < 2; i++) {
1359 struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
1361 dma_unmap_single(port->dev,
1369 static void atmel_rx_from_pdc(struct uart_port *port)
1371 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1372 struct tty_port *tport = &port->state->port;
1373 struct atmel_dma_buffer *pdc;
1374 int rx_idx = atmel_port->pdc_rx_idx;
1380 /* Reset the UART timeout early so that we don't miss one */
1381 UART_PUT_CR(port, ATMEL_US_STTTO);
1383 pdc = &atmel_port->pdc_rx[rx_idx];
1384 head = UART_GET_RPR(port) - pdc->dma_addr;
1387 /* If the PDC has switched buffers, RPR won't contain
1388 * any address within the current buffer. Since head
1389 * is unsigned, we just need a one-way comparison to
1392 * In this case, we just need to consume the entire
1393 * buffer and resubmit it for DMA. This will clear the
1394 * ENDRX bit as well, so that we can safely re-enable
1395 * all interrupts below.
1397 head = min(head, pdc->dma_size);
1399 if (likely(head != tail)) {
1400 dma_sync_single_for_cpu(port->dev, pdc->dma_addr,
1401 pdc->dma_size, DMA_FROM_DEVICE);
1404 * head will only wrap around when we recycle
1405 * the DMA buffer, and when that happens, we
1406 * explicitly set tail to 0. So head will
1407 * always be greater than tail.
1409 count = head - tail;
1411 tty_insert_flip_string(tport, pdc->buf + pdc->ofs,
1414 dma_sync_single_for_device(port->dev, pdc->dma_addr,
1415 pdc->dma_size, DMA_FROM_DEVICE);
1417 port->icount.rx += count;
1422 * If the current buffer is full, we need to check if
1423 * the next one contains any additional data.
1425 if (head >= pdc->dma_size) {
1427 UART_PUT_RNPR(port, pdc->dma_addr);
1428 UART_PUT_RNCR(port, pdc->dma_size);
1431 atmel_port->pdc_rx_idx = rx_idx;
1433 } while (head >= pdc->dma_size);
1436 * Drop the lock here since it might end up calling
1437 * uart_start(), which takes the lock.
1439 spin_unlock(&port->lock);
1440 tty_flip_buffer_push(tport);
1441 spin_lock(&port->lock);
1443 UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
1446 static int atmel_prepare_rx_pdc(struct uart_port *port)
1448 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1451 for (i = 0; i < 2; i++) {
1452 struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
1454 pdc->buf = kmalloc(PDC_BUFFER_SIZE, GFP_KERNEL);
1455 if (pdc->buf == NULL) {
1457 dma_unmap_single(port->dev,
1458 atmel_port->pdc_rx[0].dma_addr,
1461 kfree(atmel_port->pdc_rx[0].buf);
1463 atmel_port->use_pdc_rx = 0;
1466 pdc->dma_addr = dma_map_single(port->dev,
1470 pdc->dma_size = PDC_BUFFER_SIZE;
1474 atmel_port->pdc_rx_idx = 0;
1476 UART_PUT_RPR(port, atmel_port->pdc_rx[0].dma_addr);
1477 UART_PUT_RCR(port, PDC_BUFFER_SIZE);
1479 UART_PUT_RNPR(port, atmel_port->pdc_rx[1].dma_addr);
1480 UART_PUT_RNCR(port, PDC_BUFFER_SIZE);
1486 * tasklet handling tty stuff outside the interrupt handler.
1488 static void atmel_tasklet_func(unsigned long data)
1490 struct uart_port *port = (struct uart_port *)data;
1491 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1492 unsigned int status;
1493 unsigned int status_change;
1495 /* The interrupt handler does not take the lock */
1496 spin_lock(&port->lock);
1498 atmel_port->schedule_tx(port);
1500 status = atmel_port->irq_status;
1501 status_change = status ^ atmel_port->irq_status_prev;
1503 if (status_change & (ATMEL_US_RI | ATMEL_US_DSR
1504 | ATMEL_US_DCD | ATMEL_US_CTS)) {
1505 /* TODO: All reads to CSR will clear these interrupts! */
1506 if (status_change & ATMEL_US_RI)
1508 if (status_change & ATMEL_US_DSR)
1510 if (status_change & ATMEL_US_DCD)
1511 uart_handle_dcd_change(port, !(status & ATMEL_US_DCD));
1512 if (status_change & ATMEL_US_CTS)
1513 uart_handle_cts_change(port, !(status & ATMEL_US_CTS));
1515 wake_up_interruptible(&port->state->port.delta_msr_wait);
1517 atmel_port->irq_status_prev = status;
1520 atmel_port->schedule_rx(port);
1522 spin_unlock(&port->lock);
1525 static int atmel_init_property(struct atmel_uart_port *atmel_port,
1526 struct platform_device *pdev)
1528 struct device_node *np = pdev->dev.of_node;
1529 struct atmel_uart_data *pdata = dev_get_platdata(&pdev->dev);
1532 /* DMA/PDC usage specification */
1533 if (of_get_property(np, "atmel,use-dma-rx", NULL)) {
1534 if (of_get_property(np, "dmas", NULL)) {
1535 atmel_port->use_dma_rx = true;
1536 atmel_port->use_pdc_rx = false;
1538 atmel_port->use_dma_rx = false;
1539 atmel_port->use_pdc_rx = true;
1542 atmel_port->use_dma_rx = false;
1543 atmel_port->use_pdc_rx = false;
1546 if (of_get_property(np, "atmel,use-dma-tx", NULL)) {
1547 if (of_get_property(np, "dmas", NULL)) {
1548 atmel_port->use_dma_tx = true;
1549 atmel_port->use_pdc_tx = false;
1551 atmel_port->use_dma_tx = false;
1552 atmel_port->use_pdc_tx = true;
1555 atmel_port->use_dma_tx = false;
1556 atmel_port->use_pdc_tx = false;
1560 atmel_port->use_pdc_rx = pdata->use_dma_rx;
1561 atmel_port->use_pdc_tx = pdata->use_dma_tx;
1562 atmel_port->use_dma_rx = false;
1563 atmel_port->use_dma_tx = false;
1569 static void atmel_init_rs485(struct uart_port *port,
1570 struct platform_device *pdev)
1572 struct device_node *np = pdev->dev.of_node;
1573 struct atmel_uart_data *pdata = dev_get_platdata(&pdev->dev);
1577 /* rs485 properties */
1578 if (of_property_read_u32_array(np, "rs485-rts-delay",
1579 rs485_delay, 2) == 0) {
1580 struct serial_rs485 *rs485conf = &port->rs485;
1582 rs485conf->delay_rts_before_send = rs485_delay[0];
1583 rs485conf->delay_rts_after_send = rs485_delay[1];
1584 rs485conf->flags = 0;
1586 if (of_get_property(np, "rs485-rx-during-tx", NULL))
1587 rs485conf->flags |= SER_RS485_RX_DURING_TX;
1589 if (of_get_property(np, "linux,rs485-enabled-at-boot-time",
1591 rs485conf->flags |= SER_RS485_ENABLED;
1594 port->rs485 = pdata->rs485;
1599 static void atmel_set_ops(struct uart_port *port)
1601 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1603 if (atmel_use_dma_rx(port)) {
1604 atmel_port->prepare_rx = &atmel_prepare_rx_dma;
1605 atmel_port->schedule_rx = &atmel_rx_from_dma;
1606 atmel_port->release_rx = &atmel_release_rx_dma;
1607 } else if (atmel_use_pdc_rx(port)) {
1608 atmel_port->prepare_rx = &atmel_prepare_rx_pdc;
1609 atmel_port->schedule_rx = &atmel_rx_from_pdc;
1610 atmel_port->release_rx = &atmel_release_rx_pdc;
1612 atmel_port->prepare_rx = NULL;
1613 atmel_port->schedule_rx = &atmel_rx_from_ring;
1614 atmel_port->release_rx = NULL;
1617 if (atmel_use_dma_tx(port)) {
1618 atmel_port->prepare_tx = &atmel_prepare_tx_dma;
1619 atmel_port->schedule_tx = &atmel_tx_dma;
1620 atmel_port->release_tx = &atmel_release_tx_dma;
1621 } else if (atmel_use_pdc_tx(port)) {
1622 atmel_port->prepare_tx = &atmel_prepare_tx_pdc;
1623 atmel_port->schedule_tx = &atmel_tx_pdc;
1624 atmel_port->release_tx = &atmel_release_tx_pdc;
1626 atmel_port->prepare_tx = NULL;
1627 atmel_port->schedule_tx = &atmel_tx_chars;
1628 atmel_port->release_tx = NULL;
1633 * Get ip name usart or uart
1635 static void atmel_get_ip_name(struct uart_port *port)
1637 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1638 int name = UART_GET_IP_NAME(port);
1641 /* usart and uart ascii */
1645 atmel_port->is_usart = false;
1647 if (name == usart) {
1648 dev_dbg(port->dev, "This is usart\n");
1649 atmel_port->is_usart = true;
1650 } else if (name == uart) {
1651 dev_dbg(port->dev, "This is uart\n");
1652 atmel_port->is_usart = false;
1654 /* fallback for older SoCs: use version field */
1655 version = UART_GET_IP_VERSION(port);
1659 dev_dbg(port->dev, "This version is usart\n");
1660 atmel_port->is_usart = true;
1664 dev_dbg(port->dev, "This version is uart\n");
1665 atmel_port->is_usart = false;
1668 dev_err(port->dev, "Not supported ip name nor version, set to uart\n");
1673 static void atmel_free_gpio_irq(struct uart_port *port)
1675 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1676 enum mctrl_gpio_idx i;
1678 for (i = 0; i < UART_GPIO_MAX; i++)
1679 if (atmel_port->gpio_irq[i] >= 0)
1680 free_irq(atmel_port->gpio_irq[i], port);
1683 static int atmel_request_gpio_irq(struct uart_port *port)
1685 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1686 int *irq = atmel_port->gpio_irq;
1687 enum mctrl_gpio_idx i;
1690 for (i = 0; (i < UART_GPIO_MAX) && !err; i++) {
1694 irq_set_status_flags(irq[i], IRQ_NOAUTOEN);
1695 err = request_irq(irq[i], atmel_interrupt, IRQ_TYPE_EDGE_BOTH,
1696 "atmel_serial", port);
1698 dev_err(port->dev, "atmel_startup - Can't get %d irq\n",
1703 * If something went wrong, rollback.
1705 while (err && (--i >= 0))
1707 free_irq(irq[i], port);
1713 * Perform initialization and enable port for reception
1715 static int atmel_startup(struct uart_port *port)
1717 struct platform_device *pdev = to_platform_device(port->dev);
1718 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1719 struct tty_struct *tty = port->state->port.tty;
1723 * Ensure that no interrupts are enabled otherwise when
1724 * request_irq() is called we could get stuck trying to
1725 * handle an unexpected interrupt
1727 UART_PUT_IDR(port, -1);
1728 atmel_port->ms_irq_enabled = false;
1733 retval = request_irq(port->irq, atmel_interrupt, IRQF_SHARED,
1734 tty ? tty->name : "atmel_serial", port);
1736 dev_err(port->dev, "atmel_startup - Can't get irq\n");
1741 * Get the GPIO lines IRQ
1743 retval = atmel_request_gpio_irq(port);
1748 * Initialize DMA (if necessary)
1750 atmel_init_property(atmel_port, pdev);
1752 if (atmel_port->prepare_rx) {
1753 retval = atmel_port->prepare_rx(port);
1755 atmel_set_ops(port);
1758 if (atmel_port->prepare_tx) {
1759 retval = atmel_port->prepare_tx(port);
1761 atmel_set_ops(port);
1764 /* Save current CSR for comparison in atmel_tasklet_func() */
1765 atmel_port->irq_status_prev = atmel_get_lines_status(port);
1766 atmel_port->irq_status = atmel_port->irq_status_prev;
1769 * Finally, enable the serial port
1771 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
1772 /* enable xmit & rcvr */
1773 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
1775 setup_timer(&atmel_port->uart_timer,
1776 atmel_uart_timer_callback,
1777 (unsigned long)port);
1779 if (atmel_use_pdc_rx(port)) {
1780 /* set UART timeout */
1781 if (!atmel_port->is_usart) {
1782 mod_timer(&atmel_port->uart_timer,
1783 jiffies + uart_poll_timeout(port));
1784 /* set USART timeout */
1786 UART_PUT_RTOR(port, PDC_RX_TIMEOUT);
1787 UART_PUT_CR(port, ATMEL_US_STTTO);
1789 UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
1791 /* enable PDC controller */
1792 UART_PUT_PTCR(port, ATMEL_PDC_RXTEN);
1793 } else if (atmel_use_dma_rx(port)) {
1794 /* set UART timeout */
1795 if (!atmel_port->is_usart) {
1796 mod_timer(&atmel_port->uart_timer,
1797 jiffies + uart_poll_timeout(port));
1798 /* set USART timeout */
1800 UART_PUT_RTOR(port, PDC_RX_TIMEOUT);
1801 UART_PUT_CR(port, ATMEL_US_STTTO);
1803 UART_PUT_IER(port, ATMEL_US_TIMEOUT);
1806 /* enable receive only */
1807 UART_PUT_IER(port, ATMEL_US_RXRDY);
1813 free_irq(port->irq, port);
1819 * Flush any TX data submitted for DMA. Called when the TX circular
1822 static void atmel_flush_buffer(struct uart_port *port)
1824 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1826 if (atmel_use_pdc_tx(port)) {
1827 UART_PUT_TCR(port, 0);
1828 atmel_port->pdc_tx.ofs = 0;
1835 static void atmel_shutdown(struct uart_port *port)
1837 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1840 * Prevent any tasklets being scheduled during
1843 del_timer_sync(&atmel_port->uart_timer);
1846 * Clear out any scheduled tasklets before
1847 * we destroy the buffers
1849 tasklet_kill(&atmel_port->tasklet);
1852 * Ensure everything is stopped and
1853 * disable all interrupts, port and break condition.
1855 atmel_stop_rx(port);
1856 atmel_stop_tx(port);
1858 UART_PUT_CR(port, ATMEL_US_RSTSTA);
1859 UART_PUT_IDR(port, -1);
1863 * Shut-down the DMA.
1865 if (atmel_port->release_rx)
1866 atmel_port->release_rx(port);
1867 if (atmel_port->release_tx)
1868 atmel_port->release_tx(port);
1871 * Reset ring buffer pointers
1873 atmel_port->rx_ring.head = 0;
1874 atmel_port->rx_ring.tail = 0;
1877 * Free the interrupts
1879 free_irq(port->irq, port);
1880 atmel_free_gpio_irq(port);
1882 atmel_port->ms_irq_enabled = false;
1884 atmel_flush_buffer(port);
1888 * Power / Clock management.
1890 static void atmel_serial_pm(struct uart_port *port, unsigned int state,
1891 unsigned int oldstate)
1893 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1898 * Enable the peripheral clock for this serial port.
1899 * This is called on uart_open() or a resume event.
1901 clk_prepare_enable(atmel_port->clk);
1903 /* re-enable interrupts if we disabled some on suspend */
1904 UART_PUT_IER(port, atmel_port->backup_imr);
1907 /* Back up the interrupt mask and disable all interrupts */
1908 atmel_port->backup_imr = UART_GET_IMR(port);
1909 UART_PUT_IDR(port, -1);
1912 * Disable the peripheral clock for this serial port.
1913 * This is called on uart_close() or a suspend event.
1915 clk_disable_unprepare(atmel_port->clk);
1918 dev_err(port->dev, "atmel_serial: unknown pm %d\n", state);
1923 * Change the port parameters
1925 static void atmel_set_termios(struct uart_port *port, struct ktermios *termios,
1926 struct ktermios *old)
1928 unsigned long flags;
1929 unsigned int mode, imr, quot, baud;
1931 /* Get current mode register */
1932 mode = UART_GET_MR(port) & ~(ATMEL_US_USCLKS | ATMEL_US_CHRL
1933 | ATMEL_US_NBSTOP | ATMEL_US_PAR
1936 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
1937 quot = uart_get_divisor(port, baud);
1939 if (quot > 65535) { /* BRGR is 16-bit, so switch to slower clock */
1941 mode |= ATMEL_US_USCLKS_MCK_DIV8;
1945 switch (termios->c_cflag & CSIZE) {
1947 mode |= ATMEL_US_CHRL_5;
1950 mode |= ATMEL_US_CHRL_6;
1953 mode |= ATMEL_US_CHRL_7;
1956 mode |= ATMEL_US_CHRL_8;
1961 if (termios->c_cflag & CSTOPB)
1962 mode |= ATMEL_US_NBSTOP_2;
1965 if (termios->c_cflag & PARENB) {
1966 /* Mark or Space parity */
1967 if (termios->c_cflag & CMSPAR) {
1968 if (termios->c_cflag & PARODD)
1969 mode |= ATMEL_US_PAR_MARK;
1971 mode |= ATMEL_US_PAR_SPACE;
1972 } else if (termios->c_cflag & PARODD)
1973 mode |= ATMEL_US_PAR_ODD;
1975 mode |= ATMEL_US_PAR_EVEN;
1977 mode |= ATMEL_US_PAR_NONE;
1979 /* hardware handshake (RTS/CTS) */
1980 if (termios->c_cflag & CRTSCTS)
1981 mode |= ATMEL_US_USMODE_HWHS;
1983 mode |= ATMEL_US_USMODE_NORMAL;
1985 spin_lock_irqsave(&port->lock, flags);
1987 port->read_status_mask = ATMEL_US_OVRE;
1988 if (termios->c_iflag & INPCK)
1989 port->read_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE);
1990 if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
1991 port->read_status_mask |= ATMEL_US_RXBRK;
1993 if (atmel_use_pdc_rx(port))
1994 /* need to enable error interrupts */
1995 UART_PUT_IER(port, port->read_status_mask);
1998 * Characters to ignore
2000 port->ignore_status_mask = 0;
2001 if (termios->c_iflag & IGNPAR)
2002 port->ignore_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE);
2003 if (termios->c_iflag & IGNBRK) {
2004 port->ignore_status_mask |= ATMEL_US_RXBRK;
2006 * If we're ignoring parity and break indicators,
2007 * ignore overruns too (for real raw support).
2009 if (termios->c_iflag & IGNPAR)
2010 port->ignore_status_mask |= ATMEL_US_OVRE;
2012 /* TODO: Ignore all characters if CREAD is set.*/
2014 /* update the per-port timeout */
2015 uart_update_timeout(port, termios->c_cflag, baud);
2018 * save/disable interrupts. The tty layer will ensure that the
2019 * transmitter is empty if requested by the caller, so there's
2020 * no need to wait for it here.
2022 imr = UART_GET_IMR(port);
2023 UART_PUT_IDR(port, -1);
2025 /* disable receiver and transmitter */
2026 UART_PUT_CR(port, ATMEL_US_TXDIS | ATMEL_US_RXDIS);
2028 /* Resetting serial mode to RS232 (0x0) */
2029 mode &= ~ATMEL_US_USMODE;
2031 if (port->rs485.flags & SER_RS485_ENABLED) {
2032 if ((port->rs485.delay_rts_after_send) > 0)
2033 UART_PUT_TTGR(port, port->rs485.delay_rts_after_send);
2034 mode |= ATMEL_US_USMODE_RS485;
2037 /* set the parity, stop bits and data size */
2038 UART_PUT_MR(port, mode);
2040 /* set the baud rate */
2041 UART_PUT_BRGR(port, quot);
2042 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
2043 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
2045 /* restore interrupts */
2046 UART_PUT_IER(port, imr);
2048 /* CTS flow-control and modem-status interrupts */
2049 if (UART_ENABLE_MS(port, termios->c_cflag))
2050 atmel_enable_ms(port);
2052 atmel_disable_ms(port);
2054 spin_unlock_irqrestore(&port->lock, flags);
2057 static void atmel_set_ldisc(struct uart_port *port, struct ktermios *termios)
2059 if (termios->c_line == N_PPS) {
2060 port->flags |= UPF_HARDPPS_CD;
2061 spin_lock_irq(&port->lock);
2062 atmel_enable_ms(port);
2063 spin_unlock_irq(&port->lock);
2065 port->flags &= ~UPF_HARDPPS_CD;
2066 if (!UART_ENABLE_MS(port, termios->c_cflag)) {
2067 spin_lock_irq(&port->lock);
2068 atmel_disable_ms(port);
2069 spin_unlock_irq(&port->lock);
2075 * Return string describing the specified port
2077 static const char *atmel_type(struct uart_port *port)
2079 return (port->type == PORT_ATMEL) ? "ATMEL_SERIAL" : NULL;
2083 * Release the memory region(s) being used by 'port'.
2085 static void atmel_release_port(struct uart_port *port)
2087 struct platform_device *pdev = to_platform_device(port->dev);
2088 int size = pdev->resource[0].end - pdev->resource[0].start + 1;
2090 release_mem_region(port->mapbase, size);
2092 if (port->flags & UPF_IOREMAP) {
2093 iounmap(port->membase);
2094 port->membase = NULL;
2099 * Request the memory region(s) being used by 'port'.
2101 static int atmel_request_port(struct uart_port *port)
2103 struct platform_device *pdev = to_platform_device(port->dev);
2104 int size = pdev->resource[0].end - pdev->resource[0].start + 1;
2106 if (!request_mem_region(port->mapbase, size, "atmel_serial"))
2109 if (port->flags & UPF_IOREMAP) {
2110 port->membase = ioremap(port->mapbase, size);
2111 if (port->membase == NULL) {
2112 release_mem_region(port->mapbase, size);
2121 * Configure/autoconfigure the port.
2123 static void atmel_config_port(struct uart_port *port, int flags)
2125 if (flags & UART_CONFIG_TYPE) {
2126 port->type = PORT_ATMEL;
2127 atmel_request_port(port);
2132 * Verify the new serial_struct (for TIOCSSERIAL).
2134 static int atmel_verify_port(struct uart_port *port, struct serial_struct *ser)
2137 if (ser->type != PORT_UNKNOWN && ser->type != PORT_ATMEL)
2139 if (port->irq != ser->irq)
2141 if (ser->io_type != SERIAL_IO_MEM)
2143 if (port->uartclk / 16 != ser->baud_base)
2145 if ((void *)port->mapbase != ser->iomem_base)
2147 if (port->iobase != ser->port)
2154 #ifdef CONFIG_CONSOLE_POLL
2155 static int atmel_poll_get_char(struct uart_port *port)
2157 while (!(UART_GET_CSR(port) & ATMEL_US_RXRDY))
2160 return UART_GET_CHAR(port);
2163 static void atmel_poll_put_char(struct uart_port *port, unsigned char ch)
2165 while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY))
2168 UART_PUT_CHAR(port, ch);
2172 static struct uart_ops atmel_pops = {
2173 .tx_empty = atmel_tx_empty,
2174 .set_mctrl = atmel_set_mctrl,
2175 .get_mctrl = atmel_get_mctrl,
2176 .stop_tx = atmel_stop_tx,
2177 .start_tx = atmel_start_tx,
2178 .stop_rx = atmel_stop_rx,
2179 .enable_ms = atmel_enable_ms,
2180 .break_ctl = atmel_break_ctl,
2181 .startup = atmel_startup,
2182 .shutdown = atmel_shutdown,
2183 .flush_buffer = atmel_flush_buffer,
2184 .set_termios = atmel_set_termios,
2185 .set_ldisc = atmel_set_ldisc,
2187 .release_port = atmel_release_port,
2188 .request_port = atmel_request_port,
2189 .config_port = atmel_config_port,
2190 .verify_port = atmel_verify_port,
2191 .pm = atmel_serial_pm,
2192 #ifdef CONFIG_CONSOLE_POLL
2193 .poll_get_char = atmel_poll_get_char,
2194 .poll_put_char = atmel_poll_put_char,
2199 * Configure the port from the platform device resource info.
2201 static int atmel_init_port(struct atmel_uart_port *atmel_port,
2202 struct platform_device *pdev)
2205 struct uart_port *port = &atmel_port->uart;
2206 struct atmel_uart_data *pdata = dev_get_platdata(&pdev->dev);
2208 if (!atmel_init_property(atmel_port, pdev))
2209 atmel_set_ops(port);
2211 atmel_init_rs485(port, pdev);
2213 port->iotype = UPIO_MEM;
2214 port->flags = UPF_BOOT_AUTOCONF;
2215 port->ops = &atmel_pops;
2217 port->dev = &pdev->dev;
2218 port->mapbase = pdev->resource[0].start;
2219 port->irq = pdev->resource[1].start;
2220 port->rs485_config = atmel_config_rs485;
2222 tasklet_init(&atmel_port->tasklet, atmel_tasklet_func,
2223 (unsigned long)port);
2225 memset(&atmel_port->rx_ring, 0, sizeof(atmel_port->rx_ring));
2227 if (pdata && pdata->regs) {
2228 /* Already mapped by setup code */
2229 port->membase = pdata->regs;
2231 port->flags |= UPF_IOREMAP;
2232 port->membase = NULL;
2235 /* for console, the clock could already be configured */
2236 if (!atmel_port->clk) {
2237 atmel_port->clk = clk_get(&pdev->dev, "usart");
2238 if (IS_ERR(atmel_port->clk)) {
2239 ret = PTR_ERR(atmel_port->clk);
2240 atmel_port->clk = NULL;
2243 ret = clk_prepare_enable(atmel_port->clk);
2245 clk_put(atmel_port->clk);
2246 atmel_port->clk = NULL;
2249 port->uartclk = clk_get_rate(atmel_port->clk);
2250 clk_disable_unprepare(atmel_port->clk);
2251 /* only enable clock when USART is in use */
2254 /* Use TXEMPTY for interrupt when rs485 else TXRDY or ENDTX|TXBUFE */
2255 if (port->rs485.flags & SER_RS485_ENABLED)
2256 atmel_port->tx_done_mask = ATMEL_US_TXEMPTY;
2257 else if (atmel_use_pdc_tx(port)) {
2258 port->fifosize = PDC_BUFFER_SIZE;
2259 atmel_port->tx_done_mask = ATMEL_US_ENDTX | ATMEL_US_TXBUFE;
2261 atmel_port->tx_done_mask = ATMEL_US_TXRDY;
2267 struct platform_device *atmel_default_console_device; /* the serial console device */
2269 #ifdef CONFIG_SERIAL_ATMEL_CONSOLE
2270 static void atmel_console_putchar(struct uart_port *port, int ch)
2272 while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY))
2274 UART_PUT_CHAR(port, ch);
2278 * Interrupts are disabled on entering
2280 static void atmel_console_write(struct console *co, const char *s, u_int count)
2282 struct uart_port *port = &atmel_ports[co->index].uart;
2283 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
2284 unsigned int status, imr;
2285 unsigned int pdc_tx;
2288 * First, save IMR and then disable interrupts
2290 imr = UART_GET_IMR(port);
2291 UART_PUT_IDR(port, ATMEL_US_RXRDY | atmel_port->tx_done_mask);
2293 /* Store PDC transmit status and disable it */
2294 pdc_tx = UART_GET_PTSR(port) & ATMEL_PDC_TXTEN;
2295 UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
2297 uart_console_write(port, s, count, atmel_console_putchar);
2300 * Finally, wait for transmitter to become empty
2304 status = UART_GET_CSR(port);
2305 } while (!(status & ATMEL_US_TXRDY));
2307 /* Restore PDC transmit status */
2309 UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
2311 /* set interrupts back the way they were */
2312 UART_PUT_IER(port, imr);
2316 * If the port was already initialised (eg, by a boot loader),
2317 * try to determine the current setup.
2319 static void __init atmel_console_get_options(struct uart_port *port, int *baud,
2320 int *parity, int *bits)
2322 unsigned int mr, quot;
2325 * If the baud rate generator isn't running, the port wasn't
2326 * initialized by the boot loader.
2328 quot = UART_GET_BRGR(port) & ATMEL_US_CD;
2332 mr = UART_GET_MR(port) & ATMEL_US_CHRL;
2333 if (mr == ATMEL_US_CHRL_8)
2338 mr = UART_GET_MR(port) & ATMEL_US_PAR;
2339 if (mr == ATMEL_US_PAR_EVEN)
2341 else if (mr == ATMEL_US_PAR_ODD)
2345 * The serial core only rounds down when matching this to a
2346 * supported baud rate. Make sure we don't end up slightly
2347 * lower than one of those, as it would make us fall through
2348 * to a much lower baud rate than we really want.
2350 *baud = port->uartclk / (16 * (quot - 1));
2353 static int __init atmel_console_setup(struct console *co, char *options)
2356 struct uart_port *port = &atmel_ports[co->index].uart;
2362 if (port->membase == NULL) {
2363 /* Port not initialized yet - delay setup */
2367 ret = clk_prepare_enable(atmel_ports[co->index].clk);
2371 UART_PUT_IDR(port, -1);
2372 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
2373 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
2376 uart_parse_options(options, &baud, &parity, &bits, &flow);
2378 atmel_console_get_options(port, &baud, &parity, &bits);
2380 return uart_set_options(port, co, baud, parity, bits, flow);
2383 static struct uart_driver atmel_uart;
2385 static struct console atmel_console = {
2386 .name = ATMEL_DEVICENAME,
2387 .write = atmel_console_write,
2388 .device = uart_console_device,
2389 .setup = atmel_console_setup,
2390 .flags = CON_PRINTBUFFER,
2392 .data = &atmel_uart,
2395 #define ATMEL_CONSOLE_DEVICE (&atmel_console)
2398 * Early console initialization (before VM subsystem initialized).
2400 static int __init atmel_console_init(void)
2403 if (atmel_default_console_device) {
2404 struct atmel_uart_data *pdata =
2405 dev_get_platdata(&atmel_default_console_device->dev);
2406 int id = pdata->num;
2407 struct atmel_uart_port *port = &atmel_ports[id];
2409 port->backup_imr = 0;
2410 port->uart.line = id;
2412 add_preferred_console(ATMEL_DEVICENAME, id, NULL);
2413 ret = atmel_init_port(port, atmel_default_console_device);
2416 register_console(&atmel_console);
2422 console_initcall(atmel_console_init);
2425 * Late console initialization.
2427 static int __init atmel_late_console_init(void)
2429 if (atmel_default_console_device
2430 && !(atmel_console.flags & CON_ENABLED))
2431 register_console(&atmel_console);
2436 core_initcall(atmel_late_console_init);
2438 static inline bool atmel_is_console_port(struct uart_port *port)
2440 return port->cons && port->cons->index == port->line;
2444 #define ATMEL_CONSOLE_DEVICE NULL
2446 static inline bool atmel_is_console_port(struct uart_port *port)
2452 static struct uart_driver atmel_uart = {
2453 .owner = THIS_MODULE,
2454 .driver_name = "atmel_serial",
2455 .dev_name = ATMEL_DEVICENAME,
2456 .major = SERIAL_ATMEL_MAJOR,
2457 .minor = MINOR_START,
2458 .nr = ATMEL_MAX_UART,
2459 .cons = ATMEL_CONSOLE_DEVICE,
2463 static bool atmel_serial_clk_will_stop(void)
2465 #ifdef CONFIG_ARCH_AT91
2466 return at91_suspend_entering_slow_clock();
2472 static int atmel_serial_suspend(struct platform_device *pdev,
2475 struct uart_port *port = platform_get_drvdata(pdev);
2476 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
2478 if (atmel_is_console_port(port) && console_suspend_enabled) {
2479 /* Drain the TX shifter */
2480 while (!(UART_GET_CSR(port) & ATMEL_US_TXEMPTY))
2484 /* we can not wake up if we're running on slow clock */
2485 atmel_port->may_wakeup = device_may_wakeup(&pdev->dev);
2486 if (atmel_serial_clk_will_stop())
2487 device_set_wakeup_enable(&pdev->dev, 0);
2489 uart_suspend_port(&atmel_uart, port);
2494 static int atmel_serial_resume(struct platform_device *pdev)
2496 struct uart_port *port = platform_get_drvdata(pdev);
2497 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
2499 uart_resume_port(&atmel_uart, port);
2500 device_set_wakeup_enable(&pdev->dev, atmel_port->may_wakeup);
2505 #define atmel_serial_suspend NULL
2506 #define atmel_serial_resume NULL
2509 static int atmel_init_gpios(struct atmel_uart_port *p, struct device *dev)
2511 enum mctrl_gpio_idx i;
2512 struct gpio_desc *gpiod;
2514 p->gpios = mctrl_gpio_init(dev, 0);
2515 if (IS_ERR_OR_NULL(p->gpios))
2518 for (i = 0; i < UART_GPIO_MAX; i++) {
2519 gpiod = mctrl_gpio_to_gpiod(p->gpios, i);
2520 if (gpiod && (gpiod_get_direction(gpiod) == GPIOF_DIR_IN))
2521 p->gpio_irq[i] = gpiod_to_irq(gpiod);
2523 p->gpio_irq[i] = -EINVAL;
2529 static int atmel_serial_probe(struct platform_device *pdev)
2531 struct atmel_uart_port *port;
2532 struct device_node *np = pdev->dev.of_node;
2533 struct atmel_uart_data *pdata = dev_get_platdata(&pdev->dev);
2537 BUILD_BUG_ON(ATMEL_SERIAL_RINGSIZE & (ATMEL_SERIAL_RINGSIZE - 1));
2540 ret = of_alias_get_id(np, "serial");
2546 /* port id not found in platform data nor device-tree aliases:
2547 * auto-enumerate it */
2548 ret = find_first_zero_bit(atmel_ports_in_use, ATMEL_MAX_UART);
2550 if (ret >= ATMEL_MAX_UART) {
2555 if (test_and_set_bit(ret, atmel_ports_in_use)) {
2556 /* port already in use */
2561 port = &atmel_ports[ret];
2562 port->backup_imr = 0;
2563 port->uart.line = ret;
2565 ret = atmel_init_gpios(port, &pdev->dev);
2567 dev_err(&pdev->dev, "%s",
2568 "Failed to initialize GPIOs. The serial port may not work as expected");
2570 ret = atmel_init_port(port, pdev);
2574 if (!atmel_use_pdc_rx(&port->uart)) {
2576 data = kmalloc(sizeof(struct atmel_uart_char)
2577 * ATMEL_SERIAL_RINGSIZE, GFP_KERNEL);
2579 goto err_alloc_ring;
2580 port->rx_ring.buf = data;
2583 ret = uart_add_one_port(&atmel_uart, &port->uart);
2587 #ifdef CONFIG_SERIAL_ATMEL_CONSOLE
2588 if (atmel_is_console_port(&port->uart)
2589 && ATMEL_CONSOLE_DEVICE->flags & CON_ENABLED) {
2591 * The serial core enabled the clock for us, so undo
2592 * the clk_prepare_enable() in atmel_console_setup()
2594 clk_disable_unprepare(port->clk);
2598 device_init_wakeup(&pdev->dev, 1);
2599 platform_set_drvdata(pdev, port);
2601 if (port->uart.rs485.flags & SER_RS485_ENABLED) {
2602 UART_PUT_MR(&port->uart, ATMEL_US_USMODE_NORMAL);
2603 UART_PUT_CR(&port->uart, ATMEL_US_RTSEN);
2607 * Get port name of usart or uart
2609 atmel_get_ip_name(&port->uart);
2614 kfree(port->rx_ring.buf);
2615 port->rx_ring.buf = NULL;
2617 if (!atmel_is_console_port(&port->uart)) {
2625 static int atmel_serial_remove(struct platform_device *pdev)
2627 struct uart_port *port = platform_get_drvdata(pdev);
2628 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
2631 tasklet_kill(&atmel_port->tasklet);
2633 device_init_wakeup(&pdev->dev, 0);
2635 ret = uart_remove_one_port(&atmel_uart, port);
2637 kfree(atmel_port->rx_ring.buf);
2639 /* "port" is allocated statically, so we shouldn't free it */
2641 clear_bit(port->line, atmel_ports_in_use);
2643 clk_put(atmel_port->clk);
2648 static struct platform_driver atmel_serial_driver = {
2649 .probe = atmel_serial_probe,
2650 .remove = atmel_serial_remove,
2651 .suspend = atmel_serial_suspend,
2652 .resume = atmel_serial_resume,
2654 .name = "atmel_usart",
2655 .owner = THIS_MODULE,
2656 .of_match_table = of_match_ptr(atmel_serial_dt_ids),
2660 static int __init atmel_serial_init(void)
2664 ret = uart_register_driver(&atmel_uart);
2668 ret = platform_driver_register(&atmel_serial_driver);
2670 uart_unregister_driver(&atmel_uart);
2675 static void __exit atmel_serial_exit(void)
2677 platform_driver_unregister(&atmel_serial_driver);
2678 uart_unregister_driver(&atmel_uart);
2681 module_init(atmel_serial_init);
2682 module_exit(atmel_serial_exit);
2684 MODULE_AUTHOR("Rick Bronson");
2685 MODULE_DESCRIPTION("Atmel AT91 / AT32 serial port driver");
2686 MODULE_LICENSE("GPL");
2687 MODULE_ALIAS("platform:atmel_usart");