2 * Probe for F81216A LPC to 4 UART
4 * Based on drivers/tty/serial/8250_pnp.c, by Russell King, et al
6 * Copyright (C) 2014 Ricardo Ribalda, Qtechnology A/S
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License.
13 #include <linux/module.h>
14 #include <linux/pci.h>
15 #include <linux/pnp.h>
16 #include <linux/kernel.h>
17 #include <linux/serial_core.h>
25 #define CHIP_ID_0 0x1602
26 #define CHIP_ID_1 0x0501
27 #define VENDOR_ID1 0x23
28 #define VENDOR_ID1_VAL 0x19
29 #define VENDOR_ID2 0x24
30 #define VENDOR_ID2_VAL 0x34
34 #define RTS_INVERT BIT(5)
35 #define RS485_URA BIT(4)
36 #define RXW4C_IRA BIT(3)
37 #define TXW4C_IRA BIT(2)
39 #define DRIVER_NAME "8250_fintek"
48 static int fintek_8250_enter_key(u16 base_port, u8 key)
51 if (!request_muxed_region(base_port, 2, DRIVER_NAME))
54 outb(key, base_port + ADDR_PORT);
55 outb(key, base_port + ADDR_PORT);
59 static void fintek_8250_exit_key(u16 base_port)
62 outb(EXIT_KEY, base_port + ADDR_PORT);
63 release_region(base_port + ADDR_PORT, 2);
66 static int fintek_8250_get_index(resource_size_t base_addr)
68 resource_size_t base[] = {0x3f8, 0x2f8, 0x3e8, 0x2e8};
71 for (i = 0; i < ARRAY_SIZE(base); i++)
72 if (base_addr == base[i])
78 static int fintek_8250_check_id(u16 base_port)
82 outb(VENDOR_ID1, base_port + ADDR_PORT);
83 if (inb(base_port + DATA_PORT) != VENDOR_ID1_VAL)
86 outb(VENDOR_ID2, base_port + ADDR_PORT);
87 if (inb(base_port + DATA_PORT) != VENDOR_ID2_VAL)
90 outb(CHIP_ID1, base_port + ADDR_PORT);
91 chip = inb(base_port + DATA_PORT);
92 outb(CHIP_ID2, base_port + ADDR_PORT);
93 chip |= inb(base_port + DATA_PORT) << 8;
95 if (chip != CHIP_ID_0 && chip != CHIP_ID_1)
101 static int fintek_8250_rs485_config(struct uart_port *port,
102 struct serial_rs485 *rs485)
105 struct fintek_8250 *pdata = port->private_data;
110 if (rs485->flags & SER_RS485_ENABLED)
111 memset(rs485->padding, 0, sizeof(rs485->padding));
113 memset(rs485, 0, sizeof(*rs485));
115 rs485->flags &= SER_RS485_ENABLED | SER_RS485_RTS_ON_SEND |
116 SER_RS485_RTS_AFTER_SEND;
118 if (rs485->delay_rts_before_send) {
119 rs485->delay_rts_before_send = 1;
123 if (rs485->delay_rts_after_send) {
124 rs485->delay_rts_after_send = 1;
128 if ((!!(rs485->flags & SER_RS485_RTS_ON_SEND)) ==
129 (!!(rs485->flags & SER_RS485_RTS_AFTER_SEND)))
130 rs485->flags &= SER_RS485_ENABLED;
134 if (rs485->flags & SER_RS485_RTS_ON_SEND)
135 config |= RTS_INVERT;
137 if (fintek_8250_enter_key(pdata->base_port, pdata->key))
140 outb(LDN, pdata->base_port + ADDR_PORT);
141 outb(pdata->index, pdata->base_port + DATA_PORT);
142 outb(RS485, pdata->base_port + ADDR_PORT);
143 outb(config, pdata->base_port + DATA_PORT);
144 fintek_8250_exit_key(pdata->base_port);
146 port->rs485 = *rs485;
151 static int fintek_8250_base_port(u8 *key)
153 static const u16 addr[] = {0x4e, 0x2e};
154 static const u8 keys[] = {0x77, 0xa0, 0x87, 0x67};
157 for (i = 0; i < ARRAY_SIZE(addr); i++) {
158 for (j = 0; j < ARRAY_SIZE(keys); j++) {
161 if (fintek_8250_enter_key(addr[i], keys[j]))
163 ret = fintek_8250_check_id(addr[i]);
164 fintek_8250_exit_key(addr[i]);
176 fintek_8250_probe(struct pnp_dev *dev, const struct pnp_device_id *dev_id)
178 struct uart_8250_port uart;
179 struct fintek_8250 *pdata;
184 if (!pnp_port_valid(dev, 0))
187 base_port = fintek_8250_base_port(&key);
191 index = fintek_8250_get_index(pnp_port_start(dev, 0));
195 memset(&uart, 0, sizeof(uart));
197 pdata = devm_kzalloc(&dev->dev, sizeof(*pdata), GFP_KERNEL);
200 uart.port.private_data = pdata;
202 if (!pnp_irq_valid(dev, 0))
204 uart.port.irq = pnp_irq(dev, 0);
205 uart.port.iobase = pnp_port_start(dev, 0);
206 uart.port.iotype = UPIO_PORT;
207 uart.port.rs485_config = fintek_8250_rs485_config;
209 uart.port.flags |= UPF_SKIP_TEST | UPF_BOOT_AUTOCONF;
210 if (pnp_irq_flags(dev, 0) & IORESOURCE_IRQ_SHAREABLE)
211 uart.port.flags |= UPF_SHARE_IRQ;
212 uart.port.uartclk = 1843200;
213 uart.port.dev = &dev->dev;
216 pdata->base_port = base_port;
217 pdata->index = index;
218 pdata->line = serial8250_register_8250_port(&uart);
222 pnp_set_drvdata(dev, pdata);
226 static void fintek_8250_remove(struct pnp_dev *dev)
228 struct fintek_8250 *pdata = pnp_get_drvdata(dev);
231 serial8250_unregister_port(pdata->line);
235 static int fintek_8250_suspend(struct pnp_dev *dev, pm_message_t state)
237 struct fintek_8250 *pdata = pnp_get_drvdata(dev);
241 serial8250_suspend_port(pdata->line);
245 static int fintek_8250_resume(struct pnp_dev *dev)
247 struct fintek_8250 *pdata = pnp_get_drvdata(dev);
251 serial8250_resume_port(pdata->line);
255 #define fintek_8250_suspend NULL
256 #define fintek_8250_resume NULL
257 #endif /* CONFIG_PM */
259 static const struct pnp_device_id fintek_dev_table[] = {
260 /* Qtechnology Panel PC / IO1000 */
265 MODULE_DEVICE_TABLE(pnp, fintek_dev_table);
267 static struct pnp_driver fintek_8250_driver = {
269 .probe = fintek_8250_probe,
270 .remove = fintek_8250_remove,
271 .suspend = fintek_8250_suspend,
272 .resume = fintek_8250_resume,
273 .id_table = fintek_dev_table,
276 module_pnp_driver(fintek_8250_driver);
277 MODULE_DESCRIPTION("Fintek F812164 module");
278 MODULE_AUTHOR("Ricardo Ribalda <ricardo.ribalda@gmail.com>");
279 MODULE_LICENSE("GPL");