2 * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 #include <linux/clk.h>
15 #include <linux/delay.h>
16 #include <linux/interrupt.h>
18 #include <linux/module.h>
20 #include <linux/of_address.h>
21 #include <linux/of_irq.h>
22 #include <linux/platform_device.h>
23 #include <linux/reset.h>
24 #include <linux/thermal.h>
25 #include <linux/timer.h>
26 #include <linux/mfd/syscon.h>
27 #include <linux/regmap.h>
28 #include <linux/gpio.h>
29 #include <linux/of_gpio.h>
30 #include <linux/rockchip/common.h>
31 #include "../../arch/arm/mach-rockchip/efuse.h"
34 #define thermal_dbg(dev, format, arg...) \
35 dev_printk(KERN_INFO , dev , format , ## arg)
37 #define thermal_dbg(dev, format, arg...)
42 * If the temperature over a period of time High,
43 * the resulting TSHUT gave CRU module,let it reset the entire chip,
44 * or via GPIO give PMIC.
57 * the system Temperature Sensors tshut(tshut) polarity
58 * the bit 8 is tshut polarity.
59 * 0: low active, 1: high active
67 * The system has three Temperature Sensors. channel 0 is reserved,
68 * channel 1 is for CPU, and channel 2 is for GPU.
77 struct rockchip_tsadc_chip {
79 enum tshut_mode tshut_mode;
80 enum tshut_polarity tshut_polarity;
85 /* Chip-wide methods */
86 void (*initialize)(void __iomem *reg, enum tshut_polarity p);
87 void (*irq_ack)(void __iomem *reg);
88 void (*control)(void __iomem *reg, bool on);
90 /* Per-sensor methods */
91 int (*get_temp)(int chn, void __iomem *reg, long *temp);
92 void (*set_alarm_temp)(int chn, void __iomem *reg, long temp);
93 void (*set_tshut_temp)(int chn, void __iomem *reg, long temp);
94 void (*set_tshut_mode)(int chn, void __iomem *reg, enum tshut_mode m);
97 struct rockchip_thermal_sensor {
98 struct rockchip_thermal_data *thermal;
99 struct thermal_zone_device *tzd;
103 #define NUM_SENSORS 2 /* Ignore unused sensor 0 */
105 struct rockchip_thermal_data {
106 const struct rockchip_tsadc_chip *chip;
107 struct kobject *rockchip_thermal_kobj;
108 struct platform_device *pdev;
109 struct reset_control *reset;
111 struct rockchip_thermal_sensor sensors[NUM_SENSORS];
128 enum tshut_mode tshut_mode;
129 enum tshut_polarity tshut_polarity;
132 /* TSADC V2 Sensor info define: */
133 #define TSADCV2_USER_CON 0x00
134 #define TSADCV2_AUTO_CON 0x04
135 #define TSADCV2_INT_EN 0x08
136 #define TSADCV2_INT_PD 0x0c
137 #define TSADCV2_DATA(chn) (0x20 + (chn) * 0x04)
138 #define TSADCV2_COMP_INT(chn) (0x30 + (chn) * 0x04)
139 #define TSADCV2_COMP_SHUT(chn) (0x40 + (chn) * 0x04)
140 #define TSADCV2_HIGHT_INT_DEBOUNCE 0x60
141 #define TSADCV2_HIGHT_TSHUT_DEBOUNCE 0x64
142 #define TSADCV2_AUTO_PERIOD 0x68
143 #define TSADCV2_AUTO_PERIOD_HT 0x6c
145 #define TSADCV2_AUTO_EN BIT(0)
146 #define TSADCV2_AUTO_DISABLE ~BIT(0)
147 #define TSADCV2_AUTO_SRC_EN(chn) BIT(4 + (chn))
148 #define TSADCV2_AUTO_TSHUT_POLARITY_HIGH BIT(8)
149 #define TSADCV2_AUTO_TSHUT_POLARITY_LOW ~BIT(8)
151 #define TSADCV2_INT_SRC_EN(chn) BIT(chn)
152 #define TSADCV2_SHUT_2GPIO_SRC_EN(chn) BIT(4 + (chn))
153 #define TSADCV2_SHUT_2CRU_SRC_EN(chn) BIT(8 + (chn))
155 #define TSADCV2_INT_PD_CLEAR ~BIT(8)
157 #define TSADCV2_DATA_MASK 0xfff
158 #define TSADCV3_DATA_MASK 0x3ff
160 #define TSADCV2_HIGHT_INT_DEBOUNCE_COUNT 4
161 #define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT 4
163 #define TSADCV2_AUTO_PERIOD_TIME 250 /* msec */
164 #define TSADCV2_AUTO_PERIOD_HT_TIME 50 /* msec */
165 #define TSADCV3_AUTO_PERIOD_TIME 1500 /* msec */
166 #define TSADCV3_AUTO_PERIOD_HT_TIME 1000 /* msec */
168 #define TSADC_CPU_GATE
169 /*#define TSADC_GPU_GATE*/
171 #define TSADC_CLK_GATE_DELAY_TIME 50/* usec */
172 #define TSADC_CLK_CYCLE_TIME 30/* usec */
173 #define TSADC_USER_MODE_DELAY_TIME 200/* usec */
176 #define TSADC_TEST_SAMPLE_TIME 200/* msec */
182 static struct rockchip_thermal_data *s_thermal = NULL;
183 static const struct tsadc_table v2_code_table[] = {
184 {TSADCV2_DATA_MASK, -40000},
222 static const struct tsadc_table v3_code_table[] = {
258 {TSADCV3_DATA_MASK, 125000},
261 static u32 rk_tsadcv2_temp_to_code(long temp)
266 high = ARRAY_SIZE(v2_code_table) - 1;
267 mid = (high + low) / 2;
269 if (temp < v2_code_table[low].temp || temp > v2_code_table[high].temp)
272 while (low <= high) {
273 if (temp == v2_code_table[mid].temp)
274 return v2_code_table[mid].code;
275 else if (temp < v2_code_table[mid].temp)
279 mid = (low + high) / 2;
285 static long rk_tsadcv2_code_to_temp(u32 code)
290 high = ARRAY_SIZE(v2_code_table) - 1;
291 mid = (high + low) / 2;
293 if (code > v2_code_table[low].code || code < v2_code_table[high].code)
294 return 125000; /* No code available, return max temperature */
296 while (low <= high) {
297 if (code >= v2_code_table[mid].code && code <
298 v2_code_table[mid - 1].code)
299 return v2_code_table[mid].temp;
300 else if (code < v2_code_table[mid].code)
304 mid = (low + high) / 2;
310 static u32 rk_tsadcv3_temp_to_code(long temp)
316 high = ARRAY_SIZE(v3_code_table) - 1;
317 mid = (high + low) / 2;
319 if (temp < v3_code_table[low].temp || temp > v3_code_table[high].temp)
322 while (low <= high) {
323 if (temp == v3_code_table[mid].temp)
324 return v3_code_table[mid].code;
325 else if (temp < v3_code_table[mid].temp)
329 mid = (low + high) / 2;
335 static long rk_tsadcv3_code_to_temp(u32 code)
340 high = ARRAY_SIZE(v3_code_table) - 1;
341 mid = (high + low) / 2;
343 if (code < v3_code_table[low].code || code > v3_code_table[high].code)
344 return 125000; /* No code available, return max temperature */
346 while (low <= high) {
347 if (code <= v3_code_table[mid].code && code >
348 v3_code_table[mid - 1].code) {
349 return v3_code_table[mid - 1].temp + (v3_code_table[mid].temp -
350 v3_code_table[mid - 1].temp) * (code - v3_code_table[mid - 1].code)
351 / (v3_code_table[mid].code - v3_code_table[mid - 1].code);
352 } else if (code > v3_code_table[mid].code)
356 mid = (low + high) / 2;
363 * rk_tsadcv2_initialize - initialize TASDC Controller
364 * (1) Set TSADCV2_AUTO_PERIOD, configure the interleave between
365 * every two accessing of TSADC in normal operation.
366 * (2) Set TSADCV2_AUTO_PERIOD_HT, configure the interleave between
367 * every two accessing of TSADC after the temperature is higher
368 * than COM_SHUT or COM_INT.
369 * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE,
370 * if the temperature is higher than COMP_INT or COMP_SHUT for
371 * "debounce" times, TSADC controller will generate interrupt or TSHUT.
373 static void rk_tsadcv2_initialize(void __iomem *regs,
374 enum tshut_polarity tshut_polarity)
376 if (tshut_polarity == TSHUT_HIGH_ACTIVE)
377 writel_relaxed(0 | (TSADCV2_AUTO_TSHUT_POLARITY_HIGH),
378 regs + TSADCV2_AUTO_CON);
380 writel_relaxed(TSADCV2_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD);
381 writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
382 regs + TSADCV2_HIGHT_INT_DEBOUNCE);
383 writel_relaxed(TSADCV2_AUTO_PERIOD_HT_TIME,
384 regs + TSADCV2_AUTO_PERIOD_HT);
385 writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
386 regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
389 static void rk_tsadcv3_initialize(void __iomem *regs,
390 enum tshut_polarity tshut_polarity)
392 if (tshut_polarity == TSHUT_HIGH_ACTIVE)
393 writel_relaxed(0 | (TSADCV2_AUTO_TSHUT_POLARITY_HIGH),
394 regs + TSADCV2_AUTO_CON);
396 writel_relaxed(TSADCV3_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD);
397 writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
398 regs + TSADCV2_HIGHT_INT_DEBOUNCE);
399 writel_relaxed(TSADCV3_AUTO_PERIOD_HT_TIME,
400 regs + TSADCV2_AUTO_PERIOD_HT);
401 writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
402 regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
405 static void rk_tsadcv2_irq_ack(void __iomem *regs)
409 val = readl_relaxed(regs + TSADCV2_INT_PD);
410 writel_relaxed(val & TSADCV2_INT_PD_CLEAR, regs + TSADCV2_INT_PD);
413 static void rk_tsadcv2_control(void __iomem *regs, bool enable)
417 val = readl_relaxed(regs + TSADCV2_AUTO_CON);
419 val |= TSADCV2_AUTO_EN;
421 val &= ~TSADCV2_AUTO_EN;
423 writel_relaxed(val, regs + TSADCV2_AUTO_CON);
426 static int rk_tsadcv2_get_temp(int chn, void __iomem *regs, long *temp)
430 /* the A/D value of the channel last conversion need some time */
431 val = readl_relaxed(regs + TSADCV2_DATA(chn));
435 *temp = rk_tsadcv2_code_to_temp(val);
440 static void rk_tsadcv2_alarm_temp(int chn, void __iomem *regs, long temp)
442 u32 alarm_value, int_en;
444 alarm_value = rk_tsadcv2_temp_to_code(temp);
445 writel_relaxed(alarm_value & TSADCV2_DATA_MASK,
446 regs + TSADCV2_COMP_INT(chn));
448 int_en = readl_relaxed(regs + TSADCV2_INT_EN);
449 int_en |= TSADCV2_INT_SRC_EN(chn);
450 writel_relaxed(int_en, regs + TSADCV2_INT_EN);
453 static void rk_tsadcv2_tshut_temp(int chn, void __iomem *regs, long temp)
455 u32 tshut_value, val;
457 tshut_value = rk_tsadcv2_temp_to_code(temp);
458 writel_relaxed(tshut_value, regs + TSADCV2_COMP_SHUT(chn));
460 /* TSHUT will be valid */
461 val = readl_relaxed(regs + TSADCV2_AUTO_CON);
462 writel_relaxed(val | TSADCV2_AUTO_SRC_EN(chn), regs + TSADCV2_AUTO_CON);
465 static int rk_tsadcv3_get_temp(int chn, void __iomem *regs, long *temp)
469 /* the A/D value of the channel last conversion need some time */
470 val = readl_relaxed(regs + TSADCV2_DATA(chn));
474 *temp = rk_tsadcv3_code_to_temp(val);
479 static void rk_tsadcv3_alarm_temp(int chn, void __iomem *regs, long temp)
481 u32 alarm_value, int_en;
483 alarm_value = rk_tsadcv3_temp_to_code(temp);
484 writel_relaxed(alarm_value & TSADCV2_DATA_MASK,
485 regs + TSADCV2_COMP_INT(chn));
487 int_en = readl_relaxed(regs + TSADCV2_INT_EN);
488 int_en |= TSADCV2_INT_SRC_EN(chn);
489 writel_relaxed(int_en, regs + TSADCV2_INT_EN);
492 static void rk_tsadcv3_tshut_temp(int chn, void __iomem *regs, long temp)
494 u32 tshut_value, val;
496 tshut_value = rk_tsadcv3_temp_to_code(temp);
497 writel_relaxed(tshut_value, regs + TSADCV2_COMP_SHUT(chn));
499 /* TSHUT will be valid */
500 val = readl_relaxed(regs + TSADCV2_AUTO_CON);
501 writel_relaxed(val | TSADCV2_AUTO_SRC_EN(chn), regs + TSADCV2_AUTO_CON);
504 static void rk_tsadcv2_tshut_mode(int chn, void __iomem *regs,
505 enum tshut_mode mode)
509 val = readl_relaxed(regs + TSADCV2_INT_EN);
510 if (mode == TSHUT_MODE_GPIO) {
511 val &= ~TSADCV2_SHUT_2CRU_SRC_EN(chn);
512 val |= TSADCV2_SHUT_2GPIO_SRC_EN(chn);
514 val &= ~TSADCV2_SHUT_2GPIO_SRC_EN(chn);
515 val |= TSADCV2_SHUT_2CRU_SRC_EN(chn);
518 writel_relaxed(val, regs + TSADCV2_INT_EN);
521 static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
522 .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
523 .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
524 .hw_shut_temp = 125000,
525 .mode = TSADC_AUTO_MODE,
529 .initialize = rk_tsadcv2_initialize,
530 .irq_ack = rk_tsadcv2_irq_ack,
531 .control = rk_tsadcv2_control,
532 .get_temp = rk_tsadcv2_get_temp,
533 .set_alarm_temp = rk_tsadcv2_alarm_temp,
534 .set_tshut_temp = rk_tsadcv2_tshut_temp,
535 .set_tshut_mode = rk_tsadcv2_tshut_mode,
538 static const struct rockchip_tsadc_chip rk3368_tsadc_data = {
539 .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
540 .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
541 .hw_shut_temp = 125000,
542 .mode = TSHUT_USER_MODE,
546 .initialize = rk_tsadcv3_initialize,
547 .irq_ack = rk_tsadcv2_irq_ack,
548 .control = rk_tsadcv2_control,
549 .get_temp = rk_tsadcv3_get_temp,
550 .set_alarm_temp = rk_tsadcv3_alarm_temp,
551 .set_tshut_temp = rk_tsadcv3_tshut_temp,
552 .set_tshut_mode = rk_tsadcv2_tshut_mode,
555 static const struct of_device_id of_rockchip_thermal_match[] = {
557 .compatible = "rockchip,rk3288-tsadc",
558 .data = (void *)&rk3288_tsadc_data,
561 .compatible = "rockchip,rk3368-tsadc",
562 .data = (void *)&rk3368_tsadc_data,
566 MODULE_DEVICE_TABLE(of, of_rockchip_thermal_match);
568 static void rockchip_thermal_toggle_sensor(struct rockchip_thermal_sensor *sensor
571 struct thermal_zone_device *tzd = sensor->tzd;
573 tzd->ops->set_mode(tzd,
574 on ? THERMAL_DEVICE_ENABLED : THERMAL_DEVICE_DISABLED);
577 static irqreturn_t rockchip_thermal_alarm_irq_thread(int irq, void *dev)
579 struct rockchip_thermal_data *thermal = dev;
582 dev_dbg(&thermal->pdev->dev, "thermal alarm\n");
584 thermal->chip->irq_ack(thermal->regs);
586 for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
587 thermal_zone_device_update(thermal->sensors[i].tzd);
593 static int rockchip_thermal_set_trips(void *_sensor, long low, long high)
595 struct rockchip_thermal_sensor *sensor = _sensor;
596 struct rockchip_thermal_data *thermal = sensor->thermal;
597 const struct rockchip_tsadc_chip *tsadc = thermal->chip;
599 dev_dbg(&thermal->pdev->dev, "%s: sensor %d: low: %ld, high %ld\n",
600 __func__, sensor->id, low, high);
602 tsadc->set_alarm_temp(sensor->id, thermal->regs, high);
608 static int rockchip_thermal_get_temp(void *_sensor, long *out_temp)
610 struct rockchip_thermal_sensor *sensor = _sensor;
611 struct rockchip_thermal_data *thermal = sensor->thermal;
612 const struct rockchip_tsadc_chip *tsadc = sensor->thermal->chip;
615 retval = tsadc->get_temp(sensor->id, thermal->regs, out_temp);
616 dev_dbg(&thermal->pdev->dev, "sensor %d - temp: %ld, retval: %d\n",
617 sensor->id, *out_temp, retval);
622 static int rockchip_configure_from_dt(struct device *dev,
623 struct device_node *np,
624 struct rockchip_thermal_data *thermal)
626 u32 shut_temp, tshut_mode, tshut_polarity;
629 if(of_property_read_u32(np, "clock-frequency", &rate))
631 dev_err(dev, "Missing clock-frequency property in the DT.\n");
634 clk_set_rate(thermal->clk, rate);
636 if (of_property_read_u32(np, "hw-shut-temp", &shut_temp)) {
638 "Missing tshut temp property, using default %ld\n",
639 thermal->chip->hw_shut_temp);
640 thermal->hw_shut_temp = thermal->chip->hw_shut_temp;
642 thermal->hw_shut_temp = shut_temp;
645 if (thermal->hw_shut_temp > INT_MAX) {
646 dev_err(dev, "Invalid tshut temperature specified: %ld\n",
647 thermal->hw_shut_temp);
651 if (of_property_read_u32(np, "tsadc-tshut-mode", &tshut_mode)) {
653 "Missing tshut mode property, using default (%s)\n",
654 thermal->chip->tshut_mode == TSHUT_MODE_GPIO ?
656 thermal->tshut_mode = thermal->chip->tshut_mode;
658 thermal->tshut_mode = tshut_mode;
661 if (thermal->tshut_mode > 1) {
662 dev_err(dev, "Invalid tshut mode specified: %d\n",
663 thermal->tshut_mode);
667 if (of_property_read_u32(np, "tsadc-tshut-polarity", &tshut_polarity)) {
669 "Missing tshut-polarity property, using default (%s)\n",
670 thermal->chip->tshut_polarity == TSHUT_LOW_ACTIVE ?
672 thermal->tshut_polarity = thermal->chip->tshut_polarity;
674 thermal->tshut_polarity = tshut_polarity;
677 if (thermal->tshut_polarity > 1) {
678 dev_err(dev, "Invalid tshut-polarity specified: %d\n",
679 thermal->tshut_polarity);
687 rockchip_thermal_register_sensor(struct platform_device *pdev,
688 struct rockchip_thermal_data *thermal,
689 struct rockchip_thermal_sensor *sensor,
692 const struct rockchip_tsadc_chip *tsadc = thermal->chip;
695 tsadc->set_tshut_mode(id, thermal->regs, thermal->tshut_mode);
696 tsadc->set_tshut_temp(id, thermal->regs, thermal->hw_shut_temp);
698 sensor->thermal = thermal;
700 sensor->tzd = thermal_zone_of_sensor_register(&pdev->dev, id, sensor,
701 rockchip_thermal_get_temp,
703 if (IS_ERR(sensor->tzd)) {
704 error = PTR_ERR(sensor->tzd);
705 dev_err(&pdev->dev, "failed to register sensor %d: %d\n",
714 * Reset TSADC Controller, reset all tsadc registers.
716 static void rockchip_thermal_reset_controller(struct reset_control *reset)
718 reset_control_assert(reset);
719 usleep_range(10, 20);
720 reset_control_deassert(reset);
723 static struct rockchip_thermal_data *rockchip_thermal_get_data(void)
729 static int rockchip_thermal_user_mode_get_temp(struct rockchip_thermal_data *thermal,
730 int chn, int voltage)
734 #ifdef TSADC_CPU_GATE
735 int val_cpu, temp_cpu;
737 #ifdef TSADC_GPU_GATE
738 int val_gpu, temp_gpu;
741 local_irq_save(flags);
743 #ifdef TSADC_GPU_GATE
744 /*ret = regmap_write(thermal->cru, 0x210, 0x08000800);*/
745 ret = regmap_write(thermal->cru, 0x210, 0x09d809d8);
747 printk("Couldn't write to cru\n");
748 ret = regmap_write(thermal->cru, 0x214, 0x03000300);
750 printk("Couldn't write to cru\n");
753 /* CPU 24M slow mode*/
754 #ifdef TSADC_CPU_GATE
755 ret = regmap_write(thermal->cru, 0xc, 0x03000000);
757 printk("Couldn't write to cru\n");
758 ret = regmap_write(thermal->cru, 0x1c, 0x03000000);
760 printk("Couldn't write to cru\n");
762 udelay(TSADC_CLK_GATE_DELAY_TIME);
764 #ifdef TSADC_CPU_GATE
766 /*power up, channel 0*/
767 writel_relaxed(0x208, thermal->regs + TSADCV2_USER_CON);
772 val_cpu_pd = readl_relaxed(thermal->regs + TSADCV2_INT_PD);
773 udelay(TSADC_CLK_CYCLE_TIME);
774 if ((val_cpu_pd & 0x100) == 0x100) {
775 udelay(TSADC_USER_MODE_DELAY_TIME);
777 writel_relaxed(0x100, thermal->regs + TSADCV2_INT_PD);
779 val_cpu = readl_relaxed(thermal->regs + TSADCV2_DATA(0));
783 /*power down, channel 0*/
784 writel_relaxed(0x200, thermal->regs + TSADCV2_USER_CON);
787 #ifdef TSADC_GPU_GATE
791 /*power up, channel */
792 writel_relaxed(0x208 | 0x1, thermal->regs + TSADCV2_USER_CON);
797 val_gpu_pd = readl_relaxed(thermal->regs + TSADCV2_INT_PD);
798 udelay(TSADC_CLK_CYCLE_TIME);
799 if ((val_gpu_pd & 0x100) == 0x100) {
800 udelay(TSADC_USER_MODE_DELAY_TIME);
802 writel_relaxed(0x100, thermal->regs + TSADCV2_INT_PD);
804 val_gpu = readl_relaxed(thermal->regs + TSADCV2_DATA(1));
808 /*power down, channel */
809 writel_relaxed(0x200, thermal->regs + TSADCV2_USER_CON);
813 #ifdef TSADC_CPU_GATE
814 ret = regmap_write(thermal->cru, 0xc, 0x03000100);
816 printk("Couldn't write to cru\n");
817 ret = regmap_write(thermal->cru, 0x1c, 0x03000100);
819 printk("Couldn't write to cru\n");
823 #ifdef TSADC_GPU_GATE
824 ret = regmap_write(thermal->cru, 0x214, 0x03000000);
826 printk("Couldn't write to cru\n");
828 ret = regmap_write(thermal->cru, 0x210, 0x09d80000);
830 printk("Couldn't write to cru\n");
832 local_irq_restore(flags);
834 #ifdef TSADC_CPU_GATE
835 temp_cpu = rk_tsadcv3_code_to_temp((val_cpu * voltage + 500000) / 1000000) / 1000;
836 temp_cpu = temp_cpu - thermal->cpu_temp_adjust;
837 thermal->cpu_temp = temp_cpu;
839 printk("cpu[%d, %d], voltage: %d\n"
840 , val_cpu, temp_cpu, voltage);
846 int rockchip_tsadc_get_temp(int chn, int voltage)
848 struct rockchip_thermal_data *thermal = rockchip_thermal_get_data();
851 if (thermal->chip->mode == TSADC_AUTO_MODE)
853 thermal->chip->get_temp(chn, thermal->regs, &out_temp);
854 return (int)out_temp/1000;
858 if(thermal->b_suspend)
861 return rockchip_thermal_user_mode_get_temp(thermal, chn, voltage);
864 EXPORT_SYMBOL(rockchip_tsadc_get_temp);
866 static ssize_t rockchip_thermal_temp_adjust_test_store(struct kobject *kobj
867 , struct kobj_attribute *attr, const char *buf, size_t n)
869 struct rockchip_thermal_data *thermal = rockchip_thermal_get_data();
872 const char *buftmp = buf;
874 sscanf(buftmp, "%c ", &cmd);
877 sscanf(buftmp, "%c %d", &cmd, &getdata);
878 thermal->cpu_temp_adjust = getdata;
879 printk("get cpu_temp_adjust value = %d\n", getdata);
883 sscanf(buftmp, "%c %d", &cmd, &getdata);
884 thermal->gpu_temp_adjust = getdata;
885 printk("get gpu_temp_adjust value = %d\n", getdata);
889 printk("Unknown command\n");
896 static ssize_t rockchip_thermal_temp_adjust_test_show(struct kobject *kobj
897 , struct kobj_attribute *attr, char *buf)
899 struct rockchip_thermal_data *thermal = rockchip_thermal_get_data();
902 str += sprintf(str, "rockchip_thermal: cpu:%d, gpu:%d\n"
903 , thermal->cpu_temp_adjust, thermal->gpu_temp_adjust);
907 static ssize_t rockchip_thermal_temp_test_store(struct kobject *kobj
908 , struct kobj_attribute *attr, const char *buf, size_t n)
910 struct rockchip_thermal_data *thermal = rockchip_thermal_get_data();
912 const char *buftmp = buf;
914 sscanf(buftmp, "%c", &cmd);
917 thermal->logout = true;
920 thermal->logout = false;
923 printk("Unknown command\n");
930 static ssize_t rockchip_thermal_temp_test_show(struct kobject *kobj
931 , struct kobj_attribute *attr, char *buf)
933 struct rockchip_thermal_data *thermal = rockchip_thermal_get_data();
936 str += sprintf(str, "current cpu_temp:%d\n"
937 , thermal->cpu_temp);
941 struct rockchip_thermal_attribute {
942 struct attribute attr;
943 ssize_t (*show)(struct kobject *kobj, struct kobj_attribute *attr,
945 ssize_t (*store)(struct kobject *kobj, struct kobj_attribute *attr,
946 const char *buf, size_t n);
949 static struct rockchip_thermal_attribute rockchip_thermal_attrs[] = {
950 /*node_name permision show_func store_func*/
951 __ATTR(temp_adjust, S_IRUGO | S_IWUSR, rockchip_thermal_temp_adjust_test_show
952 , rockchip_thermal_temp_adjust_test_store),
953 __ATTR(temp, S_IRUGO | S_IWUSR, rockchip_thermal_temp_test_show
954 , rockchip_thermal_temp_test_store),
957 static int rockchip_thermal_probe(struct platform_device *pdev)
959 struct device_node *np = pdev->dev.of_node;
960 struct rockchip_thermal_data *thermal;
961 const struct of_device_id *match;
962 struct resource *res;
967 match = of_match_node(of_rockchip_thermal_match, np);
971 irq = platform_get_irq(pdev, 0);
973 dev_err(&pdev->dev, "no irq resource?\n");
977 thermal = devm_kzalloc(&pdev->dev, sizeof(struct rockchip_thermal_data),
982 thermal->pdev = pdev;
984 thermal->chip = (const struct rockchip_tsadc_chip *)match->data;
988 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
989 thermal->regs = devm_ioremap_resource(&pdev->dev, res);
990 if (IS_ERR(thermal->regs))
991 return PTR_ERR(thermal->regs);
993 thermal->reset = devm_reset_control_get(&pdev->dev, "tsadc-apb");
994 if (IS_ERR(thermal->reset)) {
995 error = PTR_ERR(thermal->reset);
996 dev_err(&pdev->dev, "failed to get tsadc reset: %d\n", error);
1000 thermal->cru = syscon_regmap_lookup_by_phandle(np, "rockchip,cru");
1001 if (IS_ERR(thermal->cru)) {
1002 dev_err(&pdev->dev, "couldn't find cru regmap\n");
1003 return PTR_ERR(thermal->cru);
1006 thermal->pmu = syscon_regmap_lookup_by_phandle(np, "rockchip,pmu");
1007 if (IS_ERR(thermal->pmu)) {
1008 dev_err(&pdev->dev, "couldn't find pmu regmap\n");
1009 return PTR_ERR(thermal->pmu);
1012 thermal->grf = syscon_regmap_lookup_by_phandle(np, "rockchip,grf");
1013 if (IS_ERR(thermal->grf)) {
1014 dev_err(&pdev->dev, "couldn't find grf regmap\n");
1015 return PTR_ERR(thermal->grf);
1018 thermal->clk = devm_clk_get(&pdev->dev, "tsadc");
1019 if (IS_ERR(thermal->clk)) {
1020 error = PTR_ERR(thermal->clk);
1021 dev_err(&pdev->dev, "failed to get tsadc clock: %d\n", error);
1025 thermal->pclk = devm_clk_get(&pdev->dev, "apb_pclk");
1026 if (IS_ERR(thermal->pclk)) {
1027 error = PTR_ERR(thermal->clk);
1028 dev_err(&pdev->dev, "failed to get apb_pclk clock: %d\n",
1033 error = clk_prepare_enable(thermal->clk);
1035 dev_err(&pdev->dev, "failed to enable converter clock: %d\n"
1040 error = clk_prepare_enable(thermal->pclk);
1042 dev_err(&pdev->dev, "failed to enable pclk: %d\n", error);
1043 goto err_disable_clk;
1046 rockchip_thermal_reset_controller(thermal->reset);
1047 error = rockchip_configure_from_dt(&pdev->dev, np, thermal);
1049 dev_err(&pdev->dev, "failed to parse device tree data: %d\n",
1051 goto err_disable_pclk;
1053 thermal->cpu_temp_adjust = rockchip_efuse_get_temp_adjust(0);
1054 if (thermal->chip->mode == TSADC_AUTO_MODE)
1056 thermal->chip->initialize(thermal->regs, thermal->tshut_polarity);
1057 error = rockchip_thermal_register_sensor(pdev, thermal,
1058 &thermal->sensors[0],
1059 thermal->chip->cpu_id);
1062 "failed to register CPU thermal sensor: %d\n", error);
1063 goto err_disable_pclk;
1066 error = rockchip_thermal_register_sensor(pdev, thermal,
1067 &thermal->sensors[1],
1068 thermal->chip->gpu_id);
1071 "failed to register GPU thermal sensor: %d\n", error);
1072 goto err_unregister_cpu_sensor;
1075 error = devm_request_threaded_irq(&pdev->dev, irq, NULL,
1076 &rockchip_thermal_alarm_irq_thread,
1078 "rockchip_thermal", thermal);
1081 "failed to request tsadc irq: %d\n", error);
1082 goto err_unregister_gpu_sensor;
1085 thermal->chip->control(thermal->regs, true);
1087 for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
1088 rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
1091 thermal->rockchip_thermal_kobj = kobject_create_and_add("rockchip_thermal", NULL);
1092 if (!thermal->rockchip_thermal_kobj)
1094 for (i = 0; i < ARRAY_SIZE(rockchip_thermal_attrs); i++) {
1095 error = sysfs_create_file(thermal->rockchip_thermal_kobj
1096 , &rockchip_thermal_attrs[i].attr);
1098 printk("create index %d error\n", i);
1103 s_thermal = thermal;
1104 platform_set_drvdata(pdev, thermal);
1108 err_unregister_gpu_sensor:
1109 if (thermal->chip->mode == TSADC_AUTO_MODE)
1110 thermal_zone_of_sensor_unregister(&pdev->dev, thermal->sensors[1].tzd);
1111 err_unregister_cpu_sensor:
1112 if (thermal->chip->mode == TSADC_AUTO_MODE)
1113 thermal_zone_of_sensor_unregister(&pdev->dev, thermal->sensors[0].tzd);
1115 clk_disable_unprepare(thermal->pclk);
1117 clk_disable_unprepare(thermal->clk);
1122 static int rockchip_thermal_remove(struct platform_device *pdev)
1124 struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
1127 if (thermal->chip->mode == TSADC_AUTO_MODE)
1129 for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++) {
1130 struct rockchip_thermal_sensor *sensor = &thermal->sensors[i];
1132 rockchip_thermal_toggle_sensor(sensor, false);
1133 thermal_zone_of_sensor_unregister(&pdev->dev, sensor->tzd);
1136 thermal->chip->control(thermal->regs, false);
1138 clk_disable_unprepare(thermal->pclk);
1139 clk_disable_unprepare(thermal->clk);
1144 static int __maybe_unused rockchip_thermal_suspend(struct device *dev)
1146 struct platform_device *pdev = to_platform_device(dev);
1147 struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
1150 thermal->b_suspend = true;
1151 if (thermal->chip->mode == TSADC_AUTO_MODE)
1153 for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
1154 rockchip_thermal_toggle_sensor(&thermal->sensors[i], false);
1156 thermal->chip->control(thermal->regs, false);
1158 clk_disable(thermal->pclk);
1159 clk_disable(thermal->clk);
1164 static int __maybe_unused rockchip_thermal_resume(struct device *dev)
1166 struct platform_device *pdev = to_platform_device(dev);
1167 struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
1171 error = clk_enable(thermal->clk);
1175 error = clk_enable(thermal->pclk);
1179 rockchip_thermal_reset_controller(thermal->reset);
1180 if (thermal->chip->mode == TSADC_AUTO_MODE)
1182 thermal->chip->initialize(thermal->regs, thermal->tshut_polarity);
1184 for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++) {
1185 int id = thermal->sensors[i].id;
1187 thermal->chip->set_tshut_mode(id, thermal->regs,
1188 thermal->tshut_mode);
1189 thermal->chip->set_tshut_temp(id, thermal->regs,
1190 thermal->hw_shut_temp);
1193 thermal->chip->control(thermal->regs, true);
1195 for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
1196 rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
1199 thermal->b_suspend = false;
1203 static SIMPLE_DEV_PM_OPS(rockchip_thermal_pm_ops,
1204 rockchip_thermal_suspend, rockchip_thermal_resume);
1206 static struct platform_driver rockchip_thermal_driver = {
1208 .name = "rockchip-thermal",
1209 .owner = THIS_MODULE,
1210 .pm = &rockchip_thermal_pm_ops,
1211 .of_match_table = of_rockchip_thermal_match,
1213 .probe = rockchip_thermal_probe,
1214 .remove = rockchip_thermal_remove,
1217 module_platform_driver(rockchip_thermal_driver);
1219 MODULE_DESCRIPTION("ROCKCHIP THERMAL Driver");
1220 MODULE_AUTHOR("Rockchip, Inc.");
1221 MODULE_LICENSE("GPL v2");
1222 MODULE_ALIAS("platform:rockchip-thermal");