2 * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 #include <linux/clk.h>
15 #include <linux/delay.h>
16 #include <linux/interrupt.h>
18 #include <linux/module.h>
20 #include <linux/of_address.h>
21 #include <linux/of_irq.h>
22 #include <linux/platform_device.h>
23 #include <linux/reset.h>
24 #include <linux/thermal.h>
25 #include <linux/timer.h>
26 #include <linux/mfd/syscon.h>
27 #include <linux/regmap.h>
28 #include <linux/gpio.h>
29 #include <linux/of_gpio.h>
30 #include <linux/rockchip/common.h>
31 #include <linux/reboot.h>
32 #include <linux/scpi_protocol.h>
33 #include "../../arch/arm/mach-rockchip/efuse.h"
36 #define thermal_dbg(dev, format, arg...) \
37 dev_printk(KERN_INFO , dev , format , ## arg)
39 #define thermal_dbg(dev, format, arg...)
44 * If the temperature over a period of time High,
45 * the resulting TSHUT gave CRU module,let it reset the entire chip,
46 * or via GPIO give PMIC.
59 * the system Temperature Sensors tshut(tshut) polarity
60 * the bit 8 is tshut polarity.
61 * 0: low active, 1: high active
69 * The system has three Temperature Sensors. channel 0 is reserved,
70 * channel 1 is for CPU, and channel 2 is for GPU.
79 struct rockchip_tsadc_chip {
81 enum tshut_mode tshut_mode;
82 enum tshut_polarity tshut_polarity;
87 /* Chip-wide methods */
88 void (*initialize)(void __iomem *reg, enum tshut_polarity p);
89 void (*irq_ack)(void __iomem *reg);
90 void (*control)(void __iomem *reg, bool on);
92 /* Per-sensor methods */
93 int (*get_temp)(int chn, void __iomem *reg, long *temp);
94 void (*set_alarm_temp)(int chn, void __iomem *reg, long temp);
95 void (*set_tshut_temp)(int chn, void __iomem *reg, long temp);
96 void (*set_tshut_mode)(int chn, void __iomem *reg, enum tshut_mode m);
99 struct rockchip_thermal_sensor {
100 struct rockchip_thermal_data *thermal;
101 struct thermal_zone_device *tzd;
105 #define NUM_SENSORS 2 /* Ignore unused sensor 0 */
107 struct rockchip_thermal_data {
108 const struct rockchip_tsadc_chip *chip;
109 struct kobject *rockchip_thermal_kobj;
110 struct platform_device *pdev;
111 struct reset_control *reset;
113 struct rockchip_thermal_sensor sensors[NUM_SENSORS];
126 struct mutex suspend_lock;
132 enum tshut_mode tshut_mode;
133 enum tshut_polarity tshut_polarity;
136 /* TSADC V2 Sensor info define: */
137 #define TSADCV2_USER_CON 0x00
138 #define TSADCV2_AUTO_CON 0x04
139 #define TSADCV2_INT_EN 0x08
140 #define TSADCV2_INT_PD 0x0c
141 #define TSADCV2_DATA(chn) (0x20 + (chn) * 0x04)
142 #define TSADCV2_COMP_INT(chn) (0x30 + (chn) * 0x04)
143 #define TSADCV2_COMP_SHUT(chn) (0x40 + (chn) * 0x04)
144 #define TSADCV2_HIGHT_INT_DEBOUNCE 0x60
145 #define TSADCV2_HIGHT_TSHUT_DEBOUNCE 0x64
146 #define TSADCV2_AUTO_PERIOD 0x68
147 #define TSADCV2_AUTO_PERIOD_HT 0x6c
149 #define TSADCV2_AUTO_EN BIT(0)
150 #define TSADCV2_AUTO_DISABLE ~BIT(0)
151 #define TSADCV2_AUTO_SRC_EN(chn) BIT(4 + (chn))
152 #define TSADCV2_AUTO_TSHUT_POLARITY_HIGH BIT(8)
153 #define TSADCV2_AUTO_TSHUT_POLARITY_LOW ~BIT(8)
155 #define TSADCV2_INT_SRC_EN(chn) BIT(chn)
156 #define TSADCV2_SHUT_2GPIO_SRC_EN(chn) BIT(4 + (chn))
157 #define TSADCV2_SHUT_2CRU_SRC_EN(chn) BIT(8 + (chn))
159 #define TSADCV2_INT_PD_CLEAR ~BIT(8)
161 #define TSADCV2_DATA_MASK 0xfff
162 #define TSADCV3_DATA_MASK 0x3ff
164 #define TSADCV2_HIGHT_INT_DEBOUNCE_COUNT 4
165 #define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT 4
167 #define TSADCV2_AUTO_PERIOD_TIME 250 /* msec */
168 #define TSADCV2_AUTO_PERIOD_HT_TIME 50 /* msec */
169 #define TSADCV3_AUTO_PERIOD_TIME 1500 /* msec */
170 #define TSADCV3_AUTO_PERIOD_HT_TIME 1000 /* msec */
173 #define TSADC_TEST_SAMPLE_TIME 200/* msec */
175 #define TSADC_MAX_HW_SHUT_TEMP_COUNT 3
181 static struct rockchip_thermal_data *s_thermal = NULL;
182 static const struct tsadc_table v2_code_table[] = {
183 {TSADCV2_DATA_MASK, -40000},
221 static const struct tsadc_table v3_code_table[] = {
257 {TSADCV3_DATA_MASK, 125000},
260 static u32 rk_tsadcv2_temp_to_code(long temp)
265 high = ARRAY_SIZE(v2_code_table) - 1;
266 mid = (high + low) / 2;
268 if (temp < v2_code_table[low].temp || temp > v2_code_table[high].temp)
271 while (low <= high) {
272 if (temp == v2_code_table[mid].temp)
273 return v2_code_table[mid].code;
274 else if (temp < v2_code_table[mid].temp)
278 mid = (low + high) / 2;
284 static long rk_tsadcv2_code_to_temp(u32 code)
289 high = ARRAY_SIZE(v2_code_table) - 1;
290 mid = (high + low) / 2;
292 if (code > v2_code_table[low].code || code < v2_code_table[high].code)
293 return 125000; /* No code available, return max temperature */
295 while (low <= high) {
296 if (code >= v2_code_table[mid].code && code <
297 v2_code_table[mid - 1].code)
298 return v2_code_table[mid].temp;
299 else if (code < v2_code_table[mid].code)
303 mid = (low + high) / 2;
309 static u32 rk_tsadcv3_temp_to_code(long temp)
315 high = ARRAY_SIZE(v3_code_table) - 1;
316 mid = (high + low) / 2;
318 if (temp < v3_code_table[low].temp || temp > v3_code_table[high].temp)
321 while (low <= high) {
322 if (temp == v3_code_table[mid].temp)
323 return v3_code_table[mid].code;
324 else if (temp < v3_code_table[mid].temp)
328 mid = (low + high) / 2;
334 static long rk_tsadcv3_code_to_temp(u32 code)
339 high = ARRAY_SIZE(v3_code_table) - 1;
340 mid = (high + low) / 2;
342 if (code < v3_code_table[low].code || code > v3_code_table[high].code)
343 return 125000; /* No code available, return max temperature */
345 while (low <= high) {
346 if (code <= v3_code_table[mid].code && code >
347 v3_code_table[mid - 1].code) {
348 return v3_code_table[mid - 1].temp + (v3_code_table[mid].temp -
349 v3_code_table[mid - 1].temp) * (code - v3_code_table[mid - 1].code)
350 / (v3_code_table[mid].code - v3_code_table[mid - 1].code);
351 } else if (code > v3_code_table[mid].code)
355 mid = (low + high) / 2;
362 * rk_tsadcv2_initialize - initialize TASDC Controller
363 * (1) Set TSADCV2_AUTO_PERIOD, configure the interleave between
364 * every two accessing of TSADC in normal operation.
365 * (2) Set TSADCV2_AUTO_PERIOD_HT, configure the interleave between
366 * every two accessing of TSADC after the temperature is higher
367 * than COM_SHUT or COM_INT.
368 * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE,
369 * if the temperature is higher than COMP_INT or COMP_SHUT for
370 * "debounce" times, TSADC controller will generate interrupt or TSHUT.
372 static void rk_tsadcv2_initialize(void __iomem *regs,
373 enum tshut_polarity tshut_polarity)
375 if (tshut_polarity == TSHUT_HIGH_ACTIVE)
376 writel_relaxed(0 | (TSADCV2_AUTO_TSHUT_POLARITY_HIGH),
377 regs + TSADCV2_AUTO_CON);
379 writel_relaxed(TSADCV2_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD);
380 writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
381 regs + TSADCV2_HIGHT_INT_DEBOUNCE);
382 writel_relaxed(TSADCV2_AUTO_PERIOD_HT_TIME,
383 regs + TSADCV2_AUTO_PERIOD_HT);
384 writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
385 regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
388 static void rk_tsadcv3_initialize(void __iomem *regs,
389 enum tshut_polarity tshut_polarity)
391 if (tshut_polarity == TSHUT_HIGH_ACTIVE)
392 writel_relaxed(0 | (TSADCV2_AUTO_TSHUT_POLARITY_HIGH),
393 regs + TSADCV2_AUTO_CON);
395 writel_relaxed(TSADCV3_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD);
396 writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
397 regs + TSADCV2_HIGHT_INT_DEBOUNCE);
398 writel_relaxed(TSADCV3_AUTO_PERIOD_HT_TIME,
399 regs + TSADCV2_AUTO_PERIOD_HT);
400 writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
401 regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
404 static void rk_tsadcv2_irq_ack(void __iomem *regs)
408 val = readl_relaxed(regs + TSADCV2_INT_PD);
409 writel_relaxed(val & TSADCV2_INT_PD_CLEAR, regs + TSADCV2_INT_PD);
412 static void rk_tsadcv2_control(void __iomem *regs, bool enable)
416 val = readl_relaxed(regs + TSADCV2_AUTO_CON);
418 val |= TSADCV2_AUTO_EN;
420 val &= ~TSADCV2_AUTO_EN;
422 writel_relaxed(val, regs + TSADCV2_AUTO_CON);
425 static int rk_tsadcv2_get_temp(int chn, void __iomem *regs, long *temp)
429 /* the A/D value of the channel last conversion need some time */
430 val = readl_relaxed(regs + TSADCV2_DATA(chn));
434 *temp = rk_tsadcv2_code_to_temp(val);
439 static void rk_tsadcv2_alarm_temp(int chn, void __iomem *regs, long temp)
441 u32 alarm_value, int_en;
443 alarm_value = rk_tsadcv2_temp_to_code(temp);
444 writel_relaxed(alarm_value & TSADCV2_DATA_MASK,
445 regs + TSADCV2_COMP_INT(chn));
447 int_en = readl_relaxed(regs + TSADCV2_INT_EN);
448 int_en |= TSADCV2_INT_SRC_EN(chn);
449 writel_relaxed(int_en, regs + TSADCV2_INT_EN);
452 static void rk_tsadcv2_tshut_temp(int chn, void __iomem *regs, long temp)
454 u32 tshut_value, val;
456 tshut_value = rk_tsadcv2_temp_to_code(temp);
457 writel_relaxed(tshut_value, regs + TSADCV2_COMP_SHUT(chn));
459 /* TSHUT will be valid */
460 val = readl_relaxed(regs + TSADCV2_AUTO_CON);
461 writel_relaxed(val | TSADCV2_AUTO_SRC_EN(chn), regs + TSADCV2_AUTO_CON);
464 static int rk_tsadcv3_get_temp(int chn, void __iomem *regs, long *temp)
468 /* the A/D value of the channel last conversion need some time */
469 val = readl_relaxed(regs + TSADCV2_DATA(chn));
473 *temp = rk_tsadcv3_code_to_temp(val);
478 static void rk_tsadcv3_alarm_temp(int chn, void __iomem *regs, long temp)
480 u32 alarm_value, int_en;
482 alarm_value = rk_tsadcv3_temp_to_code(temp);
483 writel_relaxed(alarm_value & TSADCV2_DATA_MASK,
484 regs + TSADCV2_COMP_INT(chn));
486 int_en = readl_relaxed(regs + TSADCV2_INT_EN);
487 int_en |= TSADCV2_INT_SRC_EN(chn);
488 writel_relaxed(int_en, regs + TSADCV2_INT_EN);
491 static void rk_tsadcv3_tshut_temp(int chn, void __iomem *regs, long temp)
493 u32 tshut_value, val;
495 tshut_value = rk_tsadcv3_temp_to_code(temp);
496 writel_relaxed(tshut_value, regs + TSADCV2_COMP_SHUT(chn));
498 /* TSHUT will be valid */
499 val = readl_relaxed(regs + TSADCV2_AUTO_CON);
500 writel_relaxed(val | TSADCV2_AUTO_SRC_EN(chn), regs + TSADCV2_AUTO_CON);
503 static void rk_tsadcv2_tshut_mode(int chn, void __iomem *regs,
504 enum tshut_mode mode)
508 val = readl_relaxed(regs + TSADCV2_INT_EN);
509 if (mode == TSHUT_MODE_GPIO) {
510 val &= ~TSADCV2_SHUT_2CRU_SRC_EN(chn);
511 val |= TSADCV2_SHUT_2GPIO_SRC_EN(chn);
513 val &= ~TSADCV2_SHUT_2GPIO_SRC_EN(chn);
514 val |= TSADCV2_SHUT_2CRU_SRC_EN(chn);
517 writel_relaxed(val, regs + TSADCV2_INT_EN);
520 static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
521 .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
522 .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
523 .hw_shut_temp = 125000,
524 .mode = TSADC_AUTO_MODE,
528 .initialize = rk_tsadcv2_initialize,
529 .irq_ack = rk_tsadcv2_irq_ack,
530 .control = rk_tsadcv2_control,
531 .get_temp = rk_tsadcv2_get_temp,
532 .set_alarm_temp = rk_tsadcv2_alarm_temp,
533 .set_tshut_temp = rk_tsadcv2_tshut_temp,
534 .set_tshut_mode = rk_tsadcv2_tshut_mode,
537 static const struct rockchip_tsadc_chip rk3368_tsadc_data = {
538 .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
539 .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
540 .hw_shut_temp = 125000,
541 .mode = TSHUT_USER_MODE,
545 .initialize = rk_tsadcv3_initialize,
546 .irq_ack = rk_tsadcv2_irq_ack,
547 .control = rk_tsadcv2_control,
548 .get_temp = rk_tsadcv3_get_temp,
549 .set_alarm_temp = rk_tsadcv3_alarm_temp,
550 .set_tshut_temp = rk_tsadcv3_tshut_temp,
551 .set_tshut_mode = rk_tsadcv2_tshut_mode,
554 static const struct of_device_id of_rockchip_thermal_match[] = {
556 .compatible = "rockchip,rk3288-tsadc",
557 .data = (void *)&rk3288_tsadc_data,
560 .compatible = "rockchip,rk3368-tsadc",
561 .data = (void *)&rk3368_tsadc_data,
565 MODULE_DEVICE_TABLE(of, of_rockchip_thermal_match);
567 static void rockchip_thermal_toggle_sensor(struct rockchip_thermal_sensor *sensor
570 struct thermal_zone_device *tzd = sensor->tzd;
572 tzd->ops->set_mode(tzd,
573 on ? THERMAL_DEVICE_ENABLED : THERMAL_DEVICE_DISABLED);
576 static irqreturn_t rockchip_thermal_alarm_irq_thread(int irq, void *dev)
578 struct rockchip_thermal_data *thermal = dev;
581 dev_dbg(&thermal->pdev->dev, "thermal alarm\n");
583 thermal->chip->irq_ack(thermal->regs);
585 for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
586 thermal_zone_device_update(thermal->sensors[i].tzd);
592 static int rockchip_thermal_set_trips(void *_sensor, long low, long high)
594 struct rockchip_thermal_sensor *sensor = _sensor;
595 struct rockchip_thermal_data *thermal = sensor->thermal;
596 const struct rockchip_tsadc_chip *tsadc = thermal->chip;
598 dev_dbg(&thermal->pdev->dev, "%s: sensor %d: low: %ld, high %ld\n",
599 __func__, sensor->id, low, high);
601 tsadc->set_alarm_temp(sensor->id, thermal->regs, high);
607 static int rockchip_thermal_get_temp(void *_sensor, long *out_temp)
609 struct rockchip_thermal_sensor *sensor = _sensor;
610 struct rockchip_thermal_data *thermal = sensor->thermal;
611 const struct rockchip_tsadc_chip *tsadc = sensor->thermal->chip;
614 retval = tsadc->get_temp(sensor->id, thermal->regs, out_temp);
615 dev_dbg(&thermal->pdev->dev, "sensor %d - temp: %ld, retval: %d\n",
616 sensor->id, *out_temp, retval);
621 static int rockchip_configure_from_dt(struct device *dev,
622 struct device_node *np,
623 struct rockchip_thermal_data *thermal)
625 u32 shut_temp, tshut_mode, tshut_polarity;
628 if(of_property_read_u32(np, "clock-frequency", &rate))
630 dev_err(dev, "Missing clock-frequency property in the DT.\n");
633 clk_set_rate(thermal->clk, rate);
635 if (of_property_read_u32(np, "hw-shut-temp", &shut_temp)) {
637 "Missing tshut temp property, using default %ld\n",
638 thermal->chip->hw_shut_temp);
639 thermal->hw_shut_temp = thermal->chip->hw_shut_temp;
641 thermal->hw_shut_temp = shut_temp;
644 if (thermal->hw_shut_temp > INT_MAX) {
645 dev_err(dev, "Invalid tshut temperature specified: %ld\n",
646 thermal->hw_shut_temp);
650 if (of_property_read_u32(np, "tsadc-tshut-mode", &tshut_mode)) {
652 "Missing tshut mode property, using default (%s)\n",
653 thermal->chip->tshut_mode == TSHUT_MODE_GPIO ?
655 thermal->tshut_mode = thermal->chip->tshut_mode;
657 thermal->tshut_mode = tshut_mode;
660 if (thermal->tshut_mode > 1) {
661 dev_err(dev, "Invalid tshut mode specified: %d\n",
662 thermal->tshut_mode);
666 if (of_property_read_u32(np, "tsadc-tshut-polarity", &tshut_polarity)) {
668 "Missing tshut-polarity property, using default (%s)\n",
669 thermal->chip->tshut_polarity == TSHUT_LOW_ACTIVE ?
671 thermal->tshut_polarity = thermal->chip->tshut_polarity;
673 thermal->tshut_polarity = tshut_polarity;
676 if (thermal->tshut_polarity > 1) {
677 dev_err(dev, "Invalid tshut-polarity specified: %d\n",
678 thermal->tshut_polarity);
686 rockchip_thermal_register_sensor(struct platform_device *pdev,
687 struct rockchip_thermal_data *thermal,
688 struct rockchip_thermal_sensor *sensor,
691 const struct rockchip_tsadc_chip *tsadc = thermal->chip;
694 tsadc->set_tshut_mode(id, thermal->regs, thermal->tshut_mode);
695 tsadc->set_tshut_temp(id, thermal->regs, thermal->hw_shut_temp);
697 sensor->thermal = thermal;
699 sensor->tzd = thermal_zone_of_sensor_register(&pdev->dev, id, sensor,
700 rockchip_thermal_get_temp,
702 if (IS_ERR(sensor->tzd)) {
703 error = PTR_ERR(sensor->tzd);
704 dev_err(&pdev->dev, "failed to register sensor %d: %d\n",
713 * Reset TSADC Controller, reset all tsadc registers.
715 static void rockchip_thermal_reset_controller(struct reset_control *reset)
717 reset_control_assert(reset);
718 usleep_range(10, 20);
719 reset_control_deassert(reset);
722 static struct rockchip_thermal_data *rockchip_thermal_get_data(void)
728 int rockchip_tsadc_get_temp(int chn, int voltage)
730 struct rockchip_thermal_data *thermal = rockchip_thermal_get_data();
736 mutex_lock(&thermal->suspend_lock);
737 if(thermal->b_suspend) {
739 mutex_unlock(&thermal->suspend_lock);
743 if (thermal->chip->mode == TSADC_AUTO_MODE)
745 thermal->chip->get_temp(chn, thermal->regs, &out_temp);
746 temp = (int)out_temp/1000;
749 tsadc_data = scpi_thermal_get_temperature();
750 code_temp = (tsadc_data * voltage + 500000) / 1000000;
751 temp = rk_tsadcv3_code_to_temp(code_temp) / 1000;
752 temp = temp - thermal->cpu_temp_adjust;
753 thermal->cpu_temp = temp;
755 printk("cpu temp:[%d], voltage: %d\n"
758 if (temp > thermal->hw_shut_temp / 1000)
759 thermal->shuttemp_count++;
761 thermal->shuttemp_count = 0;
762 if (thermal->shuttemp_count >= TSADC_MAX_HW_SHUT_TEMP_COUNT) {
763 dev_err(&thermal->pdev->dev,
764 "critical temperature reached(%ld C),shutting down\n",
765 thermal->hw_shut_temp / 1000);
766 orderly_poweroff(true);
769 mutex_unlock(&thermal->suspend_lock);
773 EXPORT_SYMBOL(rockchip_tsadc_get_temp);
775 static ssize_t rockchip_thermal_temp_adjust_test_store(struct kobject *kobj
776 , struct kobj_attribute *attr, const char *buf, size_t n)
778 struct rockchip_thermal_data *thermal = rockchip_thermal_get_data();
781 const char *buftmp = buf;
783 sscanf(buftmp, "%c ", &cmd);
786 sscanf(buftmp, "%c %d", &cmd, &getdata);
787 thermal->cpu_temp_adjust = getdata;
788 printk("get cpu_temp_adjust value = %d\n", getdata);
792 sscanf(buftmp, "%c %d", &cmd, &getdata);
793 thermal->gpu_temp_adjust = getdata;
794 printk("get gpu_temp_adjust value = %d\n", getdata);
798 printk("Unknown command\n");
805 static ssize_t rockchip_thermal_temp_adjust_test_show(struct kobject *kobj
806 , struct kobj_attribute *attr, char *buf)
808 struct rockchip_thermal_data *thermal = rockchip_thermal_get_data();
811 str += sprintf(str, "rockchip_thermal: cpu:%d, gpu:%d\n"
812 , thermal->cpu_temp_adjust, thermal->gpu_temp_adjust);
816 static ssize_t rockchip_thermal_temp_test_store(struct kobject *kobj
817 , struct kobj_attribute *attr, const char *buf, size_t n)
819 struct rockchip_thermal_data *thermal = rockchip_thermal_get_data();
821 const char *buftmp = buf;
823 sscanf(buftmp, "%c", &cmd);
826 thermal->logout = true;
829 thermal->logout = false;
832 printk("Unknown command\n");
839 static ssize_t rockchip_thermal_temp_test_show(struct kobject *kobj
840 , struct kobj_attribute *attr, char *buf)
842 struct rockchip_thermal_data *thermal = rockchip_thermal_get_data();
845 str += sprintf(str, "current cpu_temp:%d\n"
846 , thermal->cpu_temp);
850 struct rockchip_thermal_attribute {
851 struct attribute attr;
852 ssize_t (*show)(struct kobject *kobj, struct kobj_attribute *attr,
854 ssize_t (*store)(struct kobject *kobj, struct kobj_attribute *attr,
855 const char *buf, size_t n);
858 static struct rockchip_thermal_attribute rockchip_thermal_attrs[] = {
859 /*node_name permision show_func store_func*/
860 __ATTR(temp_adjust, S_IRUGO | S_IWUSR, rockchip_thermal_temp_adjust_test_show
861 , rockchip_thermal_temp_adjust_test_store),
862 __ATTR(temp, S_IRUGO | S_IWUSR, rockchip_thermal_temp_test_show
863 , rockchip_thermal_temp_test_store),
866 static int rockchip_thermal_probe(struct platform_device *pdev)
868 struct device_node *np = pdev->dev.of_node;
869 struct rockchip_thermal_data *thermal;
870 const struct of_device_id *match;
871 struct resource *res;
876 match = of_match_node(of_rockchip_thermal_match, np);
880 irq = platform_get_irq(pdev, 0);
882 dev_err(&pdev->dev, "no irq resource?\n");
886 thermal = devm_kzalloc(&pdev->dev, sizeof(struct rockchip_thermal_data),
891 thermal->pdev = pdev;
893 thermal->chip = (const struct rockchip_tsadc_chip *)match->data;
897 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
898 thermal->regs = devm_ioremap_resource(&pdev->dev, res);
899 if (IS_ERR(thermal->regs))
900 return PTR_ERR(thermal->regs);
902 thermal->reset = devm_reset_control_get(&pdev->dev, "tsadc-apb");
903 if (IS_ERR(thermal->reset)) {
904 error = PTR_ERR(thermal->reset);
905 dev_err(&pdev->dev, "failed to get tsadc reset: %d\n", error);
909 thermal->cru = syscon_regmap_lookup_by_phandle(np, "rockchip,cru");
910 if (IS_ERR(thermal->cru)) {
911 dev_err(&pdev->dev, "couldn't find cru regmap\n");
912 return PTR_ERR(thermal->cru);
915 thermal->pmu = syscon_regmap_lookup_by_phandle(np, "rockchip,pmu");
916 if (IS_ERR(thermal->pmu)) {
917 dev_err(&pdev->dev, "couldn't find pmu regmap\n");
918 return PTR_ERR(thermal->pmu);
921 thermal->grf = syscon_regmap_lookup_by_phandle(np, "rockchip,grf");
922 if (IS_ERR(thermal->grf)) {
923 dev_err(&pdev->dev, "couldn't find grf regmap\n");
924 return PTR_ERR(thermal->grf);
927 thermal->clk = devm_clk_get(&pdev->dev, "tsadc");
928 if (IS_ERR(thermal->clk)) {
929 error = PTR_ERR(thermal->clk);
930 dev_err(&pdev->dev, "failed to get tsadc clock: %d\n", error);
934 thermal->pclk = devm_clk_get(&pdev->dev, "apb_pclk");
935 if (IS_ERR(thermal->pclk)) {
936 error = PTR_ERR(thermal->clk);
937 dev_err(&pdev->dev, "failed to get apb_pclk clock: %d\n",
942 error = clk_prepare_enable(thermal->clk);
944 dev_err(&pdev->dev, "failed to enable converter clock: %d\n"
949 error = clk_prepare_enable(thermal->pclk);
951 dev_err(&pdev->dev, "failed to enable pclk: %d\n", error);
952 goto err_disable_clk;
955 rockchip_thermal_reset_controller(thermal->reset);
956 error = rockchip_configure_from_dt(&pdev->dev, np, thermal);
958 dev_err(&pdev->dev, "failed to parse device tree data: %d\n",
960 goto err_disable_pclk;
962 thermal->cpu_temp_adjust = rockchip_efuse_get_temp_adjust(0);
963 if (thermal->chip->mode == TSADC_AUTO_MODE)
965 thermal->chip->initialize(thermal->regs, thermal->tshut_polarity);
966 error = rockchip_thermal_register_sensor(pdev, thermal,
967 &thermal->sensors[0],
968 thermal->chip->cpu_id);
971 "failed to register CPU thermal sensor: %d\n", error);
972 goto err_disable_pclk;
975 error = rockchip_thermal_register_sensor(pdev, thermal,
976 &thermal->sensors[1],
977 thermal->chip->gpu_id);
980 "failed to register GPU thermal sensor: %d\n", error);
981 goto err_unregister_cpu_sensor;
984 error = devm_request_threaded_irq(&pdev->dev, irq, NULL,
985 &rockchip_thermal_alarm_irq_thread,
987 "rockchip_thermal", thermal);
990 "failed to request tsadc irq: %d\n", error);
991 goto err_unregister_gpu_sensor;
994 thermal->chip->control(thermal->regs, true);
996 for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
997 rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
1000 thermal->rockchip_thermal_kobj = kobject_create_and_add("rockchip_thermal", NULL);
1001 if (!thermal->rockchip_thermal_kobj)
1003 for (i = 0; i < ARRAY_SIZE(rockchip_thermal_attrs); i++) {
1004 error = sysfs_create_file(thermal->rockchip_thermal_kobj
1005 , &rockchip_thermal_attrs[i].attr);
1007 printk("create index %d error\n", i);
1012 mutex_init(&thermal->suspend_lock);
1013 s_thermal = thermal;
1014 platform_set_drvdata(pdev, thermal);
1018 err_unregister_gpu_sensor:
1019 if (thermal->chip->mode == TSADC_AUTO_MODE)
1020 thermal_zone_of_sensor_unregister(&pdev->dev, thermal->sensors[1].tzd);
1021 err_unregister_cpu_sensor:
1022 if (thermal->chip->mode == TSADC_AUTO_MODE)
1023 thermal_zone_of_sensor_unregister(&pdev->dev, thermal->sensors[0].tzd);
1025 clk_disable_unprepare(thermal->pclk);
1027 clk_disable_unprepare(thermal->clk);
1032 static int rockchip_thermal_remove(struct platform_device *pdev)
1034 struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
1037 if (thermal->chip->mode == TSADC_AUTO_MODE)
1039 for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++) {
1040 struct rockchip_thermal_sensor *sensor = &thermal->sensors[i];
1042 rockchip_thermal_toggle_sensor(sensor, false);
1043 thermal_zone_of_sensor_unregister(&pdev->dev, sensor->tzd);
1046 thermal->chip->control(thermal->regs, false);
1048 clk_disable_unprepare(thermal->pclk);
1049 clk_disable_unprepare(thermal->clk);
1054 static int __maybe_unused rockchip_thermal_suspend(struct device *dev)
1056 struct platform_device *pdev = to_platform_device(dev);
1057 struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
1060 mutex_lock(&thermal->suspend_lock);
1061 thermal->b_suspend = true;
1062 if (thermal->chip->mode == TSADC_AUTO_MODE)
1064 for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
1065 rockchip_thermal_toggle_sensor(&thermal->sensors[i], false);
1067 thermal->chip->control(thermal->regs, false);
1069 clk_disable(thermal->pclk);
1070 clk_disable(thermal->clk);
1071 mutex_unlock(&thermal->suspend_lock);
1076 static int __maybe_unused rockchip_thermal_resume(struct device *dev)
1078 struct platform_device *pdev = to_platform_device(dev);
1079 struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
1083 mutex_lock(&thermal->suspend_lock);
1084 error = clk_enable(thermal->clk);
1086 mutex_unlock(&thermal->suspend_lock);
1090 error = clk_enable(thermal->pclk);
1092 mutex_unlock(&thermal->suspend_lock);
1096 rockchip_thermal_reset_controller(thermal->reset);
1097 if (thermal->chip->mode == TSADC_AUTO_MODE)
1099 thermal->chip->initialize(thermal->regs, thermal->tshut_polarity);
1101 for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++) {
1102 int id = thermal->sensors[i].id;
1104 thermal->chip->set_tshut_mode(id, thermal->regs,
1105 thermal->tshut_mode);
1106 thermal->chip->set_tshut_temp(id, thermal->regs,
1107 thermal->hw_shut_temp);
1110 thermal->chip->control(thermal->regs, true);
1112 for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
1113 rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
1116 thermal->b_suspend = false;
1117 mutex_unlock(&thermal->suspend_lock);
1122 static SIMPLE_DEV_PM_OPS(rockchip_thermal_pm_ops,
1123 rockchip_thermal_suspend, rockchip_thermal_resume);
1125 static struct platform_driver rockchip_thermal_driver = {
1127 .name = "rockchip-thermal",
1128 .owner = THIS_MODULE,
1129 .pm = &rockchip_thermal_pm_ops,
1130 .of_match_table = of_rockchip_thermal_match,
1132 .probe = rockchip_thermal_probe,
1133 .remove = rockchip_thermal_remove,
1136 module_platform_driver(rockchip_thermal_driver);
1138 MODULE_DESCRIPTION("ROCKCHIP THERMAL Driver");
1139 MODULE_AUTHOR("Rockchip, Inc.");
1140 MODULE_LICENSE("GPL v2");
1141 MODULE_ALIAS("platform:rockchip-thermal");