2 * Copyright (c) 2014-2016, Fuzhou Rockchip Electronics Co., Ltd
3 * Caesar Wang <wxt@rock-chips.com>
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 #include <linux/clk.h>
16 #include <linux/delay.h>
17 #include <linux/interrupt.h>
19 #include <linux/module.h>
21 #include <linux/of_address.h>
22 #include <linux/of_irq.h>
23 #include <linux/platform_device.h>
24 #include <linux/regmap.h>
25 #include <linux/reset.h>
26 #include <linux/thermal.h>
27 #include <linux/mfd/syscon.h>
28 #include <linux/pinctrl/consumer.h>
31 * If the temperature over a period of time High,
32 * the resulting TSHUT gave CRU module,let it reset the entire chip,
33 * or via GPIO give PMIC.
41 * The system Temperature Sensors tshut(tshut) polarity
42 * the bit 8 is tshut polarity.
43 * 0: low active, 1: high active
51 * The system has two Temperature Sensors.
52 * sensor0 is for CPU, and sensor1 is for GPU.
60 * The conversion table has the adc value and temperature.
61 * ADC_DECREMENT: the adc value is of diminishing.(e.g. rk3288_code_table)
62 * ADC_INCREMENT: the adc value is incremental.(e.g. rk3368_code_table)
70 * The max sensors is two in rockchip SoCs.
71 * Two sensors: CPU and GPU sensor.
73 #define SOC_MAX_SENSORS 2
76 * struct chip_tsadc_table - hold information about chip-specific differences
77 * @id: conversion table
78 * @length: size of conversion table
79 * @data_mask: mask to apply on data inputs
80 * @mode: sort mode of this adc variant (incrementing or decrementing)
82 struct chip_tsadc_table {
83 const struct tsadc_table *id;
86 enum adc_sort_mode mode;
90 * struct rockchip_tsadc_chip - hold the private data of tsadc chip
91 * @chn_id[SOC_MAX_SENSORS]: the sensor id of chip correspond to the channel
92 * @chn_num: the channel number of tsadc chip
93 * @tshut_temp: the hardware-controlled shutdown temperature value
94 * @tshut_mode: the hardware-controlled shutdown mode (0:CRU 1:GPIO)
95 * @tshut_polarity: the hardware-controlled active polarity (0:LOW 1:HIGH)
96 * @initialize: SoC special initialize tsadc controller method
97 * @irq_ack: clear the interrupt
98 * @get_temp: get the temperature
99 * @set_alarm_temp: set the high temperature interrupt
100 * @set_tshut_temp: set the hardware-controlled shutdown temperature
101 * @set_tshut_mode: set the hardware-controlled shutdown mode
102 * @table: the chip-specific conversion table
104 struct rockchip_tsadc_chip {
105 /* The sensor id of chip correspond to the ADC channel */
106 int chn_id[SOC_MAX_SENSORS];
109 /* The hardware-controlled tshut property */
111 enum tshut_mode tshut_mode;
112 enum tshut_polarity tshut_polarity;
114 /* Chip-wide methods */
115 void (*initialize)(struct regmap *grf,
116 void __iomem *reg, enum tshut_polarity p);
117 void (*irq_ack)(void __iomem *reg);
118 void (*control)(void __iomem *reg, bool on);
120 /* Per-sensor methods */
121 int (*get_temp)(struct chip_tsadc_table table,
122 int chn, void __iomem *reg, int *temp);
123 void (*set_alarm_temp)(struct chip_tsadc_table table,
124 int chn, void __iomem *reg, int temp);
125 void (*set_tshut_temp)(struct chip_tsadc_table table,
126 int chn, void __iomem *reg, int temp);
127 void (*set_tshut_mode)(int chn, void __iomem *reg, enum tshut_mode m);
129 /* Per-table methods */
130 struct chip_tsadc_table table;
134 * struct rockchip_thermal_sensor - hold the information of thermal sensor
135 * @thermal: pointer to the platform/configuration data
136 * @tzd: pointer to a thermal zone
137 * @id: identifier of the thermal sensor
139 struct rockchip_thermal_sensor {
140 struct rockchip_thermal_data *thermal;
141 struct thermal_zone_device *tzd;
146 * struct rockchip_thermal_data - hold the private data of thermal driver
147 * @chip: pointer to the platform/configuration data
148 * @pdev: platform device of thermal
149 * @reset: the reset controller of tsadc
150 * @sensors[SOC_MAX_SENSORS]: the thermal sensor
151 * @clk: the controller clock is divided by the exteral 24MHz
152 * @pclk: the advanced peripherals bus clock
153 * @grf: the general register file will be used to do static set by software
154 * @regs: the base address of tsadc controller
155 * @tshut_temp: the hardware-controlled shutdown temperature value
156 * @tshut_mode: the hardware-controlled shutdown mode (0:CRU 1:GPIO)
157 * @tshut_polarity: the hardware-controlled active polarity (0:LOW 1:HIGH)
159 struct rockchip_thermal_data {
160 const struct rockchip_tsadc_chip *chip;
161 struct platform_device *pdev;
162 struct reset_control *reset;
164 struct rockchip_thermal_sensor sensors[SOC_MAX_SENSORS];
173 enum tshut_mode tshut_mode;
174 enum tshut_polarity tshut_polarity;
178 * TSADC Sensor Register description:
180 * TSADCV2_* are used for RK3288 SoCs, the other chips can reuse it.
181 * TSADCV3_* are used for newer SoCs than RK3288. (e.g: RK3228, RK3399)
184 #define TSADCV2_USER_CON 0x00
185 #define TSADCV2_AUTO_CON 0x04
186 #define TSADCV2_INT_EN 0x08
187 #define TSADCV2_INT_PD 0x0c
188 #define TSADCV2_DATA(chn) (0x20 + (chn) * 0x04)
189 #define TSADCV2_COMP_INT(chn) (0x30 + (chn) * 0x04)
190 #define TSADCV2_COMP_SHUT(chn) (0x40 + (chn) * 0x04)
191 #define TSADCV2_HIGHT_INT_DEBOUNCE 0x60
192 #define TSADCV2_HIGHT_TSHUT_DEBOUNCE 0x64
193 #define TSADCV2_AUTO_PERIOD 0x68
194 #define TSADCV2_AUTO_PERIOD_HT 0x6c
196 #define TSADCV2_AUTO_EN BIT(0)
197 #define TSADCV2_AUTO_SRC_EN(chn) BIT(4 + (chn))
198 #define TSADCV2_AUTO_TSHUT_POLARITY_HIGH BIT(8)
200 #define TSADCV3_AUTO_Q_SEL_EN BIT(1)
202 #define TSADCV2_INT_SRC_EN(chn) BIT(chn)
203 #define TSADCV2_SHUT_2GPIO_SRC_EN(chn) BIT(4 + (chn))
204 #define TSADCV2_SHUT_2CRU_SRC_EN(chn) BIT(8 + (chn))
206 #define TSADCV2_INT_PD_CLEAR_MASK ~BIT(8)
207 #define TSADCV3_INT_PD_CLEAR_MASK ~BIT(16)
209 #define TSADCV2_DATA_MASK 0xfff
210 #define TSADCV3_DATA_MASK 0x3ff
212 #define TSADCV2_HIGHT_INT_DEBOUNCE_COUNT 4
213 #define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT 4
214 #define TSADCV2_AUTO_PERIOD_TIME 250 /* msec */
215 #define TSADCV2_AUTO_PERIOD_HT_TIME 50 /* msec */
216 #define TSADCV2_USER_INTER_PD_SOC 0x340 /* 13 clocks */
218 #define GRF_SARADC_TESTBIT 0x0e644
219 #define GRF_TSADC_TESTBIT_L 0x0e648
220 #define GRF_TSADC_TESTBIT_H 0x0e64c
222 #define GRF_TSADC_TSEN_PD_ON (0x30003 << 0)
223 #define GRF_TSADC_TSEN_PD_OFF (0x30000 << 0)
224 #define GRF_SARADC_TESTBIT_ON (0x10001 << 2)
225 #define GRF_TSADC_TESTBIT_H_ON (0x10001 << 2)
228 * struct tsadc_table - code to temperature conversion table
229 * @code: the value of adc channel
230 * @temp: the temperature
232 * code to temperature mapping of the temperature sensor is a piece wise linear
233 * curve.Any temperature, code faling between to 2 give temperatures can be
234 * linearly interpolated.
235 * Code to Temperature mapping should be updated based on manufacturer results.
242 static const struct tsadc_table rk3228_code_table[] = {
278 {TSADCV2_DATA_MASK, 125000},
281 static const struct tsadc_table rk3288_code_table[] = {
282 {TSADCV2_DATA_MASK, -40000},
319 static const struct tsadc_table rk3368_code_table[] = {
355 {TSADCV3_DATA_MASK, 125000},
358 static const struct tsadc_table rk3399_code_table[] = {
394 {TSADCV3_DATA_MASK, 125000},
397 static u32 rk_tsadcv2_temp_to_code(struct chip_tsadc_table table,
403 high = table.length - 1;
404 mid = (high + low) / 2;
406 if (temp < table.id[low].temp || temp > table.id[high].temp)
409 while (low <= high) {
410 if (temp == table.id[mid].temp)
411 return table.id[mid].code;
412 else if (temp < table.id[mid].temp)
416 mid = (low + high) / 2;
422 static int rk_tsadcv2_code_to_temp(struct chip_tsadc_table table, u32 code,
425 unsigned int low = 1;
426 unsigned int high = table.length - 1;
427 unsigned int mid = (low + high) / 2;
431 WARN_ON(table.length < 2);
433 switch (table.mode) {
435 code &= table.data_mask;
436 if (code < table.id[high].code)
437 return -EAGAIN; /* Incorrect reading */
439 while (low <= high) {
440 if (code >= table.id[mid].code &&
441 code < table.id[mid - 1].code)
443 else if (code < table.id[mid].code)
448 mid = (low + high) / 2;
452 code &= table.data_mask;
453 if (code < table.id[low].code)
454 return -EAGAIN; /* Incorrect reading */
456 while (low <= high) {
457 if (code <= table.id[mid].code &&
458 code > table.id[mid - 1].code)
460 else if (code > table.id[mid].code)
465 mid = (low + high) / 2;
469 pr_err("Invalid the conversion table\n");
473 * The 5C granularity provided by the table is too much. Let's
474 * assume that the relationship between sensor readings and
475 * temperature between 2 table entries is linear and interpolate
476 * to produce less granular result.
478 num = table.id[mid].temp - table.id[mid - 1].temp;
479 num *= abs(table.id[mid - 1].code - code);
480 denom = abs(table.id[mid - 1].code - table.id[mid].code);
481 *temp = table.id[mid - 1].temp + (num / denom);
487 * rk_tsadcv2_initialize - initialize TASDC Controller.
489 * (1) Set TSADC_V2_AUTO_PERIOD:
490 * Configure the interleave between every two accessing of
491 * TSADC in normal operation.
493 * (2) Set TSADCV2_AUTO_PERIOD_HT:
494 * Configure the interleave between every two accessing of
495 * TSADC after the temperature is higher than COM_SHUT or COM_INT.
497 * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE:
498 * If the temperature is higher than COMP_INT or COMP_SHUT for
499 * "debounce" times, TSADC controller will generate interrupt or TSHUT.
501 static void rk_tsadcv2_initialize(struct regmap *grf, void __iomem *regs,
502 enum tshut_polarity tshut_polarity)
504 if (tshut_polarity == TSHUT_HIGH_ACTIVE)
505 writel_relaxed(0U | TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
506 regs + TSADCV2_AUTO_CON);
508 writel_relaxed(0U & ~TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
509 regs + TSADCV2_AUTO_CON);
511 writel_relaxed(TSADCV2_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD);
512 writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
513 regs + TSADCV2_HIGHT_INT_DEBOUNCE);
514 writel_relaxed(TSADCV2_AUTO_PERIOD_HT_TIME,
515 regs + TSADCV2_AUTO_PERIOD_HT);
516 writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
517 regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
520 pr_warn("%s: Missing rockchip,grf property\n", __func__);
526 * rk_tsadcv3_initialize - initialize TASDC Controller.
528 * (1) The tsadc control power sequence.
530 * (2) Set TSADC_V2_AUTO_PERIOD:
531 * Configure the interleave between every two accessing of
532 * TSADC in normal operation.
534 * (2) Set TSADCV2_AUTO_PERIOD_HT:
535 * Configure the interleave between every two accessing of
536 * TSADC after the temperature is higher than COM_SHUT or COM_INT.
538 * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE:
539 * If the temperature is higher than COMP_INT or COMP_SHUT for
540 * "debounce" times, TSADC controller will generate interrupt or TSHUT.
542 static void rk_tsadcv3_initialize(struct regmap *grf, void __iomem *regs,
543 enum tshut_polarity tshut_polarity)
545 /* The tsadc control power sequence */
547 /* Set interleave value to workround ic time sync issue */
548 writel_relaxed(TSADCV2_USER_INTER_PD_SOC, regs +
551 regmap_write(grf, GRF_TSADC_TESTBIT_L, GRF_TSADC_TSEN_PD_ON);
553 regmap_write(grf, GRF_TSADC_TESTBIT_L, GRF_TSADC_TSEN_PD_OFF);
554 udelay(100); /* The spec note says at least 15 us */
555 regmap_write(grf, GRF_SARADC_TESTBIT, GRF_SARADC_TESTBIT_ON);
556 regmap_write(grf, GRF_TSADC_TESTBIT_H, GRF_TSADC_TESTBIT_H_ON);
557 udelay(200); /* The spec note says at least 90 us */
560 if (tshut_polarity == TSHUT_HIGH_ACTIVE)
561 writel_relaxed(0U | TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
562 regs + TSADCV2_AUTO_CON);
564 writel_relaxed(0U & ~TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
565 regs + TSADCV2_AUTO_CON);
567 writel_relaxed(TSADCV2_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD);
568 writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
569 regs + TSADCV2_HIGHT_INT_DEBOUNCE);
570 writel_relaxed(TSADCV2_AUTO_PERIOD_HT_TIME,
571 regs + TSADCV2_AUTO_PERIOD_HT);
572 writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
573 regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
576 static void rk_tsadcv2_irq_ack(void __iomem *regs)
580 val = readl_relaxed(regs + TSADCV2_INT_PD);
581 writel_relaxed(val & TSADCV2_INT_PD_CLEAR_MASK, regs + TSADCV2_INT_PD);
584 static void rk_tsadcv3_irq_ack(void __iomem *regs)
588 val = readl_relaxed(regs + TSADCV2_INT_PD);
589 writel_relaxed(val & TSADCV3_INT_PD_CLEAR_MASK, regs + TSADCV2_INT_PD);
592 static void rk_tsadcv2_control(void __iomem *regs, bool enable)
596 val = readl_relaxed(regs + TSADCV2_AUTO_CON);
598 val |= TSADCV2_AUTO_EN;
600 val &= ~TSADCV2_AUTO_EN;
602 writel_relaxed(val, regs + TSADCV2_AUTO_CON);
606 * rk_tsadcv3_control - the tsadc controller is enabled or disabled.
608 * NOTE: TSADC controller works at auto mode, and some SoCs need set the
609 * tsadc_q_sel bit on TSADCV2_AUTO_CON[1]. The (1024 - tsadc_q) as output
610 * adc value if setting this bit to enable.
612 static void rk_tsadcv3_control(void __iomem *regs, bool enable)
616 val = readl_relaxed(regs + TSADCV2_AUTO_CON);
618 val |= TSADCV2_AUTO_EN | TSADCV3_AUTO_Q_SEL_EN;
620 val &= ~TSADCV2_AUTO_EN;
622 writel_relaxed(val, regs + TSADCV2_AUTO_CON);
625 static int rk_tsadcv2_get_temp(struct chip_tsadc_table table,
626 int chn, void __iomem *regs, int *temp)
630 val = readl_relaxed(regs + TSADCV2_DATA(chn));
632 return rk_tsadcv2_code_to_temp(table, val, temp);
635 static void rk_tsadcv2_alarm_temp(struct chip_tsadc_table table,
636 int chn, void __iomem *regs, int temp)
638 u32 alarm_value, int_en;
640 alarm_value = rk_tsadcv2_temp_to_code(table, temp);
641 writel_relaxed(alarm_value & table.data_mask,
642 regs + TSADCV2_COMP_INT(chn));
644 int_en = readl_relaxed(regs + TSADCV2_INT_EN);
645 int_en |= TSADCV2_INT_SRC_EN(chn);
646 writel_relaxed(int_en, regs + TSADCV2_INT_EN);
649 static void rk_tsadcv2_tshut_temp(struct chip_tsadc_table table,
650 int chn, void __iomem *regs, int temp)
652 u32 tshut_value, val;
654 tshut_value = rk_tsadcv2_temp_to_code(table, temp);
655 writel_relaxed(tshut_value, regs + TSADCV2_COMP_SHUT(chn));
657 /* TSHUT will be valid */
658 val = readl_relaxed(regs + TSADCV2_AUTO_CON);
659 writel_relaxed(val | TSADCV2_AUTO_SRC_EN(chn), regs + TSADCV2_AUTO_CON);
662 static void rk_tsadcv2_tshut_mode(int chn, void __iomem *regs,
663 enum tshut_mode mode)
667 val = readl_relaxed(regs + TSADCV2_INT_EN);
668 if (mode == TSHUT_MODE_GPIO) {
669 val &= ~TSADCV2_SHUT_2CRU_SRC_EN(chn);
670 val |= TSADCV2_SHUT_2GPIO_SRC_EN(chn);
672 val &= ~TSADCV2_SHUT_2GPIO_SRC_EN(chn);
673 val |= TSADCV2_SHUT_2CRU_SRC_EN(chn);
676 writel_relaxed(val, regs + TSADCV2_INT_EN);
679 static const struct rockchip_tsadc_chip rk3228_tsadc_data = {
680 .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
681 .chn_num = 1, /* one channel for tsadc */
683 .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
684 .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
687 .initialize = rk_tsadcv2_initialize,
688 .irq_ack = rk_tsadcv3_irq_ack,
689 .control = rk_tsadcv3_control,
690 .get_temp = rk_tsadcv2_get_temp,
691 .set_alarm_temp = rk_tsadcv2_alarm_temp,
692 .set_tshut_temp = rk_tsadcv2_tshut_temp,
693 .set_tshut_mode = rk_tsadcv2_tshut_mode,
696 .id = rk3228_code_table,
697 .length = ARRAY_SIZE(rk3228_code_table),
698 .data_mask = TSADCV3_DATA_MASK,
699 .mode = ADC_INCREMENT,
703 static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
704 .chn_id[SENSOR_CPU] = 1, /* cpu sensor is channel 1 */
705 .chn_id[SENSOR_GPU] = 2, /* gpu sensor is channel 2 */
706 .chn_num = 2, /* two channels for tsadc */
708 .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
709 .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
712 .initialize = rk_tsadcv2_initialize,
713 .irq_ack = rk_tsadcv2_irq_ack,
714 .control = rk_tsadcv2_control,
715 .get_temp = rk_tsadcv2_get_temp,
716 .set_alarm_temp = rk_tsadcv2_alarm_temp,
717 .set_tshut_temp = rk_tsadcv2_tshut_temp,
718 .set_tshut_mode = rk_tsadcv2_tshut_mode,
721 .id = rk3288_code_table,
722 .length = ARRAY_SIZE(rk3288_code_table),
723 .data_mask = TSADCV2_DATA_MASK,
724 .mode = ADC_DECREMENT,
728 static const struct rockchip_tsadc_chip rk3366_tsadc_data = {
729 .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
730 .chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
731 .chn_num = 2, /* two channels for tsadc */
733 .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
734 .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
737 .initialize = rk_tsadcv3_initialize,
738 .irq_ack = rk_tsadcv3_irq_ack,
739 .control = rk_tsadcv3_control,
740 .get_temp = rk_tsadcv2_get_temp,
741 .set_alarm_temp = rk_tsadcv2_alarm_temp,
742 .set_tshut_temp = rk_tsadcv2_tshut_temp,
743 .set_tshut_mode = rk_tsadcv2_tshut_mode,
746 .id = rk3228_code_table,
747 .length = ARRAY_SIZE(rk3228_code_table),
748 .data_mask = TSADCV3_DATA_MASK,
749 .mode = ADC_INCREMENT,
753 static const struct rockchip_tsadc_chip rk3368_tsadc_data = {
754 .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
755 .chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
756 .chn_num = 2, /* two channels for tsadc */
758 .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
759 .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
762 .initialize = rk_tsadcv2_initialize,
763 .irq_ack = rk_tsadcv2_irq_ack,
764 .control = rk_tsadcv2_control,
765 .get_temp = rk_tsadcv2_get_temp,
766 .set_alarm_temp = rk_tsadcv2_alarm_temp,
767 .set_tshut_temp = rk_tsadcv2_tshut_temp,
768 .set_tshut_mode = rk_tsadcv2_tshut_mode,
771 .id = rk3368_code_table,
772 .length = ARRAY_SIZE(rk3368_code_table),
773 .data_mask = TSADCV3_DATA_MASK,
774 .mode = ADC_INCREMENT,
778 static const struct rockchip_tsadc_chip rk3399_tsadc_data = {
779 .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
780 .chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
781 .chn_num = 2, /* two channels for tsadc */
783 .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
784 .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
787 .initialize = rk_tsadcv3_initialize,
788 .irq_ack = rk_tsadcv3_irq_ack,
789 .control = rk_tsadcv3_control,
790 .get_temp = rk_tsadcv2_get_temp,
791 .set_alarm_temp = rk_tsadcv2_alarm_temp,
792 .set_tshut_temp = rk_tsadcv2_tshut_temp,
793 .set_tshut_mode = rk_tsadcv2_tshut_mode,
796 .id = rk3399_code_table,
797 .length = ARRAY_SIZE(rk3399_code_table),
798 .data_mask = TSADCV3_DATA_MASK,
799 .mode = ADC_INCREMENT,
803 static const struct of_device_id of_rockchip_thermal_match[] = {
805 .compatible = "rockchip,rk3228-tsadc",
806 .data = (void *)&rk3228_tsadc_data,
809 .compatible = "rockchip,rk3288-tsadc",
810 .data = (void *)&rk3288_tsadc_data,
813 .compatible = "rockchip,rk3366-tsadc",
814 .data = (void *)&rk3366_tsadc_data,
817 .compatible = "rockchip,rk3368-tsadc",
818 .data = (void *)&rk3368_tsadc_data,
821 .compatible = "rockchip,rk3399-tsadc",
822 .data = (void *)&rk3399_tsadc_data,
826 MODULE_DEVICE_TABLE(of, of_rockchip_thermal_match);
829 rockchip_thermal_toggle_sensor(struct rockchip_thermal_sensor *sensor, bool on)
831 struct thermal_zone_device *tzd = sensor->tzd;
833 tzd->ops->set_mode(tzd,
834 on ? THERMAL_DEVICE_ENABLED : THERMAL_DEVICE_DISABLED);
837 static irqreturn_t rockchip_thermal_alarm_irq_thread(int irq, void *dev)
839 struct rockchip_thermal_data *thermal = dev;
842 dev_dbg(&thermal->pdev->dev, "thermal alarm\n");
844 thermal->chip->irq_ack(thermal->regs);
846 for (i = 0; i < thermal->chip->chn_num; i++)
847 thermal_zone_device_update(thermal->sensors[i].tzd);
852 static int rockchip_thermal_set_trips(void *_sensor, int low, int high)
854 struct rockchip_thermal_sensor *sensor = _sensor;
855 struct rockchip_thermal_data *thermal = sensor->thermal;
856 const struct rockchip_tsadc_chip *tsadc = thermal->chip;
858 dev_dbg(&thermal->pdev->dev, "%s: sensor %d: low: %d, high %d\n",
859 __func__, sensor->id, low, high);
861 tsadc->set_alarm_temp(tsadc->table,
862 sensor->id, thermal->regs, high);
867 static int rockchip_thermal_get_temp(void *_sensor, int *out_temp)
869 struct rockchip_thermal_sensor *sensor = _sensor;
870 struct rockchip_thermal_data *thermal = sensor->thermal;
871 const struct rockchip_tsadc_chip *tsadc = sensor->thermal->chip;
874 retval = tsadc->get_temp(tsadc->table,
875 sensor->id, thermal->regs, out_temp);
876 dev_dbg(&thermal->pdev->dev, "sensor %d - temp: %d, retval: %d\n",
877 sensor->id, *out_temp, retval);
882 static const struct thermal_zone_of_device_ops rockchip_of_thermal_ops = {
883 .get_temp = rockchip_thermal_get_temp,
884 .set_trips = rockchip_thermal_set_trips,
887 static int rockchip_configure_from_dt(struct device *dev,
888 struct device_node *np,
889 struct rockchip_thermal_data *thermal)
891 u32 shut_temp, tshut_mode, tshut_polarity;
893 if (of_property_read_u32(np, "rockchip,hw-tshut-temp", &shut_temp)) {
895 "Missing tshut temp property, using default %d\n",
896 thermal->chip->tshut_temp);
897 thermal->tshut_temp = thermal->chip->tshut_temp;
899 if (shut_temp > INT_MAX) {
900 dev_err(dev, "Invalid tshut temperature specified: %d\n",
904 thermal->tshut_temp = shut_temp;
907 if (of_property_read_u32(np, "rockchip,hw-tshut-mode", &tshut_mode)) {
909 "Missing tshut mode property, using default (%s)\n",
910 thermal->chip->tshut_mode == TSHUT_MODE_GPIO ?
912 thermal->tshut_mode = thermal->chip->tshut_mode;
914 thermal->tshut_mode = tshut_mode;
917 if (thermal->tshut_mode > 1) {
918 dev_err(dev, "Invalid tshut mode specified: %d\n",
919 thermal->tshut_mode);
923 if (of_property_read_u32(np, "rockchip,hw-tshut-polarity",
926 "Missing tshut-polarity property, using default (%s)\n",
927 thermal->chip->tshut_polarity == TSHUT_LOW_ACTIVE ?
929 thermal->tshut_polarity = thermal->chip->tshut_polarity;
931 thermal->tshut_polarity = tshut_polarity;
934 if (thermal->tshut_polarity > 1) {
935 dev_err(dev, "Invalid tshut-polarity specified: %d\n",
936 thermal->tshut_polarity);
940 /* The tsadc wont to handle the error in here since some SoCs didn't
941 * need this property.
943 thermal->grf = syscon_regmap_lookup_by_phandle(np, "rockchip,grf");
949 rockchip_thermal_register_sensor(struct platform_device *pdev,
950 struct rockchip_thermal_data *thermal,
951 struct rockchip_thermal_sensor *sensor,
954 const struct rockchip_tsadc_chip *tsadc = thermal->chip;
957 tsadc->set_tshut_mode(id, thermal->regs, thermal->tshut_mode);
958 tsadc->set_tshut_temp(tsadc->table, id, thermal->regs,
959 thermal->tshut_temp);
961 sensor->thermal = thermal;
963 sensor->tzd = devm_thermal_zone_of_sensor_register(&pdev->dev, id,
964 sensor, &rockchip_of_thermal_ops);
965 if (IS_ERR(sensor->tzd)) {
966 error = PTR_ERR(sensor->tzd);
967 dev_err(&pdev->dev, "failed to register sensor %d: %d\n",
976 * Reset TSADC Controller, reset all tsadc registers.
978 static void rockchip_thermal_reset_controller(struct reset_control *reset)
980 reset_control_assert(reset);
981 usleep_range(10, 20);
982 reset_control_deassert(reset);
985 static int rockchip_thermal_probe(struct platform_device *pdev)
987 struct device_node *np = pdev->dev.of_node;
988 struct rockchip_thermal_data *thermal;
989 const struct of_device_id *match;
990 struct resource *res;
995 match = of_match_node(of_rockchip_thermal_match, np);
999 irq = platform_get_irq(pdev, 0);
1001 dev_err(&pdev->dev, "no irq resource?\n");
1005 thermal = devm_kzalloc(&pdev->dev, sizeof(struct rockchip_thermal_data),
1010 thermal->pdev = pdev;
1012 thermal->chip = (const struct rockchip_tsadc_chip *)match->data;
1016 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1017 thermal->regs = devm_ioremap_resource(&pdev->dev, res);
1018 if (IS_ERR(thermal->regs))
1019 return PTR_ERR(thermal->regs);
1021 thermal->reset = devm_reset_control_get(&pdev->dev, "tsadc-apb");
1022 if (IS_ERR(thermal->reset)) {
1023 error = PTR_ERR(thermal->reset);
1024 dev_err(&pdev->dev, "failed to get tsadc reset: %d\n", error);
1028 thermal->clk = devm_clk_get(&pdev->dev, "tsadc");
1029 if (IS_ERR(thermal->clk)) {
1030 error = PTR_ERR(thermal->clk);
1031 dev_err(&pdev->dev, "failed to get tsadc clock: %d\n", error);
1035 thermal->pclk = devm_clk_get(&pdev->dev, "apb_pclk");
1036 if (IS_ERR(thermal->pclk)) {
1037 error = PTR_ERR(thermal->pclk);
1038 dev_err(&pdev->dev, "failed to get apb_pclk clock: %d\n",
1043 error = clk_prepare_enable(thermal->clk);
1045 dev_err(&pdev->dev, "failed to enable converter clock: %d\n",
1050 error = clk_prepare_enable(thermal->pclk);
1052 dev_err(&pdev->dev, "failed to enable pclk: %d\n", error);
1053 goto err_disable_clk;
1056 rockchip_thermal_reset_controller(thermal->reset);
1058 error = rockchip_configure_from_dt(&pdev->dev, np, thermal);
1060 dev_err(&pdev->dev, "failed to parse device tree data: %d\n",
1062 goto err_disable_pclk;
1065 thermal->chip->initialize(thermal->grf, thermal->regs,
1066 thermal->tshut_polarity);
1068 for (i = 0; i < thermal->chip->chn_num; i++) {
1069 error = rockchip_thermal_register_sensor(pdev, thermal,
1070 &thermal->sensors[i],
1071 thermal->chip->chn_id[i]);
1074 "failed to register sensor[%d] : error = %d\n",
1076 goto err_disable_pclk;
1080 error = devm_request_threaded_irq(&pdev->dev, irq, NULL,
1081 &rockchip_thermal_alarm_irq_thread,
1083 "rockchip_thermal", thermal);
1086 "failed to request tsadc irq: %d\n", error);
1087 goto err_disable_pclk;
1090 thermal->chip->control(thermal->regs, true);
1092 for (i = 0; i < thermal->chip->chn_num; i++)
1093 rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
1095 platform_set_drvdata(pdev, thermal);
1100 clk_disable_unprepare(thermal->pclk);
1102 clk_disable_unprepare(thermal->clk);
1107 static int rockchip_thermal_remove(struct platform_device *pdev)
1109 struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
1112 for (i = 0; i < thermal->chip->chn_num; i++) {
1113 struct rockchip_thermal_sensor *sensor = &thermal->sensors[i];
1115 rockchip_thermal_toggle_sensor(sensor, false);
1118 thermal->chip->control(thermal->regs, false);
1120 clk_disable_unprepare(thermal->pclk);
1121 clk_disable_unprepare(thermal->clk);
1126 static int __maybe_unused rockchip_thermal_suspend(struct device *dev)
1128 struct platform_device *pdev = to_platform_device(dev);
1129 struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
1132 for (i = 0; i < thermal->chip->chn_num; i++)
1133 rockchip_thermal_toggle_sensor(&thermal->sensors[i], false);
1135 thermal->chip->control(thermal->regs, false);
1137 clk_disable(thermal->pclk);
1138 clk_disable(thermal->clk);
1140 pinctrl_pm_select_sleep_state(dev);
1145 static int __maybe_unused rockchip_thermal_resume(struct device *dev)
1147 struct platform_device *pdev = to_platform_device(dev);
1148 struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
1152 error = clk_enable(thermal->clk);
1156 error = clk_enable(thermal->pclk);
1160 rockchip_thermal_reset_controller(thermal->reset);
1162 thermal->chip->initialize(thermal->grf, thermal->regs,
1163 thermal->tshut_polarity);
1165 for (i = 0; i < thermal->chip->chn_num; i++) {
1166 int id = thermal->sensors[i].id;
1168 thermal->chip->set_tshut_mode(id, thermal->regs,
1169 thermal->tshut_mode);
1170 thermal->chip->set_tshut_temp(thermal->chip->table,
1172 thermal->tshut_temp);
1175 thermal->chip->control(thermal->regs, true);
1177 for (i = 0; i < thermal->chip->chn_num; i++)
1178 rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
1180 pinctrl_pm_select_default_state(dev);
1185 static SIMPLE_DEV_PM_OPS(rockchip_thermal_pm_ops,
1186 rockchip_thermal_suspend, rockchip_thermal_resume);
1188 static struct platform_driver rockchip_thermal_driver = {
1190 .name = "rockchip-thermal",
1191 .pm = &rockchip_thermal_pm_ops,
1192 .of_match_table = of_rockchip_thermal_match,
1194 .probe = rockchip_thermal_probe,
1195 .remove = rockchip_thermal_remove,
1198 module_platform_driver(rockchip_thermal_driver);
1200 MODULE_DESCRIPTION("ROCKCHIP THERMAL Driver");
1201 MODULE_AUTHOR("Rockchip, Inc.");
1202 MODULE_LICENSE("GPL v2");
1203 MODULE_ALIAS("platform:rockchip-thermal");