2 * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
4 * Copyright (c) 2015, Fuzhou Rockchip Electronics Co., Ltd
5 * Caesar Wang <wxt@rock-chips.com>
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms and conditions of the GNU General Public License,
9 * version 2, as published by the Free Software Foundation.
11 * This program is distributed in the hope it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 #include <linux/clk.h>
18 #include <linux/delay.h>
19 #include <linux/interrupt.h>
21 #include <linux/module.h>
23 #include <linux/of_address.h>
24 #include <linux/of_irq.h>
25 #include <linux/platform_device.h>
26 #include <linux/regmap.h>
27 #include <linux/reset.h>
28 #include <linux/thermal.h>
29 #include <linux/mfd/syscon.h>
30 #include <linux/pinctrl/consumer.h>
33 * If the temperature over a period of time High,
34 * the resulting TSHUT gave CRU module,let it reset the entire chip,
35 * or via GPIO give PMIC.
43 * The system Temperature Sensors tshut(tshut) polarity
44 * the bit 8 is tshut polarity.
45 * 0: low active, 1: high active
53 * The system has two Temperature Sensors.
54 * sensor0 is for CPU, and sensor1 is for GPU.
62 * The conversion table has the adc value and temperature.
63 * ADC_DECREMENT: the adc value is of diminishing.(e.g. rk3288_code_table)
64 * ADC_INCREMENT: the adc value is incremental.(e.g. rk3368_code_table)
72 * The max sensors is two in rockchip SoCs.
73 * Two sensors: CPU and GPU sensor.
75 #define SOC_MAX_SENSORS 2
78 * struct chip_tsadc_table: hold information about chip-specific differences
79 * @id: conversion table
80 * @length: size of conversion table
81 * @data_mask: mask to apply on data inputs
82 * @mode: sort mode of this adc variant (incrementing or decrementing)
84 struct chip_tsadc_table {
85 const struct tsadc_table *id;
88 enum adc_sort_mode mode;
91 struct rockchip_tsadc_chip {
92 /* The sensor id of chip correspond to the ADC channel */
93 int chn_id[SOC_MAX_SENSORS];
96 /* The hardware-controlled tshut property */
98 enum tshut_mode tshut_mode;
99 enum tshut_polarity tshut_polarity;
101 /* Chip-wide methods */
102 void (*initialize)(struct regmap *grf,
103 void __iomem *reg, enum tshut_polarity p);
104 void (*irq_ack)(void __iomem *reg);
105 void (*control)(void __iomem *reg, bool on);
107 /* Per-sensor methods */
108 int (*get_temp)(struct chip_tsadc_table table,
109 int chn, void __iomem *reg, int *temp);
110 void (*set_tshut_temp)(struct chip_tsadc_table table,
111 int chn, void __iomem *reg, int temp);
112 void (*set_tshut_mode)(int chn, void __iomem *reg, enum tshut_mode m);
114 /* Per-table methods */
115 struct chip_tsadc_table table;
118 struct rockchip_thermal_sensor {
119 struct rockchip_thermal_data *thermal;
120 struct thermal_zone_device *tzd;
124 struct rockchip_thermal_data {
125 const struct rockchip_tsadc_chip *chip;
126 struct platform_device *pdev;
127 struct reset_control *reset;
129 struct rockchip_thermal_sensor sensors[SOC_MAX_SENSORS];
138 enum tshut_mode tshut_mode;
139 enum tshut_polarity tshut_polarity;
143 * TSADC Sensor Register description:
145 * TSADCV2_* are used for RK3288 SoCs, the other chips can reuse it.
146 * TSADCV3_* are used for newer SoCs than RK3288. (e.g: RK3228, RK3399)
149 #define TSADCV2_USER_CON 0x00
150 #define TSADCV2_AUTO_CON 0x04
151 #define TSADCV2_INT_EN 0x08
152 #define TSADCV2_INT_PD 0x0c
153 #define TSADCV2_DATA(chn) (0x20 + (chn) * 0x04)
154 #define TSADCV2_COMP_SHUT(chn) (0x40 + (chn) * 0x04)
155 #define TSADCV2_HIGHT_INT_DEBOUNCE 0x60
156 #define TSADCV2_HIGHT_TSHUT_DEBOUNCE 0x64
157 #define TSADCV2_AUTO_PERIOD 0x68
158 #define TSADCV2_AUTO_PERIOD_HT 0x6c
160 #define TSADCV2_AUTO_EN BIT(0)
161 #define TSADCV2_AUTO_SRC_EN(chn) BIT(4 + (chn))
162 #define TSADCV2_AUTO_TSHUT_POLARITY_HIGH BIT(8)
164 * TSADCV1_AUTO_Q_SEL_EN:
165 * whether select (1024 - tsadc_q) as output
166 * 1'b0:use tsadc_q as output(temperature-code is rising sequence)
167 * 1'b1:use(1024 - tsadc_q) as output (temperature-code is falling sequence)
169 #define TSADCV3_AUTO_Q_SEL_EN BIT(1)
171 #define TSADCV2_INT_SRC_EN(chn) BIT(chn)
172 #define TSADCV2_SHUT_2GPIO_SRC_EN(chn) BIT(4 + (chn))
173 #define TSADCV2_SHUT_2CRU_SRC_EN(chn) BIT(8 + (chn))
175 #define TSADCV2_INT_PD_CLEAR_MASK ~BIT(8)
176 #define TSADCV3_INT_PD_CLEAR_MASK ~BIT(16)
178 #define TSADCV2_DATA_MASK 0xfff
179 #define TSADCV3_DATA_MASK 0x3ff
181 #define TSADCV2_HIGHT_INT_DEBOUNCE_COUNT 4
182 #define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT 4
183 #define TSADCV2_AUTO_PERIOD_TIME 250 /* msec */
184 #define TSADCV2_AUTO_PERIOD_HT_TIME 50 /* msec */
185 #define TSADCV2_USER_INTER_PD_SOC 0x340 /* 13 clocks */
187 #define GRF_SARADC_TESTBIT 0x0e644
188 #define GRF_TSADC_TESTBIT_L 0x0e648
189 #define GRF_TSADC_TESTBIT_H 0x0e64c
191 #define GRF_TSADC_TSEN_PD_ON (0x30003 << 0)
192 #define GRF_TSADC_TSEN_PD_OFF (0x30000 << 0)
193 #define GRF_SARADC_TESTBIT_ON (0x10001 << 2)
194 #define GRF_TSADC_TESTBIT_H_ON (0x10001 << 2)
203 * Code to Temperature mapping of the Temperature sensor is a piece wise linear
204 * curve.Any temperature, code faling between to 2 give temperatures can be
205 * linearly interpolated.
206 * Code to Temperature mapping should be updated based on sillcon results.
208 static const struct tsadc_table rk3228_code_table[] = {
244 {TSADCV2_DATA_MASK, 125000},
247 static const struct tsadc_table rk3288_code_table[] = {
248 {TSADCV2_DATA_MASK, -40000},
285 static const struct tsadc_table rk3368_code_table[] = {
321 {TSADCV3_DATA_MASK, 125000},
324 static const struct tsadc_table rk3399_code_table[] = {
360 {TSADCV3_DATA_MASK, 125000},
363 static u32 rk_tsadcv2_temp_to_code(struct chip_tsadc_table table,
369 high = table.length - 1;
370 mid = (high + low) / 2;
372 if (temp < table.id[low].temp || temp > table.id[high].temp)
375 while (low <= high) {
376 if (temp == table.id[mid].temp)
377 return table.id[mid].code;
378 else if (temp < table.id[mid].temp)
382 mid = (low + high) / 2;
388 static int rk_tsadcv2_code_to_temp(struct chip_tsadc_table table, u32 code,
391 unsigned int low = 1;
392 unsigned int high = table.length - 1;
393 unsigned int mid = (low + high) / 2;
397 WARN_ON(table.length < 2);
399 switch (table.mode) {
401 code &= table.data_mask;
402 if (code < table.id[high].code)
403 return -EAGAIN; /* Incorrect reading */
405 while (low <= high) {
406 if (code >= table.id[mid].code &&
407 code < table.id[mid - 1].code)
409 else if (code < table.id[mid].code)
414 mid = (low + high) / 2;
418 code &= table.data_mask;
419 if (code < table.id[low].code)
420 return -EAGAIN; /* Incorrect reading */
422 while (low <= high) {
423 if (code <= table.id[mid].code &&
424 code > table.id[mid - 1].code)
426 else if (code > table.id[mid].code)
431 mid = (low + high) / 2;
435 pr_err("Invalid the conversion table\n");
439 * The 5C granularity provided by the table is too much. Let's
440 * assume that the relationship between sensor readings and
441 * temperature between 2 table entries is linear and interpolate
442 * to produce less granular result.
444 num = table.id[mid].temp - table.id[mid - 1].temp;
445 num *= abs(table.id[mid - 1].code - code);
446 denom = abs(table.id[mid - 1].code - table.id[mid].code);
447 *temp = table.id[mid - 1].temp + (num / denom);
453 * rk_tsadcv2_initialize - initialize TASDC Controller.
455 * (1) Set TSADC_V2_AUTO_PERIOD:
456 * Configure the interleave between every two accessing of
457 * TSADC in normal operation.
459 * (2) Set TSADCV2_AUTO_PERIOD_HT:
460 * Configure the interleave between every two accessing of
461 * TSADC after the temperature is higher than COM_SHUT or COM_INT.
463 * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE:
464 * If the temperature is higher than COMP_INT or COMP_SHUT for
465 * "debounce" times, TSADC controller will generate interrupt or TSHUT.
467 static void rk_tsadcv2_initialize(struct regmap *grf, void __iomem *regs,
468 enum tshut_polarity tshut_polarity)
470 if (tshut_polarity == TSHUT_HIGH_ACTIVE)
471 writel_relaxed(0U | TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
472 regs + TSADCV2_AUTO_CON);
474 writel_relaxed(0U & ~TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
475 regs + TSADCV2_AUTO_CON);
477 writel_relaxed(TSADCV2_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD);
478 writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
479 regs + TSADCV2_HIGHT_INT_DEBOUNCE);
480 writel_relaxed(TSADCV2_AUTO_PERIOD_HT_TIME,
481 regs + TSADCV2_AUTO_PERIOD_HT);
482 writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
483 regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
486 pr_warn("%s: Missing rockchip,grf property\n", __func__);
492 * rk_tsadcv3_initialize - initialize TASDC Controller.
493 * (1) The tsadc control power sequence.
495 * (2) Set TSADC_V2_AUTO_PERIOD:
496 * Configure the interleave between every two accessing of
497 * TSADC in normal operation.
499 * (2) Set TSADCV2_AUTO_PERIOD_HT:
500 * Configure the interleave between every two accessing of
501 * TSADC after the temperature is higher than COM_SHUT or COM_INT.
503 * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE:
504 * If the temperature is higher than COMP_INT or COMP_SHUT for
505 * "debounce" times, TSADC controller will generate interrupt or TSHUT.
507 static void rk_tsadcv3_initialize(struct regmap *grf, void __iomem *regs,
508 enum tshut_polarity tshut_polarity)
510 /* The tsadc control power sequence */
512 /* Set interleave value to workround ic time sync issue */
513 writel_relaxed(TSADCV2_USER_INTER_PD_SOC, regs +
516 regmap_write(grf, GRF_TSADC_TESTBIT_L, GRF_TSADC_TSEN_PD_ON);
518 regmap_write(grf, GRF_TSADC_TESTBIT_L, GRF_TSADC_TSEN_PD_OFF);
519 udelay(100); /* The spec note says at least 15 us */
520 regmap_write(grf, GRF_SARADC_TESTBIT, GRF_SARADC_TESTBIT_ON);
521 regmap_write(grf, GRF_TSADC_TESTBIT_H, GRF_TSADC_TESTBIT_H_ON);
522 udelay(200); /* The spec note says at least 90 us */
525 if (tshut_polarity == TSHUT_HIGH_ACTIVE)
526 writel_relaxed(0U | TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
527 regs + TSADCV2_AUTO_CON);
529 writel_relaxed(0U & ~TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
530 regs + TSADCV2_AUTO_CON);
532 writel_relaxed(TSADCV2_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD);
533 writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
534 regs + TSADCV2_HIGHT_INT_DEBOUNCE);
535 writel_relaxed(TSADCV2_AUTO_PERIOD_HT_TIME,
536 regs + TSADCV2_AUTO_PERIOD_HT);
537 writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
538 regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
541 static void rk_tsadcv2_irq_ack(void __iomem *regs)
545 val = readl_relaxed(regs + TSADCV2_INT_PD);
546 writel_relaxed(val & TSADCV2_INT_PD_CLEAR_MASK, regs + TSADCV2_INT_PD);
549 static void rk_tsadcv3_irq_ack(void __iomem *regs)
553 val = readl_relaxed(regs + TSADCV2_INT_PD);
554 writel_relaxed(val & TSADCV3_INT_PD_CLEAR_MASK, regs + TSADCV2_INT_PD);
557 static void rk_tsadcv2_control(void __iomem *regs, bool enable)
561 val = readl_relaxed(regs + TSADCV2_AUTO_CON);
563 val |= TSADCV2_AUTO_EN;
565 val &= ~TSADCV2_AUTO_EN;
567 writel_relaxed(val, regs + TSADCV2_AUTO_CON);
571 * @rk_tsadcv3_control:
572 * TSADC controller works at auto mode, and some SoCs need set the tsadc_q_sel
573 * bit on TSADCV2_AUTO_CON[1]. The (1024 - tsadc_q) as output adc value if
574 * setting this bit to enable.
576 static void rk_tsadcv3_control(void __iomem *regs, bool enable)
580 val = readl_relaxed(regs + TSADCV2_AUTO_CON);
582 val |= TSADCV2_AUTO_EN | TSADCV3_AUTO_Q_SEL_EN;
584 val &= ~TSADCV2_AUTO_EN;
586 writel_relaxed(val, regs + TSADCV2_AUTO_CON);
589 static int rk_tsadcv2_get_temp(struct chip_tsadc_table table,
590 int chn, void __iomem *regs, int *temp)
594 val = readl_relaxed(regs + TSADCV2_DATA(chn));
596 return rk_tsadcv2_code_to_temp(table, val, temp);
599 static void rk_tsadcv2_tshut_temp(struct chip_tsadc_table table,
600 int chn, void __iomem *regs, int temp)
602 u32 tshut_value, val;
604 tshut_value = rk_tsadcv2_temp_to_code(table, temp);
605 writel_relaxed(tshut_value, regs + TSADCV2_COMP_SHUT(chn));
607 /* TSHUT will be valid */
608 val = readl_relaxed(regs + TSADCV2_AUTO_CON);
609 writel_relaxed(val | TSADCV2_AUTO_SRC_EN(chn), regs + TSADCV2_AUTO_CON);
612 static void rk_tsadcv2_tshut_mode(int chn, void __iomem *regs,
613 enum tshut_mode mode)
617 val = readl_relaxed(regs + TSADCV2_INT_EN);
618 if (mode == TSHUT_MODE_GPIO) {
619 val &= ~TSADCV2_SHUT_2CRU_SRC_EN(chn);
620 val |= TSADCV2_SHUT_2GPIO_SRC_EN(chn);
622 val &= ~TSADCV2_SHUT_2GPIO_SRC_EN(chn);
623 val |= TSADCV2_SHUT_2CRU_SRC_EN(chn);
626 writel_relaxed(val, regs + TSADCV2_INT_EN);
629 static const struct rockchip_tsadc_chip rk3228_tsadc_data = {
630 .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
631 .chn_num = 1, /* one channel for tsadc */
633 .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
634 .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
637 .initialize = rk_tsadcv2_initialize,
638 .irq_ack = rk_tsadcv3_irq_ack,
639 .control = rk_tsadcv3_control,
640 .get_temp = rk_tsadcv2_get_temp,
641 .set_tshut_temp = rk_tsadcv2_tshut_temp,
642 .set_tshut_mode = rk_tsadcv2_tshut_mode,
645 .id = rk3228_code_table,
646 .length = ARRAY_SIZE(rk3228_code_table),
647 .data_mask = TSADCV3_DATA_MASK,
648 .mode = ADC_INCREMENT,
652 static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
653 .chn_id[SENSOR_CPU] = 1, /* cpu sensor is channel 1 */
654 .chn_id[SENSOR_GPU] = 2, /* gpu sensor is channel 2 */
655 .chn_num = 2, /* two channels for tsadc */
657 .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
658 .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
661 .initialize = rk_tsadcv2_initialize,
662 .irq_ack = rk_tsadcv2_irq_ack,
663 .control = rk_tsadcv2_control,
664 .get_temp = rk_tsadcv2_get_temp,
665 .set_tshut_temp = rk_tsadcv2_tshut_temp,
666 .set_tshut_mode = rk_tsadcv2_tshut_mode,
669 .id = rk3288_code_table,
670 .length = ARRAY_SIZE(rk3288_code_table),
671 .data_mask = TSADCV2_DATA_MASK,
672 .mode = ADC_DECREMENT,
676 static const struct rockchip_tsadc_chip rk3366_tsadc_data = {
677 .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
678 .chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
679 .chn_num = 2, /* two channels for tsadc */
681 .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
682 .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
685 .initialize = rk_tsadcv3_initialize,
686 .irq_ack = rk_tsadcv3_irq_ack,
687 .control = rk_tsadcv3_control,
688 .get_temp = rk_tsadcv2_get_temp,
689 .set_tshut_temp = rk_tsadcv2_tshut_temp,
690 .set_tshut_mode = rk_tsadcv2_tshut_mode,
693 .id = rk3228_code_table,
694 .length = ARRAY_SIZE(rk3228_code_table),
695 .data_mask = TSADCV3_DATA_MASK,
696 .mode = ADC_INCREMENT,
700 static const struct rockchip_tsadc_chip rk3368_tsadc_data = {
701 .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
702 .chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
703 .chn_num = 2, /* two channels for tsadc */
705 .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
706 .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
709 .initialize = rk_tsadcv2_initialize,
710 .irq_ack = rk_tsadcv2_irq_ack,
711 .control = rk_tsadcv2_control,
712 .get_temp = rk_tsadcv2_get_temp,
713 .set_tshut_temp = rk_tsadcv2_tshut_temp,
714 .set_tshut_mode = rk_tsadcv2_tshut_mode,
717 .id = rk3368_code_table,
718 .length = ARRAY_SIZE(rk3368_code_table),
719 .data_mask = TSADCV3_DATA_MASK,
720 .mode = ADC_INCREMENT,
724 static const struct rockchip_tsadc_chip rk3399_tsadc_data = {
725 .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
726 .chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
727 .chn_num = 2, /* two channels for tsadc */
729 .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
730 .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
733 .initialize = rk_tsadcv3_initialize,
734 .irq_ack = rk_tsadcv3_irq_ack,
735 .control = rk_tsadcv3_control,
736 .get_temp = rk_tsadcv2_get_temp,
737 .set_tshut_temp = rk_tsadcv2_tshut_temp,
738 .set_tshut_mode = rk_tsadcv2_tshut_mode,
741 .id = rk3399_code_table,
742 .length = ARRAY_SIZE(rk3399_code_table),
743 .data_mask = TSADCV3_DATA_MASK,
744 .mode = ADC_INCREMENT,
748 static const struct of_device_id of_rockchip_thermal_match[] = {
750 .compatible = "rockchip,rk3228-tsadc",
751 .data = (void *)&rk3228_tsadc_data,
754 .compatible = "rockchip,rk3288-tsadc",
755 .data = (void *)&rk3288_tsadc_data,
758 .compatible = "rockchip,rk3366-tsadc",
759 .data = (void *)&rk3366_tsadc_data,
762 .compatible = "rockchip,rk3368-tsadc",
763 .data = (void *)&rk3368_tsadc_data,
766 .compatible = "rockchip,rk3399-tsadc",
767 .data = (void *)&rk3399_tsadc_data,
771 MODULE_DEVICE_TABLE(of, of_rockchip_thermal_match);
774 rockchip_thermal_toggle_sensor(struct rockchip_thermal_sensor *sensor, bool on)
776 struct thermal_zone_device *tzd = sensor->tzd;
778 tzd->ops->set_mode(tzd,
779 on ? THERMAL_DEVICE_ENABLED : THERMAL_DEVICE_DISABLED);
782 static irqreturn_t rockchip_thermal_alarm_irq_thread(int irq, void *dev)
784 struct rockchip_thermal_data *thermal = dev;
787 dev_dbg(&thermal->pdev->dev, "thermal alarm\n");
789 thermal->chip->irq_ack(thermal->regs);
791 for (i = 0; i < thermal->chip->chn_num; i++)
792 thermal_zone_device_update(thermal->sensors[i].tzd);
797 static int rockchip_thermal_get_temp(void *_sensor, int *out_temp)
799 struct rockchip_thermal_sensor *sensor = _sensor;
800 struct rockchip_thermal_data *thermal = sensor->thermal;
801 const struct rockchip_tsadc_chip *tsadc = sensor->thermal->chip;
804 retval = tsadc->get_temp(tsadc->table,
805 sensor->id, thermal->regs, out_temp);
806 dev_dbg(&thermal->pdev->dev, "sensor %d - temp: %d, retval: %d\n",
807 sensor->id, *out_temp, retval);
812 static const struct thermal_zone_of_device_ops rockchip_of_thermal_ops = {
813 .get_temp = rockchip_thermal_get_temp,
816 static int rockchip_configure_from_dt(struct device *dev,
817 struct device_node *np,
818 struct rockchip_thermal_data *thermal)
820 u32 shut_temp, tshut_mode, tshut_polarity;
822 if (of_property_read_u32(np, "rockchip,hw-tshut-temp", &shut_temp)) {
824 "Missing tshut temp property, using default %d\n",
825 thermal->chip->tshut_temp);
826 thermal->tshut_temp = thermal->chip->tshut_temp;
828 if (shut_temp > INT_MAX) {
829 dev_err(dev, "Invalid tshut temperature specified: %d\n",
833 thermal->tshut_temp = shut_temp;
836 if (of_property_read_u32(np, "rockchip,hw-tshut-mode", &tshut_mode)) {
838 "Missing tshut mode property, using default (%s)\n",
839 thermal->chip->tshut_mode == TSHUT_MODE_GPIO ?
841 thermal->tshut_mode = thermal->chip->tshut_mode;
843 thermal->tshut_mode = tshut_mode;
846 if (thermal->tshut_mode > 1) {
847 dev_err(dev, "Invalid tshut mode specified: %d\n",
848 thermal->tshut_mode);
852 if (of_property_read_u32(np, "rockchip,hw-tshut-polarity",
855 "Missing tshut-polarity property, using default (%s)\n",
856 thermal->chip->tshut_polarity == TSHUT_LOW_ACTIVE ?
858 thermal->tshut_polarity = thermal->chip->tshut_polarity;
860 thermal->tshut_polarity = tshut_polarity;
863 if (thermal->tshut_polarity > 1) {
864 dev_err(dev, "Invalid tshut-polarity specified: %d\n",
865 thermal->tshut_polarity);
869 /* The tsadc wont to handle the error in here since some SoCs didn't
870 * need this property.
872 thermal->grf = syscon_regmap_lookup_by_phandle(np, "rockchip,grf");
878 rockchip_thermal_register_sensor(struct platform_device *pdev,
879 struct rockchip_thermal_data *thermal,
880 struct rockchip_thermal_sensor *sensor,
883 const struct rockchip_tsadc_chip *tsadc = thermal->chip;
886 tsadc->set_tshut_mode(id, thermal->regs, thermal->tshut_mode);
887 tsadc->set_tshut_temp(tsadc->table, id, thermal->regs,
888 thermal->tshut_temp);
890 sensor->thermal = thermal;
892 sensor->tzd = devm_thermal_zone_of_sensor_register(&pdev->dev, id,
893 sensor, &rockchip_of_thermal_ops);
894 if (IS_ERR(sensor->tzd)) {
895 error = PTR_ERR(sensor->tzd);
896 dev_err(&pdev->dev, "failed to register sensor %d: %d\n",
905 * Reset TSADC Controller, reset all tsadc registers.
907 static void rockchip_thermal_reset_controller(struct reset_control *reset)
909 reset_control_assert(reset);
910 usleep_range(10, 20);
911 reset_control_deassert(reset);
914 static int rockchip_thermal_probe(struct platform_device *pdev)
916 struct device_node *np = pdev->dev.of_node;
917 struct rockchip_thermal_data *thermal;
918 const struct of_device_id *match;
919 struct resource *res;
924 match = of_match_node(of_rockchip_thermal_match, np);
928 irq = platform_get_irq(pdev, 0);
930 dev_err(&pdev->dev, "no irq resource?\n");
934 thermal = devm_kzalloc(&pdev->dev, sizeof(struct rockchip_thermal_data),
939 thermal->pdev = pdev;
941 thermal->chip = (const struct rockchip_tsadc_chip *)match->data;
945 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
946 thermal->regs = devm_ioremap_resource(&pdev->dev, res);
947 if (IS_ERR(thermal->regs))
948 return PTR_ERR(thermal->regs);
950 thermal->reset = devm_reset_control_get(&pdev->dev, "tsadc-apb");
951 if (IS_ERR(thermal->reset)) {
952 error = PTR_ERR(thermal->reset);
953 dev_err(&pdev->dev, "failed to get tsadc reset: %d\n", error);
957 thermal->clk = devm_clk_get(&pdev->dev, "tsadc");
958 if (IS_ERR(thermal->clk)) {
959 error = PTR_ERR(thermal->clk);
960 dev_err(&pdev->dev, "failed to get tsadc clock: %d\n", error);
964 thermal->pclk = devm_clk_get(&pdev->dev, "apb_pclk");
965 if (IS_ERR(thermal->pclk)) {
966 error = PTR_ERR(thermal->pclk);
967 dev_err(&pdev->dev, "failed to get apb_pclk clock: %d\n",
972 error = clk_prepare_enable(thermal->clk);
974 dev_err(&pdev->dev, "failed to enable converter clock: %d\n",
979 error = clk_prepare_enable(thermal->pclk);
981 dev_err(&pdev->dev, "failed to enable pclk: %d\n", error);
982 goto err_disable_clk;
985 rockchip_thermal_reset_controller(thermal->reset);
987 error = rockchip_configure_from_dt(&pdev->dev, np, thermal);
989 dev_err(&pdev->dev, "failed to parse device tree data: %d\n",
991 goto err_disable_pclk;
994 thermal->chip->initialize(thermal->grf, thermal->regs,
995 thermal->tshut_polarity);
997 for (i = 0; i < thermal->chip->chn_num; i++) {
998 error = rockchip_thermal_register_sensor(pdev, thermal,
999 &thermal->sensors[i],
1000 thermal->chip->chn_id[i]);
1003 "failed to register sensor[%d] : error = %d\n",
1005 goto err_disable_pclk;
1009 error = devm_request_threaded_irq(&pdev->dev, irq, NULL,
1010 &rockchip_thermal_alarm_irq_thread,
1012 "rockchip_thermal", thermal);
1015 "failed to request tsadc irq: %d\n", error);
1016 goto err_disable_pclk;
1019 thermal->chip->control(thermal->regs, true);
1021 for (i = 0; i < thermal->chip->chn_num; i++)
1022 rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
1024 platform_set_drvdata(pdev, thermal);
1029 clk_disable_unprepare(thermal->pclk);
1031 clk_disable_unprepare(thermal->clk);
1036 static int rockchip_thermal_remove(struct platform_device *pdev)
1038 struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
1041 for (i = 0; i < thermal->chip->chn_num; i++) {
1042 struct rockchip_thermal_sensor *sensor = &thermal->sensors[i];
1044 rockchip_thermal_toggle_sensor(sensor, false);
1047 thermal->chip->control(thermal->regs, false);
1049 clk_disable_unprepare(thermal->pclk);
1050 clk_disable_unprepare(thermal->clk);
1055 static int __maybe_unused rockchip_thermal_suspend(struct device *dev)
1057 struct platform_device *pdev = to_platform_device(dev);
1058 struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
1061 for (i = 0; i < thermal->chip->chn_num; i++)
1062 rockchip_thermal_toggle_sensor(&thermal->sensors[i], false);
1064 thermal->chip->control(thermal->regs, false);
1066 clk_disable(thermal->pclk);
1067 clk_disable(thermal->clk);
1069 pinctrl_pm_select_sleep_state(dev);
1074 static int __maybe_unused rockchip_thermal_resume(struct device *dev)
1076 struct platform_device *pdev = to_platform_device(dev);
1077 struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
1081 error = clk_enable(thermal->clk);
1085 error = clk_enable(thermal->pclk);
1089 rockchip_thermal_reset_controller(thermal->reset);
1091 thermal->chip->initialize(thermal->grf, thermal->regs,
1092 thermal->tshut_polarity);
1094 for (i = 0; i < thermal->chip->chn_num; i++) {
1095 int id = thermal->sensors[i].id;
1097 thermal->chip->set_tshut_mode(id, thermal->regs,
1098 thermal->tshut_mode);
1099 thermal->chip->set_tshut_temp(thermal->chip->table,
1101 thermal->tshut_temp);
1104 thermal->chip->control(thermal->regs, true);
1106 for (i = 0; i < thermal->chip->chn_num; i++)
1107 rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
1109 pinctrl_pm_select_default_state(dev);
1114 static SIMPLE_DEV_PM_OPS(rockchip_thermal_pm_ops,
1115 rockchip_thermal_suspend, rockchip_thermal_resume);
1117 static struct platform_driver rockchip_thermal_driver = {
1119 .name = "rockchip-thermal",
1120 .pm = &rockchip_thermal_pm_ops,
1121 .of_match_table = of_rockchip_thermal_match,
1123 .probe = rockchip_thermal_probe,
1124 .remove = rockchip_thermal_remove,
1127 module_platform_driver(rockchip_thermal_driver);
1129 MODULE_DESCRIPTION("ROCKCHIP THERMAL Driver");
1130 MODULE_AUTHOR("Rockchip, Inc.");
1131 MODULE_LICENSE("GPL v2");
1132 MODULE_ALIAS("platform:rockchip-thermal");