drivers/thermal/rockchip_thermal.c

   1 /*
   2  * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms and conditions of the GNU General Public License,
   6  * version 2, as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope it will be useful, but WITHOUT
   9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  11  * more details.
  12  */
  13
  14 #include <linux/clk.h>
  15 #include <linux/delay.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/io.h>
  18 #include <linux/module.h>
  19 #include <linux/of.h>
  20 #include <linux/of_address.h>
  21 #include <linux/of_irq.h>
  22 #include <linux/platform_device.h>
  23 #include <linux/reset.h>
  24 #include <linux/thermal.h>
  25 #include <linux/timer.h>
  26 #include <linux/mfd/syscon.h>
  27 #include <linux/regmap.h>
  28 #include <linux/gpio.h>
  29 #include <linux/of_gpio.h>
  30 #include <linux/rockchip/common.h>
  31 #include "../../arch/arm/mach-rockchip/efuse.h"
  32
  33 #if 0
  34 #define thermal_dbg(dev, format, arg...)                \
  35         dev_printk(KERN_INFO , dev , format , ## arg)
  36 #else
  37 #define thermal_dbg(dev, format, arg...)
  38 #endif
  39
  40
  41 /**
  42  * If the temperature over a period of time High,
  43  * the resulting TSHUT gave CRU module,let it reset the entire chip,
  44  * or via GPIO give PMIC.
  45  */
  46 enum tshut_mode {
  47         TSHUT_MODE_CRU = 0,
  48         TSHUT_MODE_GPIO,
  49 };
  50
  51 enum tsadc_mode {
  52         TSADC_AUTO_MODE = 0,
  53         TSHUT_USER_MODE,
  54 };
  55
  56 /**
  57  * the system Temperature Sensors tshut(tshut) polarity
  58  * the bit 8 is tshut polarity.
  59  * 0: low active, 1: high active
  60  */
  61 enum tshut_polarity {
  62         TSHUT_LOW_ACTIVE = 0,
  63         TSHUT_HIGH_ACTIVE,
  64 };
  65
  66 /**
  67  * The system has three Temperature Sensors.  channel 0 is reserved,
  68  * channel 1 is for CPU, and channel 2 is for GPU.
  69  */
  70  /*
  71 enum sensor_id {
  72         SENSOR_CPU = 1,
  73         SENSOR_GPU,
  74 };
  75 */
  76
  77 struct rockchip_tsadc_chip {
  78         long hw_shut_temp;
  79         enum tshut_mode tshut_mode;
  80         enum tshut_polarity tshut_polarity;
  81         enum tsadc_mode mode;
  82         int cpu_id;
  83         int gpu_id;
  84
  85         /* Chip-wide methods */
  86         void (*initialize)(void __iomem *reg, enum tshut_polarity p);
  87         void (*irq_ack)(void __iomem *reg);
  88         void (*control)(void __iomem *reg, bool on);
  89
  90         /* Per-sensor methods */
  91         int (*get_temp)(int chn, void __iomem *reg, long *temp);
  92         void (*set_alarm_temp)(int chn, void __iomem *reg, long temp);
  93         void (*set_tshut_temp)(int chn, void __iomem *reg, long temp);
  94         void (*set_tshut_mode)(int chn, void __iomem *reg, enum tshut_mode m);
  95 };
  96
  97 struct rockchip_thermal_sensor {
  98         struct rockchip_thermal_data *thermal;
  99         struct thermal_zone_device *tzd;
 100         int id;
 101 };
 102
 103 #define NUM_SENSORS     2 /* Ignore unused sensor 0 */
 104
 105 struct rockchip_thermal_data {
 106         const struct rockchip_tsadc_chip *chip;
 107         struct kobject *rockchip_thermal_kobj;
 108         struct platform_device *pdev;
 109         struct reset_control *reset;
 110
 111         struct rockchip_thermal_sensor sensors[NUM_SENSORS];
 112
 113         struct clk *clk;
 114         struct clk *pclk;
 115         struct regmap *cru;
 116         struct regmap *grf;
 117         struct regmap *pmu;
 118
 119         int cpu_temp_adjust;
 120         int gpu_temp_adjust;
 121         int cpu_temp;
 122         bool logout;
 123         bool b_suspend;
 124         struct mutex suspend_lock;
 125
 126         void __iomem *regs;
 127
 128         long hw_shut_temp;
 129         enum tshut_mode tshut_mode;
 130         enum tshut_polarity tshut_polarity;
 131 };
 132
 133 /* TSADC V2 Sensor info define: */
 134 #define TSADCV2_USER_CON                        0x00
 135 #define TSADCV2_AUTO_CON                        0x04
 136 #define TSADCV2_INT_EN                          0x08
 137 #define TSADCV2_INT_PD                          0x0c
 138 #define TSADCV2_DATA(chn)                       (0x20 + (chn) * 0x04)
 139 #define TSADCV2_COMP_INT(chn)                   (0x30 + (chn) * 0x04)
 140 #define TSADCV2_COMP_SHUT(chn)                  (0x40 + (chn) * 0x04)
 141 #define TSADCV2_HIGHT_INT_DEBOUNCE              0x60
 142 #define TSADCV2_HIGHT_TSHUT_DEBOUNCE            0x64
 143 #define TSADCV2_AUTO_PERIOD                     0x68
 144 #define TSADCV2_AUTO_PERIOD_HT                  0x6c
 145
 146 #define TSADCV2_AUTO_EN                         BIT(0)
 147 #define TSADCV2_AUTO_DISABLE                    ~BIT(0)
 148 #define TSADCV2_AUTO_SRC_EN(chn)                BIT(4 + (chn))
 149 #define TSADCV2_AUTO_TSHUT_POLARITY_HIGH        BIT(8)
 150 #define TSADCV2_AUTO_TSHUT_POLARITY_LOW         ~BIT(8)
 151
 152 #define TSADCV2_INT_SRC_EN(chn)                 BIT(chn)
 153 #define TSADCV2_SHUT_2GPIO_SRC_EN(chn)          BIT(4 + (chn))
 154 #define TSADCV2_SHUT_2CRU_SRC_EN(chn)           BIT(8 + (chn))
 155
 156 #define TSADCV2_INT_PD_CLEAR                    ~BIT(8)
 157
 158 #define TSADCV2_DATA_MASK                       0xfff
 159 #define TSADCV3_DATA_MASK                       0x3ff
 160
 161 #define TSADCV2_HIGHT_INT_DEBOUNCE_COUNT        4
 162 #define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT      4
 163
 164 #define TSADCV2_AUTO_PERIOD_TIME                250 /* msec */
 165 #define TSADCV2_AUTO_PERIOD_HT_TIME             50  /* msec */
 166 #define TSADCV3_AUTO_PERIOD_TIME                1500 /* msec */
 167 #define TSADCV3_AUTO_PERIOD_HT_TIME             1000 /* msec */
 168
 169 #define TSADC_CPU_GATE
 170 /*#define TSADC_GPU_GATE*/
 171
 172 #define TSADC_CLK_GATE_DELAY_TIME               50/* usec */
 173 #define TSADC_CLK_CYCLE_TIME                    30/* usec */
 174 #define TSADC_USER_MODE_DELAY_TIME              200/* usec */
 175
 176 #define TSADC_TEST
 177 #define TSADC_TEST_SAMPLE_TIME                  200/* msec */
 178
 179 struct tsadc_table {
 180         unsigned long code;
 181         long temp;
 182 };
 183 static struct rockchip_thermal_data *s_thermal = NULL;
 184 static const struct tsadc_table v2_code_table[] = {
 185         {TSADCV2_DATA_MASK, -40000},
 186         {3800, -40000},
 187         {3792, -35000},
 188         {3783, -30000},
 189         {3774, -25000},
 190         {3765, -20000},
 191         {3756, -15000},
 192         {3747, -10000},
 193         {3737, -5000},
 194         {3728, 0},
 195         {3718, 5000},
 196         {3708, 10000},
 197         {3698, 15000},
 198         {3688, 20000},
 199         {3678, 25000},
 200         {3667, 30000},
 201         {3656, 35000},
 202         {3645, 40000},
 203         {3634, 45000},
 204         {3623, 50000},
 205         {3611, 55000},
 206         {3600, 60000},
 207         {3588, 65000},
 208         {3575, 70000},
 209         {3563, 75000},
 210         {3550, 80000},
 211         {3537, 85000},
 212         {3524, 90000},
 213         {3510, 95000},
 214         {3496, 100000},
 215         {3482, 105000},
 216         {3467, 110000},
 217         {3452, 115000},
 218         {3437, 120000},
 219         {3421, 125000},
 220         {0, 125000},
 221 };
 222
 223 static const struct tsadc_table v3_code_table[] = {
 224         {0, -40000},
 225         {106, -40000},
 226         {108, -35000},
 227         {110, -30000},
 228         {112, -25000},
 229         {114, -20000},
 230         {116, -15000},
 231         {118, -10000},
 232         {120, -5000},
 233         {122, 0},
 234         {124, 5000},
 235         {126, 10000},
 236         {128, 15000},
 237         {130, 20000},
 238         {132, 25000},
 239         {134, 30000},
 240         {136, 35000},
 241         {138, 40000},
 242         {140, 45000},
 243         {142, 50000},
 244         {144, 55000},
 245         {146, 60000},
 246         {148, 65000},
 247         {150, 70000},
 248         {152, 75000},
 249         {154, 80000},
 250         {156, 85000},
 251         {158, 90000},
 252         {160, 95000},
 253         {162, 100000},
 254         {163, 105000},
 255         {165, 110000},
 256         {167, 115000},
 257         {169, 120000},
 258         {171, 125000},
 259         {TSADCV3_DATA_MASK, 125000},
 260 };
 261
 262 static u32 rk_tsadcv2_temp_to_code(long temp)
 263 {
 264         int high, low, mid;
 265
 266         low = 0;
 267         high = ARRAY_SIZE(v2_code_table) - 1;
 268         mid = (high + low) / 2;
 269
 270         if (temp < v2_code_table[low].temp || temp > v2_code_table[high].temp)
 271                 return 0;
 272
 273         while (low <= high) {
 274                 if (temp == v2_code_table[mid].temp)
 275                         return v2_code_table[mid].code;
 276                 else if (temp < v2_code_table[mid].temp)
 277                         high = mid - 1;
 278                 else
 279                         low = mid + 1;
 280                 mid = (low + high) / 2;
 281         }
 282
 283         return 0;
 284 }
 285
 286 static long rk_tsadcv2_code_to_temp(u32 code)
 287 {
 288         int high, low, mid;
 289
 290         low = 0;
 291         high = ARRAY_SIZE(v2_code_table) - 1;
 292         mid = (high + low) / 2;
 293
 294         if (code > v2_code_table[low].code || code < v2_code_table[high].code)
 295                 return 125000; /* No code available, return max temperature */
 296
 297         while (low <= high) {
 298                 if (code >= v2_code_table[mid].code && code <
 299                     v2_code_table[mid - 1].code)
 300                         return v2_code_table[mid].temp;
 301                 else if (code < v2_code_table[mid].code)
 302                         low = mid + 1;
 303                 else
 304                         high = mid - 1;
 305                 mid = (low + high) / 2;
 306         }
 307
 308         return 125000;
 309 }
 310
 311 static u32 rk_tsadcv3_temp_to_code(long temp)
 312 {
 313         int high, low, mid;
 314
 315
 316         low = 0;
 317         high = ARRAY_SIZE(v3_code_table) - 1;
 318         mid = (high + low) / 2;
 319
 320         if (temp < v3_code_table[low].temp || temp > v3_code_table[high].temp)
 321                 return 0;
 322
 323         while (low <= high) {
 324                 if (temp == v3_code_table[mid].temp)
 325                         return v3_code_table[mid].code;
 326                 else if (temp < v3_code_table[mid].temp)
 327                         high = mid - 1;
 328                 else
 329                         low = mid + 1;
 330                 mid = (low + high) / 2;
 331         }
 332
 333         return 0;
 334 }
 335
 336 static long rk_tsadcv3_code_to_temp(u32 code)
 337 {
 338         int high, low, mid;
 339
 340         low = 0;
 341         high = ARRAY_SIZE(v3_code_table) - 1;
 342         mid = (high + low) / 2;
 343
 344         if (code < v3_code_table[low].code || code > v3_code_table[high].code)
 345                 return 125000; /* No code available, return max temperature */
 346
 347         while (low <= high) {
 348                 if (code <= v3_code_table[mid].code && code >
 349                         v3_code_table[mid - 1].code) {
 350                         return v3_code_table[mid - 1].temp + (v3_code_table[mid].temp -
 351                                 v3_code_table[mid - 1].temp) * (code - v3_code_table[mid - 1].code)
 352                                 / (v3_code_table[mid].code - v3_code_table[mid - 1].code);
 353                 } else if (code > v3_code_table[mid].code)
 354                         low = mid + 1;
 355                 else
 356                         high = mid - 1;
 357                 mid = (low + high) / 2;
 358         }
 359
 360         return 125000;
 361 }
 362
 363 /**
 364  * rk_tsadcv2_initialize - initialize TASDC Controller
 365  * (1) Set TSADCV2_AUTO_PERIOD, configure the interleave between
 366  * every two accessing of TSADC in normal operation.
 367  * (2) Set TSADCV2_AUTO_PERIOD_HT, configure the interleave between
 368  * every two accessing of TSADC after the temperature is higher
 369  * than COM_SHUT or COM_INT.
 370  * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE,
 371  * if the temperature is higher than COMP_INT or COMP_SHUT for
 372  * "debounce" times, TSADC controller will generate interrupt or TSHUT.
 373  */
 374 static void rk_tsadcv2_initialize(void __iomem *regs,
 375                                   enum tshut_polarity tshut_polarity)
 376 {
 377         if (tshut_polarity == TSHUT_HIGH_ACTIVE)
 378                 writel_relaxed(0 | (TSADCV2_AUTO_TSHUT_POLARITY_HIGH),
 379                                regs + TSADCV2_AUTO_CON);
 380
 381         writel_relaxed(TSADCV2_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD);
 382         writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
 383                        regs + TSADCV2_HIGHT_INT_DEBOUNCE);
 384         writel_relaxed(TSADCV2_AUTO_PERIOD_HT_TIME,
 385                        regs + TSADCV2_AUTO_PERIOD_HT);
 386         writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
 387                        regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
 388 }
 389
 390 static void rk_tsadcv3_initialize(void __iomem *regs,
 391                                   enum tshut_polarity tshut_polarity)
 392 {
 393         if (tshut_polarity == TSHUT_HIGH_ACTIVE)
 394                 writel_relaxed(0 | (TSADCV2_AUTO_TSHUT_POLARITY_HIGH),
 395                                regs + TSADCV2_AUTO_CON);
 396
 397         writel_relaxed(TSADCV3_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD);
 398         writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
 399                        regs + TSADCV2_HIGHT_INT_DEBOUNCE);
 400         writel_relaxed(TSADCV3_AUTO_PERIOD_HT_TIME,
 401                        regs + TSADCV2_AUTO_PERIOD_HT);
 402         writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
 403                        regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
 404 }
 405
 406 static void rk_tsadcv2_irq_ack(void __iomem *regs)
 407 {
 408         u32 val;
 409
 410         val = readl_relaxed(regs + TSADCV2_INT_PD);
 411         writel_relaxed(val & TSADCV2_INT_PD_CLEAR, regs + TSADCV2_INT_PD);
 412 }
 413
 414 static void rk_tsadcv2_control(void __iomem *regs, bool enable)
 415 {
 416         u32 val;
 417
 418         val = readl_relaxed(regs + TSADCV2_AUTO_CON);
 419         if (enable)
 420                 val |= TSADCV2_AUTO_EN;
 421         else
 422                 val &= ~TSADCV2_AUTO_EN;
 423
 424         writel_relaxed(val, regs + TSADCV2_AUTO_CON);
 425 }
 426
 427 static int rk_tsadcv2_get_temp(int chn, void __iomem *regs, long *temp)
 428 {
 429         u32 val;
 430
 431         /* the A/D value of the channel last conversion need some time */
 432         val = readl_relaxed(regs + TSADCV2_DATA(chn));
 433         if (val == 0)
 434                 return -EAGAIN;
 435
 436         *temp = rk_tsadcv2_code_to_temp(val);
 437
 438         return 0;
 439 }
 440
 441 static void rk_tsadcv2_alarm_temp(int chn, void __iomem *regs, long temp)
 442 {
 443         u32 alarm_value, int_en;
 444
 445         alarm_value = rk_tsadcv2_temp_to_code(temp);
 446         writel_relaxed(alarm_value & TSADCV2_DATA_MASK,
 447                        regs + TSADCV2_COMP_INT(chn));
 448
 449         int_en = readl_relaxed(regs + TSADCV2_INT_EN);
 450         int_en |= TSADCV2_INT_SRC_EN(chn);
 451         writel_relaxed(int_en, regs + TSADCV2_INT_EN);
 452 }
 453
 454 static void rk_tsadcv2_tshut_temp(int chn, void __iomem *regs, long temp)
 455 {
 456         u32 tshut_value, val;
 457
 458         tshut_value = rk_tsadcv2_temp_to_code(temp);
 459         writel_relaxed(tshut_value, regs + TSADCV2_COMP_SHUT(chn));
 460
 461         /* TSHUT will be valid */
 462         val = readl_relaxed(regs + TSADCV2_AUTO_CON);
 463         writel_relaxed(val | TSADCV2_AUTO_SRC_EN(chn), regs + TSADCV2_AUTO_CON);
 464 }
 465
 466 static int rk_tsadcv3_get_temp(int chn, void __iomem *regs, long *temp)
 467 {
 468         u32 val;
 469
 470         /* the A/D value of the channel last conversion need some time */
 471         val = readl_relaxed(regs + TSADCV2_DATA(chn));
 472         if (val == 0)
 473                 return -EAGAIN;
 474
 475         *temp = rk_tsadcv3_code_to_temp(val);
 476
 477         return 0;
 478 }
 479
 480 static void rk_tsadcv3_alarm_temp(int chn, void __iomem *regs, long temp)
 481 {
 482         u32 alarm_value, int_en;
 483
 484         alarm_value = rk_tsadcv3_temp_to_code(temp);
 485         writel_relaxed(alarm_value & TSADCV2_DATA_MASK,
 486                        regs + TSADCV2_COMP_INT(chn));
 487
 488         int_en = readl_relaxed(regs + TSADCV2_INT_EN);
 489         int_en |= TSADCV2_INT_SRC_EN(chn);
 490         writel_relaxed(int_en, regs + TSADCV2_INT_EN);
 491 }
 492
 493 static void rk_tsadcv3_tshut_temp(int chn, void __iomem *regs, long temp)
 494 {
 495         u32 tshut_value, val;
 496
 497         tshut_value = rk_tsadcv3_temp_to_code(temp);
 498         writel_relaxed(tshut_value, regs + TSADCV2_COMP_SHUT(chn));
 499
 500         /* TSHUT will be valid */
 501         val = readl_relaxed(regs + TSADCV2_AUTO_CON);
 502         writel_relaxed(val | TSADCV2_AUTO_SRC_EN(chn), regs + TSADCV2_AUTO_CON);
 503 }
 504
 505 static void rk_tsadcv2_tshut_mode(int chn, void __iomem *regs,
 506                                   enum tshut_mode mode)
 507 {
 508         u32 val;
 509
 510         val = readl_relaxed(regs + TSADCV2_INT_EN);
 511         if (mode == TSHUT_MODE_GPIO) {
 512                 val &= ~TSADCV2_SHUT_2CRU_SRC_EN(chn);
 513                 val |= TSADCV2_SHUT_2GPIO_SRC_EN(chn);
 514         } else {
 515                 val &= ~TSADCV2_SHUT_2GPIO_SRC_EN(chn);
 516                 val |= TSADCV2_SHUT_2CRU_SRC_EN(chn);
 517         }
 518
 519         writel_relaxed(val, regs + TSADCV2_INT_EN);
 520 }
 521
 522 static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
 523         .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
 524         .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
 525         .hw_shut_temp = 125000,
 526         .mode = TSADC_AUTO_MODE,
 527         .cpu_id = 1,
 528         .gpu_id = 2,
 529
 530         .initialize = rk_tsadcv2_initialize,
 531         .irq_ack = rk_tsadcv2_irq_ack,
 532         .control = rk_tsadcv2_control,
 533         .get_temp = rk_tsadcv2_get_temp,
 534         .set_alarm_temp = rk_tsadcv2_alarm_temp,
 535         .set_tshut_temp = rk_tsadcv2_tshut_temp,
 536         .set_tshut_mode = rk_tsadcv2_tshut_mode,
 537 };
 538
 539 static const struct rockchip_tsadc_chip rk3368_tsadc_data = {
 540         .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
 541         .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
 542         .hw_shut_temp = 125000,
 543         .mode = TSHUT_USER_MODE,
 544         .cpu_id = 0,
 545         .gpu_id = 1,
 546
 547         .initialize = rk_tsadcv3_initialize,
 548         .irq_ack = rk_tsadcv2_irq_ack,
 549         .control = rk_tsadcv2_control,
 550         .get_temp = rk_tsadcv3_get_temp,
 551         .set_alarm_temp = rk_tsadcv3_alarm_temp,
 552         .set_tshut_temp = rk_tsadcv3_tshut_temp,
 553         .set_tshut_mode = rk_tsadcv2_tshut_mode,
 554 };
 555
 556 static const struct of_device_id of_rockchip_thermal_match[] = {
 557         {
 558                 .compatible = "rockchip,rk3288-tsadc",
 559                 .data = (void *)&rk3288_tsadc_data,
 560         },
 561         {
 562                 .compatible = "rockchip,rk3368-tsadc",
 563                 .data = (void *)&rk3368_tsadc_data,
 564         },
 565         { /* end */ },
 566 };
 567 MODULE_DEVICE_TABLE(of, of_rockchip_thermal_match);
 568
 569 static void rockchip_thermal_toggle_sensor(struct rockchip_thermal_sensor *sensor
 570         , bool on)
 571 {
 572         struct thermal_zone_device *tzd = sensor->tzd;
 573
 574         tzd->ops->set_mode(tzd,
 575                 on ? THERMAL_DEVICE_ENABLED : THERMAL_DEVICE_DISABLED);
 576 }
 577
 578 static irqreturn_t rockchip_thermal_alarm_irq_thread(int irq, void *dev)
 579 {
 580         struct rockchip_thermal_data *thermal = dev;
 581         int i;
 582
 583         dev_dbg(&thermal->pdev->dev, "thermal alarm\n");
 584
 585         thermal->chip->irq_ack(thermal->regs);
 586
 587         for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
 588                 thermal_zone_device_update(thermal->sensors[i].tzd);
 589
 590         return IRQ_HANDLED;
 591 }
 592
 593 /*
 594 static int rockchip_thermal_set_trips(void *_sensor, long low, long high)
 595 {
 596         struct rockchip_thermal_sensor *sensor = _sensor;
 597         struct rockchip_thermal_data *thermal = sensor->thermal;
 598         const struct rockchip_tsadc_chip *tsadc = thermal->chip;
 599
 600         dev_dbg(&thermal->pdev->dev, "%s: sensor %d: low: %ld, high %ld\n",
 601                 __func__, sensor->id, low, high);
 602
 603         tsadc->set_alarm_temp(sensor->id, thermal->regs, high);
 604
 605         return 0;
 606 }
 607 */
 608
 609 static int rockchip_thermal_get_temp(void *_sensor, long *out_temp)
 610 {
 611         struct rockchip_thermal_sensor *sensor = _sensor;
 612         struct rockchip_thermal_data *thermal = sensor->thermal;
 613         const struct rockchip_tsadc_chip *tsadc = sensor->thermal->chip;
 614         int retval;
 615
 616         retval = tsadc->get_temp(sensor->id, thermal->regs, out_temp);
 617         dev_dbg(&thermal->pdev->dev, "sensor %d - temp: %ld, retval: %d\n",
 618                 sensor->id, *out_temp, retval);
 619
 620         return retval;
 621 }
 622
 623 static int rockchip_configure_from_dt(struct device *dev,
 624                                       struct device_node *np,
 625                                       struct rockchip_thermal_data *thermal)
 626 {
 627         u32 shut_temp, tshut_mode, tshut_polarity;
 628         u32 rate;
 629
 630         if(of_property_read_u32(np, "clock-frequency", &rate))
 631         {
 632                 dev_err(dev, "Missing clock-frequency property in the DT.\n");
 633                 return -EINVAL;
 634         }
 635         clk_set_rate(thermal->clk, rate);
 636
 637         if (of_property_read_u32(np, "hw-shut-temp", &shut_temp)) {
 638                 dev_warn(dev,
 639                          "Missing tshut temp property, using default %ld\n",
 640                          thermal->chip->hw_shut_temp);
 641                 thermal->hw_shut_temp = thermal->chip->hw_shut_temp;
 642         } else {
 643                 thermal->hw_shut_temp = shut_temp;
 644         }
 645
 646         if (thermal->hw_shut_temp > INT_MAX) {
 647                 dev_err(dev, "Invalid tshut temperature specified: %ld\n",
 648                         thermal->hw_shut_temp);
 649                 return -ERANGE;
 650         }
 651
 652         if (of_property_read_u32(np, "tsadc-tshut-mode", &tshut_mode)) {
 653                 dev_warn(dev,
 654                          "Missing tshut mode property, using default (%s)\n",
 655                          thermal->chip->tshut_mode == TSHUT_MODE_GPIO ?
 656                                 "gpio" : "cru");
 657                 thermal->tshut_mode = thermal->chip->tshut_mode;
 658         } else {
 659                 thermal->tshut_mode = tshut_mode;
 660         }
 661
 662         if (thermal->tshut_mode > 1) {
 663                 dev_err(dev, "Invalid tshut mode specified: %d\n",
 664                         thermal->tshut_mode);
 665                 return -EINVAL;
 666         }
 667
 668         if (of_property_read_u32(np, "tsadc-tshut-polarity", &tshut_polarity)) {
 669                 dev_warn(dev,
 670                          "Missing tshut-polarity property, using default (%s)\n",
 671                          thermal->chip->tshut_polarity == TSHUT_LOW_ACTIVE ?
 672                                 "low" : "high");
 673                 thermal->tshut_polarity = thermal->chip->tshut_polarity;
 674         } else {
 675                 thermal->tshut_polarity = tshut_polarity;
 676         }
 677
 678         if (thermal->tshut_polarity > 1) {
 679                 dev_err(dev, "Invalid tshut-polarity specified: %d\n",
 680                         thermal->tshut_polarity);
 681                 return -EINVAL;
 682         }
 683
 684         return 0;
 685 }
 686
 687 static int
 688 rockchip_thermal_register_sensor(struct platform_device *pdev,
 689                                  struct rockchip_thermal_data *thermal,
 690                                  struct rockchip_thermal_sensor *sensor,
 691                                  int id)
 692 {
 693         const struct rockchip_tsadc_chip *tsadc = thermal->chip;
 694         int error;
 695
 696         tsadc->set_tshut_mode(id, thermal->regs, thermal->tshut_mode);
 697         tsadc->set_tshut_temp(id, thermal->regs, thermal->hw_shut_temp);
 698
 699         sensor->thermal = thermal;
 700         sensor->id = id;
 701         sensor->tzd = thermal_zone_of_sensor_register(&pdev->dev, id, sensor,
 702                                                 rockchip_thermal_get_temp,
 703                                                 NULL);
 704         if (IS_ERR(sensor->tzd)) {
 705                 error = PTR_ERR(sensor->tzd);
 706                 dev_err(&pdev->dev, "failed to register sensor %d: %d\n",
 707                         id, error);
 708                 return error;
 709         }
 710
 711         return 0;
 712 }
 713
 714 /*
 715  * Reset TSADC Controller, reset all tsadc registers.
 716  */
 717 static void rockchip_thermal_reset_controller(struct reset_control *reset)
 718 {
 719         reset_control_assert(reset);
 720         usleep_range(10, 20);
 721         reset_control_deassert(reset);
 722 }
 723
 724 static struct rockchip_thermal_data *rockchip_thermal_get_data(void)
 725 {
 726         BUG_ON(!s_thermal);
 727         return s_thermal;
 728 }
 729
 730 static int rockchip_thermal_user_mode_get_temp(struct rockchip_thermal_data *thermal,
 731         int chn, int voltage)
 732 {
 733         unsigned long flags;
 734         int ret;
 735 #ifdef TSADC_CPU_GATE
 736         int val_cpu, temp_cpu;
 737 #endif
 738 #ifdef TSADC_GPU_GATE
 739         int val_gpu, temp_gpu;
 740 #endif
 741
 742         local_irq_save(flags);
 743         /* GPU_GATING*/
 744 #ifdef TSADC_GPU_GATE
 745         /*ret = regmap_write(thermal->cru, 0x210, 0x08000800);*/
 746         ret = regmap_write(thermal->cru, 0x210, 0x09d809d8);
 747         if (ret)
 748                 printk("Couldn't write to cru\n");
 749         ret = regmap_write(thermal->cru, 0x214, 0x03000300);
 750         if (ret)
 751                 printk("Couldn't write to cru\n");
 752 #endif
 753
 754         /* CPU 24M slow mode*/
 755 #ifdef TSADC_CPU_GATE
 756         ret = regmap_write(thermal->cru, 0xc, 0x03000000);
 757         if (ret)
 758                 printk("Couldn't write to cru\n");
 759         ret = regmap_write(thermal->cru, 0x1c, 0x03000000);
 760         if (ret)
 761                 printk("Couldn't write to cru\n");
 762 #endif
 763         udelay(TSADC_CLK_GATE_DELAY_TIME);
 764
 765 #ifdef TSADC_CPU_GATE
 766         /*channe 0*/
 767         /*power up, channel 0*/
 768         writel_relaxed(0x208, thermal->regs + TSADCV2_USER_CON);
 769         while(1)
 770         {
 771                 u32 val_cpu_pd;
 772
 773                 val_cpu_pd = readl_relaxed(thermal->regs + TSADCV2_INT_PD);
 774                 udelay(TSADC_CLK_CYCLE_TIME);
 775                 if ((val_cpu_pd & 0x100) == 0x100) {
 776                         udelay(TSADC_USER_MODE_DELAY_TIME);
 777                         /*clear eoc inter*/
 778                         writel_relaxed(0x100, thermal->regs + TSADCV2_INT_PD);
 779                         /*read adc data*/
 780                         val_cpu = readl_relaxed(thermal->regs + TSADCV2_DATA(0));
 781                         break;
 782                 }
 783         }
 784         /*power down, channel 0*/
 785         writel_relaxed(0x200, thermal->regs + TSADCV2_USER_CON);
 786 #endif
 787
 788 #ifdef TSADC_GPU_GATE
 789         udelay(10);
 790
 791         /*channe 1*/
 792         /*power up, channel */
 793         writel_relaxed(0x208 | 0x1, thermal->regs + TSADCV2_USER_CON);
 794         while(1)
 795         {
 796                 u32 val_gpu_pd;
 797
 798                 val_gpu_pd = readl_relaxed(thermal->regs + TSADCV2_INT_PD);
 799                 udelay(TSADC_CLK_CYCLE_TIME);
 800                 if ((val_gpu_pd & 0x100) == 0x100) {
 801                         udelay(TSADC_USER_MODE_DELAY_TIME);
 802                         /*clear eoc inter*/
 803                         writel_relaxed(0x100, thermal->regs + TSADCV2_INT_PD);
 804                         /*read adc data*/
 805                         val_gpu = readl_relaxed(thermal->regs + TSADCV2_DATA(1));
 806                         break;
 807                 }
 808         }
 809         /*power down, channel */
 810         writel_relaxed(0x200, thermal->regs + TSADCV2_USER_CON);
 811 #endif
 812
 813         /* CPU normal mode*/
 814 #ifdef TSADC_CPU_GATE
 815         ret = regmap_write(thermal->cru, 0xc, 0x03000100);
 816         if (ret)
 817                 printk("Couldn't write to cru\n");
 818         ret = regmap_write(thermal->cru, 0x1c, 0x03000100);
 819         if (ret)
 820                 printk("Couldn't write to cru\n");
 821 #endif
 822
 823         /* GPU_UNGATING*/
 824 #ifdef TSADC_GPU_GATE
 825         ret = regmap_write(thermal->cru, 0x214, 0x03000000);
 826         if (ret)
 827                 printk("Couldn't write to cru\n");
 828
 829         ret = regmap_write(thermal->cru, 0x210, 0x09d80000);
 830         if (ret)
 831                 printk("Couldn't write to cru\n");
 832 #endif
 833         local_irq_restore(flags);
 834
 835 #ifdef TSADC_CPU_GATE
 836         temp_cpu = rk_tsadcv3_code_to_temp((val_cpu * voltage + 500000) / 1000000) / 1000;
 837         temp_cpu = temp_cpu - thermal->cpu_temp_adjust;
 838         thermal->cpu_temp = temp_cpu;
 839         if(thermal->logout)
 840                 printk("cpu[%d, %d], voltage: %d\n"
 841                         , val_cpu, temp_cpu, voltage);
 842 #endif
 843
 844         return temp_cpu;
 845 }
 846
 847 int rockchip_tsadc_get_temp(int chn, int voltage)
 848 {
 849         struct rockchip_thermal_data *thermal = rockchip_thermal_get_data();
 850         long out_temp;
 851         int temp;
 852
 853         mutex_lock(&thermal->suspend_lock);
 854         if(thermal->b_suspend) {
 855                 temp = INVALID_TEMP;
 856                 mutex_unlock(&thermal->suspend_lock);
 857                 return temp;
 858         }
 859
 860         if (thermal->chip->mode == TSADC_AUTO_MODE)
 861         {
 862                 thermal->chip->get_temp(chn, thermal->regs, &out_temp);
 863                 temp = (int)out_temp/1000;
 864         }
 865         else {
 866                 temp = rockchip_thermal_user_mode_get_temp(thermal, chn, voltage);
 867         }
 868         mutex_unlock(&thermal->suspend_lock);
 869
 870         return temp;
 871 }
 872 EXPORT_SYMBOL(rockchip_tsadc_get_temp);
 873
 874 static ssize_t rockchip_thermal_temp_adjust_test_store(struct kobject *kobj
 875         , struct kobj_attribute *attr, const char *buf, size_t n)
 876 {
 877         struct rockchip_thermal_data *thermal = rockchip_thermal_get_data();
 878         int getdata;
 879         char cmd;
 880         const char *buftmp = buf;
 881
 882         sscanf(buftmp, "%c ", &cmd);
 883         switch (cmd) {
 884         case 'c':
 885                 sscanf(buftmp, "%c %d", &cmd, &getdata);
 886                 thermal->cpu_temp_adjust = getdata;
 887                 printk("get cpu_temp_adjust value = %d\n", getdata);
 888
 889                 break;
 890         case 'g':
 891                 sscanf(buftmp, "%c %d", &cmd, &getdata);
 892                 thermal->gpu_temp_adjust = getdata;
 893                 printk("get gpu_temp_adjust value = %d\n", getdata);
 894
 895                 break;
 896         default:
 897                 printk("Unknown command\n");
 898                 break;
 899         }
 900
 901         return n;
 902 }
 903
 904 static ssize_t rockchip_thermal_temp_adjust_test_show(struct kobject *kobj
 905         , struct kobj_attribute *attr, char *buf)
 906 {
 907         struct rockchip_thermal_data *thermal = rockchip_thermal_get_data();
 908         char *str = buf;
 909
 910         str += sprintf(str, "rockchip_thermal: cpu:%d, gpu:%d\n"
 911                 , thermal->cpu_temp_adjust, thermal->gpu_temp_adjust);
 912         return (str - buf);
 913 }
 914
 915 static ssize_t rockchip_thermal_temp_test_store(struct kobject *kobj
 916         , struct kobj_attribute *attr, const char *buf, size_t n)
 917 {
 918         struct rockchip_thermal_data *thermal = rockchip_thermal_get_data();
 919         char cmd;
 920         const char *buftmp = buf;
 921
 922         sscanf(buftmp, "%c", &cmd);
 923         switch (cmd) {
 924         case 't':
 925                 thermal->logout = true;
 926                 break;
 927         case 'f':
 928                 thermal->logout = false;
 929                 break;
 930         default:
 931                 printk("Unknown command\n");
 932                 break;
 933         }
 934
 935         return n;
 936 }
 937
 938 static ssize_t rockchip_thermal_temp_test_show(struct kobject *kobj
 939         , struct kobj_attribute *attr, char *buf)
 940 {
 941         struct rockchip_thermal_data *thermal = rockchip_thermal_get_data();
 942         char *str = buf;
 943
 944         str += sprintf(str, "current cpu_temp:%d\n"
 945                 , thermal->cpu_temp);
 946         return (str - buf);
 947 }
 948
 949 struct rockchip_thermal_attribute {
 950         struct attribute        attr;
 951         ssize_t (*show)(struct kobject *kobj, struct kobj_attribute *attr,
 952                 char *buf);
 953         ssize_t (*store)(struct kobject *kobj, struct kobj_attribute *attr,
 954                 const char *buf, size_t n);
 955 };
 956
 957 static struct rockchip_thermal_attribute rockchip_thermal_attrs[] = {
 958         /*node_name     permision show_func store_func*/
 959         __ATTR(temp_adjust, S_IRUGO | S_IWUSR, rockchip_thermal_temp_adjust_test_show
 960                 , rockchip_thermal_temp_adjust_test_store),
 961         __ATTR(temp, S_IRUGO | S_IWUSR, rockchip_thermal_temp_test_show
 962                 , rockchip_thermal_temp_test_store),
 963 };
 964
 965 static int rockchip_thermal_probe(struct platform_device *pdev)
 966 {
 967         struct device_node *np = pdev->dev.of_node;
 968         struct rockchip_thermal_data *thermal;
 969         const struct of_device_id *match;
 970         struct resource *res;
 971         int irq;
 972         int i;
 973         int error;
 974
 975         match = of_match_node(of_rockchip_thermal_match, np);
 976         if (!match)
 977                 return -ENXIO;
 978
 979         irq = platform_get_irq(pdev, 0);
 980         if (irq < 0) {
 981                 dev_err(&pdev->dev, "no irq resource?\n");
 982                 return -EINVAL;
 983         }
 984
 985         thermal = devm_kzalloc(&pdev->dev, sizeof(struct rockchip_thermal_data),
 986                                GFP_KERNEL);
 987         if (!thermal)
 988                 return -ENOMEM;
 989
 990         thermal->pdev = pdev;
 991
 992         thermal->chip = (const struct rockchip_tsadc_chip *)match->data;
 993         if (!thermal->chip)
 994                 return -EINVAL;
 995
 996         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 997         thermal->regs = devm_ioremap_resource(&pdev->dev, res);
 998         if (IS_ERR(thermal->regs))
 999                 return PTR_ERR(thermal->regs);
1000
1001         thermal->reset = devm_reset_control_get(&pdev->dev, "tsadc-apb");
1002         if (IS_ERR(thermal->reset)) {
1003                 error = PTR_ERR(thermal->reset);
1004                 dev_err(&pdev->dev, "failed to get tsadc reset: %d\n", error);
1005                 return error;
1006         }
1007
1008         thermal->cru = syscon_regmap_lookup_by_phandle(np, "rockchip,cru");
1009         if (IS_ERR(thermal->cru)) {
1010                 dev_err(&pdev->dev, "couldn't find cru regmap\n");
1011                 return PTR_ERR(thermal->cru);
1012         }
1013
1014         thermal->pmu = syscon_regmap_lookup_by_phandle(np, "rockchip,pmu");
1015         if (IS_ERR(thermal->pmu)) {
1016                 dev_err(&pdev->dev, "couldn't find pmu regmap\n");
1017                 return PTR_ERR(thermal->pmu);
1018         }
1019
1020         thermal->grf = syscon_regmap_lookup_by_phandle(np, "rockchip,grf");
1021         if (IS_ERR(thermal->grf)) {
1022                 dev_err(&pdev->dev, "couldn't find grf regmap\n");
1023                 return PTR_ERR(thermal->grf);
1024         }
1025
1026         thermal->clk = devm_clk_get(&pdev->dev, "tsadc");
1027         if (IS_ERR(thermal->clk)) {
1028                 error = PTR_ERR(thermal->clk);
1029                 dev_err(&pdev->dev, "failed to get tsadc clock: %d\n", error);
1030                 return error;
1031         }
1032
1033         thermal->pclk = devm_clk_get(&pdev->dev, "apb_pclk");
1034         if (IS_ERR(thermal->pclk)) {
1035                 error = PTR_ERR(thermal->clk);
1036                 dev_err(&pdev->dev, "failed to get apb_pclk clock: %d\n",
1037                         error);
1038                 return error;
1039         }
1040
1041         error = clk_prepare_enable(thermal->clk);
1042         if (error) {
1043                 dev_err(&pdev->dev, "failed to enable converter clock: %d\n"
1044                         , error);
1045                 return error;
1046         }
1047
1048         error = clk_prepare_enable(thermal->pclk);
1049         if (error) {
1050                 dev_err(&pdev->dev, "failed to enable pclk: %d\n", error);
1051                 goto err_disable_clk;
1052         }
1053
1054         rockchip_thermal_reset_controller(thermal->reset);
1055         error = rockchip_configure_from_dt(&pdev->dev, np, thermal);
1056         if (error) {
1057                 dev_err(&pdev->dev, "failed to parse device tree data: %d\n",
1058                         error);
1059                 goto err_disable_pclk;
1060         }
1061         thermal->cpu_temp_adjust = rockchip_efuse_get_temp_adjust(0);
1062         if (thermal->chip->mode == TSADC_AUTO_MODE)
1063         {
1064                 thermal->chip->initialize(thermal->regs, thermal->tshut_polarity);
1065                 error = rockchip_thermal_register_sensor(pdev, thermal,
1066                                                          &thermal->sensors[0],
1067                                                          thermal->chip->cpu_id);
1068                 if (error) {
1069                         dev_err(&pdev->dev,
1070                                 "failed to register CPU thermal sensor: %d\n", error);
1071                         goto err_disable_pclk;
1072                 }
1073
1074                 error = rockchip_thermal_register_sensor(pdev, thermal,
1075                                                          &thermal->sensors[1],
1076                                                          thermal->chip->gpu_id);
1077                 if (error) {
1078                         dev_err(&pdev->dev,
1079                                 "failed to register GPU thermal sensor: %d\n", error);
1080                         goto err_unregister_cpu_sensor;
1081                 }
1082
1083                 error = devm_request_threaded_irq(&pdev->dev, irq, NULL,
1084                                                   &rockchip_thermal_alarm_irq_thread,
1085                                                   IRQF_ONESHOT,
1086                                                   "rockchip_thermal", thermal);
1087                 if (error) {
1088                         dev_err(&pdev->dev,
1089                                 "failed to request tsadc irq: %d\n", error);
1090                         goto err_unregister_gpu_sensor;
1091                 }
1092
1093                 thermal->chip->control(thermal->regs, true);
1094
1095                 for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
1096                         rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
1097         }
1098
1099         thermal->rockchip_thermal_kobj = kobject_create_and_add("rockchip_thermal", NULL);
1100         if (!thermal->rockchip_thermal_kobj)
1101                 return -ENOMEM;
1102         for (i = 0; i < ARRAY_SIZE(rockchip_thermal_attrs); i++) {
1103                 error = sysfs_create_file(thermal->rockchip_thermal_kobj
1104                         , &rockchip_thermal_attrs[i].attr);
1105                 if (error != 0) {
1106                         printk("create index %d error\n", i);
1107                         return error;
1108                 }
1109         }
1110
1111         mutex_init(&thermal->suspend_lock);
1112         s_thermal = thermal;
1113         platform_set_drvdata(pdev, thermal);
1114
1115         return 0;
1116
1117 err_unregister_gpu_sensor:
1118         if (thermal->chip->mode == TSADC_AUTO_MODE)
1119                 thermal_zone_of_sensor_unregister(&pdev->dev, thermal->sensors[1].tzd);
1120 err_unregister_cpu_sensor:
1121         if (thermal->chip->mode == TSADC_AUTO_MODE)
1122                 thermal_zone_of_sensor_unregister(&pdev->dev, thermal->sensors[0].tzd);
1123 err_disable_pclk:
1124         clk_disable_unprepare(thermal->pclk);
1125 err_disable_clk:
1126         clk_disable_unprepare(thermal->clk);
1127
1128         return error;
1129 }
1130
1131 static int rockchip_thermal_remove(struct platform_device *pdev)
1132 {
1133         struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
1134         int i;
1135
1136         if (thermal->chip->mode == TSADC_AUTO_MODE)
1137         {
1138                 for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++) {
1139                         struct rockchip_thermal_sensor *sensor = &thermal->sensors[i];
1140
1141                         rockchip_thermal_toggle_sensor(sensor, false);
1142                         thermal_zone_of_sensor_unregister(&pdev->dev, sensor->tzd);
1143                 }
1144
1145                 thermal->chip->control(thermal->regs, false);
1146         }
1147         clk_disable_unprepare(thermal->pclk);
1148         clk_disable_unprepare(thermal->clk);
1149
1150         return 0;
1151 }
1152
1153 static int __maybe_unused rockchip_thermal_suspend(struct device *dev)
1154 {
1155         struct platform_device *pdev = to_platform_device(dev);
1156         struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
1157         int i;
1158
1159         mutex_lock(&thermal->suspend_lock);
1160         thermal->b_suspend = true;
1161         if (thermal->chip->mode == TSADC_AUTO_MODE)
1162         {
1163                 for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
1164                         rockchip_thermal_toggle_sensor(&thermal->sensors[i], false);
1165
1166                 thermal->chip->control(thermal->regs, false);
1167         }
1168         clk_disable(thermal->pclk);
1169         clk_disable(thermal->clk);
1170         mutex_unlock(&thermal->suspend_lock);
1171
1172         return 0;
1173 }
1174
1175 static int __maybe_unused rockchip_thermal_resume(struct device *dev)
1176 {
1177         struct platform_device *pdev = to_platform_device(dev);
1178         struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
1179         int i;
1180         int error;
1181
1182         mutex_lock(&thermal->suspend_lock);
1183         error = clk_enable(thermal->clk);
1184         if (error) {
1185                 mutex_unlock(&thermal->suspend_lock);
1186                 return error;
1187         }
1188
1189         error = clk_enable(thermal->pclk);
1190         if (error) {
1191                 mutex_unlock(&thermal->suspend_lock);
1192                 return error;
1193         }
1194
1195         rockchip_thermal_reset_controller(thermal->reset);
1196         if (thermal->chip->mode == TSADC_AUTO_MODE)
1197         {
1198                 thermal->chip->initialize(thermal->regs, thermal->tshut_polarity);
1199
1200                 for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++) {
1201                         int id = thermal->sensors[i].id;
1202
1203                         thermal->chip->set_tshut_mode(id, thermal->regs,
1204                                                       thermal->tshut_mode);
1205                         thermal->chip->set_tshut_temp(id, thermal->regs,
1206                                                       thermal->hw_shut_temp);
1207                 }
1208
1209                 thermal->chip->control(thermal->regs, true);
1210
1211                 for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
1212                         rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
1213         }
1214
1215         thermal->b_suspend = false;
1216         mutex_unlock(&thermal->suspend_lock);
1217
1218         return 0;
1219 }
1220
1221 static SIMPLE_DEV_PM_OPS(rockchip_thermal_pm_ops,
1222                          rockchip_thermal_suspend, rockchip_thermal_resume);
1223
1224 static struct platform_driver rockchip_thermal_driver = {
1225         .driver = {
1226                 .name = "rockchip-thermal",
1227                 .owner = THIS_MODULE,
1228                 .pm = &rockchip_thermal_pm_ops,
1229                 .of_match_table = of_rockchip_thermal_match,
1230         },
1231         .probe = rockchip_thermal_probe,
1232         .remove = rockchip_thermal_remove,
1233 };
1234
1235 module_platform_driver(rockchip_thermal_driver);
1236
1237 MODULE_DESCRIPTION("ROCKCHIP THERMAL Driver");
1238 MODULE_AUTHOR("Rockchip, Inc.");
1239 MODULE_LICENSE("GPL v2");
1240 MODULE_ALIAS("platform:rockchip-thermal");