1 /* ////////////////////////////////////////////////////////////////////////// */
3 /* Copyright (c) Atmel Corporation. All rights reserved. */
5 /* Module Name: wilc_sdio.c */
8 /* //////////////////////////////////////////////////////////////////////////// */
10 #include <linux/string.h>
11 #include "wilc_wlan_if.h"
12 #include "wilc_wlan.h"
14 #define WILC_SDIO_BLOCK_SIZE 512
19 int (*sdio_cmd52)(sdio_cmd52_t *);
20 int (*sdio_cmd53)(sdio_cmd53_t *);
21 int (*sdio_set_max_speed)(void);
22 int (*sdio_set_default_speed)(void);
23 wilc_debug_func dPrint;
25 #define MAX_NUN_INT_THRPT_ENH2 (5) /* Max num interrupts allowed in registers 0xf7, 0xf8 */
29 static wilc_sdio_t g_sdio;
31 #ifdef WILC_SDIO_IRQ_GPIO
32 static int sdio_write_reg(u32 addr, u32 data);
33 static int sdio_read_reg(u32 addr, u32 *data);
36 /********************************************
40 ********************************************/
42 static int sdio_set_func0_csa_address(u32 adr)
54 if (!g_sdio.sdio_cmd52(&cmd)) {
55 g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed cmd52, set 0x10c data...\n");
60 cmd.data = (u8)(adr >> 8);
61 if (!g_sdio.sdio_cmd52(&cmd)) {
62 g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed cmd52, set 0x10d data...\n");
67 cmd.data = (u8)(adr >> 16);
68 if (!g_sdio.sdio_cmd52(&cmd)) {
69 g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed cmd52, set 0x10e data...\n");
78 static int sdio_set_func0_block_size(u32 block_size)
86 cmd.data = (u8)block_size;
87 if (!g_sdio.sdio_cmd52(&cmd)) {
88 g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed cmd52, set 0x10 data...\n");
93 cmd.data = (u8)(block_size >> 8);
94 if (!g_sdio.sdio_cmd52(&cmd)) {
95 g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed cmd52, set 0x11 data...\n");
104 /********************************************
108 ********************************************/
110 static int sdio_set_func1_block_size(u32 block_size)
118 cmd.data = (u8)block_size;
119 if (!g_sdio.sdio_cmd52(&cmd)) {
120 g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed cmd52, set 0x110 data...\n");
124 cmd.data = (u8)(block_size >> 8);
125 if (!g_sdio.sdio_cmd52(&cmd)) {
126 g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed cmd52, set 0x111 data...\n");
135 static int sdio_clear_int(void)
137 #ifndef WILC_SDIO_IRQ_GPIO
146 g_sdio.sdio_cmd52(&cmd);
152 if (!sdio_read_reg(WILC_HOST_RX_CTRL_0, ®)) {
153 g_sdio.dPrint(N_ERR, "[wilc spi]: Failed read reg (%08x)...\n", WILC_HOST_RX_CTRL_0);
157 sdio_write_reg(WILC_HOST_RX_CTRL_0, reg);
163 u32 sdio_xfer_cnt(void)
173 g_sdio.sdio_cmd52(&cmd);
181 g_sdio.sdio_cmd52(&cmd);
182 cnt |= (cmd.data << 8);
189 g_sdio.sdio_cmd52(&cmd);
190 cnt |= (cmd.data << 16);
195 /********************************************
199 ********************************************/
200 int sdio_check_bs(void)
212 if (!g_sdio.sdio_cmd52(&cmd)) {
213 g_sdio.dPrint(N_ERR, "[wilc sdio]: Fail cmd 52, get BS register...\n");
224 static int sdio_write_reg(u32 addr, u32 data)
227 data = BYTE_SWAP(data);
230 if ((addr >= 0xf0) && (addr <= 0xff)) {
238 if (!g_sdio.sdio_cmd52(&cmd)) {
239 g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed cmd 52, read reg (%08x) ...\n", addr);
246 * set the AHB address
248 if (!sdio_set_func0_csa_address(addr))
257 cmd.buffer = (u8 *)&data;
258 cmd.block_size = g_sdio.block_size; /* johnny : prevent it from setting unexpected value */
260 if (!g_sdio.sdio_cmd53(&cmd)) {
261 g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed cmd53, write reg (%08x)...\n", addr);
273 static int sdio_write(u32 addr, u8 *buf, u32 size)
275 u32 block_size = g_sdio.block_size;
282 * has to be word aligned...
296 * has to be word aligned...
310 nblk = size / block_size;
311 nleft = size % block_size;
318 cmd.block_size = block_size;
320 if (!sdio_set_func0_csa_address(addr))
323 if (!g_sdio.sdio_cmd53(&cmd)) {
324 g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed cmd53 [%x], block send...\n", addr);
328 addr += nblk * block_size;
329 buf += nblk * block_size;
338 cmd.block_size = block_size; /* johnny : prevent it from setting unexpected value */
341 if (!sdio_set_func0_csa_address(addr))
344 if (!g_sdio.sdio_cmd53(&cmd)) {
345 g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed cmd53 [%x], bytes send...\n", addr);
357 static int sdio_read_reg(u32 addr, u32 *data)
359 if ((addr >= 0xf0) && (addr <= 0xff)) {
366 if (!g_sdio.sdio_cmd52(&cmd)) {
367 g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed cmd 52, read reg (%08x) ...\n", addr);
374 if (!sdio_set_func0_csa_address(addr))
383 cmd.buffer = (u8 *)data;
385 cmd.block_size = g_sdio.block_size; /* johnny : prevent it from setting unexpected value */
387 if (!g_sdio.sdio_cmd53(&cmd)) {
388 g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed cmd53, read reg (%08x)...\n", addr);
394 *data = BYTE_SWAP(*data);
404 static int sdio_read(u32 addr, u8 *buf, u32 size)
406 u32 block_size = g_sdio.block_size;
413 * has to be word aligned...
427 * has to be word aligned...
441 nblk = size / block_size;
442 nleft = size % block_size;
449 cmd.block_size = block_size;
451 if (!sdio_set_func0_csa_address(addr))
454 if (!g_sdio.sdio_cmd53(&cmd)) {
455 g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed cmd53 [%x], block read...\n", addr);
459 addr += nblk * block_size;
460 buf += nblk * block_size;
461 } /* if (nblk > 0) */
469 cmd.block_size = block_size; /* johnny : prevent it from setting unexpected value */
472 if (!sdio_set_func0_csa_address(addr))
475 if (!g_sdio.sdio_cmd53(&cmd)) {
476 g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed cmd53 [%x], bytes read...\n", addr);
488 /********************************************
492 ********************************************/
494 static int sdio_deinit(void *pv)
499 static int sdio_sync(void)
504 * Disable power sequencer
506 if (!sdio_read_reg(WILC_MISC, ®)) {
507 g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed read misc reg...\n");
512 if (!sdio_write_reg(WILC_MISC, reg)) {
513 g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed write misc reg...\n");
517 #ifdef WILC_SDIO_IRQ_GPIO
523 * interrupt pin mux select
525 ret = sdio_read_reg(WILC_PIN_MUX_0, ®);
527 g_sdio.dPrint(N_ERR, "[wilc spi]: Failed read reg (%08x)...\n", WILC_PIN_MUX_0);
531 ret = sdio_write_reg(WILC_PIN_MUX_0, reg);
533 g_sdio.dPrint(N_ERR, "[wilc spi]: Failed write reg (%08x)...\n", WILC_PIN_MUX_0);
540 ret = sdio_read_reg(WILC_INTR_ENABLE, ®);
542 g_sdio.dPrint(N_ERR, "[wilc spi]: Failed read reg (%08x)...\n", WILC_INTR_ENABLE);
546 ret = sdio_write_reg(WILC_INTR_ENABLE, reg);
548 g_sdio.dPrint(N_ERR, "[wilc spi]: Failed write reg (%08x)...\n", WILC_INTR_ENABLE);
557 static int sdio_init(wilc_wlan_inp_t *inp, wilc_debug_func func)
563 memset(&g_sdio, 0, sizeof(wilc_sdio_t));
565 g_sdio.dPrint = func;
566 g_sdio.os_context = inp->os_context.os_private;
568 if (inp->io_func.io_init) {
569 if (!inp->io_func.io_init(g_sdio.os_context)) {
570 g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed io init bus...\n");
577 g_sdio.sdio_cmd52 = inp->io_func.u.sdio.sdio_cmd52;
578 g_sdio.sdio_cmd53 = inp->io_func.u.sdio.sdio_cmd53;
579 g_sdio.sdio_set_max_speed = inp->io_func.u.sdio.sdio_set_max_speed;
580 g_sdio.sdio_set_default_speed = inp->io_func.u.sdio.sdio_set_default_speed;
583 * function 0 csa enable
590 if (!g_sdio.sdio_cmd52(&cmd)) {
591 g_sdio.dPrint(N_ERR, "[wilc sdio]: Fail cmd 52, enable csa...\n");
596 * function 0 block size
598 if (!sdio_set_func0_block_size(WILC_SDIO_BLOCK_SIZE)) {
599 g_sdio.dPrint(N_ERR, "[wilc sdio]: Fail cmd 52, set func 0 block size...\n");
602 g_sdio.block_size = WILC_SDIO_BLOCK_SIZE;
612 if (!g_sdio.sdio_cmd52(&cmd)) {
613 g_sdio.dPrint(N_ERR, "[wilc sdio] Fail cmd 52, set IOE register...\n");
618 * make sure func 1 is up
627 if (!g_sdio.sdio_cmd52(&cmd)) {
628 g_sdio.dPrint(N_ERR, "[wilc sdio]: Fail cmd 52, get IOR register...\n");
636 g_sdio.dPrint(N_ERR, "[wilc sdio]: Fail func 1 is not ready...\n");
641 * func 1 is ready, set func 1 block size
643 if (!sdio_set_func1_block_size(WILC_SDIO_BLOCK_SIZE)) {
644 g_sdio.dPrint(N_ERR, "[wilc sdio]: Fail set func 1 block size...\n");
649 * func 1 interrupt enable
656 if (!g_sdio.sdio_cmd52(&cmd)) {
657 g_sdio.dPrint(N_ERR, "[wilc sdio]: Fail cmd 52, set IEN register...\n");
662 * make sure can read back chip id correctly
664 if (!sdio_read_reg(0x1000, &chipid)) {
665 g_sdio.dPrint(N_ERR, "[wilc sdio]: Fail cmd read chip id...\n");
668 g_sdio.dPrint(N_ERR, "[wilc sdio]: chipid (%08x)\n", chipid);
669 if ((chipid & 0xfff) > 0x2a0)
670 g_sdio.has_thrpt_enh3 = 1;
672 g_sdio.has_thrpt_enh3 = 0;
673 g_sdio.dPrint(N_ERR, "[wilc sdio]: has_thrpt_enh3 = %d...\n", g_sdio.has_thrpt_enh3);
682 static void sdio_set_max_speed(void)
684 g_sdio.sdio_set_max_speed();
687 static void sdio_set_default_speed(void)
689 g_sdio.sdio_set_default_speed();
692 static int sdio_read_size(u32 *size)
699 * Read DMA count in words
706 g_sdio.sdio_cmd52(&cmd);
709 /* cmd.read_write = 0; */
710 /* cmd.function = 0; */
714 g_sdio.sdio_cmd52(&cmd);
715 tmp |= (cmd.data << 8);
721 static int sdio_read_int(u32 *int_status)
727 sdio_read_size(&tmp);
732 #ifndef WILC_SDIO_IRQ_GPIO
736 g_sdio.sdio_cmd52(&cmd);
738 if (cmd.data & BIT(0))
740 if (cmd.data & BIT(2))
742 if (cmd.data & BIT(3))
744 if (cmd.data & BIT(4))
746 if (cmd.data & BIT(5))
748 if (cmd.data & BIT(6))
753 for (i = g_sdio.nint; i < MAX_NUM_INT; i++) {
754 if ((tmp >> (IRG_FLAGS_OFFSET + i)) & 0x1) {
755 g_sdio.dPrint(N_ERR, "[wilc sdio]: Unexpected interrupt (1) : tmp=%x, data=%x\n", tmp, cmd.data);
769 g_sdio.sdio_cmd52(&cmd);
770 irq_flags = cmd.data & 0x1f;
771 tmp |= ((irq_flags >> 0) << IRG_FLAGS_OFFSET);
781 static int sdio_clear_int_ext(u32 val)
785 if (g_sdio.has_thrpt_enh3) {
788 #ifdef WILC_SDIO_IRQ_GPIO
792 flags = val & (BIT(MAX_NUN_INT_THRPT_ENH2) - 1);
798 /* select VMM table 0 */
799 if ((val & SEL_VMM_TBL0) == SEL_VMM_TBL0)
801 /* select VMM table 1 */
802 if ((val & SEL_VMM_TBL1) == SEL_VMM_TBL1)
805 if ((val & EN_VMM) == EN_VMM)
816 ret = g_sdio.sdio_cmd52(&cmd);
818 g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed cmd52, set 0xf8 data (%d) ...\n", __LINE__);
824 #ifdef WILC_SDIO_IRQ_GPIO
826 /* see below. has_thrpt_enh2 uses register 0xf8 to clear interrupts. */
827 /* Cannot clear multiple interrupts. Must clear each interrupt individually */
830 flags = val & (BIT(MAX_NUM_INT) - 1);
835 for (i = 0; i < g_sdio.nint; i++) {
845 ret = g_sdio.sdio_cmd52(&cmd);
847 g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed cmd52, set 0xf8 data (%d) ...\n", __LINE__);
858 for (i = g_sdio.nint; i < MAX_NUM_INT; i++) {
860 g_sdio.dPrint(N_ERR, "[wilc sdio]: Unexpected interrupt cleared %d...\n", i);
865 #endif /* WILC_SDIO_IRQ_GPIO */
871 /* select VMM table 0 */
872 if ((val & SEL_VMM_TBL0) == SEL_VMM_TBL0)
874 /* select VMM table 1 */
875 if ((val & SEL_VMM_TBL1) == SEL_VMM_TBL1)
878 if ((val & EN_VMM) == EN_VMM)
889 ret = g_sdio.sdio_cmd52(&cmd);
891 g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed cmd52, set 0xf6 data (%d) ...\n", __LINE__);
903 static int sdio_sync_ext(int nint /* how mant interrupts to enable. */)
907 if (nint > MAX_NUM_INT) {
908 g_sdio.dPrint(N_ERR, "[wilc sdio]: Too many interupts (%d)...\n", nint);
911 if (nint > MAX_NUN_INT_THRPT_ENH2) {
912 g_sdio.dPrint(N_ERR, "[wilc sdio]: Error: Cannot support more than 5 interrupts when has_thrpt_enh2=1.\n");
919 * Disable power sequencer
921 if (!sdio_read_reg(WILC_MISC, ®)) {
922 g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed read misc reg...\n");
927 if (!sdio_write_reg(WILC_MISC, reg)) {
928 g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed write misc reg...\n");
932 #ifdef WILC_SDIO_IRQ_GPIO
938 * interrupt pin mux select
940 ret = sdio_read_reg(WILC_PIN_MUX_0, ®);
942 g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed read reg (%08x)...\n", WILC_PIN_MUX_0);
946 ret = sdio_write_reg(WILC_PIN_MUX_0, reg);
948 g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed write reg (%08x)...\n", WILC_PIN_MUX_0);
955 ret = sdio_read_reg(WILC_INTR_ENABLE, ®);
957 g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed read reg (%08x)...\n", WILC_INTR_ENABLE);
961 for (i = 0; (i < 5) && (nint > 0); i++, nint--)
962 reg |= BIT((27 + i));
963 ret = sdio_write_reg(WILC_INTR_ENABLE, reg);
965 g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed write reg (%08x)...\n", WILC_INTR_ENABLE);
969 ret = sdio_read_reg(WILC_INTR2_ENABLE, ®);
971 g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed read reg (%08x)...\n", WILC_INTR2_ENABLE);
975 for (i = 0; (i < 3) && (nint > 0); i++, nint--)
978 ret = sdio_read_reg(WILC_INTR2_ENABLE, ®);
980 g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed write reg (%08x)...\n", WILC_INTR2_ENABLE);
985 #endif /* WILC_SDIO_IRQ_GPIO */
989 /********************************************
991 * Global sdio HIF function table
993 ********************************************/
995 wilc_hif_func_t hif_sdio = {
1012 sdio_set_default_speed,