staging: add rts_pstor for Realtek PCIE cardreader
[firefly-linux-kernel-4.4.55.git] / drivers / staging / rts_pstor / ms.c
1 /* Driver for Realtek PCI-Express card reader
2  *
3  * Copyright(c) 2009 Realtek Semiconductor Corp. All rights reserved.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of the GNU General Public License as published by the
7  * Free Software Foundation; either version 2, or (at your option) any
8  * later version.
9  *
10  * This program is distributed in the hope that it will be useful, but
11  * WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
13  * General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License along
16  * with this program; if not, see <http://www.gnu.org/licenses/>.
17  *
18  * Author:
19  *   wwang (wei_wang@realsil.com.cn)
20  *   No. 450, Shenhu Road, Suzhou Industry Park, Suzhou, China
21  */
22
23 #include <linux/blkdev.h>
24 #include <linux/kthread.h>
25 #include <linux/sched.h>
26
27 #include "rtsx.h"
28 #include "rtsx_transport.h"
29 #include "rtsx_scsi.h"
30 #include "rtsx_card.h"
31 #include "ms.h"
32
33 static inline void ms_set_err_code(struct rtsx_chip *chip, u8 err_code)
34 {
35         struct ms_info *ms_card = &(chip->ms_card);
36
37         ms_card->err_code = err_code;
38 }
39
40 static inline int ms_check_err_code(struct rtsx_chip *chip, u8 err_code)
41 {
42         struct ms_info *ms_card = &(chip->ms_card);
43
44         return (ms_card->err_code == err_code);
45 }
46
47 static int ms_parse_err_code(struct rtsx_chip *chip)
48 {
49         TRACE_RET(chip, STATUS_FAIL);
50 }
51
52 static int ms_transfer_tpc(struct rtsx_chip *chip, u8 trans_mode, u8 tpc, u8 cnt, u8 cfg)
53 {
54         struct ms_info *ms_card = &(chip->ms_card);
55         int retval;
56         u8 *ptr;
57
58         RTSX_DEBUGP("ms_transfer_tpc: tpc = 0x%x\n", tpc);
59
60         rtsx_init_cmd(chip);
61
62         rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
63         rtsx_add_cmd(chip, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt);
64         rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
65         rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, PINGPONG_BUFFER);
66
67         rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF, MS_TRANSFER_START | trans_mode);
68         rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER, MS_TRANSFER_END, MS_TRANSFER_END);
69
70         rtsx_add_cmd(chip, READ_REG_CMD, MS_TRANS_CFG, 0, 0);
71
72         retval = rtsx_send_cmd(chip, MS_CARD, 5000);
73         if (retval < 0) {
74                 rtsx_clear_ms_error(chip);
75                 ms_set_err_code(chip, MS_TO_ERROR);
76                 TRACE_RET(chip, ms_parse_err_code(chip));
77         }
78
79         ptr = rtsx_get_cmd_data(chip) + 1;
80
81         if (!(tpc & 0x08)) {            /* Read Packet */
82                 if (*ptr & MS_CRC16_ERR) {
83                         ms_set_err_code(chip, MS_CRC16_ERROR);
84                         TRACE_RET(chip, ms_parse_err_code(chip));
85                 }
86         } else {                        /* Write Packet */
87                 if (CHK_MSPRO(ms_card) && !(*ptr & 0x80)) {
88                         if (*ptr & (MS_INT_ERR | MS_INT_CMDNK)) {
89                                 ms_set_err_code(chip, MS_CMD_NK);
90                                 TRACE_RET(chip, ms_parse_err_code(chip));
91                         }
92                 }
93         }
94
95         if (*ptr & MS_RDY_TIMEOUT) {
96                 rtsx_clear_ms_error(chip);
97                 ms_set_err_code(chip, MS_TO_ERROR);
98                 TRACE_RET(chip, ms_parse_err_code(chip));
99         }
100
101         return STATUS_SUCCESS;
102 }
103
104 static int ms_transfer_data(struct rtsx_chip *chip, u8 trans_mode, u8 tpc, u16 sec_cnt,
105                 u8 cfg, int mode_2k, int use_sg, void *buf, int buf_len)
106 {
107         int retval;
108         u8 val, err_code = 0;
109         enum dma_data_direction dir;
110
111         if (!buf || !buf_len) {
112                 TRACE_RET(chip, STATUS_FAIL);
113         }
114
115         if (trans_mode == MS_TM_AUTO_READ) {
116                 dir = DMA_FROM_DEVICE;
117                 err_code = MS_FLASH_READ_ERROR;
118         } else if (trans_mode == MS_TM_AUTO_WRITE) {
119                 dir = DMA_TO_DEVICE;
120                 err_code = MS_FLASH_WRITE_ERROR;
121         } else {
122                 TRACE_RET(chip, STATUS_FAIL);
123         }
124
125         rtsx_init_cmd(chip);
126
127         rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
128         rtsx_add_cmd(chip, WRITE_REG_CMD,
129                      MS_SECTOR_CNT_H, 0xFF, (u8)(sec_cnt >> 8));
130         rtsx_add_cmd(chip, WRITE_REG_CMD, MS_SECTOR_CNT_L, 0xFF, (u8)sec_cnt);
131         rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
132
133         if (mode_2k) {
134                 rtsx_add_cmd(chip, WRITE_REG_CMD,
135                              MS_CFG, MS_2K_SECTOR_MODE, MS_2K_SECTOR_MODE);
136         } else {
137                 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_CFG, MS_2K_SECTOR_MODE, 0);
138         }
139
140         trans_dma_enable(dir, chip, sec_cnt * 512, DMA_512);
141
142         rtsx_add_cmd(chip, WRITE_REG_CMD,
143                      MS_TRANSFER, 0xFF, MS_TRANSFER_START | trans_mode);
144         rtsx_add_cmd(chip, CHECK_REG_CMD,
145                      MS_TRANSFER, MS_TRANSFER_END, MS_TRANSFER_END);
146
147         rtsx_send_cmd_no_wait(chip);
148
149         retval = rtsx_transfer_data(chip, MS_CARD, buf, buf_len,
150                                     use_sg, dir, chip->mspro_timeout);
151         if (retval < 0) {
152                 ms_set_err_code(chip, err_code);
153                 if (retval == -ETIMEDOUT) {
154                         retval = STATUS_TIMEDOUT;
155                 } else {
156                         retval = STATUS_FAIL;
157                 }
158                 TRACE_RET(chip, retval);
159         }
160
161         RTSX_READ_REG(chip, MS_TRANS_CFG, &val);
162         if (val & (MS_INT_CMDNK | MS_INT_ERR | MS_CRC16_ERR | MS_RDY_TIMEOUT)) {
163                 TRACE_RET(chip, STATUS_FAIL);
164         }
165
166         return STATUS_SUCCESS;
167 }
168
169 static int ms_write_bytes(struct rtsx_chip *chip,
170                           u8 tpc, u8 cnt, u8 cfg, u8 *data, int data_len)
171 {
172         struct ms_info *ms_card = &(chip->ms_card);
173         int retval, i;
174
175         if (!data || (data_len < cnt)) {
176                 TRACE_RET(chip, STATUS_ERROR);
177         }
178
179         rtsx_init_cmd(chip);
180
181         for (i = 0; i < cnt; i++) {
182                 rtsx_add_cmd(chip, WRITE_REG_CMD,
183                              PPBUF_BASE2 + i, 0xFF, data[i]);
184         }
185         if (cnt % 2) {
186                 rtsx_add_cmd(chip, WRITE_REG_CMD, PPBUF_BASE2 + i, 0xFF, 0xFF);
187         }
188
189         rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
190         rtsx_add_cmd(chip, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt);
191         rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
192         rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, PINGPONG_BUFFER);
193
194         rtsx_add_cmd(chip, WRITE_REG_CMD,
195                      MS_TRANSFER, 0xFF, MS_TRANSFER_START | MS_TM_WRITE_BYTES);
196         rtsx_add_cmd(chip, CHECK_REG_CMD,
197                      MS_TRANSFER, MS_TRANSFER_END, MS_TRANSFER_END);
198
199         retval = rtsx_send_cmd(chip, MS_CARD, 5000);
200         if (retval < 0) {
201                 u8 val = 0;
202
203                 rtsx_read_register(chip, MS_TRANS_CFG, &val);
204                 RTSX_DEBUGP("MS_TRANS_CFG: 0x%02x\n", val);
205
206                 rtsx_clear_ms_error(chip);
207
208                 if (!(tpc & 0x08)) {
209                         if (val & MS_CRC16_ERR) {
210                                 ms_set_err_code(chip, MS_CRC16_ERROR);
211                                 TRACE_RET(chip, ms_parse_err_code(chip));
212                         }
213                 } else {
214                         if (CHK_MSPRO(ms_card) && !(val & 0x80)) {
215                                 if (val & (MS_INT_ERR | MS_INT_CMDNK)) {
216                                         ms_set_err_code(chip, MS_CMD_NK);
217                                         TRACE_RET(chip, ms_parse_err_code(chip));
218                                 }
219                         }
220                 }
221
222                 if (val & MS_RDY_TIMEOUT) {
223                         ms_set_err_code(chip, MS_TO_ERROR);
224                         TRACE_RET(chip, ms_parse_err_code(chip));
225                 }
226
227                 ms_set_err_code(chip, MS_TO_ERROR);
228                 TRACE_RET(chip, ms_parse_err_code(chip));
229         }
230
231         return STATUS_SUCCESS;
232 }
233
234 static int ms_read_bytes(struct rtsx_chip *chip, u8 tpc, u8 cnt, u8 cfg, u8 *data, int data_len)
235 {
236         struct ms_info *ms_card = &(chip->ms_card);
237         int retval, i;
238         u8 *ptr;
239
240         if (!data) {
241                 TRACE_RET(chip, STATUS_ERROR);
242         }
243
244         rtsx_init_cmd(chip);
245
246         rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
247         rtsx_add_cmd(chip, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt);
248         rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
249         rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, PINGPONG_BUFFER);
250
251         rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF, MS_TRANSFER_START | MS_TM_READ_BYTES);
252         rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER, MS_TRANSFER_END, MS_TRANSFER_END);
253
254         for (i = 0; i < data_len - 1; i++) {
255                rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + i, 0, 0);
256         }
257         if (data_len % 2) {
258                 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + data_len, 0, 0);
259         } else {
260                 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + data_len - 1, 0, 0);
261         }
262
263         retval = rtsx_send_cmd(chip, MS_CARD, 5000);
264         if (retval < 0) {
265                 u8 val = 0;
266
267                 rtsx_read_register(chip, MS_TRANS_CFG, &val);
268                 rtsx_clear_ms_error(chip);
269
270                 if (!(tpc & 0x08)) {
271                         if (val & MS_CRC16_ERR) {
272                                 ms_set_err_code(chip, MS_CRC16_ERROR);
273                                 TRACE_RET(chip, ms_parse_err_code(chip));
274                         }
275                 } else {
276                         if (CHK_MSPRO(ms_card) && !(val & 0x80)) {
277                                 if (val & (MS_INT_ERR | MS_INT_CMDNK)) {
278                                         ms_set_err_code(chip, MS_CMD_NK);
279                                         TRACE_RET(chip, ms_parse_err_code(chip));
280                                 }
281                         }
282                 }
283
284                 if (val & MS_RDY_TIMEOUT) {
285                         ms_set_err_code(chip, MS_TO_ERROR);
286                         TRACE_RET(chip, ms_parse_err_code(chip));
287                 }
288
289                 ms_set_err_code(chip, MS_TO_ERROR);
290                 TRACE_RET(chip, ms_parse_err_code(chip));
291         }
292
293         ptr = rtsx_get_cmd_data(chip) + 1;
294
295         for (i = 0; i < data_len; i++) {
296                 data[i] = ptr[i];
297         }
298
299         if ((tpc == PRO_READ_SHORT_DATA) && (data_len == 8)) {
300                 RTSX_DEBUGP("Read format progress:\n");
301                 RTSX_DUMP(ptr, cnt);
302         }
303
304         return STATUS_SUCCESS;
305 }
306
307 static int ms_set_rw_reg_addr(struct rtsx_chip *chip,
308                 u8 read_start, u8 read_cnt, u8 write_start, u8 write_cnt)
309 {
310         int retval, i;
311         u8 data[4];
312
313         data[0] = read_start;
314         data[1] = read_cnt;
315         data[2] = write_start;
316         data[3] = write_cnt;
317
318         for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
319                 retval = ms_write_bytes(chip, SET_RW_REG_ADRS, 4,
320                                         NO_WAIT_INT, data, 4);
321                 if (retval == STATUS_SUCCESS)
322                         return STATUS_SUCCESS;
323                 rtsx_clear_ms_error(chip);
324         }
325
326         TRACE_RET(chip, STATUS_FAIL);
327 }
328
329 static int ms_send_cmd(struct rtsx_chip *chip, u8 cmd, u8 cfg)
330 {
331         u8 data[2];
332
333         data[0] = cmd;
334         data[1] = 0;
335
336         return ms_write_bytes(chip, PRO_SET_CMD, 1, cfg, data, 1);
337 }
338
339 static int ms_set_init_para(struct rtsx_chip *chip)
340 {
341         struct ms_info *ms_card = &(chip->ms_card);
342         int retval;
343
344         if (CHK_HG8BIT(ms_card)) {
345                 if (chip->asic_code) {
346                         ms_card->ms_clock = chip->asic_ms_hg_clk;
347                 } else {
348                         ms_card->ms_clock = chip->fpga_ms_hg_clk;
349                 }
350         } else if (CHK_MSPRO(ms_card) || CHK_MS4BIT(ms_card)) {
351                 if (chip->asic_code) {
352                         ms_card->ms_clock = chip->asic_ms_4bit_clk;
353                 } else {
354                         ms_card->ms_clock = chip->fpga_ms_4bit_clk;
355                 }
356         } else {
357                 if (chip->asic_code) {
358                         ms_card->ms_clock = chip->asic_ms_1bit_clk;
359                 } else {
360                         ms_card->ms_clock = chip->fpga_ms_1bit_clk;
361                 }
362         }
363
364         retval = switch_clock(chip, ms_card->ms_clock);
365         if (retval != STATUS_SUCCESS) {
366                 TRACE_RET(chip, STATUS_FAIL);
367         }
368
369         retval = select_card(chip, MS_CARD);
370         if (retval != STATUS_SUCCESS) {
371                 TRACE_RET(chip, STATUS_FAIL);
372         }
373
374         return STATUS_SUCCESS;
375 }
376
377 static int ms_switch_clock(struct rtsx_chip *chip)
378 {
379         struct ms_info *ms_card = &(chip->ms_card);
380         int retval;
381
382         retval = select_card(chip, MS_CARD);
383         if (retval != STATUS_SUCCESS) {
384                 TRACE_RET(chip, STATUS_FAIL);
385         }
386
387         retval = switch_clock(chip, ms_card->ms_clock);
388         if (retval != STATUS_SUCCESS) {
389                 TRACE_RET(chip, STATUS_FAIL);
390         }
391
392         return STATUS_SUCCESS;
393 }
394
395 static int ms_pull_ctl_disable(struct rtsx_chip *chip)
396 {
397         if (CHECK_PID(chip, 0x5209)) {
398                 RTSX_WRITE_REG(chip, CARD_PULL_CTL4, 0xFF, 0x55);
399                 RTSX_WRITE_REG(chip, CARD_PULL_CTL5, 0xFF, 0x55);
400                 RTSX_WRITE_REG(chip, CARD_PULL_CTL6, 0xFF, 0x15);
401         } else if (CHECK_PID(chip, 0x5208)) {
402                 RTSX_WRITE_REG(chip, CARD_PULL_CTL1, 0xFF,
403                         MS_D1_PD | MS_D2_PD | MS_CLK_PD | MS_D6_PD);
404                 RTSX_WRITE_REG(chip, CARD_PULL_CTL2, 0xFF,
405                         MS_D3_PD | MS_D0_PD | MS_BS_PD | XD_D4_PD);
406                 RTSX_WRITE_REG(chip, CARD_PULL_CTL3, 0xFF,
407                         MS_D7_PD | XD_CE_PD | XD_CLE_PD | XD_CD_PU);
408                 RTSX_WRITE_REG(chip, CARD_PULL_CTL4, 0xFF,
409                         XD_RDY_PD | SD_D3_PD | SD_D2_PD | XD_ALE_PD);
410                 RTSX_WRITE_REG(chip, CARD_PULL_CTL5, 0xFF,
411                         MS_INS_PU | SD_WP_PD | SD_CD_PU | SD_CMD_PD);
412                 RTSX_WRITE_REG(chip, CARD_PULL_CTL6, 0xFF,
413                         MS_D5_PD | MS_D4_PD);
414         } else if (CHECK_PID(chip, 0x5288)) {
415                 if (CHECK_BARO_PKG(chip, QFN)) {
416                         RTSX_WRITE_REG(chip, CARD_PULL_CTL1, 0xFF, 0x55);
417                         RTSX_WRITE_REG(chip, CARD_PULL_CTL2, 0xFF, 0x55);
418                         RTSX_WRITE_REG(chip, CARD_PULL_CTL3, 0xFF, 0x4B);
419                         RTSX_WRITE_REG(chip, CARD_PULL_CTL4, 0xFF, 0x69);
420                 }
421         }
422
423         return STATUS_SUCCESS;
424 }
425
426 static int ms_pull_ctl_enable(struct rtsx_chip *chip)
427 {
428         int retval;
429
430         rtsx_init_cmd(chip);
431
432         if (CHECK_PID(chip, 0x5209)) {
433                 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x55);
434                 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x55);
435                 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0x15);
436         } else if (CHECK_PID(chip, 0x5208)) {
437                 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF,
438                         MS_D1_PD | MS_D2_PD | MS_CLK_NP | MS_D6_PD);
439                 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF,
440                         MS_D3_PD | MS_D0_PD | MS_BS_NP | XD_D4_PD);
441                 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF,
442                         MS_D7_PD | XD_CE_PD | XD_CLE_PD | XD_CD_PU);
443                 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF,
444                         XD_RDY_PD | SD_D3_PD | SD_D2_PD | XD_ALE_PD);
445                 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF,
446                         MS_INS_PU | SD_WP_PD | SD_CD_PU | SD_CMD_PD);
447                 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF,
448                         MS_D5_PD | MS_D4_PD);
449         } else if (CHECK_PID(chip, 0x5288)) {
450                 if (CHECK_BARO_PKG(chip, QFN)) {
451                         rtsx_add_cmd(chip, WRITE_REG_CMD,
452                                      CARD_PULL_CTL1, 0xFF, 0x55);
453                         rtsx_add_cmd(chip, WRITE_REG_CMD,
454                                      CARD_PULL_CTL2, 0xFF, 0x45);
455                         rtsx_add_cmd(chip, WRITE_REG_CMD,
456                                      CARD_PULL_CTL3, 0xFF, 0x4B);
457                         rtsx_add_cmd(chip, WRITE_REG_CMD,
458                                      CARD_PULL_CTL4, 0xFF, 0x29);
459                 }
460         }
461
462         retval = rtsx_send_cmd(chip, MS_CARD, 100);
463         if (retval < 0) {
464                 TRACE_RET(chip, STATUS_FAIL);
465         }
466
467         return STATUS_SUCCESS;
468 }
469
470 static int ms_prepare_reset(struct rtsx_chip *chip)
471 {
472         struct ms_info *ms_card = &(chip->ms_card);
473         int retval;
474         u8 oc_mask = 0;
475
476         ms_card->ms_type = 0;
477         ms_card->check_ms_flow = 0;
478         ms_card->switch_8bit_fail = 0;
479         ms_card->delay_write.delay_write_flag = 0;
480
481         ms_card->pro_under_formatting = 0;
482
483         retval = ms_power_off_card3v3(chip);
484         if (retval != STATUS_SUCCESS) {
485                 TRACE_RET(chip, STATUS_FAIL);
486         }
487
488         if (!chip->ft2_fast_mode)
489                 wait_timeout(250);
490
491         retval = enable_card_clock(chip, MS_CARD);
492         if (retval != STATUS_SUCCESS) {
493                 TRACE_RET(chip, STATUS_FAIL);
494         }
495
496         if (chip->asic_code) {
497                 retval = ms_pull_ctl_enable(chip);
498                 if (retval != STATUS_SUCCESS) {
499                         TRACE_RET(chip, STATUS_FAIL);
500                 }
501         } else {
502                 RTSX_WRITE_REG(chip, FPGA_PULL_CTL, FPGA_MS_PULL_CTL_BIT | 0x20, 0);
503         }
504
505         if (!chip->ft2_fast_mode) {
506                 retval = card_power_on(chip, MS_CARD);
507                 if (retval != STATUS_SUCCESS) {
508                         TRACE_RET(chip, STATUS_FAIL);
509                 }
510                 wait_timeout(150);
511
512 #ifdef SUPPORT_OCP
513                 if (CHECK_LUN_MODE(chip, SD_MS_2LUN)) {
514                         oc_mask = MS_OC_NOW | MS_OC_EVER;
515                 } else {
516                         oc_mask = SD_OC_NOW | SD_OC_EVER;
517                 }
518                 if (chip->ocp_stat & oc_mask) {
519                         RTSX_DEBUGP("Over current, OCPSTAT is 0x%x\n",
520                                      chip->ocp_stat);
521                         TRACE_RET(chip, STATUS_FAIL);
522                 }
523 #endif
524         }
525
526         RTSX_WRITE_REG(chip, CARD_OE, MS_OUTPUT_EN, MS_OUTPUT_EN);
527
528         if (chip->asic_code) {
529                 RTSX_WRITE_REG(chip, MS_CFG, 0xFF,
530                         SAMPLE_TIME_RISING | PUSH_TIME_DEFAULT |
531                         NO_EXTEND_TOGGLE | MS_BUS_WIDTH_1);
532         } else {
533                 RTSX_WRITE_REG(chip, MS_CFG, 0xFF,
534                         SAMPLE_TIME_FALLING | PUSH_TIME_DEFAULT |
535                         NO_EXTEND_TOGGLE | MS_BUS_WIDTH_1);
536         }
537         RTSX_WRITE_REG(chip, MS_TRANS_CFG, 0xFF, NO_WAIT_INT | NO_AUTO_READ_INT_REG);
538         RTSX_WRITE_REG(chip, CARD_STOP, MS_STOP | MS_CLR_ERR, MS_STOP | MS_CLR_ERR);
539
540         retval = ms_set_init_para(chip);
541         if (retval != STATUS_SUCCESS) {
542                 TRACE_RET(chip, STATUS_FAIL);
543         }
544
545         return STATUS_SUCCESS;
546 }
547
548 static int ms_identify_media_type(struct rtsx_chip *chip, int switch_8bit_bus)
549 {
550         struct ms_info *ms_card = &(chip->ms_card);
551         int retval, i;
552         u8 val;
553
554         retval = ms_set_rw_reg_addr(chip, Pro_StatusReg, 6, SystemParm, 1);
555         if (retval != STATUS_SUCCESS) {
556                 TRACE_RET(chip, STATUS_FAIL);
557         }
558
559         for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
560                 retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, READ_REG, 6, NO_WAIT_INT);
561                 if (retval == STATUS_SUCCESS) {
562                         break;
563                 }
564         }
565         if (i == MS_MAX_RETRY_COUNT) {
566                 TRACE_RET(chip, STATUS_FAIL);
567         }
568
569         RTSX_READ_REG(chip, PPBUF_BASE2 + 2, &val);
570         RTSX_DEBUGP("Type register: 0x%x\n", val);
571         if (val != 0x01) {
572                 if (val != 0x02) {
573                         ms_card->check_ms_flow = 1;
574                 }
575                 TRACE_RET(chip, STATUS_FAIL);
576         }
577
578         RTSX_READ_REG(chip, PPBUF_BASE2 + 4, &val);
579         RTSX_DEBUGP("Category register: 0x%x\n", val);
580         if (val != 0) {
581                 ms_card->check_ms_flow = 1;
582                 TRACE_RET(chip, STATUS_FAIL);
583         }
584
585         RTSX_READ_REG(chip, PPBUF_BASE2 + 5, &val);
586         RTSX_DEBUGP("Class register: 0x%x\n", val);
587         if (val == 0) {
588                 RTSX_READ_REG(chip, PPBUF_BASE2, &val);
589                 if (val & WRT_PRTCT) {
590                         chip->card_wp |= MS_CARD;
591                 } else {
592                         chip->card_wp &= ~MS_CARD;
593                 }
594         } else if ((val == 0x01) || (val == 0x02) || (val == 0x03)) {
595                 chip->card_wp |= MS_CARD;
596         } else {
597                 ms_card->check_ms_flow = 1;
598                 TRACE_RET(chip, STATUS_FAIL);
599         }
600
601         ms_card->ms_type |= TYPE_MSPRO;
602
603         RTSX_READ_REG(chip, PPBUF_BASE2 + 3, &val);
604         RTSX_DEBUGP("IF Mode register: 0x%x\n", val);
605         if (val == 0) {
606                 ms_card->ms_type &= 0x0F;
607         } else if (val == 7) {
608                 if (switch_8bit_bus) {
609                         ms_card->ms_type |= MS_HG;
610                 } else {
611                         ms_card->ms_type &= 0x0F;
612                 }
613         } else {
614                 TRACE_RET(chip, STATUS_FAIL);
615         }
616
617         return STATUS_SUCCESS;
618 }
619
620 static int ms_confirm_cpu_startup(struct rtsx_chip *chip)
621 {
622         int retval, i, k;
623         u8 val;
624
625         /* Confirm CPU StartUp */
626         k = 0;
627         do {
628                 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
629                         ms_set_err_code(chip, MS_NO_CARD);
630                         TRACE_RET(chip, STATUS_FAIL);
631                 }
632
633                 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
634                         retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
635                         if (retval == STATUS_SUCCESS) {
636                                 break;
637                         }
638                 }
639                 if (i == MS_MAX_RETRY_COUNT) {
640                         TRACE_RET(chip, STATUS_FAIL);
641                 }
642
643                 if (k > 100) {
644                         TRACE_RET(chip, STATUS_FAIL);
645                 }
646                 k++;
647                 wait_timeout(100);
648         } while (!(val & INT_REG_CED));
649
650         for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
651                 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
652                 if (retval == STATUS_SUCCESS)
653                         break;
654         }
655         if (i == MS_MAX_RETRY_COUNT) {
656                 TRACE_RET(chip, STATUS_FAIL);
657         }
658
659         if (val & INT_REG_ERR) {
660                 if (val & INT_REG_CMDNK) {
661                         chip->card_wp |= (MS_CARD);
662                 } else {
663                         TRACE_RET(chip, STATUS_FAIL);
664                 }
665         }
666         /* --  end confirm CPU startup */
667
668         return STATUS_SUCCESS;
669 }
670
671 static int ms_switch_parallel_bus(struct rtsx_chip *chip)
672 {
673         int retval, i;
674         u8 data[2];
675
676         data[0] = PARALLEL_4BIT_IF;
677         data[1] = 0;
678         for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
679                 retval = ms_write_bytes(chip, WRITE_REG, 1, NO_WAIT_INT, data, 2);
680                 if (retval == STATUS_SUCCESS)
681                         break;
682         }
683         if (retval != STATUS_SUCCESS) {
684                 TRACE_RET(chip, STATUS_FAIL);
685         }
686
687         return STATUS_SUCCESS;
688 }
689
690 static int ms_switch_8bit_bus(struct rtsx_chip *chip)
691 {
692         struct ms_info *ms_card = &(chip->ms_card);
693         int retval, i;
694         u8 data[2];
695
696         data[0] = PARALLEL_8BIT_IF;
697         data[1] = 0;
698         for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
699                 retval = ms_write_bytes(chip, WRITE_REG, 1, NO_WAIT_INT, data, 2);
700                 if (retval == STATUS_SUCCESS) {
701                         break;
702                 }
703         }
704         if (retval != STATUS_SUCCESS) {
705                 TRACE_RET(chip, STATUS_FAIL);
706         }
707
708         RTSX_WRITE_REG(chip, MS_CFG, 0x98, MS_BUS_WIDTH_8 | SAMPLE_TIME_FALLING);
709         ms_card->ms_type |= MS_8BIT;
710         retval = ms_set_init_para(chip);
711         if (retval != STATUS_SUCCESS) {
712                 TRACE_RET(chip, STATUS_FAIL);
713         }
714
715         for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
716                 retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, GET_INT, 1, NO_WAIT_INT);
717                 if (retval != STATUS_SUCCESS) {
718                         TRACE_RET(chip, STATUS_FAIL);
719                 }
720         }
721
722         return STATUS_SUCCESS;
723 }
724
725 static int ms_pro_reset_flow(struct rtsx_chip *chip, int switch_8bit_bus)
726 {
727         struct ms_info *ms_card = &(chip->ms_card);
728         int retval, i;
729
730         for (i = 0; i < 3; i++) {
731                 retval = ms_prepare_reset(chip);
732                 if (retval != STATUS_SUCCESS) {
733                         TRACE_RET(chip, STATUS_FAIL);
734                 }
735
736                 retval = ms_identify_media_type(chip, switch_8bit_bus);
737                 if (retval != STATUS_SUCCESS) {
738                         TRACE_RET(chip, STATUS_FAIL);
739                 }
740
741                 retval = ms_confirm_cpu_startup(chip);
742                 if (retval != STATUS_SUCCESS) {
743                         TRACE_RET(chip, STATUS_FAIL);
744                 }
745
746                 retval = ms_switch_parallel_bus(chip);
747                 if (retval != STATUS_SUCCESS) {
748                         if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
749                                 ms_set_err_code(chip, MS_NO_CARD);
750                                 TRACE_RET(chip, STATUS_FAIL);
751                         }
752                         continue;
753                 } else {
754                         break;
755                 }
756         }
757
758         if (retval != STATUS_SUCCESS) {
759                 TRACE_RET(chip, STATUS_FAIL);
760         }
761
762         /* Switch MS-PRO into Parallel mode */
763         RTSX_WRITE_REG(chip, MS_CFG, 0x18, MS_BUS_WIDTH_4);
764         RTSX_WRITE_REG(chip, MS_CFG, PUSH_TIME_ODD, PUSH_TIME_ODD);
765
766         retval = ms_set_init_para(chip);
767         if (retval != STATUS_SUCCESS) {
768                 TRACE_RET(chip, STATUS_FAIL);
769         }
770
771         /* If MSPro HG Card, We shall try to switch to 8-bit bus */
772         if (CHK_MSHG(ms_card) && chip->support_ms_8bit && switch_8bit_bus) {
773                 retval = ms_switch_8bit_bus(chip);
774                 if (retval != STATUS_SUCCESS) {
775                         ms_card->switch_8bit_fail = 1;
776                         TRACE_RET(chip, STATUS_FAIL);
777                 }
778         }
779
780         return STATUS_SUCCESS;
781 }
782
783 #ifdef XC_POWERCLASS
784 static int msxc_change_power(struct rtsx_chip *chip, u8 mode)
785 {
786         int retval;
787         u8 buf[6];
788
789         ms_cleanup_work(chip);
790
791         retval = ms_set_rw_reg_addr(chip, 0, 0, Pro_DataCount1, 6);
792         if (retval != STATUS_SUCCESS) {
793                 TRACE_RET(chip, STATUS_FAIL);
794         }
795
796         buf[0] = 0;
797         buf[1] = mode;
798         buf[2] = 0;
799         buf[3] = 0;
800         buf[4] = 0;
801         buf[5] = 0;
802
803         retval = ms_write_bytes(chip, PRO_WRITE_REG , 6, NO_WAIT_INT, buf, 6);
804         if (retval != STATUS_SUCCESS) {
805                 TRACE_RET(chip, STATUS_FAIL);
806         }
807
808         retval = ms_send_cmd(chip, XC_CHG_POWER, WAIT_INT);
809         if (retval != STATUS_SUCCESS) {
810                 TRACE_RET(chip, STATUS_FAIL);
811         }
812
813         RTSX_READ_REG(chip, MS_TRANS_CFG, buf);
814         if (buf[0] & (MS_INT_CMDNK | MS_INT_ERR)) {
815                 TRACE_RET(chip, STATUS_FAIL);
816         }
817
818         return STATUS_SUCCESS;
819 }
820 #endif
821
822 static int ms_read_attribute_info(struct rtsx_chip *chip)
823 {
824         struct ms_info *ms_card = &(chip->ms_card);
825         int retval, i;
826         u8 val, *buf, class_code, device_type, sub_class, data[16];
827         u16 total_blk = 0, blk_size = 0;
828 #ifdef SUPPORT_MSXC
829         u32 xc_total_blk = 0, xc_blk_size = 0;
830 #endif
831         u32 sys_info_addr = 0, sys_info_size;
832 #ifdef SUPPORT_PCGL_1P18
833         u32 model_name_addr = 0, model_name_size;
834         int found_sys_info = 0, found_model_name = 0;
835 #endif
836
837         retval = ms_set_rw_reg_addr(chip, Pro_IntReg, 2, Pro_SystemParm, 7);
838         if (retval != STATUS_SUCCESS) {
839                 TRACE_RET(chip, STATUS_FAIL);
840         }
841
842         if (CHK_MS8BIT(ms_card)) {
843                 data[0] = PARALLEL_8BIT_IF;
844         } else {
845                 data[0] = PARALLEL_4BIT_IF;
846         }
847         data[1] = 0;
848
849         data[2] = 0x40;
850         data[3] = 0;
851         data[4] = 0;
852         data[5] = 0;
853         data[6] = 0;
854         data[7] = 0;
855
856         for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
857                 retval = ms_write_bytes(chip, PRO_WRITE_REG, 7, NO_WAIT_INT, data, 8);
858                 if (retval == STATUS_SUCCESS) {
859                         break;
860                 }
861         }
862         if (retval != STATUS_SUCCESS) {
863                 TRACE_RET(chip, STATUS_FAIL);
864         }
865
866         buf = (u8 *)rtsx_alloc_dma_buf(chip, 64 * 512, GFP_KERNEL);
867         if (buf == NULL) {
868                 TRACE_RET(chip, STATUS_ERROR);
869         }
870
871         for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
872                 retval = ms_send_cmd(chip, PRO_READ_ATRB, WAIT_INT);
873                 if (retval != STATUS_SUCCESS) {
874                         continue;
875                 }
876                 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
877                 if (retval != STATUS_SUCCESS) {
878                         rtsx_free_dma_buf(chip, buf);
879                         TRACE_RET(chip, STATUS_FAIL);
880                 }
881                 if (!(val & MS_INT_BREQ)) {
882                         rtsx_free_dma_buf(chip, buf);
883                         TRACE_RET(chip, STATUS_FAIL);
884                 }
885                 retval = ms_transfer_data(chip, MS_TM_AUTO_READ, PRO_READ_LONG_DATA,
886                                 0x40, WAIT_INT, 0, 0, buf, 64 * 512);
887                 if (retval == STATUS_SUCCESS) {
888                         break;
889                 } else {
890                         rtsx_clear_ms_error(chip);
891                 }
892         }
893         if (retval != STATUS_SUCCESS) {
894                 rtsx_free_dma_buf(chip, buf);
895                 TRACE_RET(chip, STATUS_FAIL);
896         }
897
898         i = 0;
899         do {
900                 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
901                 if (retval != STATUS_SUCCESS) {
902                         rtsx_free_dma_buf(chip, buf);
903                         TRACE_RET(chip, STATUS_FAIL);
904                 }
905
906                 if ((val & MS_INT_CED) || !(val & MS_INT_BREQ))
907                         break;
908
909                 retval = ms_transfer_tpc(chip, MS_TM_NORMAL_READ, PRO_READ_LONG_DATA, 0, WAIT_INT);
910                 if (retval != STATUS_SUCCESS) {
911                         rtsx_free_dma_buf(chip, buf);
912                         TRACE_RET(chip, STATUS_FAIL);
913                 }
914
915                 i++;
916         } while (i < 1024);
917
918         if (retval != STATUS_SUCCESS) {
919                 rtsx_free_dma_buf(chip, buf);
920                 TRACE_RET(chip, STATUS_FAIL);
921         }
922
923         if ((buf[0] != 0xa5) && (buf[1] != 0xc3)) {
924                 /* Signature code is wrong */
925                 rtsx_free_dma_buf(chip, buf);
926                 TRACE_RET(chip, STATUS_FAIL);
927         }
928
929         if ((buf[4] < 1) || (buf[4] > 12)) {
930                 rtsx_free_dma_buf(chip, buf);
931                 TRACE_RET(chip, STATUS_FAIL);
932         }
933
934         for (i = 0; i < buf[4]; i++) {
935                 int cur_addr_off = 16 + i * 12;
936
937 #ifdef SUPPORT_MSXC
938                 if ((buf[cur_addr_off + 8] == 0x10) || (buf[cur_addr_off + 8] == 0x13))
939 #else
940                 if (buf[cur_addr_off + 8] == 0x10)
941 #endif
942                 {
943                         sys_info_addr = ((u32)buf[cur_addr_off + 0] << 24) |
944                                 ((u32)buf[cur_addr_off + 1] << 16) |
945                                 ((u32)buf[cur_addr_off + 2] << 8) | buf[cur_addr_off + 3];
946                         sys_info_size = ((u32)buf[cur_addr_off + 4] << 24) |
947                                 ((u32)buf[cur_addr_off + 5] << 16) |
948                                 ((u32)buf[cur_addr_off + 6] << 8) | buf[cur_addr_off + 7];
949                         RTSX_DEBUGP("sys_info_addr = 0x%x, sys_info_size = 0x%x\n",
950                                         sys_info_addr, sys_info_size);
951                         if (sys_info_size != 96)  {
952                                 rtsx_free_dma_buf(chip, buf);
953                                 TRACE_RET(chip, STATUS_FAIL);
954                         }
955                         if (sys_info_addr < 0x1A0) {
956                                 rtsx_free_dma_buf(chip, buf);
957                                 TRACE_RET(chip, STATUS_FAIL);
958                         }
959                         if ((sys_info_size + sys_info_addr) > 0x8000) {
960                                 rtsx_free_dma_buf(chip, buf);
961                                 TRACE_RET(chip, STATUS_FAIL);
962                         }
963
964 #ifdef SUPPORT_MSXC
965                         if (buf[cur_addr_off + 8] == 0x13) {
966                                 ms_card->ms_type |= MS_XC;
967                         }
968 #endif
969 #ifdef SUPPORT_PCGL_1P18
970                         found_sys_info = 1;
971 #else
972                         break;
973 #endif
974                 }
975 #ifdef SUPPORT_PCGL_1P18
976                 if (buf[cur_addr_off + 8] == 0x15) {
977                         model_name_addr = ((u32)buf[cur_addr_off + 0] << 24) |
978                                 ((u32)buf[cur_addr_off + 1] << 16) |
979                                 ((u32)buf[cur_addr_off + 2] << 8) | buf[cur_addr_off + 3];
980                         model_name_size = ((u32)buf[cur_addr_off + 4] << 24) |
981                                 ((u32)buf[cur_addr_off + 5] << 16) |
982                                 ((u32)buf[cur_addr_off + 6] << 8) | buf[cur_addr_off + 7];
983                         RTSX_DEBUGP("model_name_addr = 0x%x, model_name_size = 0x%x\n",
984                                         model_name_addr, model_name_size);
985                         if (model_name_size != 48)  {
986                                 rtsx_free_dma_buf(chip, buf);
987                                 TRACE_RET(chip, STATUS_FAIL);
988                         }
989                         if (model_name_addr < 0x1A0) {
990                                 rtsx_free_dma_buf(chip, buf);
991                                 TRACE_RET(chip, STATUS_FAIL);
992                         }
993                         if ((model_name_size + model_name_addr) > 0x8000) {
994                                 rtsx_free_dma_buf(chip, buf);
995                                 TRACE_RET(chip, STATUS_FAIL);
996                         }
997
998                         found_model_name = 1;
999                 }
1000
1001                 if (found_sys_info && found_model_name)
1002                         break;
1003 #endif
1004         }
1005
1006         if (i == buf[4]) {
1007                 rtsx_free_dma_buf(chip, buf);
1008                 TRACE_RET(chip, STATUS_FAIL);
1009         }
1010
1011         class_code =  buf[sys_info_addr + 0];
1012         device_type = buf[sys_info_addr + 56];
1013         sub_class = buf[sys_info_addr + 46];
1014 #ifdef SUPPORT_MSXC
1015         if (CHK_MSXC(ms_card)) {
1016                 xc_total_blk = ((u32)buf[sys_info_addr + 6] << 24) |
1017                                 ((u32)buf[sys_info_addr + 7] << 16) |
1018                                 ((u32)buf[sys_info_addr + 8] << 8) |
1019                                 buf[sys_info_addr + 9];
1020                 xc_blk_size = ((u32)buf[sys_info_addr + 32] << 24) |
1021                                 ((u32)buf[sys_info_addr + 33] << 16) |
1022                                 ((u32)buf[sys_info_addr + 34] << 8) |
1023                                 buf[sys_info_addr + 35];
1024                 RTSX_DEBUGP("xc_total_blk = 0x%x, xc_blk_size = 0x%x\n", xc_total_blk, xc_blk_size);
1025         } else {
1026                 total_blk = ((u16)buf[sys_info_addr + 6] << 8) | buf[sys_info_addr + 7];
1027                 blk_size = ((u16)buf[sys_info_addr + 2] << 8) | buf[sys_info_addr + 3];
1028                 RTSX_DEBUGP("total_blk = 0x%x, blk_size = 0x%x\n", total_blk, blk_size);
1029         }
1030 #else
1031         total_blk = ((u16)buf[sys_info_addr + 6] << 8) | buf[sys_info_addr + 7];
1032         blk_size = ((u16)buf[sys_info_addr + 2] << 8) | buf[sys_info_addr + 3];
1033         RTSX_DEBUGP("total_blk = 0x%x, blk_size = 0x%x\n", total_blk, blk_size);
1034 #endif
1035
1036         RTSX_DEBUGP("class_code = 0x%x, device_type = 0x%x, sub_class = 0x%x\n",
1037                         class_code, device_type, sub_class);
1038
1039         memcpy(ms_card->raw_sys_info, buf + sys_info_addr, 96);
1040 #ifdef SUPPORT_PCGL_1P18
1041         memcpy(ms_card->raw_model_name, buf + model_name_addr, 48);
1042 #endif
1043
1044         rtsx_free_dma_buf(chip, buf);
1045
1046 #ifdef SUPPORT_MSXC
1047         if (CHK_MSXC(ms_card)) {
1048                 if (class_code != 0x03) {
1049                         TRACE_RET(chip, STATUS_FAIL);
1050                 }
1051         } else {
1052                 if (class_code != 0x02) {
1053                         TRACE_RET(chip, STATUS_FAIL);
1054                 }
1055         }
1056 #else
1057         if (class_code != 0x02) {
1058                 TRACE_RET(chip, STATUS_FAIL);
1059         }
1060 #endif
1061
1062         if (device_type != 0x00) {
1063                 if ((device_type == 0x01) || (device_type == 0x02) ||
1064                                 (device_type == 0x03)) {
1065                         chip->card_wp |= MS_CARD;
1066                 } else {
1067                         TRACE_RET(chip, STATUS_FAIL);
1068                 }
1069         }
1070
1071         if (sub_class & 0xC0) {
1072                 TRACE_RET(chip, STATUS_FAIL);
1073         }
1074
1075         RTSX_DEBUGP("class_code: 0x%x, device_type: 0x%x, sub_class: 0x%x\n",
1076                 class_code, device_type, sub_class);
1077
1078 #ifdef SUPPORT_MSXC
1079         if (CHK_MSXC(ms_card)) {
1080                 chip->capacity[chip->card2lun[MS_CARD]] =
1081                         ms_card->capacity = xc_total_blk * xc_blk_size;
1082         } else {
1083                 chip->capacity[chip->card2lun[MS_CARD]] =
1084                         ms_card->capacity = total_blk * blk_size;
1085         }
1086 #else
1087         chip->capacity[chip->card2lun[MS_CARD]] = ms_card->capacity = total_blk * blk_size;
1088 #endif
1089
1090         return STATUS_SUCCESS;
1091 }
1092
1093 #ifdef SUPPORT_MAGIC_GATE
1094 static int mg_set_tpc_para_sub(struct rtsx_chip *chip, int type, u8 mg_entry_num);
1095 #endif
1096
1097 static int reset_ms_pro(struct rtsx_chip *chip)
1098 {
1099         struct ms_info *ms_card = &(chip->ms_card);
1100         int retval;
1101 #ifdef XC_POWERCLASS
1102         u8 change_power_class = 2;
1103 #endif
1104
1105 #ifdef XC_POWERCLASS
1106 Retry:
1107 #endif
1108         retval = ms_pro_reset_flow(chip, 1);
1109         if (retval != STATUS_SUCCESS) {
1110                 if (ms_card->switch_8bit_fail) {
1111                         retval = ms_pro_reset_flow(chip, 0);
1112                         if (retval != STATUS_SUCCESS) {
1113                                 TRACE_RET(chip, STATUS_FAIL);
1114                         }
1115                 } else {
1116                         TRACE_RET(chip, STATUS_FAIL);
1117                 }
1118         }
1119
1120         retval = ms_read_attribute_info(chip);
1121         if (retval != STATUS_SUCCESS) {
1122                 TRACE_RET(chip, STATUS_FAIL);
1123         }
1124
1125 #ifdef XC_POWERCLASS
1126         if (CHK_HG8BIT(ms_card)) {
1127                 change_power_class = 0;
1128         }
1129
1130         if (change_power_class && CHK_MSXC(ms_card)) {
1131                 u8 power_class_en = 0x03;
1132
1133                 if (CHECK_PID(chip, 0x5209))
1134                         power_class_en = chip->ms_power_class_en;
1135
1136                 RTSX_DEBUGP("power_class_en = 0x%x\n", power_class_en);
1137                 RTSX_DEBUGP("change_power_class = %d\n", change_power_class);
1138
1139                 if (change_power_class) {
1140                         power_class_en &= (1 << (change_power_class - 1));
1141                 } else {
1142                         power_class_en = 0;
1143                 }
1144
1145                 if (power_class_en) {
1146                         u8 power_class_mode = (ms_card->raw_sys_info[46] & 0x18) >> 3;
1147                         RTSX_DEBUGP("power_class_mode = 0x%x", power_class_mode);
1148                         if (change_power_class > power_class_mode)
1149                                 change_power_class = power_class_mode;
1150                         if (change_power_class) {
1151                                 retval = msxc_change_power(chip, change_power_class);
1152                                 if (retval != STATUS_SUCCESS) {
1153                                         change_power_class--;
1154                                         goto Retry;
1155                                 }
1156                         }
1157                 }
1158         }
1159 #endif
1160
1161 #ifdef SUPPORT_MAGIC_GATE
1162         retval = mg_set_tpc_para_sub(chip, 0, 0);
1163         if (retval != STATUS_SUCCESS) {
1164                 TRACE_RET(chip, STATUS_FAIL);
1165         }
1166 #endif
1167
1168         if (CHK_HG8BIT(ms_card)) {
1169                 chip->card_bus_width[chip->card2lun[MS_CARD]] = 8;
1170         } else {
1171                 chip->card_bus_width[chip->card2lun[MS_CARD]] = 4;
1172         }
1173
1174         return STATUS_SUCCESS;
1175 }
1176
1177 static int ms_read_status_reg(struct rtsx_chip *chip)
1178 {
1179         int retval;
1180         u8 val[2];
1181
1182         retval = ms_set_rw_reg_addr(chip, StatusReg0, 2, 0, 0);
1183         if (retval != STATUS_SUCCESS) {
1184                 TRACE_RET(chip, STATUS_FAIL);
1185         }
1186
1187         retval = ms_read_bytes(chip, READ_REG, 2, NO_WAIT_INT, val, 2);
1188         if (retval != STATUS_SUCCESS) {
1189                 TRACE_RET(chip, STATUS_FAIL);
1190         }
1191
1192         if (val[1] & (STS_UCDT | STS_UCEX | STS_UCFG)) {
1193                 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
1194                 TRACE_RET(chip, STATUS_FAIL);
1195         }
1196
1197         return STATUS_SUCCESS;
1198 }
1199
1200
1201 static int ms_read_extra_data(struct rtsx_chip *chip,
1202                 u16 block_addr, u8 page_num, u8 *buf, int buf_len)
1203 {
1204         struct ms_info *ms_card = &(chip->ms_card);
1205         int retval, i;
1206         u8 val, data[10];
1207
1208         retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 6);
1209         if (retval != STATUS_SUCCESS) {
1210                 TRACE_RET(chip, STATUS_FAIL);
1211         }
1212
1213         if (CHK_MS4BIT(ms_card)) {
1214                 /* Parallel interface */
1215                 data[0] = 0x88;
1216         } else {
1217                 /* Serial interface */
1218                 data[0] = 0x80;
1219         }
1220         data[1] = 0;
1221         data[2] = (u8)(block_addr >> 8);
1222         data[3] = (u8)block_addr;
1223         data[4] = 0x40;
1224         data[5] = page_num;
1225
1226         for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
1227                 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT, data, 6);
1228                 if (retval == STATUS_SUCCESS)
1229                         break;
1230         }
1231         if (i == MS_MAX_RETRY_COUNT) {
1232                 TRACE_RET(chip, STATUS_FAIL);
1233         }
1234
1235         ms_set_err_code(chip, MS_NO_ERROR);
1236
1237         for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
1238                 retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
1239                 if (retval == STATUS_SUCCESS)
1240                         break;
1241         }
1242         if (i == MS_MAX_RETRY_COUNT) {
1243                 TRACE_RET(chip, STATUS_FAIL);
1244         }
1245
1246         ms_set_err_code(chip, MS_NO_ERROR);
1247         retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1248         if (retval != STATUS_SUCCESS) {
1249                 TRACE_RET(chip, STATUS_FAIL);
1250         }
1251         if (val & INT_REG_CMDNK) {
1252                 ms_set_err_code(chip, MS_CMD_NK);
1253                 TRACE_RET(chip, STATUS_FAIL);
1254         }
1255         if (val & INT_REG_CED) {
1256                 if (val & INT_REG_ERR) {
1257                         retval = ms_read_status_reg(chip);
1258                         if (retval != STATUS_SUCCESS) {
1259                                 TRACE_RET(chip, STATUS_FAIL);
1260                         }
1261                         retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 6);
1262                         if (retval != STATUS_SUCCESS) {
1263                                 TRACE_RET(chip, STATUS_FAIL);
1264                         }
1265                 }
1266         }
1267
1268         retval = ms_read_bytes(chip, READ_REG, MS_EXTRA_SIZE, NO_WAIT_INT, data, MS_EXTRA_SIZE);
1269         if (retval != STATUS_SUCCESS) {
1270                 TRACE_RET(chip, STATUS_FAIL);
1271         }
1272
1273         if (buf && buf_len) {
1274                 if (buf_len > MS_EXTRA_SIZE)
1275                         buf_len = MS_EXTRA_SIZE;
1276                 memcpy(buf, data, buf_len);
1277         }
1278
1279         return STATUS_SUCCESS;
1280 }
1281
1282 static int ms_write_extra_data(struct rtsx_chip *chip,
1283                 u16 block_addr, u8 page_num, u8 *buf, int buf_len)
1284 {
1285         struct ms_info *ms_card = &(chip->ms_card);
1286         int retval, i;
1287         u8 val, data[16];
1288
1289         if (!buf || (buf_len < MS_EXTRA_SIZE)) {
1290                 TRACE_RET(chip, STATUS_FAIL);
1291         }
1292
1293         retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 6 + MS_EXTRA_SIZE);
1294         if (retval != STATUS_SUCCESS) {
1295                 TRACE_RET(chip, STATUS_FAIL);
1296         }
1297
1298         if (CHK_MS4BIT(ms_card)) {
1299                 data[0] = 0x88;
1300         } else {
1301                 data[0] = 0x80;
1302         }
1303         data[1] = 0;
1304         data[2] = (u8)(block_addr >> 8);
1305         data[3] = (u8)block_addr;
1306         data[4] = 0x40;
1307         data[5] = page_num;
1308
1309         for (i = 6; i < MS_EXTRA_SIZE + 6; i++) {
1310                 data[i] = buf[i - 6];
1311         }
1312
1313         retval = ms_write_bytes(chip, WRITE_REG , (6+MS_EXTRA_SIZE), NO_WAIT_INT, data, 16);
1314         if (retval != STATUS_SUCCESS) {
1315                 TRACE_RET(chip, STATUS_FAIL);
1316         }
1317
1318         retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
1319         if (retval != STATUS_SUCCESS) {
1320                 TRACE_RET(chip, STATUS_FAIL);
1321         }
1322
1323         ms_set_err_code(chip, MS_NO_ERROR);
1324         retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1325         if (retval != STATUS_SUCCESS) {
1326                 TRACE_RET(chip, STATUS_FAIL);
1327         }
1328         if (val & INT_REG_CMDNK) {
1329                 ms_set_err_code(chip, MS_CMD_NK);
1330                 TRACE_RET(chip, STATUS_FAIL);
1331         }
1332         if (val & INT_REG_CED) {
1333                 if (val & INT_REG_ERR) {
1334                         ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1335                         TRACE_RET(chip, STATUS_FAIL);
1336                 }
1337         }
1338
1339         return STATUS_SUCCESS;
1340 }
1341
1342
1343 static int ms_read_page(struct rtsx_chip *chip, u16 block_addr, u8 page_num)
1344 {
1345         struct ms_info *ms_card = &(chip->ms_card);
1346         int retval;
1347         u8 val, data[6];
1348
1349         retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 6);
1350         if (retval != STATUS_SUCCESS) {
1351                 TRACE_RET(chip, STATUS_FAIL);
1352         }
1353
1354         if (CHK_MS4BIT(ms_card)) {
1355                 data[0] = 0x88;
1356         } else {
1357                 data[0] = 0x80;
1358         }
1359         data[1] = 0;
1360         data[2] = (u8)(block_addr >> 8);
1361         data[3] = (u8)block_addr;
1362         data[4] = 0x20;
1363         data[5] = page_num;
1364
1365         retval = ms_write_bytes(chip, WRITE_REG , 6, NO_WAIT_INT, data, 6);
1366         if (retval != STATUS_SUCCESS) {
1367                 TRACE_RET(chip, STATUS_FAIL);
1368         }
1369
1370         retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
1371         if (retval != STATUS_SUCCESS) {
1372                 TRACE_RET(chip, STATUS_FAIL);
1373         }
1374
1375         ms_set_err_code(chip, MS_NO_ERROR);
1376         retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1377         if (retval != STATUS_SUCCESS) {
1378                 TRACE_RET(chip, STATUS_FAIL);
1379         }
1380         if (val & INT_REG_CMDNK) {
1381                 ms_set_err_code(chip, MS_CMD_NK);
1382                 TRACE_RET(chip, STATUS_FAIL);
1383         }
1384
1385         if (val & INT_REG_CED) {
1386                 if (val & INT_REG_ERR) {
1387                         if (!(val & INT_REG_BREQ)) {
1388                                 ms_set_err_code(chip,  MS_FLASH_READ_ERROR);
1389                                 TRACE_RET(chip, STATUS_FAIL);
1390                         }
1391                         retval = ms_read_status_reg(chip);
1392                         if (retval != STATUS_SUCCESS) {
1393                                 ms_set_err_code(chip,  MS_FLASH_WRITE_ERROR);
1394                         }
1395                 } else {
1396                         if (!(val & INT_REG_BREQ)) {
1397                                 ms_set_err_code(chip, MS_BREQ_ERROR);
1398                                 TRACE_RET(chip, STATUS_FAIL);
1399                         }
1400                 }
1401         }
1402
1403         retval = ms_transfer_tpc(chip, MS_TM_NORMAL_READ, READ_PAGE_DATA, 0, NO_WAIT_INT);
1404         if (retval != STATUS_SUCCESS) {
1405                 TRACE_RET(chip, STATUS_FAIL);
1406         }
1407
1408         if (ms_check_err_code(chip, MS_FLASH_WRITE_ERROR)) {
1409                 TRACE_RET(chip, STATUS_FAIL);
1410         }
1411
1412         return STATUS_SUCCESS;
1413 }
1414
1415
1416 static int ms_set_bad_block(struct rtsx_chip *chip, u16 phy_blk)
1417 {
1418         struct ms_info *ms_card = &(chip->ms_card);
1419         int retval;
1420         u8 val, data[8], extra[MS_EXTRA_SIZE];
1421
1422         retval = ms_read_extra_data(chip, phy_blk, 0, extra, MS_EXTRA_SIZE);
1423         if (retval != STATUS_SUCCESS) {
1424                 TRACE_RET(chip, STATUS_FAIL);
1425         }
1426
1427         retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 7);
1428         if (retval != STATUS_SUCCESS) {
1429                 TRACE_RET(chip, STATUS_FAIL);
1430         }
1431
1432         ms_set_err_code(chip, MS_NO_ERROR);
1433
1434         if (CHK_MS4BIT(ms_card)) {
1435                 data[0] = 0x88;
1436         } else {
1437                 data[0] = 0x80;
1438         }
1439         data[1] = 0;
1440         data[2] = (u8)(phy_blk >> 8);
1441         data[3] = (u8)phy_blk;
1442         data[4] = 0x80;
1443         data[5] = 0;
1444         data[6] = extra[0] & 0x7F;
1445         data[7] = 0xFF;
1446
1447         retval = ms_write_bytes(chip, WRITE_REG , 7, NO_WAIT_INT, data, 7);
1448         if (retval != STATUS_SUCCESS) {
1449                 TRACE_RET(chip, STATUS_FAIL);
1450         }
1451
1452         retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
1453         if (retval != STATUS_SUCCESS) {
1454                 TRACE_RET(chip, STATUS_FAIL);
1455         }
1456
1457         ms_set_err_code(chip, MS_NO_ERROR);
1458         retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1459         if (retval != STATUS_SUCCESS) {
1460                 TRACE_RET(chip, STATUS_FAIL);
1461         }
1462
1463         if (val & INT_REG_CMDNK) {
1464                 ms_set_err_code(chip, MS_CMD_NK);
1465                 TRACE_RET(chip, STATUS_FAIL);
1466         }
1467
1468         if (val & INT_REG_CED) {
1469                 if (val & INT_REG_ERR) {
1470                         ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1471                         TRACE_RET(chip, STATUS_FAIL);
1472                 }
1473         }
1474
1475         return STATUS_SUCCESS;
1476 }
1477
1478
1479 static int ms_erase_block(struct rtsx_chip *chip, u16 phy_blk)
1480 {
1481         struct ms_info *ms_card = &(chip->ms_card);
1482         int retval, i = 0;
1483         u8 val, data[6];
1484
1485         retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 6);
1486         if (retval != STATUS_SUCCESS) {
1487                 TRACE_RET(chip, STATUS_FAIL);
1488         }
1489
1490         ms_set_err_code(chip, MS_NO_ERROR);
1491
1492         if (CHK_MS4BIT(ms_card)) {
1493                 data[0] = 0x88;
1494         } else {
1495                 data[0] = 0x80;
1496         }
1497         data[1] = 0;
1498         data[2] = (u8)(phy_blk >> 8);
1499         data[3] = (u8)phy_blk;
1500         data[4] = 0;
1501         data[5] = 0;
1502
1503         retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT, data, 6);
1504         if (retval != STATUS_SUCCESS) {
1505                 TRACE_RET(chip, STATUS_FAIL);
1506         }
1507
1508 ERASE_RTY:
1509         retval = ms_send_cmd(chip, BLOCK_ERASE, WAIT_INT);
1510         if (retval != STATUS_SUCCESS) {
1511                 TRACE_RET(chip, STATUS_FAIL);
1512         }
1513
1514         ms_set_err_code(chip, MS_NO_ERROR);
1515         retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1516         if (retval != STATUS_SUCCESS) {
1517                 TRACE_RET(chip, STATUS_FAIL);
1518         }
1519
1520         if (val & INT_REG_CMDNK) {
1521                 if (i < 3) {
1522                         i++;
1523                         goto ERASE_RTY;
1524                 }
1525
1526                 ms_set_err_code(chip, MS_CMD_NK);
1527                 ms_set_bad_block(chip, phy_blk);
1528                 TRACE_RET(chip, STATUS_FAIL);
1529         }
1530
1531         if (val & INT_REG_CED) {
1532                 if (val & INT_REG_ERR) {
1533                         ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1534                         TRACE_RET(chip, STATUS_FAIL);
1535                 }
1536         }
1537
1538         return STATUS_SUCCESS;
1539 }
1540
1541
1542 static void ms_set_page_status(u16 log_blk, u8 type, u8 *extra, int extra_len)
1543 {
1544         if (!extra || (extra_len < MS_EXTRA_SIZE)) {
1545                 return;
1546         }
1547
1548         memset(extra, 0xFF, MS_EXTRA_SIZE);
1549
1550         if (type == setPS_NG) {
1551                 /* set page status as 1:NG,and block status keep 1:OK */
1552                 extra[0] = 0xB8;
1553         } else {
1554                 /* set page status as 0:Data Error,and block status keep 1:OK */
1555                 extra[0] = 0x98;
1556         }
1557
1558         extra[2] = (u8)(log_blk >> 8);
1559         extra[3] = (u8)log_blk;
1560 }
1561
1562 static int ms_init_page(struct rtsx_chip *chip, u16 phy_blk, u16 log_blk, u8 start_page, u8 end_page)
1563 {
1564         int retval;
1565         u8 extra[MS_EXTRA_SIZE], i;
1566
1567         memset(extra, 0xff, MS_EXTRA_SIZE);
1568
1569         extra[0] = 0xf8;        /* Block, page OK, data erased */
1570         extra[1] = 0xff;
1571         extra[2] = (u8)(log_blk >> 8);
1572         extra[3] = (u8)log_blk;
1573
1574         for (i = start_page; i < end_page; i++) {
1575                 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
1576                         ms_set_err_code(chip, MS_NO_CARD);
1577                         TRACE_RET(chip, STATUS_FAIL);
1578                 }
1579
1580                 retval = ms_write_extra_data(chip, phy_blk, i, extra, MS_EXTRA_SIZE);
1581                 if (retval != STATUS_SUCCESS) {
1582                         TRACE_RET(chip, STATUS_FAIL);
1583                 }
1584         }
1585
1586         return STATUS_SUCCESS;
1587 }
1588
1589 static int ms_copy_page(struct rtsx_chip *chip, u16 old_blk, u16 new_blk,
1590                 u16 log_blk, u8 start_page, u8 end_page)
1591 {
1592         struct ms_info *ms_card = &(chip->ms_card);
1593         int retval, rty_cnt, uncorrect_flag = 0;
1594         u8 extra[MS_EXTRA_SIZE], val, i, j, data[16];
1595
1596         RTSX_DEBUGP("Copy page from 0x%x to 0x%x, logical block is 0x%x\n",
1597                 old_blk, new_blk, log_blk);
1598         RTSX_DEBUGP("start_page = %d, end_page = %d\n", start_page, end_page);
1599
1600         retval = ms_read_extra_data(chip, new_blk, 0, extra, MS_EXTRA_SIZE);
1601         if (retval != STATUS_SUCCESS) {
1602                 TRACE_RET(chip, STATUS_FAIL);
1603         }
1604
1605         retval = ms_read_status_reg(chip);
1606         if (retval != STATUS_SUCCESS) {
1607                 TRACE_RET(chip, STATUS_FAIL);
1608         }
1609
1610         RTSX_READ_REG(chip, PPBUF_BASE2, &val);
1611
1612         if (val & BUF_FULL) {
1613                 retval = ms_send_cmd(chip, CLEAR_BUF, WAIT_INT);
1614                 if (retval != STATUS_SUCCESS) {
1615                         TRACE_RET(chip, STATUS_FAIL);
1616                 }
1617
1618                 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1619                 if (retval != STATUS_SUCCESS) {
1620                         TRACE_RET(chip, STATUS_FAIL);
1621                 }
1622
1623                 if (!(val & INT_REG_CED)) {
1624                         ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1625                         TRACE_RET(chip, STATUS_FAIL);
1626                 }
1627         }
1628
1629         for (i = start_page; i < end_page; i++) {
1630                 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
1631                         ms_set_err_code(chip, MS_NO_CARD);
1632                         TRACE_RET(chip, STATUS_FAIL);
1633                 }
1634
1635                 ms_read_extra_data(chip, old_blk, i, extra, MS_EXTRA_SIZE);
1636
1637                 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 6);
1638                 if (retval != STATUS_SUCCESS) {
1639                         TRACE_RET(chip, STATUS_FAIL);
1640                 }
1641
1642                 ms_set_err_code(chip, MS_NO_ERROR);
1643
1644                 if (CHK_MS4BIT(ms_card)) {
1645                         data[0] = 0x88;
1646                 } else {
1647                         data[0] = 0x80;
1648                 }
1649                 data[1] = 0;
1650                 data[2] = (u8)(old_blk >> 8);
1651                 data[3] = (u8)old_blk;
1652                 data[4] = 0x20;
1653                 data[5] = i;
1654
1655                 retval = ms_write_bytes(chip, WRITE_REG , 6, NO_WAIT_INT, data, 6);
1656                 if (retval != STATUS_SUCCESS) {
1657                         TRACE_RET(chip, STATUS_FAIL);
1658                 }
1659
1660                 retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
1661                 if (retval != STATUS_SUCCESS) {
1662                         TRACE_RET(chip, STATUS_FAIL);
1663                 }
1664
1665                 ms_set_err_code(chip, MS_NO_ERROR);
1666                 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1667                 if (retval != STATUS_SUCCESS) {
1668                         TRACE_RET(chip, STATUS_FAIL);
1669                 }
1670
1671                 if (val & INT_REG_CMDNK) {
1672                         ms_set_err_code(chip, MS_CMD_NK);
1673                         TRACE_RET(chip, STATUS_FAIL);
1674                 }
1675
1676                 if (val & INT_REG_CED) {
1677                         if (val & INT_REG_ERR) {
1678                                 retval = ms_read_status_reg(chip);
1679                                 if (retval != STATUS_SUCCESS) {
1680                                         uncorrect_flag = 1;
1681                                         RTSX_DEBUGP("Uncorrectable error\n");
1682                                 } else {
1683                                         uncorrect_flag = 0;
1684                                 }
1685
1686                                 retval = ms_transfer_tpc(chip, MS_TM_NORMAL_READ, READ_PAGE_DATA, 0, NO_WAIT_INT);
1687                                 if (retval != STATUS_SUCCESS) {
1688                                         TRACE_RET(chip, STATUS_FAIL);
1689                                 }
1690
1691                                 if (uncorrect_flag) {
1692                                         ms_set_page_status(log_blk, setPS_NG, extra, MS_EXTRA_SIZE);
1693                                         if (i == 0) {
1694                                                 extra[0] &= 0xEF;
1695                                         }
1696                                         ms_write_extra_data(chip, old_blk, i, extra, MS_EXTRA_SIZE);
1697                                         RTSX_DEBUGP("page %d : extra[0] = 0x%x\n", i, extra[0]);
1698                                         MS_SET_BAD_BLOCK_FLG(ms_card);
1699
1700                                         ms_set_page_status(log_blk, setPS_Error, extra, MS_EXTRA_SIZE);
1701                                         ms_write_extra_data(chip, new_blk, i, extra, MS_EXTRA_SIZE);
1702                                         continue;
1703                                 }
1704
1705                                 for (rty_cnt = 0; rty_cnt < MS_MAX_RETRY_COUNT; rty_cnt++) {
1706                                         retval = ms_transfer_tpc(chip, MS_TM_NORMAL_WRITE,
1707                                                         WRITE_PAGE_DATA, 0, NO_WAIT_INT);
1708                                         if (retval == STATUS_SUCCESS) {
1709                                                 break;
1710                                         }
1711                                 }
1712                                 if (rty_cnt == MS_MAX_RETRY_COUNT) {
1713                                         TRACE_RET(chip, STATUS_FAIL);
1714                                 }
1715                         }
1716
1717                         if (!(val & INT_REG_BREQ)) {
1718                                 ms_set_err_code(chip, MS_BREQ_ERROR);
1719                                 TRACE_RET(chip, STATUS_FAIL);
1720                         }
1721                 }
1722
1723                 retval = ms_set_rw_reg_addr(chip, OverwriteFlag,
1724                                 MS_EXTRA_SIZE, SystemParm, (6+MS_EXTRA_SIZE));
1725
1726                 ms_set_err_code(chip, MS_NO_ERROR);
1727
1728                 if (CHK_MS4BIT(ms_card)) {
1729                         data[0] = 0x88;
1730                 } else {
1731                         data[0] = 0x80;
1732                 }
1733                 data[1] = 0;
1734                 data[2] = (u8)(new_blk >> 8);
1735                 data[3] = (u8)new_blk;
1736                 data[4] = 0x20;
1737                 data[5] = i;
1738
1739                 if ((extra[0] & 0x60) != 0x60) {
1740                         data[6] = extra[0];
1741                 } else {
1742                         data[6] = 0xF8;
1743                 }
1744                 data[6 + 1] = 0xFF;
1745                 data[6 + 2] = (u8)(log_blk >> 8);
1746                 data[6 + 3] = (u8)log_blk;
1747
1748                 for (j = 4; j <= MS_EXTRA_SIZE; j++) {
1749                         data[6 + j] = 0xFF;
1750                 }
1751
1752                 retval = ms_write_bytes(chip, WRITE_REG, (6 + MS_EXTRA_SIZE), NO_WAIT_INT, data, 16);
1753                 if (retval != STATUS_SUCCESS) {
1754                         TRACE_RET(chip, STATUS_FAIL);
1755                 }
1756
1757                 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
1758                 if (retval != STATUS_SUCCESS) {
1759                         TRACE_RET(chip, STATUS_FAIL);
1760                 }
1761
1762                 ms_set_err_code(chip, MS_NO_ERROR);
1763                 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1764                 if (retval != STATUS_SUCCESS) {
1765                         TRACE_RET(chip, STATUS_FAIL);
1766                 }
1767
1768                 if (val & INT_REG_CMDNK) {
1769                         ms_set_err_code(chip, MS_CMD_NK);
1770                         TRACE_RET(chip, STATUS_FAIL);
1771                 }
1772
1773                 if (val & INT_REG_CED) {
1774                         if (val & INT_REG_ERR) {
1775                                 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1776                                 TRACE_RET(chip, STATUS_FAIL);
1777                         }
1778                 }
1779
1780                 if (i == 0) {
1781                         retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 7);
1782                         if (retval != STATUS_SUCCESS) {
1783                                 TRACE_RET(chip, STATUS_FAIL);
1784                         }
1785
1786                         ms_set_err_code(chip, MS_NO_ERROR);
1787
1788                         if (CHK_MS4BIT(ms_card)) {
1789                                 data[0] = 0x88;
1790                         } else {
1791                                 data[0] = 0x80;
1792                         }
1793                         data[1] = 0;
1794                         data[2] = (u8)(old_blk >> 8);
1795                         data[3] = (u8)old_blk;
1796                         data[4] = 0x80;
1797                         data[5] = 0;
1798                         data[6] = 0xEF;
1799                         data[7] = 0xFF;
1800
1801                         retval = ms_write_bytes(chip, WRITE_REG, 7, NO_WAIT_INT, data, 8);
1802                         if (retval != STATUS_SUCCESS) {
1803                                 TRACE_RET(chip, STATUS_FAIL);
1804                         }
1805
1806                         retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
1807                         if (retval != STATUS_SUCCESS) {
1808                                 TRACE_RET(chip, STATUS_FAIL);
1809                         }
1810
1811                         ms_set_err_code(chip, MS_NO_ERROR);
1812                         retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1813                         if (retval != STATUS_SUCCESS) {
1814                                 TRACE_RET(chip, STATUS_FAIL);
1815                         }
1816
1817                         if (val & INT_REG_CMDNK) {
1818                                 ms_set_err_code(chip, MS_CMD_NK);
1819                                 TRACE_RET(chip, STATUS_FAIL);
1820                         }
1821
1822                         if (val & INT_REG_CED) {
1823                                 if (val & INT_REG_ERR) {
1824                                         ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1825                                         TRACE_RET(chip, STATUS_FAIL);
1826                                 }
1827                         }
1828                 }
1829         }
1830
1831         return STATUS_SUCCESS;
1832 }
1833
1834
1835 static int reset_ms(struct rtsx_chip *chip)
1836 {
1837         struct ms_info *ms_card = &(chip->ms_card);
1838         int retval;
1839         u16 i, reg_addr, block_size;
1840         u8 val, extra[MS_EXTRA_SIZE], j, *ptr;
1841 #ifndef SUPPORT_MAGIC_GATE
1842         u16 eblock_cnt;
1843 #endif
1844
1845         retval = ms_prepare_reset(chip);
1846         if (retval != STATUS_SUCCESS) {
1847                 TRACE_RET(chip, STATUS_FAIL);
1848         }
1849
1850         ms_card->ms_type |= TYPE_MS;
1851
1852         retval = ms_send_cmd(chip, MS_RESET, NO_WAIT_INT);
1853         if (retval != STATUS_SUCCESS) {
1854                 TRACE_RET(chip, STATUS_FAIL);
1855         }
1856
1857         retval = ms_read_status_reg(chip);
1858         if (retval != STATUS_SUCCESS) {
1859                 TRACE_RET(chip, STATUS_FAIL);
1860         }
1861
1862         RTSX_READ_REG(chip, PPBUF_BASE2, &val);
1863         if (val & WRT_PRTCT) {
1864                 chip->card_wp |= MS_CARD;
1865         } else {
1866                 chip->card_wp &= ~MS_CARD;
1867         }
1868
1869         i = 0;
1870
1871 RE_SEARCH:
1872         /* Search Boot Block */
1873         while (i < (MAX_DEFECTIVE_BLOCK + 2)) {
1874                 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
1875                         ms_set_err_code(chip, MS_NO_CARD);
1876                         TRACE_RET(chip, STATUS_FAIL);
1877                 }
1878
1879                 retval = ms_read_extra_data(chip, i, 0, extra, MS_EXTRA_SIZE);
1880                 if (retval != STATUS_SUCCESS) {
1881                         i++;
1882                         continue;
1883                 }
1884
1885                 if (extra[0] & BLOCK_OK) {
1886                         if (!(extra[1] & NOT_BOOT_BLOCK)) {
1887                                 ms_card->boot_block = i;
1888                                 break;
1889                         }
1890                 }
1891                 i++;
1892         }
1893
1894         if (i == (MAX_DEFECTIVE_BLOCK + 2)) {
1895                 RTSX_DEBUGP("No boot block found!");
1896                 TRACE_RET(chip, STATUS_FAIL);
1897         }
1898
1899         for (j = 0; j < 3; j++) {
1900                 retval = ms_read_page(chip, ms_card->boot_block, j);
1901                 if (retval != STATUS_SUCCESS) {
1902                         if (ms_check_err_code(chip, MS_FLASH_WRITE_ERROR)) {
1903                                 i = ms_card->boot_block + 1;
1904                                 ms_set_err_code(chip, MS_NO_ERROR);
1905                                 goto RE_SEARCH;
1906                         }
1907                 }
1908         }
1909
1910         retval = ms_read_page(chip, ms_card->boot_block, 0);
1911         if (retval != STATUS_SUCCESS) {
1912                 TRACE_RET(chip, STATUS_FAIL);
1913         }
1914
1915         /* Read MS system information as sys_info */
1916         rtsx_init_cmd(chip);
1917
1918         for (i = 0; i < 96; i++) {
1919                 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 0x1A0 + i, 0, 0);
1920         }
1921
1922         retval = rtsx_send_cmd(chip, MS_CARD, 100);
1923         if (retval < 0) {
1924                 TRACE_RET(chip, STATUS_FAIL);
1925         }
1926
1927         ptr = rtsx_get_cmd_data(chip);
1928         memcpy(ms_card->raw_sys_info, ptr, 96);
1929
1930         /* Read useful block contents */
1931         rtsx_init_cmd(chip);
1932
1933         rtsx_add_cmd(chip, READ_REG_CMD, HEADER_ID0, 0, 0);
1934         rtsx_add_cmd(chip, READ_REG_CMD, HEADER_ID1, 0, 0);
1935
1936         for (reg_addr = DISABLED_BLOCK0; reg_addr <= DISABLED_BLOCK3; reg_addr++) {
1937                 rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0);
1938         }
1939
1940         for (reg_addr = BLOCK_SIZE_0; reg_addr <= PAGE_SIZE_1; reg_addr++) {
1941                 rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0);
1942         }
1943
1944         rtsx_add_cmd(chip, READ_REG_CMD, MS_Device_Type, 0, 0);
1945         rtsx_add_cmd(chip, READ_REG_CMD, MS_4bit_Support, 0, 0);
1946
1947         retval = rtsx_send_cmd(chip, MS_CARD, 100);
1948         if (retval < 0) {
1949                 TRACE_RET(chip, STATUS_FAIL);
1950         }
1951
1952         ptr = rtsx_get_cmd_data(chip);
1953
1954         RTSX_DEBUGP("Boot block data:\n");
1955         RTSX_DUMP(ptr, 16);
1956
1957         /* Block ID error
1958          * HEADER_ID0, HEADER_ID1
1959          */
1960         if (ptr[0] != 0x00 || ptr[1] != 0x01) {
1961                 i = ms_card->boot_block + 1;
1962                 goto RE_SEARCH;
1963         }
1964
1965         /* Page size error
1966          * PAGE_SIZE_0, PAGE_SIZE_1
1967          */
1968         if (ptr[12] != 0x02 || ptr[13] != 0x00) {
1969                 i = ms_card->boot_block + 1;
1970                 goto RE_SEARCH;
1971         }
1972
1973         if ((ptr[14] == 1) || (ptr[14] == 3)) {
1974                 chip->card_wp |= MS_CARD;
1975         }
1976
1977         /* BLOCK_SIZE_0, BLOCK_SIZE_1 */
1978         block_size = ((u16)ptr[6] << 8) | ptr[7];
1979         if (block_size == 0x0010) {
1980                 /* Block size 16KB */
1981                 ms_card->block_shift = 5;
1982                 ms_card->page_off = 0x1F;
1983         } else if (block_size == 0x0008) {
1984                 /* Block size 8KB */
1985                 ms_card->block_shift = 4;
1986                 ms_card->page_off = 0x0F;
1987         }
1988
1989         /* BLOCK_COUNT_0, BLOCK_COUNT_1 */
1990         ms_card->total_block = ((u16)ptr[8] << 8) | ptr[9];
1991
1992 #ifdef SUPPORT_MAGIC_GATE
1993         j = ptr[10];
1994
1995         if (ms_card->block_shift == 4)  { /* 4MB or 8MB */
1996                 if (j < 2)  { /* Effective block for 4MB: 0x1F0 */
1997                         ms_card->capacity = 0x1EE0;
1998                 } else { /* Effective block for 8MB: 0x3E0 */
1999                         ms_card->capacity = 0x3DE0;
2000                 }
2001         } else  { /* 16MB, 32MB, 64MB or 128MB */
2002                 if (j < 5)  { /* Effective block for 16MB: 0x3E0 */
2003                         ms_card->capacity = 0x7BC0;
2004                 } else if (j < 0xA) { /* Effective block for 32MB: 0x7C0 */
2005                         ms_card->capacity = 0xF7C0;
2006                 } else if (j < 0x11) { /* Effective block for 64MB: 0xF80 */
2007                         ms_card->capacity = 0x1EF80;
2008                 } else { /* Effective block for 128MB: 0x1F00 */
2009                         ms_card->capacity = 0x3DF00;
2010                 }
2011         }
2012 #else
2013         /* EBLOCK_COUNT_0, EBLOCK_COUNT_1 */
2014         eblock_cnt = ((u16)ptr[10] << 8) | ptr[11];
2015
2016         ms_card->capacity = ((u32)eblock_cnt - 2) << ms_card->block_shift;
2017 #endif
2018
2019         chip->capacity[chip->card2lun[MS_CARD]] = ms_card->capacity;
2020
2021         /* Switch I/F Mode */
2022         if (ptr[15]) {
2023                 retval = ms_set_rw_reg_addr(chip, 0, 0, SystemParm, 1);
2024                 if (retval != STATUS_SUCCESS) {
2025                         TRACE_RET(chip, STATUS_FAIL);
2026                 }
2027
2028                 RTSX_WRITE_REG(chip, PPBUF_BASE2, 0xFF, 0x88);
2029                 RTSX_WRITE_REG(chip, PPBUF_BASE2 + 1, 0xFF, 0);
2030
2031                 retval = ms_transfer_tpc(chip, MS_TM_WRITE_BYTES, WRITE_REG , 1, NO_WAIT_INT);
2032                 if (retval != STATUS_SUCCESS) {
2033                         TRACE_RET(chip, STATUS_FAIL);
2034                 }
2035
2036                 RTSX_WRITE_REG(chip, MS_CFG, 0x58 | MS_NO_CHECK_INT,
2037                                 MS_BUS_WIDTH_4 | PUSH_TIME_ODD | MS_NO_CHECK_INT);
2038
2039                 ms_card->ms_type |= MS_4BIT;
2040         }
2041
2042         if (CHK_MS4BIT(ms_card)) {
2043                 chip->card_bus_width[chip->card2lun[MS_CARD]] = 4;
2044         } else {
2045                 chip->card_bus_width[chip->card2lun[MS_CARD]] = 1;
2046         }
2047
2048         return STATUS_SUCCESS;
2049 }
2050
2051 static int ms_init_l2p_tbl(struct rtsx_chip *chip)
2052 {
2053         struct ms_info *ms_card = &(chip->ms_card);
2054         int size, i, seg_no, retval;
2055         u16 defect_block, reg_addr;
2056         u8 val1, val2;
2057
2058         ms_card->segment_cnt = ms_card->total_block >> 9;
2059         RTSX_DEBUGP("ms_card->segment_cnt = %d\n", ms_card->segment_cnt);
2060
2061         size = ms_card->segment_cnt * sizeof(struct zone_entry);
2062         ms_card->segment = (struct zone_entry *)vmalloc(size);
2063         if (ms_card->segment == NULL) {
2064                 TRACE_RET(chip, STATUS_FAIL);
2065         }
2066         memset(ms_card->segment, 0, size);
2067
2068         retval = ms_read_page(chip, ms_card->boot_block, 1);
2069         if (retval != STATUS_SUCCESS) {
2070                 TRACE_GOTO(chip, INIT_FAIL);
2071         }
2072
2073         reg_addr = PPBUF_BASE2;
2074         for (i = 0; i < (((ms_card->total_block >> 9) * 10) + 1); i++) {
2075                 retval = rtsx_read_register(chip, reg_addr++, &val1);
2076                 if (retval != STATUS_SUCCESS) {
2077                         TRACE_GOTO(chip, INIT_FAIL);
2078                 }
2079                 retval = rtsx_read_register(chip, reg_addr++, &val2);
2080                 if (retval != STATUS_SUCCESS) {
2081                         TRACE_GOTO(chip, INIT_FAIL);
2082                 }
2083
2084                 defect_block = ((u16)val1 << 8) | val2;
2085                 if (defect_block == 0xFFFF) {
2086                         break;
2087                 }
2088                 seg_no = defect_block / 512;
2089                 ms_card->segment[seg_no].defect_list[ms_card->segment[seg_no].disable_count++] = defect_block;
2090         }
2091
2092         for (i = 0; i < ms_card->segment_cnt; i++) {
2093                 ms_card->segment[i].build_flag = 0;
2094                 ms_card->segment[i].l2p_table = NULL;
2095                 ms_card->segment[i].free_table = NULL;
2096                 ms_card->segment[i].get_index = 0;
2097                 ms_card->segment[i].set_index = 0;
2098                 ms_card->segment[i].unused_blk_cnt = 0;
2099
2100                 RTSX_DEBUGP("defective block count of segment %d is %d\n",
2101                                         i, ms_card->segment[i].disable_count);
2102         }
2103
2104         return STATUS_SUCCESS;
2105
2106 INIT_FAIL:
2107         if (ms_card->segment) {
2108                 vfree(ms_card->segment);
2109                 ms_card->segment = NULL;
2110         }
2111
2112         return STATUS_FAIL;
2113 }
2114
2115 static u16 ms_get_l2p_tbl(struct rtsx_chip *chip, int seg_no, u16 log_off)
2116 {
2117         struct ms_info *ms_card = &(chip->ms_card);
2118         struct zone_entry *segment;
2119
2120         if (ms_card->segment == NULL)
2121                 return 0xFFFF;
2122
2123         segment = &(ms_card->segment[seg_no]);
2124
2125         if (segment->l2p_table)
2126                 return segment->l2p_table[log_off];
2127
2128         return 0xFFFF;
2129 }
2130
2131 static void ms_set_l2p_tbl(struct rtsx_chip *chip, int seg_no, u16 log_off, u16 phy_blk)
2132 {
2133         struct ms_info *ms_card = &(chip->ms_card);
2134         struct zone_entry *segment;
2135
2136         if (ms_card->segment == NULL)
2137                 return;
2138
2139         segment = &(ms_card->segment[seg_no]);
2140         if (segment->l2p_table) {
2141                 segment->l2p_table[log_off] = phy_blk;
2142         }
2143 }
2144
2145 static void ms_set_unused_block(struct rtsx_chip *chip, u16 phy_blk)
2146 {
2147         struct ms_info *ms_card = &(chip->ms_card);
2148         struct zone_entry *segment;
2149         int seg_no;
2150
2151         seg_no = (int)phy_blk >> 9;
2152         segment = &(ms_card->segment[seg_no]);
2153
2154         segment->free_table[segment->set_index++] = phy_blk;
2155         if (segment->set_index >= MS_FREE_TABLE_CNT) {
2156                 segment->set_index = 0;
2157         }
2158         segment->unused_blk_cnt++;
2159 }
2160
2161 static u16 ms_get_unused_block(struct rtsx_chip *chip, int seg_no)
2162 {
2163         struct ms_info *ms_card = &(chip->ms_card);
2164         struct zone_entry *segment;
2165         u16 phy_blk;
2166
2167         segment = &(ms_card->segment[seg_no]);
2168
2169         if (segment->unused_blk_cnt <= 0)
2170                 return 0xFFFF;
2171
2172         phy_blk = segment->free_table[segment->get_index];
2173         segment->free_table[segment->get_index++] = 0xFFFF;
2174         if (segment->get_index >= MS_FREE_TABLE_CNT) {
2175                 segment->get_index = 0;
2176         }
2177         segment->unused_blk_cnt--;
2178
2179         return phy_blk;
2180 }
2181
2182 static const unsigned short ms_start_idx[] = {0, 494, 990, 1486, 1982, 2478, 2974, 3470,
2183         3966, 4462, 4958, 5454, 5950, 6446, 6942, 7438, 7934};
2184
2185 static int ms_arbitrate_l2p(struct rtsx_chip *chip, u16 phy_blk, u16 log_off, u8 us1, u8 us2)
2186 {
2187         struct ms_info *ms_card = &(chip->ms_card);
2188         struct zone_entry *segment;
2189         int seg_no;
2190         u16 tmp_blk;
2191
2192         seg_no = (int)phy_blk >> 9;
2193         segment = &(ms_card->segment[seg_no]);
2194         tmp_blk = segment->l2p_table[log_off];
2195
2196         if (us1 != us2) {
2197                 if (us1 == 0) {
2198                         if (!(chip->card_wp & MS_CARD)) {
2199                                 ms_erase_block(chip, tmp_blk);
2200                         }
2201                         ms_set_unused_block(chip, tmp_blk);
2202                         segment->l2p_table[log_off] = phy_blk;
2203                 } else {
2204                         if (!(chip->card_wp & MS_CARD)) {
2205                                 ms_erase_block(chip, phy_blk);
2206                         }
2207                         ms_set_unused_block(chip, phy_blk);
2208                 }
2209         } else {
2210                 if (phy_blk < tmp_blk) {
2211                         if (!(chip->card_wp & MS_CARD)) {
2212                                 ms_erase_block(chip, phy_blk);
2213                         }
2214                         ms_set_unused_block(chip, phy_blk);
2215                 } else {
2216                         if (!(chip->card_wp & MS_CARD)) {
2217                                 ms_erase_block(chip, tmp_blk);
2218                         }
2219                         ms_set_unused_block(chip, tmp_blk);
2220                         segment->l2p_table[log_off] = phy_blk;
2221                 }
2222         }
2223
2224         return STATUS_SUCCESS;
2225 }
2226
2227 static int ms_build_l2p_tbl(struct rtsx_chip *chip, int seg_no)
2228 {
2229         struct ms_info *ms_card = &(chip->ms_card);
2230         struct zone_entry *segment;
2231         int retval, table_size, disable_cnt, defect_flag, i;
2232         u16 start, end, phy_blk, log_blk, tmp_blk;
2233         u8 extra[MS_EXTRA_SIZE], us1, us2;
2234
2235         RTSX_DEBUGP("ms_build_l2p_tbl: %d\n", seg_no);
2236
2237         if (ms_card->segment == NULL) {
2238                 retval = ms_init_l2p_tbl(chip);
2239                 if (retval != STATUS_SUCCESS) {
2240                         TRACE_RET(chip, retval);
2241                 }
2242         }
2243
2244         if (ms_card->segment[seg_no].build_flag) {
2245                 RTSX_DEBUGP("l2p table of segment %d has been built\n", seg_no);
2246                 return STATUS_SUCCESS;
2247         }
2248
2249         if (seg_no == 0) {
2250                 table_size = 494;
2251         } else {
2252                 table_size = 496;
2253         }
2254
2255         segment = &(ms_card->segment[seg_no]);
2256
2257         if (segment->l2p_table == NULL) {
2258                 segment->l2p_table = (u16 *)vmalloc(table_size * 2);
2259                 if (segment->l2p_table == NULL) {
2260                         TRACE_GOTO(chip, BUILD_FAIL);
2261                 }
2262         }
2263         memset((u8 *)(segment->l2p_table), 0xff, table_size * 2);
2264
2265         if (segment->free_table == NULL) {
2266                 segment->free_table = (u16 *)vmalloc(MS_FREE_TABLE_CNT * 2);
2267                 if (segment->free_table == NULL) {
2268                         TRACE_GOTO(chip, BUILD_FAIL);
2269                 }
2270         }
2271         memset((u8 *)(segment->free_table), 0xff, MS_FREE_TABLE_CNT * 2);
2272
2273         start = (u16)seg_no << 9;
2274         end = (u16)(seg_no + 1) << 9;
2275
2276         disable_cnt = segment->disable_count;
2277
2278         segment->get_index = segment->set_index = 0;
2279         segment->unused_blk_cnt = 0;
2280
2281         for (phy_blk = start; phy_blk < end; phy_blk++) {
2282                 if (disable_cnt) {
2283                         defect_flag = 0;
2284                         for (i = 0; i < segment->disable_count; i++) {
2285                                 if (phy_blk == segment->defect_list[i]) {
2286                                         defect_flag = 1;
2287                                         break;
2288                                 }
2289                         }
2290                         if (defect_flag) {
2291                                 disable_cnt--;
2292                                 continue;
2293                         }
2294                 }
2295
2296                 retval = ms_read_extra_data(chip, phy_blk, 0, extra, MS_EXTRA_SIZE);
2297                 if (retval != STATUS_SUCCESS) {
2298                         RTSX_DEBUGP("read extra data fail\n");
2299                         ms_set_bad_block(chip, phy_blk);
2300                         continue;
2301                 }
2302
2303                 if (seg_no == ms_card->segment_cnt - 1) {
2304                         if (!(extra[1] & NOT_TRANSLATION_TABLE)) {
2305                                 if (!(chip->card_wp & MS_CARD)) {
2306                                         retval = ms_erase_block(chip, phy_blk);
2307                                         if (retval != STATUS_SUCCESS)
2308                                                 continue;
2309                                         extra[2] = 0xff;
2310                                         extra[3] = 0xff;
2311                                 }
2312                         }
2313                 }
2314
2315                 if (!(extra[0] & BLOCK_OK))
2316                         continue;
2317                 if (!(extra[1] & NOT_BOOT_BLOCK))
2318                         continue;
2319                 if ((extra[0] & PAGE_OK) != PAGE_OK)
2320                         continue;
2321
2322                 log_blk = ((u16)extra[2] << 8) | extra[3];
2323
2324                 if (log_blk == 0xFFFF) {
2325                         if (!(chip->card_wp & MS_CARD)) {
2326                                 retval = ms_erase_block(chip, phy_blk);
2327                                 if (retval != STATUS_SUCCESS)
2328                                         continue;
2329                         }
2330                         ms_set_unused_block(chip, phy_blk);
2331                         continue;
2332                 }
2333
2334                 if ((log_blk < ms_start_idx[seg_no]) ||
2335                                 (log_blk >= ms_start_idx[seg_no+1])) {
2336                         if (!(chip->card_wp & MS_CARD)) {
2337                                 retval = ms_erase_block(chip, phy_blk);
2338                                 if (retval != STATUS_SUCCESS)
2339                                         continue;
2340                         }
2341                         ms_set_unused_block(chip, phy_blk);
2342                         continue;
2343                 }
2344
2345                 if (segment->l2p_table[log_blk - ms_start_idx[seg_no]] == 0xFFFF) {
2346                         segment->l2p_table[log_blk - ms_start_idx[seg_no]] = phy_blk;
2347                         continue;
2348                 }
2349
2350                 us1 = extra[0] & 0x10;
2351                 tmp_blk = segment->l2p_table[log_blk - ms_start_idx[seg_no]];
2352                 retval = ms_read_extra_data(chip, tmp_blk, 0, extra, MS_EXTRA_SIZE);
2353                 if (retval != STATUS_SUCCESS)
2354                         continue;
2355                 us2 = extra[0] & 0x10;
2356
2357                 (void)ms_arbitrate_l2p(chip, phy_blk, log_blk-ms_start_idx[seg_no], us1, us2);
2358                 continue;
2359         }
2360
2361         segment->build_flag = 1;
2362
2363         RTSX_DEBUGP("unused block count: %d\n", segment->unused_blk_cnt);
2364
2365         /* Logical Address Confirmation Process */
2366         if (seg_no == ms_card->segment_cnt - 1) {
2367                 if (segment->unused_blk_cnt < 2) {
2368                         chip->card_wp |= MS_CARD;
2369                 }
2370         } else {
2371                 if (segment->unused_blk_cnt < 1) {
2372                         chip->card_wp |= MS_CARD;
2373                 }
2374         }
2375
2376         if (chip->card_wp & MS_CARD)
2377                 return STATUS_SUCCESS;
2378
2379         for (log_blk = ms_start_idx[seg_no]; log_blk < ms_start_idx[seg_no + 1]; log_blk++) {
2380                 if (segment->l2p_table[log_blk-ms_start_idx[seg_no]] == 0xFFFF) {
2381                         phy_blk = ms_get_unused_block(chip, seg_no);
2382                         if (phy_blk == 0xFFFF) {
2383                                 chip->card_wp |= MS_CARD;
2384                                 return STATUS_SUCCESS;
2385                         }
2386                         retval = ms_init_page(chip, phy_blk, log_blk, 0, 1);
2387                         if (retval != STATUS_SUCCESS) {
2388                                 TRACE_GOTO(chip, BUILD_FAIL);
2389                         }
2390                         segment->l2p_table[log_blk-ms_start_idx[seg_no]] = phy_blk;
2391                         if (seg_no == ms_card->segment_cnt - 1) {
2392                                 if (segment->unused_blk_cnt < 2) {
2393                                         chip->card_wp |= MS_CARD;
2394                                         return STATUS_SUCCESS;
2395                                 }
2396                         } else {
2397                                 if (segment->unused_blk_cnt < 1) {
2398                                         chip->card_wp |= MS_CARD;
2399                                         return STATUS_SUCCESS;
2400                                 }
2401                         }
2402                 }
2403         }
2404
2405         /* Make boot block be the first normal block */
2406         if (seg_no == 0) {
2407                 for (log_blk = 0; log_blk < 494; log_blk++) {
2408                         tmp_blk = segment->l2p_table[log_blk];
2409                         if (tmp_blk < ms_card->boot_block) {
2410                                 RTSX_DEBUGP("Boot block is not the first normal block.\n");
2411
2412                                 if (chip->card_wp & MS_CARD)
2413                                         break;
2414
2415                                 phy_blk = ms_get_unused_block(chip, 0);
2416                                 retval = ms_copy_page(chip, tmp_blk, phy_blk,
2417                                                 log_blk, 0, ms_card->page_off + 1);
2418                                 if (retval != STATUS_SUCCESS) {
2419                                         TRACE_RET(chip, STATUS_FAIL);
2420                                 }
2421
2422                                 segment->l2p_table[log_blk] = phy_blk;
2423
2424                                 retval = ms_set_bad_block(chip, tmp_blk);
2425                                 if (retval != STATUS_SUCCESS) {
2426                                         TRACE_RET(chip, STATUS_FAIL);
2427                                 }
2428                         }
2429                 }
2430         }
2431
2432         return STATUS_SUCCESS;
2433
2434 BUILD_FAIL:
2435         segment->build_flag = 0;
2436         if (segment->l2p_table) {
2437                 vfree(segment->l2p_table);
2438                 segment->l2p_table = NULL;
2439         }
2440         if (segment->free_table) {
2441                 vfree(segment->free_table);
2442                 segment->free_table = NULL;
2443         }
2444
2445         return STATUS_FAIL;
2446 }
2447
2448
2449 int reset_ms_card(struct rtsx_chip *chip)
2450 {
2451         struct ms_info *ms_card = &(chip->ms_card);
2452         int retval;
2453
2454         memset(ms_card, 0, sizeof(struct ms_info));
2455
2456         retval = enable_card_clock(chip, MS_CARD);
2457         if (retval != STATUS_SUCCESS) {
2458                 TRACE_RET(chip, STATUS_FAIL);
2459         }
2460
2461         retval = select_card(chip, MS_CARD);
2462         if (retval != STATUS_SUCCESS) {
2463                 TRACE_RET(chip, STATUS_FAIL);
2464         }
2465
2466         ms_card->ms_type = 0;
2467
2468         retval = reset_ms_pro(chip);
2469         if (retval != STATUS_SUCCESS) {
2470                 if (ms_card->check_ms_flow) {
2471                         retval = reset_ms(chip);
2472                         if (retval != STATUS_SUCCESS) {
2473                                 TRACE_RET(chip, STATUS_FAIL);
2474                         }
2475                 } else {
2476                         TRACE_RET(chip, STATUS_FAIL);
2477                 }
2478         }
2479
2480         retval = ms_set_init_para(chip);
2481         if (retval != STATUS_SUCCESS) {
2482                 TRACE_RET(chip, STATUS_FAIL);
2483         }
2484
2485         if (!CHK_MSPRO(ms_card)) {
2486                 /* Build table for the last segment,
2487                  * to check if L2P talbe block exist,erasing it
2488                  */
2489                 retval = ms_build_l2p_tbl(chip, ms_card->total_block / 512 - 1);
2490                 if (retval != STATUS_SUCCESS) {
2491                         TRACE_RET(chip, STATUS_FAIL);
2492                 }
2493         }
2494
2495         RTSX_DEBUGP("ms_card->ms_type = 0x%x\n", ms_card->ms_type);
2496
2497         return STATUS_SUCCESS;
2498 }
2499
2500 static int mspro_set_rw_cmd(struct rtsx_chip *chip, u32 start_sec, u16 sec_cnt, u8 cmd)
2501 {
2502         int retval, i;
2503         u8 data[8];
2504
2505         data[0] = cmd;
2506         data[1] = (u8)(sec_cnt >> 8);
2507         data[2] = (u8)sec_cnt;
2508         data[3] = (u8)(start_sec >> 24);
2509         data[4] = (u8)(start_sec >> 16);
2510         data[5] = (u8)(start_sec >> 8);
2511         data[6] = (u8)start_sec;
2512         data[7] = 0;
2513
2514         for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
2515                 retval = ms_write_bytes(chip, PRO_EX_SET_CMD, 7, WAIT_INT, data, 8);
2516                 if (retval == STATUS_SUCCESS)
2517                         break;
2518         }
2519         if (i == MS_MAX_RETRY_COUNT) {
2520                 TRACE_RET(chip, STATUS_FAIL);
2521         }
2522
2523         return STATUS_SUCCESS;
2524 }
2525
2526
2527 void mspro_stop_seq_mode(struct rtsx_chip *chip)
2528 {
2529         struct ms_info *ms_card = &(chip->ms_card);
2530         int retval;
2531
2532         RTSX_DEBUGP("--%s--\n", __func__);
2533
2534         if (ms_card->seq_mode) {
2535                 retval = ms_switch_clock(chip);
2536                 if (retval != STATUS_SUCCESS)
2537                         return;
2538
2539                 ms_card->seq_mode = 0;
2540                 ms_card->total_sec_cnt = 0;
2541                 ms_send_cmd(chip, PRO_STOP, WAIT_INT);
2542
2543                 rtsx_write_register(chip, RBCTL, RB_FLUSH, RB_FLUSH);
2544         }
2545 }
2546
2547 static inline int ms_auto_tune_clock(struct rtsx_chip *chip)
2548 {
2549         struct ms_info *ms_card = &(chip->ms_card);
2550         int retval;
2551
2552         RTSX_DEBUGP("--%s--\n", __func__);
2553
2554         if (chip->asic_code) {
2555                 if (ms_card->ms_clock > 30) {
2556                         ms_card->ms_clock -= 20;
2557                 }
2558         } else {
2559                 if (ms_card->ms_clock == CLK_80) {
2560                         ms_card->ms_clock = CLK_60;
2561                 } else if (ms_card->ms_clock == CLK_60) {
2562                         ms_card->ms_clock = CLK_40;
2563                 }
2564         }
2565
2566         retval = ms_switch_clock(chip);
2567         if (retval != STATUS_SUCCESS) {
2568                 TRACE_RET(chip, STATUS_FAIL);
2569         }
2570
2571         return STATUS_SUCCESS;
2572 }
2573
2574 static int mspro_rw_multi_sector(struct scsi_cmnd *srb, struct rtsx_chip *chip, u32 start_sector, u16 sector_cnt)
2575 {
2576         struct ms_info *ms_card = &(chip->ms_card);
2577         int retval, mode_2k = 0;
2578         u16 count;
2579         u8 val, trans_mode, rw_tpc, rw_cmd;
2580
2581         ms_set_err_code(chip, MS_NO_ERROR);
2582
2583         ms_card->cleanup_counter = 0;
2584
2585         if (CHK_MSHG(ms_card)) {
2586                 if ((start_sector % 4) || (sector_cnt % 4)) {
2587                         if (srb->sc_data_direction == DMA_FROM_DEVICE) {
2588                                 rw_tpc = PRO_READ_LONG_DATA;
2589                                 rw_cmd = PRO_READ_DATA;
2590                         } else {
2591                                 rw_tpc = PRO_WRITE_LONG_DATA;
2592                                 rw_cmd = PRO_WRITE_DATA;
2593                         }
2594                 } else {
2595                         if (srb->sc_data_direction == DMA_FROM_DEVICE) {
2596                                 rw_tpc = PRO_READ_QUAD_DATA;
2597                                 rw_cmd = PRO_READ_2K_DATA;
2598                         } else {
2599                                 rw_tpc = PRO_WRITE_QUAD_DATA;
2600                                 rw_cmd = PRO_WRITE_2K_DATA;
2601                         }
2602                         mode_2k = 1;
2603                 }
2604         } else {
2605                 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
2606                         rw_tpc = PRO_READ_LONG_DATA;
2607                         rw_cmd = PRO_READ_DATA;
2608                 } else {
2609                         rw_tpc = PRO_WRITE_LONG_DATA;
2610                         rw_cmd = PRO_WRITE_DATA;
2611                 }
2612         }
2613
2614         retval = ms_switch_clock(chip);
2615         if (retval != STATUS_SUCCESS) {
2616                 TRACE_RET(chip, STATUS_FAIL);
2617         }
2618
2619         if (srb->sc_data_direction == DMA_FROM_DEVICE) {
2620                 trans_mode = MS_TM_AUTO_READ;
2621         } else {
2622                 trans_mode = MS_TM_AUTO_WRITE;
2623         }
2624
2625         RTSX_READ_REG(chip, MS_TRANS_CFG, &val);
2626
2627         if (ms_card->seq_mode) {
2628                 if ((ms_card->pre_dir != srb->sc_data_direction)
2629                                 || ((ms_card->pre_sec_addr + ms_card->pre_sec_cnt) != start_sector)
2630                                 || (mode_2k && (ms_card->seq_mode & MODE_512_SEQ))
2631                                 || (!mode_2k && (ms_card->seq_mode & MODE_2K_SEQ))
2632                                 || !(val & MS_INT_BREQ)
2633                                 || ((ms_card->total_sec_cnt + sector_cnt) > 0xFE00)) {
2634                         ms_card->seq_mode = 0;
2635                         ms_card->total_sec_cnt = 0;
2636                         if (val & MS_INT_BREQ) {
2637                                 retval = ms_send_cmd(chip, PRO_STOP, WAIT_INT);
2638                                 if (retval != STATUS_SUCCESS) {
2639                                         TRACE_RET(chip, STATUS_FAIL);
2640                                 }
2641
2642                                 rtsx_write_register(chip, RBCTL, RB_FLUSH, RB_FLUSH);
2643                         }
2644                 }
2645         }
2646
2647         if (!ms_card->seq_mode) {
2648                 ms_card->total_sec_cnt = 0;
2649                 if (sector_cnt >= SEQ_START_CRITERIA) {
2650                         if ((ms_card->capacity - start_sector) > 0xFE00) {
2651                                 count = 0xFE00;
2652                         } else {
2653                                 count = (u16)(ms_card->capacity - start_sector);
2654                         }
2655                         if (count > sector_cnt) {
2656                                 if (mode_2k) {
2657                                         ms_card->seq_mode |= MODE_2K_SEQ;
2658                                 } else {
2659                                         ms_card->seq_mode |= MODE_512_SEQ;
2660                                 }
2661                         }
2662                 } else {
2663                         count = sector_cnt;
2664                 }
2665                 retval = mspro_set_rw_cmd(chip, start_sector, count, rw_cmd);
2666                 if (retval != STATUS_SUCCESS) {
2667                         ms_card->seq_mode = 0;
2668                         TRACE_RET(chip, STATUS_FAIL);
2669                 }
2670         }
2671
2672         retval = ms_transfer_data(chip, trans_mode, rw_tpc, sector_cnt, WAIT_INT, mode_2k,
2673                         scsi_sg_count(srb), scsi_sglist(srb), scsi_bufflen(srb));
2674         if (retval != STATUS_SUCCESS) {
2675                 ms_card->seq_mode = 0;
2676                 rtsx_read_register(chip, MS_TRANS_CFG, &val);
2677                 rtsx_clear_ms_error(chip);
2678
2679                 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
2680                         chip->rw_need_retry = 0;
2681                         RTSX_DEBUGP("No card exist, exit mspro_rw_multi_sector\n");
2682                         TRACE_RET(chip, STATUS_FAIL);
2683                 }
2684
2685                 if (val & MS_INT_BREQ) {
2686                         ms_send_cmd(chip, PRO_STOP, WAIT_INT);
2687                 }
2688                 if (val & (MS_CRC16_ERR | MS_RDY_TIMEOUT)) {
2689                         RTSX_DEBUGP("MSPro CRC error, tune clock!\n");
2690                         chip->rw_need_retry = 1;
2691                         ms_auto_tune_clock(chip);
2692                 }
2693
2694                 TRACE_RET(chip, retval);
2695         }
2696
2697         if (ms_card->seq_mode) {
2698                 ms_card->pre_sec_addr = start_sector;
2699                 ms_card->pre_sec_cnt = sector_cnt;
2700                 ms_card->pre_dir = srb->sc_data_direction;
2701                 ms_card->total_sec_cnt += sector_cnt;
2702         }
2703
2704         return STATUS_SUCCESS;
2705 }
2706
2707 static int mspro_read_format_progress(struct rtsx_chip *chip, const int short_data_len)
2708 {
2709         struct ms_info *ms_card = &(chip->ms_card);
2710         int retval, i;
2711         u32 total_progress, cur_progress;
2712         u8 cnt, tmp;
2713         u8 data[8];
2714
2715         RTSX_DEBUGP("mspro_read_format_progress, short_data_len = %d\n", short_data_len);
2716
2717         retval = ms_switch_clock(chip);
2718         if (retval != STATUS_SUCCESS) {
2719                 ms_card->format_status = FORMAT_FAIL;
2720                 TRACE_RET(chip, STATUS_FAIL);
2721         }
2722
2723         retval = rtsx_read_register(chip, MS_TRANS_CFG, &tmp);
2724         if (retval != STATUS_SUCCESS) {
2725                 ms_card->format_status = FORMAT_FAIL;
2726                 TRACE_RET(chip, STATUS_FAIL);
2727         }
2728
2729         if (!(tmp & MS_INT_BREQ)) {
2730                 if ((tmp &  (MS_INT_CED | MS_INT_BREQ | MS_INT_CMDNK | MS_INT_ERR)) == MS_INT_CED) {
2731                         ms_card->format_status = FORMAT_SUCCESS;
2732                         return STATUS_SUCCESS;
2733                 }
2734                 ms_card->format_status = FORMAT_FAIL;
2735                 TRACE_RET(chip, STATUS_FAIL);
2736         }
2737
2738         if (short_data_len >= 256) {
2739                 cnt = 0;
2740         } else {
2741                 cnt = (u8)short_data_len;
2742         }
2743
2744         retval = rtsx_write_register(chip, MS_CFG, MS_NO_CHECK_INT, MS_NO_CHECK_INT);
2745         if (retval != STATUS_SUCCESS) {
2746                 ms_card->format_status = FORMAT_FAIL;
2747                 TRACE_RET(chip, STATUS_FAIL);
2748         }
2749
2750         retval = ms_read_bytes(chip, PRO_READ_SHORT_DATA, cnt, WAIT_INT, data, 8);
2751         if (retval != STATUS_SUCCESS) {
2752                 ms_card->format_status = FORMAT_FAIL;
2753                 TRACE_RET(chip, STATUS_FAIL);
2754         }
2755
2756         total_progress = (data[0] << 24) | (data[1] << 16) | (data[2] << 8) | data[3];
2757         cur_progress = (data[4] << 24) | (data[5] << 16) | (data[6] << 8) | data[7];
2758
2759         RTSX_DEBUGP("total_progress = %d, cur_progress = %d\n",
2760                                 total_progress, cur_progress);
2761
2762         if (total_progress == 0) {
2763                 ms_card->progress = 0;
2764         } else {
2765                 u64 ulltmp = (u64)cur_progress * (u64)65535;
2766                 do_div(ulltmp, total_progress);
2767                 ms_card->progress = (u16)ulltmp;
2768         }
2769         RTSX_DEBUGP("progress = %d\n", ms_card->progress);
2770
2771         for (i = 0; i < 5000; i++) {
2772                 retval = rtsx_read_register(chip, MS_TRANS_CFG, &tmp);
2773                 if (retval != STATUS_SUCCESS) {
2774                         ms_card->format_status = FORMAT_FAIL;
2775                         TRACE_RET(chip, STATUS_FAIL);
2776                 }
2777                 if (tmp & (MS_INT_CED | MS_INT_CMDNK | MS_INT_BREQ | MS_INT_ERR)) {
2778                         break;
2779                 }
2780
2781                 wait_timeout(1);
2782         }
2783
2784         retval = rtsx_write_register(chip, MS_CFG, MS_NO_CHECK_INT, 0);
2785         if (retval != STATUS_SUCCESS) {
2786                 ms_card->format_status = FORMAT_FAIL;
2787                 TRACE_RET(chip, STATUS_FAIL);
2788         }
2789
2790         if (i == 5000) {
2791                 ms_card->format_status = FORMAT_FAIL;
2792                 TRACE_RET(chip, STATUS_FAIL);
2793         }
2794
2795         if (tmp & (MS_INT_CMDNK | MS_INT_ERR)) {
2796                 ms_card->format_status = FORMAT_FAIL;
2797                 TRACE_RET(chip, STATUS_FAIL);
2798         }
2799
2800         if (tmp & MS_INT_CED) {
2801                 ms_card->format_status = FORMAT_SUCCESS;
2802                 ms_card->pro_under_formatting = 0;
2803         } else if (tmp & MS_INT_BREQ) {
2804                 ms_card->format_status = FORMAT_IN_PROGRESS;
2805         } else {
2806                 ms_card->format_status = FORMAT_FAIL;
2807                 ms_card->pro_under_formatting = 0;
2808                 TRACE_RET(chip, STATUS_FAIL);
2809         }
2810
2811         return STATUS_SUCCESS;
2812 }
2813
2814 void mspro_polling_format_status(struct rtsx_chip *chip)
2815 {
2816         struct ms_info *ms_card = &(chip->ms_card);
2817         int i;
2818
2819         if (ms_card->pro_under_formatting && (rtsx_get_stat(chip) != RTSX_STAT_SS)) {
2820                 rtsx_set_stat(chip, RTSX_STAT_RUN);
2821
2822                 for (i = 0; i < 65535; i++) {
2823                         mspro_read_format_progress(chip, MS_SHORT_DATA_LEN);
2824                         if (ms_card->format_status != FORMAT_IN_PROGRESS)
2825                                 break;
2826                 }
2827         }
2828
2829         return;
2830 }
2831
2832 int mspro_format(struct scsi_cmnd *srb, struct rtsx_chip *chip, int short_data_len, int quick_format)
2833 {
2834         struct ms_info *ms_card = &(chip->ms_card);
2835         int retval, i;
2836         u8 buf[8], tmp;
2837         u16 para;
2838
2839         RTSX_DEBUGP("--%s--\n", __func__);
2840
2841         retval = ms_switch_clock(chip);
2842         if (retval != STATUS_SUCCESS) {
2843                 TRACE_RET(chip, STATUS_FAIL);
2844         }
2845
2846         retval = ms_set_rw_reg_addr(chip, 0x00, 0x00, Pro_TPCParm, 0x01);
2847         if (retval != STATUS_SUCCESS) {
2848                 TRACE_RET(chip, STATUS_FAIL);
2849         }
2850
2851         memset(buf, 0, 2);
2852         switch (short_data_len) {
2853         case 32:
2854                 buf[0] = 0;
2855                 break;
2856         case 64:
2857                 buf[0] = 1;
2858                 break;
2859         case 128:
2860                 buf[0] = 2;
2861                 break;
2862         case 256:
2863         default:
2864                 buf[0] = 3;
2865                 break;
2866         }
2867
2868         for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
2869                 retval = ms_write_bytes(chip, PRO_WRITE_REG, 1, NO_WAIT_INT, buf, 2);
2870                 if (retval == STATUS_SUCCESS)
2871                         break;
2872         }
2873         if (i == MS_MAX_RETRY_COUNT) {
2874                 TRACE_RET(chip, STATUS_FAIL);
2875         }
2876
2877         if (quick_format) {
2878                 para = 0x0000;
2879         } else {
2880                 para = 0x0001;
2881         }
2882         retval = mspro_set_rw_cmd(chip, 0, para, PRO_FORMAT);
2883         if (retval != STATUS_SUCCESS) {
2884                 TRACE_RET(chip, STATUS_FAIL);
2885         }
2886
2887         RTSX_READ_REG(chip, MS_TRANS_CFG, &tmp);
2888
2889         if (tmp & (MS_INT_CMDNK | MS_INT_ERR)) {
2890                 TRACE_RET(chip, STATUS_FAIL);
2891         }
2892
2893         if ((tmp & (MS_INT_BREQ | MS_INT_CED)) == MS_INT_BREQ) {
2894                 ms_card->pro_under_formatting = 1;
2895                 ms_card->progress = 0;
2896                 ms_card->format_status = FORMAT_IN_PROGRESS;
2897                 return STATUS_SUCCESS;
2898         }
2899
2900         if (tmp & MS_INT_CED) {
2901                 ms_card->pro_under_formatting = 0;
2902                 ms_card->progress = 0;
2903                 ms_card->format_status = FORMAT_SUCCESS;
2904                 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_NO_SENSE);
2905                 return STATUS_SUCCESS;
2906         }
2907
2908         TRACE_RET(chip, STATUS_FAIL);
2909 }
2910
2911
2912 static int ms_read_multiple_pages(struct rtsx_chip *chip, u16 phy_blk, u16 log_blk,
2913                 u8 start_page, u8 end_page, u8 *buf, unsigned int *index, unsigned int *offset)
2914 {
2915         struct ms_info *ms_card = &(chip->ms_card);
2916         int retval, i;
2917         u8 extra[MS_EXTRA_SIZE], page_addr, val, trans_cfg, data[6];
2918         u8 *ptr;
2919
2920         retval = ms_read_extra_data(chip, phy_blk, start_page, extra, MS_EXTRA_SIZE);
2921         if (retval == STATUS_SUCCESS) {
2922                 if ((extra[1] & 0x30) != 0x30) {
2923                         ms_set_err_code(chip, MS_FLASH_READ_ERROR);
2924                         TRACE_RET(chip, STATUS_FAIL);
2925                 }
2926         }
2927
2928         retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 6);
2929         if (retval != STATUS_SUCCESS) {
2930                 TRACE_RET(chip, STATUS_FAIL);
2931         }
2932
2933         if (CHK_MS4BIT(ms_card)) {
2934                 data[0] = 0x88;
2935         } else {
2936                 data[0] = 0x80;
2937         }
2938         data[1] = 0;
2939         data[2] = (u8)(phy_blk >> 8);
2940         data[3] = (u8)phy_blk;
2941         data[4] = 0;
2942         data[5] = start_page;
2943
2944         for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
2945                 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT, data, 6);
2946                 if (retval == STATUS_SUCCESS)
2947                         break;
2948         }
2949         if (i == MS_MAX_RETRY_COUNT) {
2950                 TRACE_RET(chip, STATUS_FAIL);
2951         }
2952
2953         ms_set_err_code(chip, MS_NO_ERROR);
2954
2955         retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
2956         if (retval != STATUS_SUCCESS) {
2957                 TRACE_RET(chip, STATUS_FAIL);
2958         }
2959
2960         ptr = buf;
2961
2962         for (page_addr = start_page; page_addr < end_page; page_addr++) {
2963                 ms_set_err_code(chip, MS_NO_ERROR);
2964
2965                 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
2966                         ms_set_err_code(chip, MS_NO_CARD);
2967                         TRACE_RET(chip, STATUS_FAIL);
2968                 }
2969
2970                 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
2971                 if (retval != STATUS_SUCCESS) {
2972                         TRACE_RET(chip, STATUS_FAIL);
2973                 }
2974                 if (val & INT_REG_CMDNK) {
2975                         ms_set_err_code(chip, MS_CMD_NK);
2976                         TRACE_RET(chip, STATUS_FAIL);
2977                 }
2978                 if (val & INT_REG_ERR) {
2979                         if (val & INT_REG_BREQ) {
2980                                 retval = ms_read_status_reg(chip);
2981                                 if (retval != STATUS_SUCCESS) {
2982                                         if (!(chip->card_wp & MS_CARD)) {
2983                                                 reset_ms(chip);
2984                                                 ms_set_page_status(log_blk, setPS_NG, extra, MS_EXTRA_SIZE);
2985                                                 ms_write_extra_data(chip, phy_blk,
2986                                                                 page_addr, extra, MS_EXTRA_SIZE);
2987                                         }
2988                                         ms_set_err_code(chip, MS_FLASH_READ_ERROR);
2989                                         TRACE_RET(chip, STATUS_FAIL);
2990                                 }
2991                         } else {
2992                                 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
2993                                 TRACE_RET(chip, STATUS_FAIL);
2994                         }
2995                 } else {
2996                         if (!(val & INT_REG_BREQ)) {
2997                                 ms_set_err_code(chip, MS_BREQ_ERROR);
2998                                 TRACE_RET(chip, STATUS_FAIL);
2999                         }
3000                 }
3001
3002                 if (page_addr == (end_page - 1)) {
3003                         if (!(val & INT_REG_CED)) {
3004                                 retval = ms_send_cmd(chip, BLOCK_END, WAIT_INT);
3005                                 if (retval != STATUS_SUCCESS) {
3006                                         TRACE_RET(chip, STATUS_FAIL);
3007                                 }
3008                         }
3009
3010                         retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
3011                         if (retval != STATUS_SUCCESS) {
3012                                 TRACE_RET(chip, STATUS_FAIL);
3013                         }
3014                         if (!(val & INT_REG_CED)) {
3015                                 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
3016                                 TRACE_RET(chip, STATUS_FAIL);
3017                         }
3018
3019                         trans_cfg = NO_WAIT_INT;
3020                 } else {
3021                         trans_cfg = WAIT_INT;
3022                 }
3023
3024                 rtsx_init_cmd(chip);
3025
3026                 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, READ_PAGE_DATA);
3027                 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, trans_cfg);
3028                 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, RING_BUFFER);
3029
3030                 trans_dma_enable(DMA_FROM_DEVICE, chip, 512, DMA_512);
3031
3032                 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
3033                                 MS_TRANSFER_START |  MS_TM_NORMAL_READ);
3034                 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER, MS_TRANSFER_END, MS_TRANSFER_END);
3035
3036                 rtsx_send_cmd_no_wait(chip);
3037
3038                 retval = rtsx_transfer_data_partial(chip, MS_CARD, ptr, 512, scsi_sg_count(chip->srb),
3039                                 index, offset, DMA_FROM_DEVICE, chip->ms_timeout);
3040                 if (retval < 0) {
3041                         if (retval == -ETIMEDOUT) {
3042                                 ms_set_err_code(chip, MS_TO_ERROR);
3043                                 rtsx_clear_ms_error(chip);
3044                                 TRACE_RET(chip, STATUS_TIMEDOUT);
3045                         }
3046
3047                         retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
3048                         if (retval != STATUS_SUCCESS) {
3049                                 ms_set_err_code(chip, MS_TO_ERROR);
3050                                 rtsx_clear_ms_error(chip);
3051                                 TRACE_RET(chip, STATUS_TIMEDOUT);
3052                         }
3053                         if (val & (MS_CRC16_ERR | MS_RDY_TIMEOUT)) {
3054                                 ms_set_err_code(chip, MS_CRC16_ERROR);
3055                                 rtsx_clear_ms_error(chip);
3056                                 TRACE_RET(chip, STATUS_FAIL);
3057                         }
3058                 }
3059
3060                 if (scsi_sg_count(chip->srb) == 0)
3061                         ptr += 512;
3062         }
3063
3064         return STATUS_SUCCESS;
3065 }
3066
3067 static int ms_write_multiple_pages(struct rtsx_chip *chip, u16 old_blk, u16 new_blk,
3068                 u16 log_blk, u8 start_page, u8 end_page, u8 *buf,
3069                 unsigned int *index, unsigned int *offset)
3070 {
3071         struct ms_info *ms_card = &(chip->ms_card);
3072         int retval, i;
3073         u8 page_addr, val, data[16];
3074         u8 *ptr;
3075
3076         if (!start_page) {
3077                 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 7);
3078                 if (retval != STATUS_SUCCESS) {
3079                         TRACE_RET(chip, STATUS_FAIL);
3080                 }
3081
3082                 if (CHK_MS4BIT(ms_card)) {
3083                         data[0] = 0x88;
3084                 } else {
3085                         data[0] = 0x80;
3086                 }
3087                 data[1] = 0;
3088                 data[2] = (u8)(old_blk >> 8);
3089                 data[3] = (u8)old_blk;
3090                 data[4] = 0x80;
3091                 data[5] = 0;
3092                 data[6] = 0xEF;
3093                 data[7] = 0xFF;
3094
3095                 retval = ms_write_bytes(chip, WRITE_REG, 7, NO_WAIT_INT, data, 8);
3096                 if (retval != STATUS_SUCCESS) {
3097                         TRACE_RET(chip, STATUS_FAIL);
3098                 }
3099
3100                 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
3101                 if (retval != STATUS_SUCCESS) {
3102                         TRACE_RET(chip, STATUS_FAIL);
3103                 }
3104
3105                 ms_set_err_code(chip, MS_NO_ERROR);
3106                 retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, GET_INT, 1, NO_WAIT_INT);
3107                 if (retval != STATUS_SUCCESS) {
3108                         TRACE_RET(chip, STATUS_FAIL);
3109                 }
3110         }
3111
3112         retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, (6 + MS_EXTRA_SIZE));
3113         if (retval != STATUS_SUCCESS) {
3114                 TRACE_RET(chip, STATUS_FAIL);
3115         }
3116
3117         ms_set_err_code(chip, MS_NO_ERROR);
3118
3119         if (CHK_MS4BIT(ms_card)) {
3120                 data[0] = 0x88;
3121         } else {
3122                 data[0] = 0x80;
3123         }
3124         data[1] = 0;
3125         data[2] = (u8)(new_blk >> 8);
3126         data[3] = (u8)new_blk;
3127         if ((end_page - start_page) == 1) {
3128                 data[4] = 0x20;
3129         } else {
3130                 data[4] = 0;
3131         }
3132         data[5] = start_page;
3133         data[6] = 0xF8;
3134         data[7] = 0xFF;
3135         data[8] = (u8)(log_blk >> 8);
3136         data[9] = (u8)log_blk;
3137
3138         for (i = 0x0A; i < 0x10; i++) {
3139                 data[i] = 0xFF;
3140         }
3141
3142         for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
3143                 retval = ms_write_bytes(chip, WRITE_REG, 6 + MS_EXTRA_SIZE, NO_WAIT_INT, data, 16);
3144                 if (retval == STATUS_SUCCESS)
3145                         break;
3146         }
3147         if (i == MS_MAX_RETRY_COUNT) {
3148                 TRACE_RET(chip, STATUS_FAIL);
3149         }
3150
3151         for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
3152                 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
3153                 if (retval == STATUS_SUCCESS)
3154                         break;
3155         }
3156         if (i == MS_MAX_RETRY_COUNT) {
3157                 TRACE_RET(chip, STATUS_FAIL);
3158         }
3159
3160         retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
3161         if (retval != STATUS_SUCCESS) {
3162                 TRACE_RET(chip, STATUS_FAIL);
3163         }
3164
3165         ptr = buf;
3166         for (page_addr = start_page; page_addr < end_page; page_addr++) {
3167                 ms_set_err_code(chip, MS_NO_ERROR);
3168
3169                 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3170                         ms_set_err_code(chip, MS_NO_CARD);
3171                         TRACE_RET(chip, STATUS_FAIL);
3172                 }
3173
3174                 if (val & INT_REG_CMDNK) {
3175                         ms_set_err_code(chip, MS_CMD_NK);
3176                         TRACE_RET(chip, STATUS_FAIL);
3177                 }
3178                 if (val & INT_REG_ERR) {
3179                         ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
3180                         TRACE_RET(chip, STATUS_FAIL);
3181                 }
3182                 if (!(val & INT_REG_BREQ)) {
3183                         ms_set_err_code(chip, MS_BREQ_ERROR);
3184                         TRACE_RET(chip, STATUS_FAIL);
3185                 }
3186
3187                 udelay(30);
3188
3189                 rtsx_init_cmd(chip);
3190
3191                 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, WRITE_PAGE_DATA);
3192                 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, WAIT_INT);
3193                 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, RING_BUFFER);
3194
3195                 trans_dma_enable(DMA_TO_DEVICE, chip, 512, DMA_512);
3196
3197                 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
3198                                 MS_TRANSFER_START |  MS_TM_NORMAL_WRITE);
3199                 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER, MS_TRANSFER_END, MS_TRANSFER_END);
3200
3201                 rtsx_send_cmd_no_wait(chip);
3202
3203                 retval = rtsx_transfer_data_partial(chip, MS_CARD, ptr, 512, scsi_sg_count(chip->srb),
3204                                 index, offset, DMA_TO_DEVICE, chip->ms_timeout);
3205                 if (retval < 0) {
3206                         ms_set_err_code(chip, MS_TO_ERROR);
3207                         rtsx_clear_ms_error(chip);
3208
3209                         if (retval == -ETIMEDOUT) {
3210                                 TRACE_RET(chip, STATUS_TIMEDOUT);
3211                         } else {
3212                                 TRACE_RET(chip, STATUS_FAIL);
3213                         }
3214                 }
3215
3216                 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
3217                 if (retval != STATUS_SUCCESS) {
3218                         TRACE_RET(chip, STATUS_FAIL);
3219                 }
3220
3221                 if ((end_page - start_page) == 1) {
3222                         if (!(val & INT_REG_CED)) {
3223                                 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
3224                                 TRACE_RET(chip, STATUS_FAIL);
3225                         }
3226                 } else {
3227                         if (page_addr == (end_page - 1)) {
3228                                 if (!(val & INT_REG_CED)) {
3229                                         retval = ms_send_cmd(chip, BLOCK_END, WAIT_INT);
3230                                         if (retval != STATUS_SUCCESS) {
3231                                                 TRACE_RET(chip, STATUS_FAIL);
3232                                         }
3233                                 }
3234
3235                                 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
3236                                 if (retval != STATUS_SUCCESS) {
3237                                         TRACE_RET(chip, STATUS_FAIL);
3238                                 }
3239                         }
3240
3241                         if ((page_addr == (end_page - 1)) || (page_addr == ms_card->page_off)) {
3242                                 if (!(val & INT_REG_CED)) {
3243                                         ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
3244                                         TRACE_RET(chip, STATUS_FAIL);
3245                                 }
3246                         }
3247                 }
3248
3249                 if (scsi_sg_count(chip->srb) == 0)
3250                         ptr += 512;
3251         }
3252
3253         return STATUS_SUCCESS;
3254 }
3255
3256
3257 static int ms_finish_write(struct rtsx_chip *chip, u16 old_blk, u16 new_blk,
3258                 u16 log_blk, u8 page_off)
3259 {
3260         struct ms_info *ms_card = &(chip->ms_card);
3261         int retval, seg_no;
3262
3263         retval = ms_copy_page(chip, old_blk, new_blk, log_blk,
3264                         page_off, ms_card->page_off + 1);
3265         if (retval != STATUS_SUCCESS) {
3266                 TRACE_RET(chip, STATUS_FAIL);
3267         }
3268
3269         seg_no = old_blk >> 9;
3270
3271         if (MS_TST_BAD_BLOCK_FLG(ms_card)) {
3272                 MS_CLR_BAD_BLOCK_FLG(ms_card);
3273                 ms_set_bad_block(chip, old_blk);
3274         } else {
3275                 retval = ms_erase_block(chip, old_blk);
3276                 if (retval == STATUS_SUCCESS) {
3277                         ms_set_unused_block(chip, old_blk);
3278                 }
3279         }
3280
3281         ms_set_l2p_tbl(chip, seg_no, log_blk - ms_start_idx[seg_no], new_blk);
3282
3283         return STATUS_SUCCESS;
3284 }
3285
3286 static int ms_prepare_write(struct rtsx_chip *chip, u16 old_blk, u16 new_blk,
3287                 u16 log_blk, u8 start_page)
3288 {
3289         int retval;
3290
3291         if (start_page) {
3292                 retval = ms_copy_page(chip, old_blk, new_blk, log_blk, 0, start_page);
3293                 if (retval != STATUS_SUCCESS) {
3294                         TRACE_RET(chip, STATUS_FAIL);
3295                 }
3296         }
3297
3298         return STATUS_SUCCESS;
3299 }
3300
3301 #ifdef MS_DELAY_WRITE
3302 int ms_delay_write(struct rtsx_chip *chip)
3303 {
3304         struct ms_info *ms_card = &(chip->ms_card);
3305         struct ms_delay_write_tag *delay_write = &(ms_card->delay_write);
3306         int retval;
3307
3308         if (delay_write->delay_write_flag) {
3309                 retval = ms_set_init_para(chip);
3310                 if (retval != STATUS_SUCCESS) {
3311                         TRACE_RET(chip, STATUS_FAIL);
3312                 }
3313
3314                 delay_write->delay_write_flag = 0;
3315                 retval = ms_finish_write(chip,
3316                                 delay_write->old_phyblock, delay_write->new_phyblock,
3317                                 delay_write->logblock, delay_write->pageoff);
3318                 if (retval != STATUS_SUCCESS) {
3319                         TRACE_RET(chip, STATUS_FAIL);
3320                 }
3321         }
3322
3323         return STATUS_SUCCESS;
3324 }
3325 #endif
3326
3327 static inline void ms_rw_fail(struct scsi_cmnd *srb, struct rtsx_chip *chip)
3328 {
3329         if (srb->sc_data_direction == DMA_FROM_DEVICE) {
3330                 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
3331         } else {
3332                 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_WRITE_ERR);
3333         }
3334 }
3335
3336 static int ms_rw_multi_sector(struct scsi_cmnd *srb, struct rtsx_chip *chip, u32 start_sector, u16 sector_cnt)
3337 {
3338         struct ms_info *ms_card = &(chip->ms_card);
3339         unsigned int lun = SCSI_LUN(srb);
3340         int retval, seg_no;
3341         unsigned int index = 0, offset = 0;
3342         u16 old_blk = 0, new_blk = 0, log_blk, total_sec_cnt = sector_cnt;
3343         u8 start_page, end_page = 0, page_cnt;
3344         u8 *ptr;
3345 #ifdef MS_DELAY_WRITE
3346         struct ms_delay_write_tag *delay_write = &(ms_card->delay_write);
3347 #endif
3348
3349         ms_set_err_code(chip, MS_NO_ERROR);
3350
3351         ms_card->cleanup_counter = 0;
3352
3353         ptr = (u8 *)scsi_sglist(srb);
3354
3355         retval = ms_switch_clock(chip);
3356         if (retval != STATUS_SUCCESS) {
3357                 ms_rw_fail(srb, chip);
3358                 TRACE_RET(chip, STATUS_FAIL);
3359         }
3360
3361         log_blk = (u16)(start_sector >> ms_card->block_shift);
3362         start_page = (u8)(start_sector & ms_card->page_off);
3363
3364         for (seg_no = 0; seg_no < sizeof(ms_start_idx)/2; seg_no++) {
3365                 if (log_blk < ms_start_idx[seg_no+1])
3366                         break;
3367         }
3368
3369         if (ms_card->segment[seg_no].build_flag == 0) {
3370                 retval = ms_build_l2p_tbl(chip, seg_no);
3371                 if (retval != STATUS_SUCCESS) {
3372                         chip->card_fail |= MS_CARD;
3373                         set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
3374                         TRACE_RET(chip, STATUS_FAIL);
3375                 }
3376         }
3377
3378         if (srb->sc_data_direction == DMA_TO_DEVICE) {
3379 #ifdef MS_DELAY_WRITE
3380                 if (delay_write->delay_write_flag &&
3381                                 (delay_write->logblock == log_blk) &&
3382                                 (start_page > delay_write->pageoff)) {
3383                         delay_write->delay_write_flag = 0;
3384                         retval = ms_copy_page(chip,
3385                                 delay_write->old_phyblock,
3386                                 delay_write->new_phyblock, log_blk,
3387                                 delay_write->pageoff, start_page);
3388                         if (retval != STATUS_SUCCESS) {
3389                                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_ERR);
3390                                 TRACE_RET(chip, STATUS_FAIL);
3391                         }
3392                         old_blk = delay_write->old_phyblock;
3393                         new_blk = delay_write->new_phyblock;
3394                 } else if (delay_write->delay_write_flag &&
3395                                 (delay_write->logblock == log_blk) &&
3396                                 (start_page == delay_write->pageoff)) {
3397                         delay_write->delay_write_flag = 0;
3398                         old_blk = delay_write->old_phyblock;
3399                         new_blk = delay_write->new_phyblock;
3400                 } else {
3401                         retval = ms_delay_write(chip);
3402                         if (retval != STATUS_SUCCESS) {
3403                                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_ERR);
3404                                 TRACE_RET(chip, STATUS_FAIL);
3405                         }
3406 #endif
3407                         old_blk = ms_get_l2p_tbl(chip, seg_no, log_blk - ms_start_idx[seg_no]);
3408                         new_blk  = ms_get_unused_block(chip, seg_no);
3409                         if ((old_blk == 0xFFFF) || (new_blk == 0xFFFF)) {
3410                                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_ERR);
3411                                 TRACE_RET(chip, STATUS_FAIL);
3412                         }
3413
3414                         retval = ms_prepare_write(chip, old_blk, new_blk, log_blk, start_page);
3415                         if (retval != STATUS_SUCCESS) {
3416                                 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3417                                         set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
3418                                         TRACE_RET(chip, STATUS_FAIL);
3419                                 }
3420                                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_ERR);
3421                                 TRACE_RET(chip, STATUS_FAIL);
3422                         }
3423 #ifdef MS_DELAY_WRITE
3424                 }
3425 #endif
3426         } else {
3427 #ifdef MS_DELAY_WRITE
3428                 retval = ms_delay_write(chip);
3429                 if (retval != STATUS_SUCCESS) {
3430                         if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3431                                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
3432                                 TRACE_RET(chip, STATUS_FAIL);
3433                         }
3434                         set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
3435                         TRACE_RET(chip, STATUS_FAIL);
3436                 }
3437 #endif
3438                 old_blk = ms_get_l2p_tbl(chip, seg_no, log_blk - ms_start_idx[seg_no]);
3439                 if (old_blk == 0xFFFF) {
3440                         set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
3441                         TRACE_RET(chip, STATUS_FAIL);
3442                 }
3443         }
3444
3445         RTSX_DEBUGP("seg_no = %d, old_blk = 0x%x, new_blk = 0x%x\n", seg_no, old_blk, new_blk);
3446
3447         while (total_sec_cnt) {
3448                 if ((start_page + total_sec_cnt) > (ms_card->page_off + 1)) {
3449                         end_page = ms_card->page_off + 1;
3450                 } else {
3451                         end_page = start_page + (u8)total_sec_cnt;
3452                 }
3453                 page_cnt = end_page - start_page;
3454
3455                 RTSX_DEBUGP("start_page = %d, end_page = %d, page_cnt = %d\n",
3456                                 start_page, end_page, page_cnt);
3457
3458                 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
3459                         retval = ms_read_multiple_pages(chip,
3460                                 old_blk, log_blk, start_page, end_page,
3461                                 ptr, &index, &offset);
3462                 } else {
3463                         retval = ms_write_multiple_pages(chip, old_blk,
3464                                 new_blk, log_blk, start_page, end_page,
3465                                 ptr, &index, &offset);
3466                 }
3467
3468                 if (retval != STATUS_SUCCESS) {
3469                         toggle_gpio(chip, 1);
3470                         if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3471                                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
3472                                 TRACE_RET(chip, STATUS_FAIL);
3473                         }
3474                         ms_rw_fail(srb, chip);
3475                         TRACE_RET(chip, STATUS_FAIL);
3476                 }
3477
3478                 if (srb->sc_data_direction == DMA_TO_DEVICE) {
3479                         if (end_page == (ms_card->page_off + 1)) {
3480                                 retval = ms_erase_block(chip, old_blk);
3481                                 if (retval == STATUS_SUCCESS) {
3482                                         ms_set_unused_block(chip, old_blk);
3483                                 }
3484                                 ms_set_l2p_tbl(chip, seg_no, log_blk - ms_start_idx[seg_no], new_blk);
3485                         }
3486                 }
3487
3488                 total_sec_cnt -= page_cnt;
3489                 if (scsi_sg_count(srb) == 0)
3490                         ptr += page_cnt * 512;
3491
3492                 if (total_sec_cnt == 0)
3493                         break;
3494
3495                 log_blk++;
3496
3497                 for (seg_no = 0; seg_no < sizeof(ms_start_idx)/2; seg_no++) {
3498                         if (log_blk < ms_start_idx[seg_no+1])
3499                                 break;
3500                 }
3501
3502                 if (ms_card->segment[seg_no].build_flag == 0) {
3503                         retval = ms_build_l2p_tbl(chip, seg_no);
3504                         if (retval != STATUS_SUCCESS) {
3505                                 chip->card_fail |= MS_CARD;
3506                                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
3507                                 TRACE_RET(chip, STATUS_FAIL);
3508                         }
3509                 }
3510
3511                 old_blk = ms_get_l2p_tbl(chip, seg_no, log_blk - ms_start_idx[seg_no]);
3512                 if (old_blk == 0xFFFF) {
3513                         ms_rw_fail(srb, chip);
3514                         TRACE_RET(chip, STATUS_FAIL);
3515                 }
3516
3517                 if (srb->sc_data_direction == DMA_TO_DEVICE) {
3518                         new_blk = ms_get_unused_block(chip, seg_no);
3519                         if (new_blk == 0xFFFF) {
3520                                 ms_rw_fail(srb, chip);
3521                                 TRACE_RET(chip, STATUS_FAIL);
3522                         }
3523                 }
3524
3525                 RTSX_DEBUGP("seg_no = %d, old_blk = 0x%x, new_blk = 0x%x\n", seg_no, old_blk, new_blk);
3526
3527                 start_page = 0;
3528         }
3529
3530         if (srb->sc_data_direction == DMA_TO_DEVICE) {
3531                 if (end_page < (ms_card->page_off + 1)) {
3532 #ifdef MS_DELAY_WRITE
3533                         delay_write->delay_write_flag = 1;
3534                         delay_write->old_phyblock = old_blk;
3535                         delay_write->new_phyblock = new_blk;
3536                         delay_write->logblock = log_blk;
3537                         delay_write->pageoff = end_page;
3538 #else
3539                         retval = ms_finish_write(chip, old_blk, new_blk, log_blk, end_page);
3540                         if (retval != STATUS_SUCCESS) {
3541                                 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3542                                         set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
3543                                         TRACE_RET(chip, STATUS_FAIL);
3544                                 }
3545
3546                                 ms_rw_fail(srb, chip);
3547                                 TRACE_RET(chip, STATUS_FAIL);
3548                         }
3549 #endif
3550                 }
3551         }
3552
3553         scsi_set_resid(srb, 0);
3554
3555         return STATUS_SUCCESS;
3556 }
3557
3558 int ms_rw(struct scsi_cmnd *srb, struct rtsx_chip *chip, u32 start_sector, u16 sector_cnt)
3559 {
3560         struct ms_info *ms_card = &(chip->ms_card);
3561         int retval;
3562
3563         if (CHK_MSPRO(ms_card)) {
3564                 retval = mspro_rw_multi_sector(srb, chip, start_sector, sector_cnt);
3565         } else {
3566                 retval = ms_rw_multi_sector(srb, chip, start_sector, sector_cnt);
3567         }
3568
3569         return retval;
3570 }
3571
3572
3573 void ms_free_l2p_tbl(struct rtsx_chip *chip)
3574 {
3575         struct ms_info *ms_card = &(chip->ms_card);
3576         int i = 0;
3577
3578         if (ms_card->segment != NULL) {
3579                 for (i = 0; i < ms_card->segment_cnt; i++) {
3580                         if (ms_card->segment[i].l2p_table != NULL) {
3581                                 vfree(ms_card->segment[i].l2p_table);
3582                                 ms_card->segment[i].l2p_table = NULL;
3583                         }
3584                         if (ms_card->segment[i].free_table != NULL) {
3585                                 vfree(ms_card->segment[i].free_table);
3586                                 ms_card->segment[i].free_table = NULL;
3587                         }
3588                 }
3589                 vfree(ms_card->segment);
3590                 ms_card->segment = NULL;
3591         }
3592 }
3593
3594 #ifdef SUPPORT_MAGIC_GATE
3595
3596 #ifdef READ_BYTES_WAIT_INT
3597 int ms_poll_int(struct rtsx_chip *chip)
3598 {
3599         int retval;
3600         u8 val;
3601
3602         rtsx_init_cmd(chip);
3603
3604         rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANS_CFG, MS_INT_CED, MS_INT_CED);
3605
3606         retval = rtsx_send_cmd(chip, MS_CARD, 5000);
3607         if (retval != STATUS_SUCCESS) {
3608                 TRACE_RET(chip, STATUS_FAIL);
3609         }
3610
3611         val = *rtsx_get_cmd_data(chip);
3612         if (val & MS_INT_ERR) {
3613                 TRACE_RET(chip, STATUS_FAIL);
3614         }
3615
3616         return STATUS_SUCCESS;
3617 }
3618 #endif
3619
3620 #ifdef MS_SAMPLE_INT_ERR
3621 static int check_ms_err(struct rtsx_chip *chip)
3622 {
3623         int retval;
3624         u8 val;
3625
3626         retval = rtsx_read_register(chip, MS_TRANSFER, &val);
3627         if (retval != STATUS_SUCCESS)
3628                 return 1;
3629         if (val & MS_TRANSFER_ERR)
3630                 return 1;
3631
3632         retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
3633         if (retval != STATUS_SUCCESS)
3634                 return 1;
3635
3636         if (val & (MS_INT_ERR | MS_INT_CMDNK))
3637                 return 1;
3638
3639         return 0;
3640 }
3641 #else
3642 static int check_ms_err(struct rtsx_chip *chip)
3643 {
3644         int retval;
3645         u8 val;
3646
3647         retval = rtsx_read_register(chip, MS_TRANSFER, &val);
3648         if (retval != STATUS_SUCCESS)
3649                 return 1;
3650         if (val & MS_TRANSFER_ERR)
3651                 return 1;
3652
3653         return 0;
3654 }
3655 #endif
3656
3657 static int mg_send_ex_cmd(struct rtsx_chip *chip, u8 cmd, u8 entry_num)
3658 {
3659         int retval, i;
3660         u8 data[8];
3661
3662         data[0] = cmd;
3663         data[1] = 0;
3664         data[2] = 0;
3665         data[3] = 0;
3666         data[4] = 0;
3667         data[5] = 0;
3668         data[6] = entry_num;
3669         data[7] = 0;
3670
3671         for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
3672                 retval = ms_write_bytes(chip, PRO_EX_SET_CMD, 7, WAIT_INT, data, 8);
3673                 if (retval == STATUS_SUCCESS)
3674                         break;
3675         }
3676         if (i == MS_MAX_RETRY_COUNT) {
3677                 TRACE_RET(chip, STATUS_FAIL);
3678         }
3679
3680         if (check_ms_err(chip)) {
3681                 rtsx_clear_ms_error(chip);
3682                 TRACE_RET(chip, STATUS_FAIL);
3683         }
3684
3685         return STATUS_SUCCESS;
3686 }
3687
3688 static int mg_set_tpc_para_sub(struct rtsx_chip *chip, int type, u8 mg_entry_num)
3689 {
3690         int retval;
3691         u8 buf[6];
3692
3693         RTSX_DEBUGP("--%s--\n", __func__);
3694
3695         if (type == 0) {
3696                 retval = ms_set_rw_reg_addr(chip, 0, 0, Pro_TPCParm, 1);
3697         } else {
3698                 retval = ms_set_rw_reg_addr(chip, 0, 0, Pro_DataCount1, 6);
3699         }
3700         if (retval != STATUS_SUCCESS) {
3701                 TRACE_RET(chip, STATUS_FAIL);
3702         }
3703
3704         buf[0] = 0;
3705         buf[1] = 0;
3706         if (type == 1) {
3707                 buf[2] = 0;
3708                 buf[3] = 0;
3709                 buf[4] = 0;
3710                 buf[5] = mg_entry_num;
3711         }
3712         retval = ms_write_bytes(chip, PRO_WRITE_REG, (type == 0) ? 1 : 6, NO_WAIT_INT, buf, 6);
3713         if (retval != STATUS_SUCCESS) {
3714                 TRACE_RET(chip, STATUS_FAIL);
3715         }
3716
3717         return STATUS_SUCCESS;
3718 }
3719
3720 int mg_set_leaf_id(struct scsi_cmnd *srb, struct rtsx_chip *chip)
3721 {
3722         int retval;
3723         int i;
3724         unsigned int lun = SCSI_LUN(srb);
3725         u8 buf1[32], buf2[12];
3726
3727         RTSX_DEBUGP("--%s--\n", __func__);
3728
3729         if (scsi_bufflen(srb) < 12) {
3730                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
3731                 TRACE_RET(chip, STATUS_FAIL);
3732         }
3733
3734         ms_cleanup_work(chip);
3735
3736         retval = ms_switch_clock(chip);
3737         if (retval != STATUS_SUCCESS) {
3738                 TRACE_RET(chip, STATUS_FAIL);
3739         }
3740
3741         retval = mg_send_ex_cmd(chip, MG_SET_LID, 0);
3742         if (retval != STATUS_SUCCESS) {
3743                 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
3744                 TRACE_RET(chip, STATUS_FAIL);
3745         }
3746
3747         memset(buf1, 0, 32);
3748         rtsx_stor_get_xfer_buf(buf2, min(12, (int)scsi_bufflen(srb)), srb);
3749         for (i = 0; i < 8; i++) {
3750                 buf1[8+i] = buf2[4+i];
3751         }
3752         retval = ms_write_bytes(chip, PRO_WRITE_SHORT_DATA, 32, WAIT_INT, buf1, 32);
3753         if (retval != STATUS_SUCCESS) {
3754                 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
3755                 TRACE_RET(chip, STATUS_FAIL);
3756         }
3757         if (check_ms_err(chip)) {
3758                 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
3759                 rtsx_clear_ms_error(chip);
3760                 TRACE_RET(chip, STATUS_FAIL);
3761         }
3762
3763         return STATUS_SUCCESS;
3764 }
3765
3766 int mg_get_local_EKB(struct scsi_cmnd *srb, struct rtsx_chip *chip)
3767 {
3768         int retval = STATUS_FAIL;
3769         int bufflen;
3770         unsigned int lun = SCSI_LUN(srb);
3771         u8 *buf = NULL;
3772
3773         RTSX_DEBUGP("--%s--\n", __func__);
3774
3775         ms_cleanup_work(chip);
3776
3777         retval = ms_switch_clock(chip);
3778         if (retval != STATUS_SUCCESS) {
3779                 TRACE_RET(chip, STATUS_FAIL);
3780         }
3781
3782         buf = (u8 *)rtsx_alloc_dma_buf(chip, 1540, GFP_KERNEL);
3783         if (!buf) {
3784                 TRACE_RET(chip, STATUS_ERROR);
3785         }
3786
3787         buf[0] = 0x04;
3788         buf[1] = 0x1A;
3789         buf[2] = 0x00;
3790         buf[3] = 0x00;
3791
3792         retval = mg_send_ex_cmd(chip, MG_GET_LEKB, 0);
3793         if (retval != STATUS_SUCCESS) {
3794                 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
3795                 TRACE_GOTO(chip, GetEKBFinish);
3796         }
3797
3798         retval = ms_transfer_data(chip, MS_TM_AUTO_READ, PRO_READ_LONG_DATA,
3799                                 3, WAIT_INT, 0, 0, buf + 4, 1536);
3800         if (retval != STATUS_SUCCESS) {
3801                 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
3802                 rtsx_clear_ms_error(chip);
3803                 TRACE_GOTO(chip, GetEKBFinish);
3804         }
3805         if (check_ms_err(chip)) {
3806                 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
3807                 rtsx_clear_ms_error(chip);
3808                 TRACE_RET(chip, STATUS_FAIL);
3809         }
3810
3811         bufflen = min(1052, (int)scsi_bufflen(srb));
3812         rtsx_stor_set_xfer_buf(buf, bufflen, srb);
3813
3814 GetEKBFinish:
3815         if (buf) {
3816                 rtsx_free_dma_buf(chip, buf);
3817         }
3818         return retval;
3819 }
3820
3821 int mg_chg(struct scsi_cmnd *srb, struct rtsx_chip *chip)
3822 {
3823         struct ms_info *ms_card = &(chip->ms_card);
3824         int retval;
3825         int bufflen;
3826         int i;
3827         unsigned int lun = SCSI_LUN(srb);
3828         u8 buf[32];
3829
3830         RTSX_DEBUGP("--%s--\n", __func__);
3831
3832         ms_cleanup_work(chip);
3833
3834         retval = ms_switch_clock(chip);
3835         if (retval != STATUS_SUCCESS) {
3836                 TRACE_RET(chip, STATUS_FAIL);
3837         }
3838
3839         retval = mg_send_ex_cmd(chip, MG_GET_ID, 0);
3840         if (retval != STATUS_SUCCESS) {
3841                 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
3842                 TRACE_RET(chip, STATUS_FAIL);
3843         }
3844
3845         retval = ms_read_bytes(chip, PRO_READ_SHORT_DATA, 32, WAIT_INT, buf, 32);
3846         if (retval != STATUS_SUCCESS) {
3847                 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
3848                 TRACE_RET(chip, STATUS_FAIL);
3849         }
3850         if (check_ms_err(chip)) {
3851                 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
3852                 rtsx_clear_ms_error(chip);
3853                 TRACE_RET(chip, STATUS_FAIL);
3854         }
3855
3856         memcpy(ms_card->magic_gate_id, buf, 16);
3857
3858 #ifdef READ_BYTES_WAIT_INT
3859         retval = ms_poll_int(chip);
3860         if (retval != STATUS_SUCCESS) {
3861                 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
3862                 TRACE_RET(chip, STATUS_FAIL);
3863         }
3864 #endif
3865
3866         retval = mg_send_ex_cmd(chip, MG_SET_RD, 0);
3867         if (retval != STATUS_SUCCESS) {
3868                 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
3869                 TRACE_RET(chip, STATUS_FAIL);
3870         }
3871
3872         bufflen = min(12, (int)scsi_bufflen(srb));
3873         rtsx_stor_get_xfer_buf(buf, bufflen, srb);
3874
3875         for (i = 0; i < 8; i++) {
3876                 buf[i] = buf[4+i];
3877         }
3878         for (i = 0; i < 24; i++) {
3879                 buf[8+i] = 0;
3880         }
3881         retval = ms_write_bytes(chip, PRO_WRITE_SHORT_DATA,
3882                                 32, WAIT_INT, buf, 32);
3883         if (retval != STATUS_SUCCESS) {
3884                 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
3885                 TRACE_RET(chip, STATUS_FAIL);
3886         }
3887         if (check_ms_err(chip)) {
3888                 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
3889                 rtsx_clear_ms_error(chip);
3890                 TRACE_RET(chip, STATUS_FAIL);
3891         }
3892
3893         ms_card->mg_auth = 0;
3894
3895         return STATUS_SUCCESS;
3896 }
3897
3898 int mg_get_rsp_chg(struct scsi_cmnd *srb, struct rtsx_chip *chip)
3899 {
3900         struct ms_info *ms_card = &(chip->ms_card);
3901         int retval;
3902         int bufflen;
3903         unsigned int lun = SCSI_LUN(srb);
3904         u8 buf1[32], buf2[36];
3905
3906         RTSX_DEBUGP("--%s--\n", __func__);
3907
3908         ms_cleanup_work(chip);
3909
3910         retval = ms_switch_clock(chip);
3911         if (retval != STATUS_SUCCESS) {
3912                 TRACE_RET(chip, STATUS_FAIL);
3913         }
3914
3915         retval = mg_send_ex_cmd(chip, MG_MAKE_RMS, 0);
3916         if (retval != STATUS_SUCCESS) {
3917                 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
3918                 TRACE_RET(chip, STATUS_FAIL);
3919         }
3920
3921         retval = ms_read_bytes(chip, PRO_READ_SHORT_DATA, 32, WAIT_INT, buf1, 32);
3922         if (retval != STATUS_SUCCESS) {
3923                 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
3924                 TRACE_RET(chip, STATUS_FAIL);
3925         }
3926         if (check_ms_err(chip)) {
3927                 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
3928                 rtsx_clear_ms_error(chip);
3929                 TRACE_RET(chip, STATUS_FAIL);
3930         }
3931
3932         buf2[0] = 0x00;
3933         buf2[1] = 0x22;
3934         buf2[2] = 0x00;
3935         buf2[3] = 0x00;
3936
3937         memcpy(buf2 + 4, ms_card->magic_gate_id, 16);
3938         memcpy(buf2 + 20, buf1, 16);
3939
3940         bufflen = min(36, (int)scsi_bufflen(srb));
3941         rtsx_stor_set_xfer_buf(buf2, bufflen, srb);
3942
3943 #ifdef READ_BYTES_WAIT_INT
3944         retval = ms_poll_int(chip);
3945         if (retval != STATUS_SUCCESS) {
3946                 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
3947                 TRACE_RET(chip, STATUS_FAIL);
3948         }
3949 #endif
3950
3951         return STATUS_SUCCESS;
3952 }
3953
3954 int mg_rsp(struct scsi_cmnd *srb, struct rtsx_chip *chip)
3955 {
3956         struct ms_info *ms_card = &(chip->ms_card);
3957         int retval;
3958         int i;
3959         int bufflen;
3960         unsigned int lun = SCSI_LUN(srb);
3961         u8 buf[32];
3962
3963         RTSX_DEBUGP("--%s--\n", __func__);
3964
3965         ms_cleanup_work(chip);
3966
3967         retval = ms_switch_clock(chip);
3968         if (retval != STATUS_SUCCESS) {
3969                 TRACE_RET(chip, STATUS_FAIL);
3970         }
3971
3972         retval = mg_send_ex_cmd(chip, MG_MAKE_KSE, 0);
3973         if (retval != STATUS_SUCCESS) {
3974                 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
3975                 TRACE_RET(chip, STATUS_FAIL);
3976         }
3977
3978         bufflen = min(12, (int)scsi_bufflen(srb));
3979         rtsx_stor_get_xfer_buf(buf, bufflen, srb);
3980
3981         for (i = 0; i < 8; i++) {
3982                 buf[i] = buf[4+i];
3983         }
3984         for (i = 0; i < 24; i++) {
3985                 buf[8+i] = 0;
3986         }
3987         retval = ms_write_bytes(chip, PRO_WRITE_SHORT_DATA, 32, WAIT_INT, buf, 32);
3988         if (retval != STATUS_SUCCESS) {
3989                 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
3990                 TRACE_RET(chip, STATUS_FAIL);
3991         }
3992         if (check_ms_err(chip)) {
3993                 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
3994                 rtsx_clear_ms_error(chip);
3995                 TRACE_RET(chip, STATUS_FAIL);
3996         }
3997
3998         ms_card->mg_auth = 1;
3999
4000         return STATUS_SUCCESS;
4001 }
4002
4003 int mg_get_ICV(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4004 {
4005         struct ms_info *ms_card = &(chip->ms_card);
4006         int retval;
4007         int bufflen;
4008         unsigned int lun = SCSI_LUN(srb);
4009         u8 *buf = NULL;
4010
4011         RTSX_DEBUGP("--%s--\n", __func__);
4012
4013         ms_cleanup_work(chip);
4014
4015         retval = ms_switch_clock(chip);
4016         if (retval != STATUS_SUCCESS) {
4017                 TRACE_RET(chip, STATUS_FAIL);
4018         }
4019
4020         buf = (u8 *)rtsx_alloc_dma_buf(chip, 1028, GFP_KERNEL);
4021         if (!buf) {
4022                 TRACE_RET(chip, STATUS_ERROR);
4023         }
4024
4025         buf[0] = 0x04;
4026         buf[1] = 0x02;
4027         buf[2] = 0x00;
4028         buf[3] = 0x00;
4029
4030         retval = mg_send_ex_cmd(chip, MG_GET_IBD, ms_card->mg_entry_num);
4031         if (retval != STATUS_SUCCESS) {
4032                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
4033                 TRACE_GOTO(chip, GetICVFinish);
4034         }
4035
4036         retval = ms_transfer_data(chip, MS_TM_AUTO_READ, PRO_READ_LONG_DATA,
4037                                 2, WAIT_INT, 0, 0, buf + 4, 1024);
4038         if (retval != STATUS_SUCCESS) {
4039                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
4040                 rtsx_clear_ms_error(chip);
4041                 TRACE_GOTO(chip, GetICVFinish);
4042         }
4043         if (check_ms_err(chip)) {
4044                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
4045                 rtsx_clear_ms_error(chip);
4046                 TRACE_RET(chip, STATUS_FAIL);
4047         }
4048
4049         bufflen = min(1028, (int)scsi_bufflen(srb));
4050         rtsx_stor_set_xfer_buf(buf, bufflen, srb);
4051
4052 GetICVFinish:
4053         if (buf) {
4054                 rtsx_free_dma_buf(chip, buf);
4055         }
4056         return retval;
4057 }
4058
4059 int mg_set_ICV(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4060 {
4061         struct ms_info *ms_card = &(chip->ms_card);
4062         int retval;
4063         int bufflen;
4064 #ifdef MG_SET_ICV_SLOW
4065         int i;
4066 #endif
4067         unsigned int lun = SCSI_LUN(srb);
4068         u8 *buf = NULL;
4069
4070         RTSX_DEBUGP("--%s--\n", __func__);
4071
4072         ms_cleanup_work(chip);
4073
4074         retval = ms_switch_clock(chip);
4075         if (retval != STATUS_SUCCESS) {
4076                 TRACE_RET(chip, STATUS_FAIL);
4077         }
4078
4079         buf = (u8 *)rtsx_alloc_dma_buf(chip, 1028, GFP_KERNEL);
4080         if (!buf) {
4081                 TRACE_RET(chip, STATUS_ERROR);
4082         }
4083
4084         bufflen = min(1028, (int)scsi_bufflen(srb));
4085         rtsx_stor_get_xfer_buf(buf, bufflen, srb);
4086
4087         retval = mg_send_ex_cmd(chip, MG_SET_IBD, ms_card->mg_entry_num);
4088         if (retval != STATUS_SUCCESS) {
4089                 if (ms_card->mg_auth == 0) {
4090                         if ((buf[5] & 0xC0) != 0) {
4091                                 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4092                         } else {
4093                                 set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR);
4094                         }
4095                 } else {
4096                         set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR);
4097                 }
4098                 TRACE_GOTO(chip, SetICVFinish);
4099         }
4100
4101 #ifdef MG_SET_ICV_SLOW
4102         for (i = 0; i < 2; i++) {
4103                 udelay(50);
4104
4105                 rtsx_init_cmd(chip);
4106
4107                 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, PRO_WRITE_LONG_DATA);
4108                 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, WAIT_INT);
4109                 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, RING_BUFFER);
4110
4111                 trans_dma_enable(DMA_TO_DEVICE, chip, 512, DMA_512);
4112
4113                 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
4114                                 MS_TRANSFER_START |  MS_TM_NORMAL_WRITE);
4115                 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER, MS_TRANSFER_END, MS_TRANSFER_END);
4116
4117                 rtsx_send_cmd_no_wait(chip);
4118
4119                 retval = rtsx_transfer_data(chip, MS_CARD, buf + 4 + i*512, 512, 0, DMA_TO_DEVICE, 3000);
4120                 if ((retval < 0) || check_ms_err(chip)) {
4121                         rtsx_clear_ms_error(chip);
4122                         if (ms_card->mg_auth == 0) {
4123                                 if ((buf[5] & 0xC0) != 0) {
4124                                         set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4125                                 } else {
4126                                         set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR);
4127                                 }
4128                         } else {
4129                                 set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR);
4130                         }
4131                         retval = STATUS_FAIL;
4132                         TRACE_GOTO(chip, SetICVFinish);
4133                 }
4134         }
4135 #else
4136         retval = ms_transfer_data(chip, MS_TM_AUTO_WRITE, PRO_WRITE_LONG_DATA,
4137                                 2, WAIT_INT, 0, 0, buf + 4, 1024);
4138         if ((retval != STATUS_SUCCESS) || check_ms_err(chip) {
4139                 rtsx_clear_ms_error(chip);
4140                 if (ms_card->mg_auth == 0) {
4141                         if ((buf[5] & 0xC0) != 0) {
4142                                 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4143                         } else {
4144                                 set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR);
4145                         }
4146                 } else {
4147                         set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR);
4148                 }
4149                 TRACE_GOTO(chip, SetICVFinish);
4150         }
4151 #endif
4152
4153 SetICVFinish:
4154         if (buf) {
4155                 rtsx_free_dma_buf(chip, buf);
4156         }
4157         return retval;
4158 }
4159
4160 #endif /* SUPPORT_MAGIC_GATE */
4161
4162 void ms_cleanup_work(struct rtsx_chip *chip)
4163 {
4164         struct ms_info *ms_card = &(chip->ms_card);
4165
4166         if (CHK_MSPRO(ms_card)) {
4167                 if (ms_card->seq_mode) {
4168                         RTSX_DEBUGP("MS Pro: stop transmission\n");
4169                         mspro_stop_seq_mode(chip);
4170                         ms_card->cleanup_counter = 0;
4171                 }
4172                 if (CHK_MSHG(ms_card)) {
4173                         rtsx_write_register(chip, MS_CFG,
4174                                 MS_2K_SECTOR_MODE, 0x00);
4175                 }
4176         }
4177 #ifdef MS_DELAY_WRITE
4178         else if ((!CHK_MSPRO(ms_card)) && ms_card->delay_write.delay_write_flag) {
4179                 RTSX_DEBUGP("MS: delay write\n");
4180                 ms_delay_write(chip);
4181                 ms_card->cleanup_counter = 0;
4182         }
4183 #endif
4184 }
4185
4186 int ms_power_off_card3v3(struct rtsx_chip *chip)
4187 {
4188         int retval;
4189
4190         retval = disable_card_clock(chip, MS_CARD);
4191         if (retval != STATUS_SUCCESS) {
4192                 TRACE_RET(chip, STATUS_FAIL);
4193         }
4194         if (chip->asic_code) {
4195                 retval = ms_pull_ctl_disable(chip);
4196                 if (retval != STATUS_SUCCESS) {
4197                         TRACE_RET(chip, STATUS_FAIL);
4198                 }
4199         } else {
4200                 RTSX_WRITE_REG(chip, FPGA_PULL_CTL,
4201                         FPGA_MS_PULL_CTL_BIT | 0x20, FPGA_MS_PULL_CTL_BIT);
4202         }
4203         RTSX_WRITE_REG(chip, CARD_OE, MS_OUTPUT_EN, 0);
4204         if (!chip->ft2_fast_mode) {
4205                 retval = card_power_off(chip, MS_CARD);
4206                 if (retval != STATUS_SUCCESS) {
4207                         TRACE_RET(chip, STATUS_FAIL);
4208                 }
4209         }
4210
4211         return STATUS_SUCCESS;
4212 }
4213
4214 int release_ms_card(struct rtsx_chip *chip)
4215 {
4216         struct ms_info *ms_card = &(chip->ms_card);
4217         int retval;
4218
4219         RTSX_DEBUGP("release_ms_card\n");
4220
4221 #ifdef MS_DELAY_WRITE
4222         ms_card->delay_write.delay_write_flag = 0;
4223 #endif
4224         ms_card->pro_under_formatting = 0;
4225
4226         chip->card_ready &= ~MS_CARD;
4227         chip->card_fail &= ~MS_CARD;
4228         chip->card_wp &= ~MS_CARD;
4229
4230         ms_free_l2p_tbl(chip);
4231
4232         memset(ms_card->raw_sys_info, 0, 96);
4233 #ifdef SUPPORT_PCGL_1P18
4234         memset(ms_card->raw_model_name, 0, 48);
4235 #endif
4236
4237         retval = ms_power_off_card3v3(chip);
4238         if (retval != STATUS_SUCCESS) {
4239                 TRACE_RET(chip, STATUS_FAIL);
4240         }
4241
4242         return STATUS_SUCCESS;
4243 }
4244