drivers/staging/rtl8187se/r8180_core.c

   1 /*
   2    This is part of rtl818x pci OpenSource driver - v 0.1
   3    Copyright (C) Andrea Merello 2004-2005  <andreamrl@tiscali.it>
   4    Released under the terms of GPL (General Public License)
   5
   6    Parts of this driver are based on the GPL part of the official
   7    Realtek driver.
   8
   9    Parts of this driver are based on the rtl8180 driver skeleton
  10    from Patric Schenke & Andres Salomon.
  11
  12    Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver.
  13
  14    Parts of BB/RF code are derived from David Young rtl8180 netbsd driver.
  15
  16    RSSI calc function from 'The Deuce'
  17
  18    Some ideas borrowed from the 8139too.c driver included in linux kernel.
  19
  20    We (I?) want to thanks the Authors of those projecs and also the
  21    Ndiswrapper's project Authors.
  22
  23    A big big thanks goes also to Realtek corp. for their help in my attempt to
  24    add RTL8185 and RTL8225 support, and to David Young also.
  25
  26    Power management interface routines.
  27    Written by Mariusz Matuszek.
  28 */
  29
  30 #undef RX_DONT_PASS_UL
  31 #undef DUMMY_RX
  32
  33 #include <linux/slab.h>
  34 #include <linux/syscalls.h>
  35 #include <linux/eeprom_93cx6.h>
  36 #include <linux/interrupt.h>
  37
  38 #include "r8180_hw.h"
  39 #include "r8180.h"
  40 #include "r8180_rtl8225.h" /* RTL8225 Radio frontend */
  41 #include "r8180_93cx6.h"   /* Card EEPROM */
  42 #include "r8180_wx.h"
  43 #include "r8180_dm.h"
  44
  45 #include "ieee80211/dot11d.h"
  46
  47 static struct pci_device_id rtl8180_pci_id_tbl[] __devinitdata = {
  48         {
  49                 .vendor = PCI_VENDOR_ID_REALTEK,
  50                 .device = 0x8199,
  51                 .subvendor = PCI_ANY_ID,
  52                 .subdevice = PCI_ANY_ID,
  53                 .driver_data = 0,
  54         },
  55         {
  56                 .vendor = 0,
  57                 .device = 0,
  58                 .subvendor = 0,
  59                 .subdevice = 0,
  60                 .driver_data = 0,
  61         }
  62 };
  63
  64 static char ifname[IFNAMSIZ] = "wlan%d";
  65 static int hwwep = 0;
  66
  67 MODULE_LICENSE("GPL");
  68 MODULE_DEVICE_TABLE(pci, rtl8180_pci_id_tbl);
  69 MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
  70 MODULE_DESCRIPTION("Linux driver for Realtek RTL8187SE WiFi cards");
  71
  72 module_param_string(ifname, ifname, sizeof(ifname), S_IRUGO|S_IWUSR);
  73 module_param(hwwep, int, S_IRUGO|S_IWUSR);
  74
  75 MODULE_PARM_DESC(hwwep, " Try to use hardware WEP support. Still broken and not available on all cards");
  76
  77 static int __devinit rtl8180_pci_probe(struct pci_dev *pdev,
  78                                        const struct pci_device_id *id);
  79
  80 static void __devexit rtl8180_pci_remove(struct pci_dev *pdev);
  81
  82 static void rtl8180_shutdown(struct pci_dev *pdev)
  83 {
  84         struct net_device *dev = pci_get_drvdata(pdev);
  85         if (dev->netdev_ops->ndo_stop)
  86                 dev->netdev_ops->ndo_stop(dev);
  87         pci_disable_device(pdev);
  88 }
  89
  90 static int rtl8180_suspend(struct pci_dev *pdev, pm_message_t state)
  91 {
  92         struct net_device *dev = pci_get_drvdata(pdev);
  93
  94         if (!netif_running(dev))
  95                 goto out_pci_suspend;
  96
  97         if (dev->netdev_ops->ndo_stop)
  98                 dev->netdev_ops->ndo_stop(dev);
  99
 100         netif_device_detach(dev);
 101
 102 out_pci_suspend:
 103         pci_save_state(pdev);
 104         pci_disable_device(pdev);
 105         pci_set_power_state(pdev, pci_choose_state(pdev, state));
 106         return 0;
 107 }
 108
 109 static int rtl8180_resume(struct pci_dev *pdev)
 110 {
 111         struct net_device *dev = pci_get_drvdata(pdev);
 112         int err;
 113         u32 val;
 114
 115         pci_set_power_state(pdev, PCI_D0);
 116
 117         err = pci_enable_device(pdev);
 118         if (err) {
 119                 printk(KERN_ERR "%s: pci_enable_device failed on resume\n",
 120                                 dev->name);
 121
 122                 return err;
 123         }
 124
 125         pci_restore_state(pdev);
 126
 127         /*
 128          * Suspend/Resume resets the PCI configuration space, so we have to
 129          * re-disable the RETRY_TIMEOUT register (0x41) to keep PCI Tx retries
 130          * from interfering with C3 CPU state. pci_restore_state won't help
 131          * here since it only restores the first 64 bytes pci config header.
 132          */
 133         pci_read_config_dword(pdev, 0x40, &val);
 134         if ((val & 0x0000ff00) != 0)
 135                 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
 136
 137         if (!netif_running(dev))
 138                 goto out;
 139
 140         if (dev->netdev_ops->ndo_open)
 141                 dev->netdev_ops->ndo_open(dev);
 142
 143         netif_device_attach(dev);
 144 out:
 145         return 0;
 146 }
 147
 148 static struct pci_driver rtl8180_pci_driver = {
 149         .name           = RTL8180_MODULE_NAME,
 150         .id_table       = rtl8180_pci_id_tbl,
 151         .probe          = rtl8180_pci_probe,
 152         .remove         = __devexit_p(rtl8180_pci_remove),
 153         .suspend        = rtl8180_suspend,
 154         .resume         = rtl8180_resume,
 155         .shutdown       = rtl8180_shutdown,
 156 };
 157
 158 u8 read_nic_byte(struct net_device *dev, int x)
 159 {
 160         return 0xff&readb((u8 *)dev->mem_start + x);
 161 }
 162
 163 u32 read_nic_dword(struct net_device *dev, int x)
 164 {
 165         return readl((u8 *)dev->mem_start + x);
 166 }
 167
 168 u16 read_nic_word(struct net_device *dev, int x)
 169 {
 170         return readw((u8 *)dev->mem_start + x);
 171 }
 172
 173 void write_nic_byte(struct net_device *dev, int x, u8 y)
 174 {
 175         writeb(y, (u8 *)dev->mem_start + x);
 176         udelay(20);
 177 }
 178
 179 void write_nic_dword(struct net_device *dev, int x, u32 y)
 180 {
 181         writel(y, (u8 *)dev->mem_start + x);
 182         udelay(20);
 183 }
 184
 185 void write_nic_word(struct net_device *dev, int x, u16 y)
 186 {
 187         writew(y, (u8 *)dev->mem_start + x);
 188         udelay(20);
 189 }
 190
 191 inline void force_pci_posting(struct net_device *dev)
 192 {
 193         read_nic_byte(dev, EPROM_CMD);
 194         mb();
 195 }
 196
 197 irqreturn_t rtl8180_interrupt(int irq, void *netdev, struct pt_regs *regs);
 198 void set_nic_rxring(struct net_device *dev);
 199 void set_nic_txring(struct net_device *dev);
 200 static struct net_device_stats *rtl8180_stats(struct net_device *dev);
 201 void rtl8180_commit(struct net_device *dev);
 202 void rtl8180_start_tx_beacon(struct net_device *dev);
 203
 204 static struct proc_dir_entry *rtl8180_proc = NULL;
 205
 206 static int proc_get_registers(char *page, char **start,
 207                           off_t offset, int count,
 208                           int *eof, void *data)
 209 {
 210         struct net_device *dev = data;
 211         int len = 0;
 212         int i, n;
 213         int max = 0xff;
 214
 215         /* This dump the current register page */
 216         for (n = 0; n <= max;) {
 217                 len += snprintf(page + len, count - len, "\nD:  %2x > ", n);
 218
 219                 for (i = 0; i < 16 && n <= max; i++, n++)
 220                         len += snprintf(page + len, count - len, "%2x ",
 221                                         read_nic_byte(dev, n));
 222         }
 223         len += snprintf(page + len, count - len, "\n");
 224
 225         *eof = 1;
 226         return len;
 227 }
 228
 229 int get_curr_tx_free_desc(struct net_device *dev, int priority);
 230
 231 static int proc_get_stats_hw(char *page, char **start,
 232                           off_t offset, int count,
 233                           int *eof, void *data)
 234 {
 235         int len = 0;
 236
 237         *eof = 1;
 238         return len;
 239 }
 240
 241 static int proc_get_stats_rx(char *page, char **start,
 242                           off_t offset, int count,
 243                           int *eof, void *data)
 244 {
 245         struct net_device *dev = data;
 246         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 247
 248         int len = 0;
 249
 250         len += snprintf(page + len, count - len,
 251                 "RX OK: %lu\n"
 252                 "RX Retry: %lu\n"
 253                 "RX CRC Error(0-500): %lu\n"
 254                 "RX CRC Error(500-1000): %lu\n"
 255                 "RX CRC Error(>1000): %lu\n"
 256                 "RX ICV Error: %lu\n",
 257                 priv->stats.rxint,
 258                 priv->stats.rxerr,
 259                 priv->stats.rxcrcerrmin,
 260                 priv->stats.rxcrcerrmid,
 261                 priv->stats.rxcrcerrmax,
 262                 priv->stats.rxicverr
 263                 );
 264
 265         *eof = 1;
 266         return len;
 267 }
 268
 269 static int proc_get_stats_tx(char *page, char **start,
 270                           off_t offset, int count,
 271                           int *eof, void *data)
 272 {
 273         struct net_device *dev = data;
 274         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 275
 276         int len = 0;
 277         unsigned long totalOK;
 278
 279         totalOK = priv->stats.txnpokint+priv->stats.txhpokint+priv->stats.txlpokint;
 280         len += snprintf(page + len, count - len,
 281                 "TX OK: %lu\n"
 282                 "TX Error: %lu\n"
 283                 "TX Retry: %lu\n"
 284                 "TX beacon OK: %lu\n"
 285                 "TX beacon error: %lu\n",
 286                 totalOK,
 287                 priv->stats.txnperr+priv->stats.txhperr+priv->stats.txlperr,
 288                 priv->stats.txretry,
 289                 priv->stats.txbeacon,
 290                 priv->stats.txbeaconerr
 291         );
 292
 293         *eof = 1;
 294         return len;
 295 }
 296
 297 void rtl8180_proc_module_init(void)
 298 {
 299         DMESG("Initializing proc filesystem");
 300         rtl8180_proc = proc_mkdir(RTL8180_MODULE_NAME, init_net.proc_net);
 301 }
 302
 303 void rtl8180_proc_module_remove(void)
 304 {
 305         remove_proc_entry(RTL8180_MODULE_NAME, init_net.proc_net);
 306 }
 307
 308 void rtl8180_proc_remove_one(struct net_device *dev)
 309 {
 310         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 311         if (priv->dir_dev) {
 312                 remove_proc_entry("stats-hw", priv->dir_dev);
 313                 remove_proc_entry("stats-tx", priv->dir_dev);
 314                 remove_proc_entry("stats-rx", priv->dir_dev);
 315                 remove_proc_entry("registers", priv->dir_dev);
 316                 priv->dir_dev = NULL;
 317         }
 318 }
 319
 320 void rtl8180_proc_init_one(struct net_device *dev)
 321 {
 322         struct proc_dir_entry *e;
 323         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 324
 325         priv->dir_dev = rtl8180_proc;
 326         if (!priv->dir_dev) {
 327                 DMESGE("Unable to initialize /proc/net/r8180/%s\n",
 328                       dev->name);
 329                 return;
 330         }
 331
 332         e = create_proc_read_entry("stats-hw", S_IFREG | S_IRUGO,
 333                                    priv->dir_dev, proc_get_stats_hw, dev);
 334         if (!e) {
 335                 DMESGE("Unable to initialize "
 336                       "/proc/net/r8180/%s/stats-hw\n",
 337                       dev->name);
 338         }
 339
 340         e = create_proc_read_entry("stats-rx", S_IFREG | S_IRUGO,
 341                                    priv->dir_dev, proc_get_stats_rx, dev);
 342         if (!e) {
 343                 DMESGE("Unable to initialize "
 344                       "/proc/net/r8180/%s/stats-rx\n",
 345                       dev->name);
 346         }
 347
 348
 349         e = create_proc_read_entry("stats-tx", S_IFREG | S_IRUGO,
 350                                    priv->dir_dev, proc_get_stats_tx, dev);
 351         if (!e) {
 352                 DMESGE("Unable to initialize "
 353                       "/proc/net/r8180/%s/stats-tx\n",
 354                       dev->name);
 355         }
 356
 357         e = create_proc_read_entry("registers", S_IFREG | S_IRUGO,
 358                                    priv->dir_dev, proc_get_registers, dev);
 359         if (!e) {
 360                 DMESGE("Unable to initialize "
 361                       "/proc/net/r8180/%s/registers\n",
 362                       dev->name);
 363         }
 364 }
 365
 366 /*
 367   FIXME: check if we can use some standard already-existent
 368   data type+functions in kernel
 369 */
 370
 371 short buffer_add(struct buffer **buffer, u32 *buf, dma_addr_t dma,
 372                 struct buffer **bufferhead)
 373 {
 374         struct buffer *tmp;
 375
 376         if (!*buffer) {
 377
 378                 *buffer = kmalloc(sizeof(struct buffer), GFP_KERNEL);
 379
 380                 if (*buffer == NULL) {
 381                         DMESGE("Failed to kmalloc head of TX/RX struct");
 382                         return -1;
 383                 }
 384                 (*buffer)->next = *buffer;
 385                 (*buffer)->buf = buf;
 386                 (*buffer)->dma = dma;
 387                 if (bufferhead != NULL)
 388                         (*bufferhead) = (*buffer);
 389                 return 0;
 390         }
 391         tmp = *buffer;
 392
 393         while (tmp->next != (*buffer))
 394                 tmp = tmp->next;
 395         tmp->next = kmalloc(sizeof(struct buffer), GFP_KERNEL);
 396         if (tmp->next == NULL) {
 397                 DMESGE("Failed to kmalloc TX/RX struct");
 398                 return -1;
 399         }
 400         tmp->next->buf = buf;
 401         tmp->next->dma = dma;
 402         tmp->next->next = *buffer;
 403
 404         return 0;
 405 }
 406
 407 void buffer_free(struct net_device *dev, struct buffer **buffer, int len, short consistent)
 408 {
 409
 410         struct buffer *tmp, *next;
 411         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 412         struct pci_dev *pdev = priv->pdev;
 413
 414         if (!*buffer)
 415                 return;
 416
 417         tmp = *buffer;
 418
 419         do {
 420                 next = tmp->next;
 421                 if (consistent) {
 422                         pci_free_consistent(pdev, len,
 423                                     tmp->buf, tmp->dma);
 424                 } else {
 425                         pci_unmap_single(pdev, tmp->dma,
 426                         len, PCI_DMA_FROMDEVICE);
 427                         kfree(tmp->buf);
 428                 }
 429                 kfree(tmp);
 430                 tmp = next;
 431         } while (next != *buffer);
 432
 433         *buffer = NULL;
 434 }
 435
 436 int get_curr_tx_free_desc(struct net_device *dev, int priority)
 437 {
 438         struct r8180_priv *priv = ieee80211_priv(dev);
 439         u32 *tail;
 440         u32 *head;
 441         int ret;
 442
 443         switch (priority) {
 444         case MANAGE_PRIORITY:
 445                 head = priv->txmapringhead;
 446                 tail = priv->txmapringtail;
 447                 break;
 448         case BK_PRIORITY:
 449                 head = priv->txbkpringhead;
 450                 tail = priv->txbkpringtail;
 451                 break;
 452         case BE_PRIORITY:
 453                 head = priv->txbepringhead;
 454                 tail = priv->txbepringtail;
 455                 break;
 456         case VI_PRIORITY:
 457                 head = priv->txvipringhead;
 458                 tail = priv->txvipringtail;
 459                 break;
 460         case VO_PRIORITY:
 461                 head = priv->txvopringhead;
 462                 tail = priv->txvopringtail;
 463                 break;
 464         case HI_PRIORITY:
 465                 head = priv->txhpringhead;
 466                 tail = priv->txhpringtail;
 467                 break;
 468         default:
 469                 return -1;
 470         }
 471
 472         if (head <= tail)
 473                 ret = priv->txringcount - (tail - head)/8;
 474         else
 475                 ret = (head - tail)/8;
 476
 477         if (ret > priv->txringcount)
 478                 DMESG("BUG");
 479
 480         return ret;
 481 }
 482
 483 short check_nic_enought_desc(struct net_device *dev, int priority)
 484 {
 485         struct r8180_priv *priv = ieee80211_priv(dev);
 486         struct ieee80211_device *ieee = netdev_priv(dev);
 487         int requiredbyte, required;
 488
 489         requiredbyte = priv->ieee80211->fts + sizeof(struct ieee80211_header_data);
 490
 491         if (ieee->current_network.QoS_Enable)
 492                 requiredbyte += 2;
 493
 494         required = requiredbyte / (priv->txbuffsize-4);
 495
 496         if (requiredbyte % priv->txbuffsize)
 497                 required++;
 498
 499         /* for now we keep two free descriptor as a safety boundary
 500          * between the tail and the head
 501          */
 502
 503         return (required+2 < get_curr_tx_free_desc(dev, priority));
 504 }
 505
 506 void fix_tx_fifo(struct net_device *dev)
 507 {
 508         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 509         u32 *tmp;
 510         int i;
 511
 512         for (tmp = priv->txmapring, i = 0;
 513              i < priv->txringcount;
 514              tmp += 8, i++) {
 515                 *tmp = *tmp & ~(1<<31);
 516         }
 517
 518         for (tmp = priv->txbkpring, i = 0;
 519              i < priv->txringcount;
 520              tmp += 8, i++) {
 521                 *tmp = *tmp & ~(1<<31);
 522         }
 523
 524         for (tmp = priv->txbepring, i = 0;
 525              i < priv->txringcount;
 526              tmp += 8, i++) {
 527                 *tmp = *tmp & ~(1<<31);
 528         }
 529         for (tmp = priv->txvipring, i = 0;
 530              i < priv->txringcount;
 531              tmp += 8, i++) {
 532                 *tmp = *tmp & ~(1<<31);
 533         }
 534
 535         for (tmp = priv->txvopring, i = 0;
 536              i < priv->txringcount;
 537              tmp += 8, i++) {
 538                 *tmp = *tmp & ~(1<<31);
 539         }
 540
 541         for (tmp = priv->txhpring, i = 0;
 542              i < priv->txringcount;
 543              tmp += 8, i++) {
 544                 *tmp = *tmp & ~(1<<31);
 545         }
 546
 547         for (tmp = priv->txbeaconring, i = 0;
 548              i < priv->txbeaconcount;
 549              tmp += 8, i++) {
 550                 *tmp = *tmp & ~(1<<31);
 551         }
 552
 553         priv->txmapringtail = priv->txmapring;
 554         priv->txmapringhead = priv->txmapring;
 555         priv->txmapbufstail = priv->txmapbufs;
 556
 557         priv->txbkpringtail = priv->txbkpring;
 558         priv->txbkpringhead = priv->txbkpring;
 559         priv->txbkpbufstail = priv->txbkpbufs;
 560
 561         priv->txbepringtail = priv->txbepring;
 562         priv->txbepringhead = priv->txbepring;
 563         priv->txbepbufstail = priv->txbepbufs;
 564
 565         priv->txvipringtail = priv->txvipring;
 566         priv->txvipringhead = priv->txvipring;
 567         priv->txvipbufstail = priv->txvipbufs;
 568
 569         priv->txvopringtail = priv->txvopring;
 570         priv->txvopringhead = priv->txvopring;
 571         priv->txvopbufstail = priv->txvopbufs;
 572
 573         priv->txhpringtail = priv->txhpring;
 574         priv->txhpringhead = priv->txhpring;
 575         priv->txhpbufstail = priv->txhpbufs;
 576
 577         priv->txbeaconringtail = priv->txbeaconring;
 578         priv->txbeaconbufstail = priv->txbeaconbufs;
 579         set_nic_txring(dev);
 580
 581         ieee80211_reset_queue(priv->ieee80211);
 582         priv->ack_tx_to_ieee = 0;
 583 }
 584
 585 void fix_rx_fifo(struct net_device *dev)
 586 {
 587         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 588         u32 *tmp;
 589         struct buffer *rxbuf;
 590         u8 rx_desc_size;
 591
 592         rx_desc_size = 8; /* 4*8 = 32 bytes */
 593
 594         for (tmp = priv->rxring, rxbuf = priv->rxbufferhead;
 595              (tmp < (priv->rxring)+(priv->rxringcount)*rx_desc_size);
 596              tmp += rx_desc_size, rxbuf = rxbuf->next) {
 597                 *(tmp+2) = rxbuf->dma;
 598                 *tmp = *tmp & ~0xfff;
 599                 *tmp = *tmp | priv->rxbuffersize;
 600                 *tmp |= (1<<31);
 601         }
 602
 603         priv->rxringtail = priv->rxring;
 604         priv->rxbuffer = priv->rxbufferhead;
 605         priv->rx_skb_complete = 1;
 606         set_nic_rxring(dev);
 607 }
 608
 609 void rtl8180_irq_disable(struct net_device *dev)
 610 {
 611         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 612
 613         write_nic_dword(dev, IMR, 0);
 614         force_pci_posting(dev);
 615         priv->irq_enabled = 0;
 616 }
 617
 618 void rtl8180_set_mode(struct net_device *dev, int mode)
 619 {
 620         u8 ecmd;
 621
 622         ecmd = read_nic_byte(dev, EPROM_CMD);
 623         ecmd = ecmd & ~EPROM_CMD_OPERATING_MODE_MASK;
 624         ecmd = ecmd | (mode<<EPROM_CMD_OPERATING_MODE_SHIFT);
 625         ecmd = ecmd & ~(1<<EPROM_CS_SHIFT);
 626         ecmd = ecmd & ~(1<<EPROM_CK_SHIFT);
 627         write_nic_byte(dev, EPROM_CMD, ecmd);
 628 }
 629
 630 void rtl8180_beacon_tx_enable(struct net_device *dev);
 631
 632 void rtl8180_update_msr(struct net_device *dev)
 633 {
 634         struct r8180_priv *priv = ieee80211_priv(dev);
 635         u8 msr;
 636         u32 rxconf;
 637
 638         msr  = read_nic_byte(dev, MSR);
 639         msr &= ~MSR_LINK_MASK;
 640
 641         rxconf = read_nic_dword(dev, RX_CONF);
 642
 643         if (priv->ieee80211->state == IEEE80211_LINKED) {
 644                 if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
 645                         msr |= (MSR_LINK_ADHOC<<MSR_LINK_SHIFT);
 646                 else if (priv->ieee80211->iw_mode == IW_MODE_MASTER)
 647                         msr |= (MSR_LINK_MASTER<<MSR_LINK_SHIFT);
 648                 else if (priv->ieee80211->iw_mode == IW_MODE_INFRA)
 649                         msr |= (MSR_LINK_MANAGED<<MSR_LINK_SHIFT);
 650                 else
 651                         msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
 652                 rxconf |= (1<<RX_CHECK_BSSID_SHIFT);
 653
 654         } else {
 655                 msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
 656                 rxconf &= ~(1<<RX_CHECK_BSSID_SHIFT);
 657         }
 658
 659         write_nic_byte(dev, MSR, msr);
 660         write_nic_dword(dev, RX_CONF, rxconf);
 661 }
 662
 663 void rtl8180_set_chan(struct net_device *dev, short ch)
 664 {
 665         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 666
 667         if ((ch > 14) || (ch < 1)) {
 668                 printk("In %s: Invalid chnanel %d\n", __func__, ch);
 669                 return;
 670         }
 671
 672         priv->chan = ch;
 673         priv->rf_set_chan(dev, priv->chan);
 674 }
 675
 676 void set_nic_txring(struct net_device *dev)
 677 {
 678         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 679
 680         write_nic_dword(dev, TX_MANAGEPRIORITY_RING_ADDR, priv->txmapringdma);
 681         write_nic_dword(dev, TX_BKPRIORITY_RING_ADDR, priv->txbkpringdma);
 682         write_nic_dword(dev, TX_BEPRIORITY_RING_ADDR, priv->txbepringdma);
 683         write_nic_dword(dev, TX_VIPRIORITY_RING_ADDR, priv->txvipringdma);
 684         write_nic_dword(dev, TX_VOPRIORITY_RING_ADDR, priv->txvopringdma);
 685         write_nic_dword(dev, TX_HIGHPRIORITY_RING_ADDR, priv->txhpringdma);
 686         write_nic_dword(dev, TX_BEACON_RING_ADDR, priv->txbeaconringdma);
 687 }
 688
 689 void rtl8180_beacon_tx_enable(struct net_device *dev)
 690 {
 691         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 692
 693         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
 694         priv->dma_poll_stop_mask &= ~(TPPOLLSTOP_BQ);
 695         write_nic_byte(dev, TPPollStop, priv->dma_poll_mask);
 696         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
 697 }
 698
 699 void rtl8180_beacon_tx_disable(struct net_device *dev)
 700 {
 701         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 702
 703         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
 704         priv->dma_poll_stop_mask |= TPPOLLSTOP_BQ;
 705         write_nic_byte(dev, TPPollStop, priv->dma_poll_stop_mask);
 706         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
 707
 708 }
 709
 710 void rtl8180_rtx_disable(struct net_device *dev)
 711 {
 712         u8 cmd;
 713         struct r8180_priv *priv = ieee80211_priv(dev);
 714
 715         cmd = read_nic_byte(dev, CMD);
 716         write_nic_byte(dev, CMD, cmd & ~\
 717                        ((1<<CMD_RX_ENABLE_SHIFT)|(1<<CMD_TX_ENABLE_SHIFT)));
 718         force_pci_posting(dev);
 719         mdelay(10);
 720
 721         if (!priv->rx_skb_complete)
 722                 dev_kfree_skb_any(priv->rx_skb);
 723 }
 724
 725 short alloc_tx_desc_ring(struct net_device *dev, int bufsize, int count,
 726                          int addr)
 727 {
 728         int i;
 729         u32 *desc;
 730         u32 *tmp;
 731         dma_addr_t dma_desc, dma_tmp;
 732         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 733         struct pci_dev *pdev = priv->pdev;
 734         void *buf;
 735
 736         if ((bufsize & 0xfff) != bufsize) {
 737                 DMESGE("TX buffer allocation too large");
 738                 return 0;
 739         }
 740         desc = (u32 *)pci_alloc_consistent(pdev,
 741                                           sizeof(u32)*8*count+256, &dma_desc);
 742         if (desc == NULL)
 743                 return -1;
 744
 745         if (dma_desc & 0xff)
 746                 /*
 747                  * descriptor's buffer must be 256 byte aligned
 748                  * we shouldn't be here, since we set DMA mask !
 749                  */
 750                 WARN(1, "DMA buffer is not aligned\n");
 751
 752         tmp = desc;
 753
 754         for (i = 0; i < count; i++) {
 755                 buf = (void *)pci_alloc_consistent(pdev, bufsize, &dma_tmp);
 756                 if (buf == NULL)
 757                         return -ENOMEM;
 758
 759                 switch (addr) {
 760                 case TX_MANAGEPRIORITY_RING_ADDR:
 761                         if (-1 == buffer_add(&(priv->txmapbufs), buf, dma_tmp, NULL)) {
 762                                 DMESGE("Unable to allocate mem for buffer NP");
 763                                 return -ENOMEM;
 764                         }
 765                         break;
 766                 case TX_BKPRIORITY_RING_ADDR:
 767                         if (-1 == buffer_add(&(priv->txbkpbufs), buf, dma_tmp, NULL)) {
 768                                 DMESGE("Unable to allocate mem for buffer LP");
 769                                 return -ENOMEM;
 770                         }
 771                         break;
 772                 case TX_BEPRIORITY_RING_ADDR:
 773                         if (-1 == buffer_add(&(priv->txbepbufs), buf, dma_tmp, NULL)) {
 774                                 DMESGE("Unable to allocate mem for buffer NP");
 775                                 return -ENOMEM;
 776                         }
 777                         break;
 778                 case TX_VIPRIORITY_RING_ADDR:
 779                         if (-1 == buffer_add(&(priv->txvipbufs), buf, dma_tmp, NULL)) {
 780                                 DMESGE("Unable to allocate mem for buffer LP");
 781                                 return -ENOMEM;
 782                         }
 783                         break;
 784                 case TX_VOPRIORITY_RING_ADDR:
 785                         if (-1 == buffer_add(&(priv->txvopbufs), buf, dma_tmp, NULL)) {
 786                                 DMESGE("Unable to allocate mem for buffer NP");
 787                                 return -ENOMEM;
 788                         }
 789                         break;
 790                 case TX_HIGHPRIORITY_RING_ADDR:
 791                         if (-1 == buffer_add(&(priv->txhpbufs), buf, dma_tmp, NULL)) {
 792                                 DMESGE("Unable to allocate mem for buffer HP");
 793                                 return -ENOMEM;
 794                         }
 795                         break;
 796                 case TX_BEACON_RING_ADDR:
 797                         if (-1 == buffer_add(&(priv->txbeaconbufs), buf, dma_tmp, NULL)) {
 798                                 DMESGE("Unable to allocate mem for buffer BP");
 799                                 return -ENOMEM;
 800                         }
 801                         break;
 802                 }
 803                 *tmp = *tmp & ~(1<<31); /* descriptor empty, owned by the drv */
 804                 *(tmp+2) = (u32)dma_tmp;
 805                 *(tmp+3) = bufsize;
 806
 807                 if (i+1 < count)
 808                         *(tmp+4) = (u32)dma_desc+((i+1)*8*4);
 809                 else
 810                         *(tmp+4) = (u32)dma_desc;
 811
 812                 tmp = tmp+8;
 813         }
 814
 815         switch (addr) {
 816         case TX_MANAGEPRIORITY_RING_ADDR:
 817                 priv->txmapringdma = dma_desc;
 818                 priv->txmapring = desc;
 819                 break;
 820         case TX_BKPRIORITY_RING_ADDR:
 821                 priv->txbkpringdma = dma_desc;
 822                 priv->txbkpring = desc;
 823                 break;
 824         case TX_BEPRIORITY_RING_ADDR:
 825                 priv->txbepringdma = dma_desc;
 826                 priv->txbepring = desc;
 827                 break;
 828         case TX_VIPRIORITY_RING_ADDR:
 829                 priv->txvipringdma = dma_desc;
 830                 priv->txvipring = desc;
 831                 break;
 832         case TX_VOPRIORITY_RING_ADDR:
 833                 priv->txvopringdma = dma_desc;
 834                 priv->txvopring = desc;
 835                 break;
 836         case TX_HIGHPRIORITY_RING_ADDR:
 837                 priv->txhpringdma = dma_desc;
 838                 priv->txhpring = desc;
 839                 break;
 840         case TX_BEACON_RING_ADDR:
 841                 priv->txbeaconringdma = dma_desc;
 842                 priv->txbeaconring = desc;
 843                 break;
 844
 845         }
 846
 847         return 0;
 848 }
 849
 850 void free_tx_desc_rings(struct net_device *dev)
 851 {
 852         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 853         struct pci_dev *pdev = priv->pdev;
 854         int count = priv->txringcount;
 855
 856         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
 857                             priv->txmapring, priv->txmapringdma);
 858         buffer_free(dev, &(priv->txmapbufs), priv->txbuffsize, 1);
 859
 860         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
 861                             priv->txbkpring, priv->txbkpringdma);
 862         buffer_free(dev, &(priv->txbkpbufs), priv->txbuffsize, 1);
 863
 864         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
 865                             priv->txbepring, priv->txbepringdma);
 866         buffer_free(dev, &(priv->txbepbufs), priv->txbuffsize, 1);
 867
 868         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
 869                             priv->txvipring, priv->txvipringdma);
 870         buffer_free(dev, &(priv->txvipbufs), priv->txbuffsize, 1);
 871
 872         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
 873                             priv->txvopring, priv->txvopringdma);
 874         buffer_free(dev, &(priv->txvopbufs), priv->txbuffsize, 1);
 875
 876         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
 877                             priv->txhpring, priv->txhpringdma);
 878         buffer_free(dev, &(priv->txhpbufs), priv->txbuffsize, 1);
 879
 880         count = priv->txbeaconcount;
 881         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
 882                             priv->txbeaconring, priv->txbeaconringdma);
 883         buffer_free(dev, &(priv->txbeaconbufs), priv->txbuffsize, 1);
 884 }
 885
 886 void free_rx_desc_ring(struct net_device *dev)
 887 {
 888         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 889         struct pci_dev *pdev = priv->pdev;
 890         int count = priv->rxringcount;
 891
 892         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
 893                             priv->rxring, priv->rxringdma);
 894
 895         buffer_free(dev, &(priv->rxbuffer), priv->rxbuffersize, 0);
 896 }
 897
 898 short alloc_rx_desc_ring(struct net_device *dev, u16 bufsize, int count)
 899 {
 900         int i;
 901         u32 *desc;
 902         u32 *tmp;
 903         dma_addr_t dma_desc, dma_tmp;
 904         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 905         struct pci_dev *pdev = priv->pdev;
 906         void *buf;
 907         u8 rx_desc_size;
 908
 909         rx_desc_size = 8; /* 4*8 = 32 bytes */
 910
 911         if ((bufsize & 0xfff) != bufsize) {
 912                 DMESGE("RX buffer allocation too large");
 913                 return -1;
 914         }
 915
 916         desc = (u32 *)pci_alloc_consistent(pdev, sizeof(u32)*rx_desc_size*count+256,
 917                                           &dma_desc);
 918
 919         if (dma_desc & 0xff)
 920                 /*
 921                  * descriptor's buffer must be 256 byte aligned
 922                  * should never happen since we specify the DMA mask
 923                  */
 924                 WARN(1, "DMA buffer is not aligned\n");
 925
 926         priv->rxring = desc;
 927         priv->rxringdma = dma_desc;
 928         tmp = desc;
 929
 930         for (i = 0; i < count; i++) {
 931                 buf = kmalloc(bufsize * sizeof(u8), GFP_ATOMIC);
 932                 if (buf == NULL) {
 933                         DMESGE("Failed to kmalloc RX buffer");
 934                         return -1;
 935                 }
 936
 937                 dma_tmp = pci_map_single(pdev, buf, bufsize * sizeof(u8),
 938                                          PCI_DMA_FROMDEVICE);
 939
 940                 if (-1 == buffer_add(&(priv->rxbuffer), buf, dma_tmp,
 941                            &(priv->rxbufferhead))) {
 942                         DMESGE("Unable to allocate mem RX buf");
 943                         return -1;
 944                 }
 945                 *tmp = 0; /* zero pads the header of the descriptor */
 946                 *tmp = *tmp | (bufsize&0xfff);
 947                 *(tmp+2) = (u32)dma_tmp;
 948                 *tmp = *tmp | (1<<31); /* descriptor void, owned by the NIC */
 949
 950                 tmp = tmp+rx_desc_size;
 951         }
 952
 953         *(tmp-rx_desc_size) = *(tmp-rx_desc_size) | (1<<30); /* this is the last descriptor */
 954
 955         return 0;
 956 }
 957
 958
 959 void set_nic_rxring(struct net_device *dev)
 960 {
 961         u8 pgreg;
 962         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 963
 964         pgreg = read_nic_byte(dev, PGSELECT);
 965         write_nic_byte(dev, PGSELECT, pgreg & ~(1<<PGSELECT_PG_SHIFT));
 966
 967         write_nic_dword(dev, RXRING_ADDR, priv->rxringdma);
 968 }
 969
 970 void rtl8180_reset(struct net_device *dev)
 971 {
 972         u8 cr;
 973
 974         rtl8180_irq_disable(dev);
 975
 976         cr = read_nic_byte(dev, CMD);
 977         cr = cr & 2;
 978         cr = cr | (1<<CMD_RST_SHIFT);
 979         write_nic_byte(dev, CMD, cr);
 980
 981         force_pci_posting(dev);
 982
 983         mdelay(200);
 984
 985         if (read_nic_byte(dev, CMD) & (1<<CMD_RST_SHIFT))
 986                 DMESGW("Card reset timeout!");
 987         else
 988                 DMESG("Card successfully reset");
 989
 990         rtl8180_set_mode(dev, EPROM_CMD_LOAD);
 991         force_pci_posting(dev);
 992         mdelay(200);
 993 }
 994
 995 inline u16 ieeerate2rtlrate(int rate)
 996 {
 997         switch (rate) {
 998         case 10:
 999                 return 0;
1000         case 20:
1001                 return 1;
1002         case 55:
1003                 return 2;
1004         case 110:
1005                 return 3;
1006         case 60:
1007                 return 4;
1008         case 90:
1009                 return 5;
1010         case 120:
1011                 return 6;
1012         case 180:
1013                 return 7;
1014         case 240:
1015                 return 8;
1016         case 360:
1017                 return 9;
1018         case 480:
1019                 return 10;
1020         case 540:
1021                 return 11;
1022         default:
1023                 return 3;
1024         }
1025 }
1026
1027 static u16 rtl_rate[] = {10, 20, 55, 110, 60, 90, 120, 180, 240, 360, 480, 540, 720};
1028
1029 inline u16 rtl8180_rate2rate(short rate)
1030 {
1031         if (rate > 12)
1032                 return 10;
1033         return rtl_rate[rate];
1034 }
1035
1036 inline u8 rtl8180_IsWirelessBMode(u16 rate)
1037 {
1038         if (((rate <= 110) && (rate != 60) && (rate != 90)) || (rate == 220))
1039                 return 1;
1040         else
1041                 return 0;
1042 }
1043
1044 u16 N_DBPSOfRate(u16 DataRate);
1045
1046 u16 ComputeTxTime(u16 FrameLength, u16 DataRate, u8 bManagementFrame,
1047                   u8 bShortPreamble)
1048 {
1049         u16     FrameTime;
1050         u16     N_DBPS;
1051         u16     Ceiling;
1052
1053         if (rtl8180_IsWirelessBMode(DataRate)) {
1054                 if (bManagementFrame || !bShortPreamble || DataRate == 10)
1055                         /* long preamble */
1056                         FrameTime = (u16)(144+48+(FrameLength*8/(DataRate/10)));
1057                 else
1058                         /* short preamble */
1059                         FrameTime = (u16)(72+24+(FrameLength*8/(DataRate/10)));
1060
1061                 if ((FrameLength*8 % (DataRate/10)) != 0) /* get the ceilling */
1062                         FrameTime++;
1063         } else {        /* 802.11g DSSS-OFDM PLCP length field calculation. */
1064                 N_DBPS = N_DBPSOfRate(DataRate);
1065                 Ceiling = (16 + 8*FrameLength + 6) / N_DBPS
1066                                 + (((16 + 8*FrameLength + 6) % N_DBPS) ? 1 : 0);
1067                 FrameTime = (u16)(16 + 4 + 4*Ceiling + 6);
1068         }
1069         return FrameTime;
1070 }
1071
1072 u16 N_DBPSOfRate(u16 DataRate)
1073 {
1074          u16 N_DBPS = 24;
1075
1076         switch (DataRate) {
1077         case 60:
1078                 N_DBPS = 24;
1079                 break;
1080         case 90:
1081                 N_DBPS = 36;
1082                 break;
1083         case 120:
1084                 N_DBPS = 48;
1085                 break;
1086         case 180:
1087                 N_DBPS = 72;
1088                 break;
1089         case 240:
1090                 N_DBPS = 96;
1091                 break;
1092         case 360:
1093                 N_DBPS = 144;
1094                 break;
1095         case 480:
1096                 N_DBPS = 192;
1097                 break;
1098         case 540:
1099                 N_DBPS = 216;
1100                 break;
1101         default:
1102                 break;
1103         }
1104
1105         return N_DBPS;
1106 }
1107
1108 /*
1109  * For Netgear case, they want good-looking signal strength.
1110  */
1111 long NetgearSignalStrengthTranslate(long LastSS, long CurrSS)
1112 {
1113         long RetSS;
1114
1115         /* Step 1. Scale mapping. */
1116         if (CurrSS >= 71 && CurrSS <= 100)
1117                 RetSS = 90 + ((CurrSS - 70) / 3);
1118         else if (CurrSS >= 41 && CurrSS <= 70)
1119                 RetSS = 78 + ((CurrSS - 40) / 3);
1120         else if (CurrSS >= 31 && CurrSS <= 40)
1121                 RetSS = 66 + (CurrSS - 30);
1122         else if (CurrSS >= 21 && CurrSS <= 30)
1123                 RetSS = 54 + (CurrSS - 20);
1124         else if (CurrSS >= 5 && CurrSS <= 20)
1125                 RetSS = 42 + (((CurrSS - 5) * 2) / 3);
1126         else if (CurrSS == 4)
1127                 RetSS = 36;
1128         else if (CurrSS == 3)
1129                 RetSS = 27;
1130         else if (CurrSS == 2)
1131                 RetSS = 18;
1132         else if (CurrSS == 1)
1133                 RetSS = 9;
1134         else
1135                 RetSS = CurrSS;
1136
1137         /* Step 2. Smoothing. */
1138         if (LastSS > 0)
1139                 RetSS = ((LastSS * 5) + (RetSS) + 5) / 6;
1140
1141         return RetSS;
1142 }
1143
1144 /*
1145  * Translate 0-100 signal strength index into dBm.
1146  */
1147 long TranslateToDbm8185(u8 SignalStrengthIndex)
1148 {
1149         long SignalPower;
1150
1151         /* Translate to dBm (x=0.5y-95). */
1152         SignalPower = (long)((SignalStrengthIndex + 1) >> 1);
1153         SignalPower -= 95;
1154
1155         return SignalPower;
1156 }
1157
1158 /*
1159  * Perform signal smoothing for dynamic mechanism.
1160  * This is different with PerformSignalSmoothing8185 in smoothing formula.
1161  * No dramatic adjustion is apply because dynamic mechanism need some degree
1162  * of correctness. Ported from 8187B.
1163  */
1164 void PerformUndecoratedSignalSmoothing8185(struct r8180_priv *priv,
1165                                            bool bCckRate)
1166 {
1167         /* Determin the current packet is CCK rate. */
1168         priv->bCurCCKPkt = bCckRate;
1169
1170         if (priv->UndecoratedSmoothedSS >= 0)
1171                 priv->UndecoratedSmoothedSS = ((priv->UndecoratedSmoothedSS * 5) +
1172                                                (priv->SignalStrength * 10)) / 6;
1173         else
1174                 priv->UndecoratedSmoothedSS = priv->SignalStrength * 10;
1175
1176         priv->UndercorateSmoothedRxPower = ((priv->UndercorateSmoothedRxPower * 50) +
1177                                             (priv->RxPower * 11)) / 60;
1178
1179         if (bCckRate)
1180                 priv->CurCCKRSSI = priv->RSSI;
1181         else
1182                 priv->CurCCKRSSI = 0;
1183 }
1184
1185
1186 /*
1187  * This is rough RX isr handling routine
1188  */
1189 void rtl8180_rx(struct net_device *dev)
1190 {
1191         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1192         struct sk_buff *tmp_skb;
1193         short first, last;
1194         u32 len;
1195         int lastlen;
1196         unsigned char quality, signal;
1197         u8 rate;
1198         u32 *tmp, *tmp2;
1199         u8 rx_desc_size;
1200         u8 padding;
1201         char rxpower = 0;
1202         u32 RXAGC = 0;
1203         long RxAGC_dBm = 0;
1204         u8      LNA = 0, BB = 0;
1205         u8      LNA_gain[4] = {02, 17, 29, 39};
1206         u8  Antenna = 0;
1207         struct ieee80211_hdr_4addr *hdr;
1208         u16 fc, type;
1209         u8 bHwError = 0, bCRC = 0, bICV = 0;
1210         bool    bCckRate = false;
1211         u8     RSSI = 0;
1212         long    SignalStrengthIndex = 0;
1213         struct ieee80211_rx_stats stats = {
1214                 .signal = 0,
1215                 .noise = -98,
1216                 .rate = 0,
1217                 .freq = IEEE80211_24GHZ_BAND,
1218         };
1219
1220         stats.nic_type = NIC_8185B;
1221         rx_desc_size = 8;
1222
1223         if ((*(priv->rxringtail)) & (1<<31)) {
1224                 /* we have got an RX int, but the descriptor
1225                  * we are pointing is empty */
1226
1227                 priv->stats.rxnodata++;
1228                 priv->ieee80211->stats.rx_errors++;
1229
1230                 tmp2 = NULL;
1231                 tmp = priv->rxringtail;
1232                 do {
1233                         if (tmp == priv->rxring)
1234                                 tmp  = priv->rxring + (priv->rxringcount - 1)*rx_desc_size;
1235                         else
1236                                 tmp -= rx_desc_size;
1237
1238                         if (!(*tmp & (1<<31)))
1239                                 tmp2 = tmp;
1240                 } while (tmp != priv->rxring);
1241
1242                 if (tmp2)
1243                         priv->rxringtail = tmp2;
1244         }
1245
1246         /* while there are filled descriptors */
1247         while (!(*(priv->rxringtail) & (1<<31))) {
1248                 if (*(priv->rxringtail) & (1<<26))
1249                         DMESGW("RX buffer overflow");
1250                 if (*(priv->rxringtail) & (1<<12))
1251                         priv->stats.rxicverr++;
1252
1253                 if (*(priv->rxringtail) & (1<<27)) {
1254                         priv->stats.rxdmafail++;
1255                         /* DMESG("EE: RX DMA FAILED at buffer pointed by descriptor %x",(u32)priv->rxringtail); */
1256                         goto drop;
1257                 }
1258
1259                 pci_dma_sync_single_for_cpu(priv->pdev,
1260                                     priv->rxbuffer->dma,
1261                                     priv->rxbuffersize * \
1262                                     sizeof(u8),
1263                                     PCI_DMA_FROMDEVICE);
1264
1265                 first = *(priv->rxringtail) & (1<<29) ? 1 : 0;
1266                 if (first)
1267                         priv->rx_prevlen = 0;
1268
1269                 last = *(priv->rxringtail) & (1<<28) ? 1 : 0;
1270                 if (last) {
1271                         lastlen = ((*priv->rxringtail) & 0xfff);
1272
1273                         /* if the last descriptor (that should
1274                          * tell us the total packet len) tell
1275                          * us something less than the descriptors
1276                          * len we had until now, then there is some
1277                          * problem..
1278                          * workaround to prevent kernel panic
1279                          */
1280                         if (lastlen < priv->rx_prevlen)
1281                                 len = 0;
1282                         else
1283                                 len = lastlen-priv->rx_prevlen;
1284
1285                         if (*(priv->rxringtail) & (1<<13)) {
1286                                 if ((*(priv->rxringtail) & 0xfff) < 500)
1287                                         priv->stats.rxcrcerrmin++;
1288                                 else if ((*(priv->rxringtail) & 0x0fff) > 1000)
1289                                         priv->stats.rxcrcerrmax++;
1290                                 else
1291                                         priv->stats.rxcrcerrmid++;
1292
1293                         }
1294
1295                 } else {
1296                         len = priv->rxbuffersize;
1297                 }
1298
1299                 if (first && last) {
1300                         padding = ((*(priv->rxringtail+3))&(0x04000000))>>26;
1301                 } else if (first) {
1302                         padding = ((*(priv->rxringtail+3))&(0x04000000))>>26;
1303                         if (padding)
1304                                 len -= 2;
1305                 } else {
1306                         padding = 0;
1307                 }
1308                 padding = 0;
1309                 priv->rx_prevlen += len;
1310
1311                 if (priv->rx_prevlen > MAX_FRAG_THRESHOLD + 100) {
1312                         /* HW is probably passing several buggy frames
1313                         * without FD or LD flag set.
1314                         * Throw this garbage away to prevent skb
1315                         * memory exhausting
1316                         */
1317                         if (!priv->rx_skb_complete)
1318                                 dev_kfree_skb_any(priv->rx_skb);
1319                         priv->rx_skb_complete = 1;
1320                 }
1321
1322                 signal = (unsigned char)(((*(priv->rxringtail+3)) & (0x00ff0000))>>16);
1323                 signal = (signal & 0xfe) >> 1;
1324
1325                 quality = (unsigned char)((*(priv->rxringtail+3)) & (0xff));
1326
1327                 stats.mac_time[0] = *(priv->rxringtail+1);
1328                 stats.mac_time[1] = *(priv->rxringtail+2);
1329                 rxpower = ((char)(((*(priv->rxringtail+4)) & (0x00ff0000))>>16))/2 - 42;
1330                 RSSI = ((u8)(((*(priv->rxringtail+3)) & (0x0000ff00))>>8)) & (0x7f);
1331
1332                 rate = ((*(priv->rxringtail)) &
1333                         ((1<<23)|(1<<22)|(1<<21)|(1<<20)))>>20;
1334
1335                 stats.rate = rtl8180_rate2rate(rate);
1336                 Antenna = (((*(priv->rxringtail+3)) & (0x00008000)) == 0) ? 0 : 1;
1337                 if (!rtl8180_IsWirelessBMode(stats.rate)) { /* OFDM rate. */
1338                         RxAGC_dBm = rxpower+1;  /* bias */
1339                 } else { /* CCK rate. */
1340                         RxAGC_dBm = signal; /* bit 0 discard */
1341
1342                         LNA = (u8) (RxAGC_dBm & 0x60) >> 5; /* bit 6~ bit 5 */
1343                         BB  = (u8) (RxAGC_dBm & 0x1F); /* bit 4 ~ bit 0 */
1344
1345                         RxAGC_dBm = -(LNA_gain[LNA] + (BB*2)); /* Pin_11b=-(LNA_gain+BB_gain) (dBm) */
1346
1347                         RxAGC_dBm += 4; /* bias */
1348                 }
1349
1350                 if (RxAGC_dBm & 0x80) /* absolute value */
1351                         RXAGC = ~(RxAGC_dBm)+1;
1352                 bCckRate = rtl8180_IsWirelessBMode(stats.rate);
1353                 /* Translate RXAGC into 1-100. */
1354                 if (!rtl8180_IsWirelessBMode(stats.rate)) { /* OFDM rate. */
1355                         if (RXAGC > 90)
1356                                 RXAGC = 90;
1357                         else if (RXAGC < 25)
1358                                 RXAGC = 25;
1359                         RXAGC = (90-RXAGC)*100/65;
1360                 } else { /* CCK rate. */
1361                         if (RXAGC > 95)
1362                                 RXAGC = 95;
1363                         else if (RXAGC < 30)
1364                                 RXAGC = 30;
1365                         RXAGC = (95-RXAGC)*100/65;
1366                 }
1367                 priv->SignalStrength = (u8)RXAGC;
1368                 priv->RecvSignalPower = RxAGC_dBm;
1369                 priv->RxPower = rxpower;
1370                 priv->RSSI = RSSI;
1371                 /* SQ translation formula is provided by SD3 DZ. 2006.06.27 */
1372                 if (quality >= 127)
1373                         quality = 1; /*0; */ /* 0 will cause epc to show signal zero , walk around now; */
1374                 else if (quality < 27)
1375                         quality = 100;
1376                 else
1377                         quality = 127 - quality;
1378                 priv->SignalQuality = quality;
1379
1380                 stats.signal = (u8)quality; /*priv->wstats.qual.level = priv->SignalStrength; */
1381                 stats.signalstrength = RXAGC;
1382                 if (stats.signalstrength > 100)
1383                         stats.signalstrength = 100;
1384                 stats.signalstrength = (stats.signalstrength * 70)/100 + 30;
1385                 /* printk("==========================>rx : RXAGC is %d,signalstrength is %d\n",RXAGC,stats.signalstrength); */
1386                 stats.rssi = priv->wstats.qual.qual = priv->SignalQuality;
1387                 stats.noise = priv->wstats.qual.noise = 100 - priv->wstats.qual.qual;
1388                 bHwError = (((*(priv->rxringtail)) & (0x00000fff)) == 4080) |
1389                            (((*(priv->rxringtail)) & (0x04000000)) != 0) |
1390                            (((*(priv->rxringtail)) & (0x08000000)) != 0) |
1391                            (((~(*(priv->rxringtail))) & (0x10000000)) != 0) |
1392                            (((~(*(priv->rxringtail))) & (0x20000000)) != 0);
1393                 bCRC = ((*(priv->rxringtail)) & (0x00002000)) >> 13;
1394                 bICV = ((*(priv->rxringtail)) & (0x00001000)) >> 12;
1395                 hdr = (struct ieee80211_hdr_4addr *)priv->rxbuffer->buf;
1396                     fc = le16_to_cpu(hdr->frame_ctl);
1397                 type = WLAN_FC_GET_TYPE(fc);
1398
1399                 if (IEEE80211_FTYPE_CTL != type &&
1400                     !bHwError && !bCRC && !bICV &&
1401                     eqMacAddr(priv->ieee80211->current_network.bssid,
1402                         fc & IEEE80211_FCTL_TODS ? hdr->addr1 :
1403                         fc & IEEE80211_FCTL_FROMDS ? hdr->addr2 :
1404                         hdr->addr3)) {
1405
1406                         /* Perform signal smoothing for dynamic
1407                          * mechanism on demand. This is different
1408                          * with PerformSignalSmoothing8185 in smoothing
1409                          * fomula. No dramatic adjustion is apply
1410                          * because dynamic mechanism need some degree
1411                          * of correctness. */
1412                         PerformUndecoratedSignalSmoothing8185(priv, bCckRate);
1413
1414                         /* For good-looking singal strength. */
1415                         SignalStrengthIndex = NetgearSignalStrengthTranslate(
1416                                                         priv->LastSignalStrengthInPercent,
1417                                                         priv->SignalStrength);
1418
1419                         priv->LastSignalStrengthInPercent = SignalStrengthIndex;
1420                         priv->Stats_SignalStrength = TranslateToDbm8185((u8)SignalStrengthIndex);
1421                 /*
1422                  * We need more correct power of received packets and the  "SignalStrength" of RxStats is beautified,
1423                  * so we record the correct power here.
1424                  */
1425                         priv->Stats_SignalQuality = (long)(priv->Stats_SignalQuality * 5 + (long)priv->SignalQuality + 5) / 6;
1426                         priv->Stats_RecvSignalPower = (long)(priv->Stats_RecvSignalPower * 5 + priv->RecvSignalPower - 1) / 6;
1427
1428                 /* Figure out which antenna that received the last packet. */
1429                         priv->LastRxPktAntenna = Antenna ? 1 : 0; /* 0: aux, 1: main. */
1430                         SwAntennaDiversityRxOk8185(dev, priv->SignalStrength);
1431                 }
1432
1433                 if (first) {
1434                         if (!priv->rx_skb_complete) {
1435                                 /* seems that HW sometimes fails to receive and
1436                                    doesn't provide the last descriptor */
1437                                 dev_kfree_skb_any(priv->rx_skb);
1438                                 priv->stats.rxnolast++;
1439                         }
1440                         priv->rx_skb = dev_alloc_skb(len+2);
1441                         if (!priv->rx_skb)
1442                                 goto drop;
1443
1444                         priv->rx_skb_complete = 0;
1445                         priv->rx_skb->dev = dev;
1446                 } else {
1447                         /* if we are here we should have already RXed
1448                         * the first frame.
1449                         * If we get here and the skb is not allocated then
1450                         * we have just throw out garbage (skb not allocated)
1451                         * and we are still rxing garbage....
1452                         */
1453                         if (!priv->rx_skb_complete) {
1454
1455                                 tmp_skb = dev_alloc_skb(priv->rx_skb->len+len+2);
1456
1457                                 if (!tmp_skb)
1458                                         goto drop;
1459
1460                                 tmp_skb->dev = dev;
1461
1462                                 memcpy(skb_put(tmp_skb, priv->rx_skb->len),
1463                                         priv->rx_skb->data,
1464                                         priv->rx_skb->len);
1465
1466                                 dev_kfree_skb_any(priv->rx_skb);
1467
1468                                 priv->rx_skb = tmp_skb;
1469                         }
1470                 }
1471
1472                 if (!priv->rx_skb_complete) {
1473                         if (padding) {
1474                                 memcpy(skb_put(priv->rx_skb, len),
1475                                         (((unsigned char *)priv->rxbuffer->buf) + 2), len);
1476                         } else {
1477                                 memcpy(skb_put(priv->rx_skb, len),
1478                                         priv->rxbuffer->buf, len);
1479                         }
1480                 }
1481
1482                 if (last && !priv->rx_skb_complete) {
1483                         if (priv->rx_skb->len > 4)
1484                                 skb_trim(priv->rx_skb, priv->rx_skb->len-4);
1485                         if (!ieee80211_rtl_rx(priv->ieee80211,
1486                                          priv->rx_skb, &stats))
1487                                 dev_kfree_skb_any(priv->rx_skb);
1488                         priv->rx_skb_complete = 1;
1489                 }
1490
1491                 pci_dma_sync_single_for_device(priv->pdev,
1492                                     priv->rxbuffer->dma,
1493                                     priv->rxbuffersize * \
1494                                     sizeof(u8),
1495                                     PCI_DMA_FROMDEVICE);
1496
1497 drop: /* this is used when we have not enough mem */
1498                 /* restore the descriptor */
1499                 *(priv->rxringtail+2) = priv->rxbuffer->dma;
1500                 *(priv->rxringtail) = *(priv->rxringtail) & ~0xfff;
1501                 *(priv->rxringtail) =
1502                         *(priv->rxringtail) | priv->rxbuffersize;
1503
1504                 *(priv->rxringtail) =
1505                         *(priv->rxringtail) | (1<<31);
1506
1507                 priv->rxringtail += rx_desc_size;
1508                 if (priv->rxringtail >=
1509                    (priv->rxring)+(priv->rxringcount)*rx_desc_size)
1510                         priv->rxringtail = priv->rxring;
1511
1512                 priv->rxbuffer = (priv->rxbuffer->next);
1513         }
1514 }
1515
1516
1517 void rtl8180_dma_kick(struct net_device *dev, int priority)
1518 {
1519         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1520
1521         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
1522         write_nic_byte(dev, TX_DMA_POLLING,
1523                         (1 << (priority + 1)) | priv->dma_poll_mask);
1524         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
1525
1526         force_pci_posting(dev);
1527 }
1528
1529 void rtl8180_data_hard_stop(struct net_device *dev)
1530 {
1531         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1532
1533         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
1534         priv->dma_poll_stop_mask |= TPPOLLSTOP_AC_VIQ;
1535         write_nic_byte(dev, TPPollStop, priv->dma_poll_stop_mask);
1536         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
1537 }
1538
1539 void rtl8180_data_hard_resume(struct net_device *dev)
1540 {
1541         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1542
1543         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
1544         priv->dma_poll_stop_mask &= ~(TPPOLLSTOP_AC_VIQ);
1545         write_nic_byte(dev, TPPollStop, priv->dma_poll_stop_mask);
1546         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
1547 }
1548
1549 /*
1550  * This function TX data frames when the ieee80211 stack requires this.
1551  * It checks also if we need to stop the ieee tx queue, eventually do it
1552  */
1553 void rtl8180_hard_data_xmit(struct sk_buff *skb, struct net_device *dev, int
1554 rate) {
1555         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1556         int mode;
1557         struct ieee80211_hdr_3addr *h = (struct ieee80211_hdr_3addr *) skb->data;
1558         short morefrag = (h->frame_control) & IEEE80211_FCTL_MOREFRAGS;
1559         unsigned long flags;
1560         int priority;
1561
1562         mode = priv->ieee80211->iw_mode;
1563
1564         rate = ieeerate2rtlrate(rate);
1565         /*
1566          * This function doesn't require lock because we make
1567          * sure it's called with the tx_lock already acquired.
1568          * this come from the kernel's hard_xmit callback (through
1569          * the ieee stack, or from the try_wake_queue (again through
1570          * the ieee stack.
1571          */
1572         priority = AC2Q(skb->priority);
1573         spin_lock_irqsave(&priv->tx_lock, flags);
1574
1575         if (priv->ieee80211->bHwRadioOff) {
1576                 spin_unlock_irqrestore(&priv->tx_lock, flags);
1577
1578                 return;
1579         }
1580
1581         if (!check_nic_enought_desc(dev, priority)) {
1582                 DMESGW("Error: no descriptor left by previous TX (avail %d) ",
1583                         get_curr_tx_free_desc(dev, priority));
1584                 ieee80211_rtl_stop_queue(priv->ieee80211);
1585         }
1586         rtl8180_tx(dev, skb->data, skb->len, priority, morefrag, 0, rate);
1587         if (!check_nic_enought_desc(dev, priority))
1588                 ieee80211_rtl_stop_queue(priv->ieee80211);
1589
1590         spin_unlock_irqrestore(&priv->tx_lock, flags);
1591 }
1592
1593 /*
1594  * This is a rough attempt to TX a frame
1595  * This is called by the ieee 80211 stack to TX management frames.
1596  * If the ring is full packets are dropped (for data frame the queue
1597  * is stopped before this can happen). For this reason it is better
1598  * if the descriptors are larger than the largest management frame
1599  * we intend to TX: i'm unsure what the HW does if it will not find
1600  * the last fragment of a frame because it has been dropped...
1601  * Since queues for Management and Data frames are different we
1602  * might use a different lock than tx_lock (for example mgmt_tx_lock)
1603  */
1604 /* these function may loop if invoked with 0 descriptors or 0 len buffer */
1605 int rtl8180_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
1606 {
1607         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1608         unsigned long flags;
1609         int priority;
1610
1611         priority = MANAGE_PRIORITY;
1612
1613         spin_lock_irqsave(&priv->tx_lock, flags);
1614
1615         if (priv->ieee80211->bHwRadioOff) {
1616                 spin_unlock_irqrestore(&priv->tx_lock, flags);
1617                 dev_kfree_skb_any(skb);
1618                 return NETDEV_TX_OK;
1619         }
1620
1621         rtl8180_tx(dev, skb->data, skb->len, priority,
1622                 0, 0, ieeerate2rtlrate(priv->ieee80211->basic_rate));
1623
1624         priv->ieee80211->stats.tx_bytes += skb->len;
1625         priv->ieee80211->stats.tx_packets++;
1626         spin_unlock_irqrestore(&priv->tx_lock, flags);
1627
1628         dev_kfree_skb_any(skb);
1629         return NETDEV_TX_OK;
1630 }
1631
1632 /* longpre 144+48 shortpre 72+24 */
1633 u16 rtl8180_len2duration(u32 len, short rate, short *ext)
1634 {
1635         u16 duration;
1636         u16 drift;
1637         *ext = 0;
1638
1639         switch (rate) {
1640         case 0: /* 1mbps */
1641                 *ext = 0;
1642                 duration = ((len+4)<<4) / 0x2;
1643                 drift = ((len+4)<<4) % 0x2;
1644                 if (drift == 0)
1645                         break;
1646                 duration++;
1647                 break;
1648         case 1: /* 2mbps */
1649                 *ext = 0;
1650                 duration = ((len+4)<<4) / 0x4;
1651                 drift = ((len+4)<<4) % 0x4;
1652                 if (drift == 0)
1653                         break;
1654                 duration++;
1655                 break;
1656         case 2: /* 5.5mbps */
1657                 *ext = 0;
1658                 duration = ((len+4)<<4) / 0xb;
1659                 drift = ((len+4)<<4) % 0xb;
1660                 if (drift == 0)
1661                         break;
1662                 duration++;
1663                 break;
1664         default:
1665         case 3: /* 11mbps */
1666                 *ext = 0;
1667                 duration = ((len+4)<<4) / 0x16;
1668                 drift = ((len+4)<<4) % 0x16;
1669                 if (drift == 0)
1670                         break;
1671                 duration++;
1672                 if (drift > 6)
1673                         break;
1674                 *ext = 1;
1675                 break;
1676         }
1677
1678         return duration;
1679 }
1680
1681 void rtl8180_prepare_beacon(struct net_device *dev)
1682 {
1683         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1684         struct sk_buff *skb;
1685
1686         u16 word  = read_nic_word(dev, BcnItv);
1687         word &= ~BcnItv_BcnItv; /* clear Bcn_Itv */
1688         word |= cpu_to_le16(priv->ieee80211->current_network.beacon_interval); /* 0x64; */
1689         write_nic_word(dev, BcnItv, word);
1690
1691         skb = ieee80211_get_beacon(priv->ieee80211);
1692         if (skb) {
1693                 rtl8180_tx(dev, skb->data, skb->len, BEACON_PRIORITY,
1694                         0, 0, ieeerate2rtlrate(priv->ieee80211->basic_rate));
1695                 dev_kfree_skb_any(skb);
1696         }
1697 }
1698
1699 /*
1700  * This function do the real dirty work: it enqueues a TX command
1701  * descriptor in the ring buffer, copyes the frame in a TX buffer
1702  * and kicks the NIC to ensure it does the DMA transfer.
1703  */
1704 short rtl8180_tx(struct net_device *dev, u8* txbuf, int len, int priority,
1705                  short morefrag, short descfrag, int rate)
1706 {
1707         struct r8180_priv *priv = ieee80211_priv(dev);
1708         u32 *tail, *temp_tail;
1709         u32 *begin;
1710         u32 *buf;
1711         int i;
1712         int remain;
1713         int buflen;
1714         int count;
1715         struct buffer *buflist;
1716         struct ieee80211_hdr_3addr *frag_hdr = (struct ieee80211_hdr_3addr *)txbuf;
1717         u8 dest[ETH_ALEN];
1718         u8                      bUseShortPreamble = 0;
1719         u8                      bCTSEnable = 0;
1720         u8                      bRTSEnable = 0;
1721         u16                     Duration = 0;
1722         u16                     RtsDur = 0;
1723         u16                     ThisFrameTime = 0;
1724         u16                     TxDescDuration = 0;
1725         u8                      ownbit_flag = false;
1726
1727         switch (priority) {
1728         case MANAGE_PRIORITY:
1729                 tail = priv->txmapringtail;
1730                 begin = priv->txmapring;
1731                 buflist = priv->txmapbufstail;
1732                 count = priv->txringcount;
1733                 break;
1734         case BK_PRIORITY:
1735                 tail = priv->txbkpringtail;
1736                 begin = priv->txbkpring;
1737                 buflist = priv->txbkpbufstail;
1738                 count = priv->txringcount;
1739                 break;
1740         case BE_PRIORITY:
1741                 tail = priv->txbepringtail;
1742                 begin = priv->txbepring;
1743                 buflist = priv->txbepbufstail;
1744                 count = priv->txringcount;
1745                 break;
1746         case VI_PRIORITY:
1747                 tail = priv->txvipringtail;
1748                 begin = priv->txvipring;
1749                 buflist = priv->txvipbufstail;
1750                 count = priv->txringcount;
1751                 break;
1752         case VO_PRIORITY:
1753                 tail = priv->txvopringtail;
1754                 begin = priv->txvopring;
1755                 buflist = priv->txvopbufstail;
1756                 count = priv->txringcount;
1757                 break;
1758         case HI_PRIORITY:
1759                 tail = priv->txhpringtail;
1760                 begin = priv->txhpring;
1761                 buflist = priv->txhpbufstail;
1762                 count = priv->txringcount;
1763                 break;
1764         case BEACON_PRIORITY:
1765                 tail = priv->txbeaconringtail;
1766                 begin = priv->txbeaconring;
1767                 buflist = priv->txbeaconbufstail;
1768                 count = priv->txbeaconcount;
1769                 break;
1770         default:
1771                 return -1;
1772                 break;
1773         }
1774
1775                 memcpy(&dest, frag_hdr->addr1, ETH_ALEN);
1776                 if (is_multicast_ether_addr(dest)) {
1777                         Duration = 0;
1778                         RtsDur = 0;
1779                         bRTSEnable = 0;
1780                         bCTSEnable = 0;
1781
1782                         ThisFrameTime = ComputeTxTime(len + sCrcLng, rtl8180_rate2rate(rate),
1783                                                       0, bUseShortPreamble);
1784                         TxDescDuration = ThisFrameTime;
1785                 } else { /* Unicast packet */
1786                         u16 AckTime;
1787
1788                         /* YJ,add,080828,for Keep alive */
1789                         priv->NumTxUnicast++;
1790
1791                         /* Figure out ACK rate according to BSS basic rate
1792                          * and Tx rate. */
1793                         AckTime = ComputeTxTime(14, 10, 0, 0);  /* AckCTSLng = 14 use 1M bps send */
1794
1795                         if (((len + sCrcLng) > priv->rts) && priv->rts) { /* RTS/CTS. */
1796                                 u16 RtsTime, CtsTime;
1797                                 /* u16 CtsRate; */
1798                                 bRTSEnable = 1;
1799                                 bCTSEnable = 0;
1800
1801                                 /* Rate and time required for RTS. */
1802                                 RtsTime = ComputeTxTime(sAckCtsLng/8, priv->ieee80211->basic_rate, 0, 0);
1803                                 /* Rate and time required for CTS. */
1804                                 CtsTime = ComputeTxTime(14, 10, 0, 0);  /* AckCTSLng = 14 use 1M bps send */
1805
1806                                 /* Figure out time required to transmit this frame. */
1807                                 ThisFrameTime = ComputeTxTime(len + sCrcLng,
1808                                                 rtl8180_rate2rate(rate),
1809                                                 0,
1810                                                 bUseShortPreamble);
1811
1812                                 /* RTS-CTS-ThisFrame-ACK. */
1813                                 RtsDur = CtsTime + ThisFrameTime + AckTime + 3*aSifsTime;
1814
1815                                 TxDescDuration = RtsTime + RtsDur;
1816                         } else { /* Normal case. */
1817                                 bCTSEnable = 0;
1818                                 bRTSEnable = 0;
1819                                 RtsDur = 0;
1820
1821                                 ThisFrameTime = ComputeTxTime(len + sCrcLng, rtl8180_rate2rate(rate),
1822                                                               0, bUseShortPreamble);
1823                                 TxDescDuration = ThisFrameTime + aSifsTime + AckTime;
1824                         }
1825
1826                         if (!(frag_hdr->frame_control & IEEE80211_FCTL_MOREFRAGS)) {
1827                                 /* ThisFrame-ACK. */
1828                                 Duration = aSifsTime + AckTime;
1829                         } else { /* One or more fragments remained. */
1830                                 u16 NextFragTime;
1831                                 NextFragTime = ComputeTxTime(len + sCrcLng, /* pretend following packet length equal current packet */
1832                                                 rtl8180_rate2rate(rate),
1833                                                 0,
1834                                                 bUseShortPreamble);
1835
1836                                 /* ThisFrag-ACk-NextFrag-ACK. */
1837                                 Duration = NextFragTime + 3*aSifsTime + 2*AckTime;
1838                         }
1839
1840                 } /* End of Unicast packet */
1841
1842                 frag_hdr->duration_id = Duration;
1843
1844         buflen = priv->txbuffsize;
1845         remain = len;
1846         temp_tail = tail;
1847
1848         while (remain != 0) {
1849                 mb();
1850                 if (!buflist) {
1851                         DMESGE("TX buffer error, cannot TX frames. pri %d.", priority);
1852                         return -1;
1853                 }
1854                 buf = buflist->buf;
1855
1856                 if ((*tail & (1 << 31)) && (priority != BEACON_PRIORITY)) {
1857                         DMESGW("No more TX desc, returning %x of %x",
1858                                remain, len);
1859                         priv->stats.txrdu++;
1860                         return remain;
1861                 }
1862
1863                 *tail = 0; /* zeroes header */
1864                 *(tail+1) = 0;
1865                 *(tail+3) = 0;
1866                 *(tail+5) = 0;
1867                 *(tail+6) = 0;
1868                 *(tail+7) = 0;
1869
1870                 /* FIXME: this should be triggered by HW encryption parameters.*/
1871                 *tail |= (1<<15); /* no encrypt */
1872
1873                 if (remain == len && !descfrag) {
1874                         ownbit_flag = false;
1875                         *tail = *tail | (1<<29) ; /* fist segment of the packet */
1876                         *tail = *tail | (len);
1877                 } else {
1878                         ownbit_flag = true;
1879                 }
1880
1881                 for (i = 0; i < buflen && remain > 0; i++, remain--) {
1882                         ((u8 *)buf)[i] = txbuf[i]; /* copy data into descriptor pointed DMAble buffer */
1883                         if (remain == 4 && i+4 >= buflen)
1884                                 break;
1885                         /* ensure the last desc has at least 4 bytes payload */
1886
1887                 }
1888                 txbuf = txbuf + i;
1889                 *(tail+3) = *(tail+3) & ~0xfff;
1890                 *(tail+3) = *(tail+3) | i; /* buffer length */
1891                 /* Use short preamble or not */
1892                 if (priv->ieee80211->current_network.capability&WLAN_CAPABILITY_SHORT_PREAMBLE)
1893                         if (priv->plcp_preamble_mode == 1 && rate != 0) /*  short mode now, not long! */
1894                         ; /* *tail |= (1<<16); */                               /* enable short preamble mode. */
1895
1896                 if (bCTSEnable)
1897                         *tail |= (1<<18);
1898
1899                 if (bRTSEnable) { /* rts enable */
1900                         *tail |= ((ieeerate2rtlrate(priv->ieee80211->basic_rate))<<19); /* RTS RATE */
1901                         *tail |= (1<<23); /* rts enable */
1902                         *(tail+1) |= (RtsDur&0xffff); /* RTS Duration */
1903                 }
1904                 *(tail+3) |= ((TxDescDuration&0xffff)<<16); /* DURATION */
1905                 /* *(tail+3) |= (0xe6<<16); */
1906                 *(tail+5) |= (11<<8); /* (priv->retry_data<<8); */ /* retry lim; */
1907
1908                 *tail = *tail | ((rate&0xf) << 24);
1909
1910                 if (morefrag)
1911                         *tail = (*tail) | (1<<17); /* more fragment */
1912                 if (!remain)
1913                         *tail = (*tail) | (1<<28); /* last segment of frame */
1914
1915                 *(tail+5) = *(tail+5)|(2<<27);
1916                 *(tail+7) = *(tail+7)|(1<<4);
1917
1918                 wmb();
1919                 if (ownbit_flag)
1920                         *tail = *tail | (1<<31); /* descriptor ready to be txed */
1921
1922                 if ((tail - begin)/8 == count-1)
1923                         tail = begin;
1924                 else
1925                         tail = tail+8;
1926
1927                 buflist = buflist->next;
1928
1929                 mb();
1930
1931                 switch (priority) {
1932                 case MANAGE_PRIORITY:
1933                         priv->txmapringtail = tail;
1934                         priv->txmapbufstail = buflist;
1935                         break;
1936                 case BK_PRIORITY:
1937                         priv->txbkpringtail = tail;
1938                         priv->txbkpbufstail = buflist;
1939                         break;
1940                 case BE_PRIORITY:
1941                         priv->txbepringtail = tail;
1942                         priv->txbepbufstail = buflist;
1943                         break;
1944                 case VI_PRIORITY:
1945                         priv->txvipringtail = tail;
1946                         priv->txvipbufstail = buflist;
1947                         break;
1948                 case VO_PRIORITY:
1949                         priv->txvopringtail = tail;
1950                         priv->txvopbufstail = buflist;
1951                         break;
1952                 case HI_PRIORITY:
1953                         priv->txhpringtail = tail;
1954                         priv->txhpbufstail = buflist;
1955                         break;
1956                 case BEACON_PRIORITY:
1957                         /*
1958                          * The HW seems to be happy with the 1st
1959                          * descriptor filled and the 2nd empty...
1960                          * So always update descriptor 1 and never
1961                          * touch 2nd
1962                          */
1963                         break;
1964                 }
1965         }
1966         *temp_tail = *temp_tail | (1<<31); /* descriptor ready to be txed */
1967         rtl8180_dma_kick(dev, priority);
1968
1969         return 0;
1970 }
1971
1972 void rtl8180_irq_rx_tasklet(struct r8180_priv *priv);
1973
1974 void rtl8180_link_change(struct net_device *dev)
1975 {
1976         struct r8180_priv *priv = ieee80211_priv(dev);
1977         u16 beacon_interval;
1978         struct ieee80211_network *net = &priv->ieee80211->current_network;
1979
1980         rtl8180_update_msr(dev);
1981
1982         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
1983
1984         write_nic_dword(dev, BSSID, ((u32 *)net->bssid)[0]);
1985         write_nic_word(dev, BSSID+4, ((u16 *)net->bssid)[2]);
1986
1987         beacon_interval  = read_nic_word(dev, BEACON_INTERVAL);
1988         beacon_interval &= ~BEACON_INTERVAL_MASK;
1989         beacon_interval |= net->beacon_interval;
1990         write_nic_word(dev, BEACON_INTERVAL, beacon_interval);
1991
1992         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
1993
1994         rtl8180_set_chan(dev, priv->chan);
1995 }
1996
1997 void rtl8180_rq_tx_ack(struct net_device *dev)
1998 {
1999
2000         struct r8180_priv *priv = ieee80211_priv(dev);
2001
2002         write_nic_byte(dev, CONFIG4, read_nic_byte(dev, CONFIG4) | CONFIG4_PWRMGT);
2003         priv->ack_tx_to_ieee = 1;
2004 }
2005
2006 short rtl8180_is_tx_queue_empty(struct net_device *dev)
2007 {
2008
2009         struct r8180_priv *priv = ieee80211_priv(dev);
2010         u32 *d;
2011
2012         for (d = priv->txmapring;
2013                 d < priv->txmapring + priv->txringcount; d += 8)
2014                         if (*d & (1<<31))
2015                                 return 0;
2016
2017         for (d = priv->txbkpring;
2018                 d < priv->txbkpring + priv->txringcount; d += 8)
2019                         if (*d & (1<<31))
2020                                 return 0;
2021
2022         for (d = priv->txbepring;
2023                 d < priv->txbepring + priv->txringcount; d += 8)
2024                         if (*d & (1<<31))
2025                                 return 0;
2026
2027         for (d = priv->txvipring;
2028                 d < priv->txvipring + priv->txringcount; d += 8)
2029                         if (*d & (1<<31))
2030                                 return 0;
2031
2032         for (d = priv->txvopring;
2033                 d < priv->txvopring + priv->txringcount; d += 8)
2034                         if (*d & (1<<31))
2035                                 return 0;
2036
2037         for (d = priv->txhpring;
2038                 d < priv->txhpring + priv->txringcount; d += 8)
2039                         if (*d & (1<<31))
2040                                 return 0;
2041         return 1;
2042 }
2043
2044 void rtl8180_hw_wakeup(struct net_device *dev)
2045 {
2046         unsigned long flags;
2047         struct r8180_priv *priv = ieee80211_priv(dev);
2048
2049         spin_lock_irqsave(&priv->ps_lock, flags);
2050         write_nic_byte(dev, CONFIG4, read_nic_byte(dev, CONFIG4) & ~CONFIG4_PWRMGT);
2051         if (priv->rf_wakeup)
2052                 priv->rf_wakeup(dev);
2053         spin_unlock_irqrestore(&priv->ps_lock, flags);
2054 }
2055
2056 void rtl8180_hw_sleep_down(struct net_device *dev)
2057 {
2058         unsigned long flags;
2059         struct r8180_priv *priv = ieee80211_priv(dev);
2060
2061         spin_lock_irqsave(&priv->ps_lock, flags);
2062         if (priv->rf_sleep)
2063                 priv->rf_sleep(dev);
2064         spin_unlock_irqrestore(&priv->ps_lock, flags);
2065 }
2066
2067 void rtl8180_hw_sleep(struct net_device *dev, u32 th, u32 tl)
2068 {
2069         struct r8180_priv *priv = ieee80211_priv(dev);
2070         u32 rb = jiffies;
2071         unsigned long flags;
2072
2073         spin_lock_irqsave(&priv->ps_lock, flags);
2074
2075         /*
2076          * Writing HW register with 0 equals to disable
2077          * the timer, that is not really what we want
2078          */
2079         tl -= MSECS(4+16+7);
2080
2081         /*
2082          * If the interval in witch we are requested to sleep is too
2083          * short then give up and remain awake
2084          */
2085         if (((tl >= rb) && (tl-rb) <= MSECS(MIN_SLEEP_TIME))
2086                 || ((rb > tl) && (rb-tl) < MSECS(MIN_SLEEP_TIME))) {
2087                 spin_unlock_irqrestore(&priv->ps_lock, flags);
2088                 printk("too short to sleep\n");
2089                 return;
2090         }
2091
2092         {
2093                 u32 tmp = (tl > rb) ? (tl-rb) : (rb-tl);
2094
2095                 priv->DozePeriodInPast2Sec += jiffies_to_msecs(tmp);
2096                 /* as tl may be less than rb */
2097                 queue_delayed_work(priv->ieee80211->wq, &priv->ieee80211->hw_wakeup_wq, tmp);
2098         }
2099         /*
2100          * If we suspect the TimerInt is gone beyond tl
2101          * while setting it, then give up
2102          */
2103
2104         if (((tl > rb) && ((tl-rb) > MSECS(MAX_SLEEP_TIME))) ||
2105                 ((tl < rb) && ((rb-tl) > MSECS(MAX_SLEEP_TIME)))) {
2106                 spin_unlock_irqrestore(&priv->ps_lock, flags);
2107                 return;
2108         }
2109
2110         queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_sleep_wq);
2111         spin_unlock_irqrestore(&priv->ps_lock, flags);
2112 }
2113
2114 void rtl8180_wmm_param_update(struct work_struct *work)
2115 {
2116         struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, wmm_param_update_wq);
2117         struct net_device *dev = ieee->dev;
2118         u8 *ac_param = (u8 *)(ieee->current_network.wmm_param);
2119         u8 mode = ieee->current_network.mode;
2120         AC_CODING       eACI;
2121         AC_PARAM        AcParam;
2122         PAC_PARAM       pAcParam;
2123         u8 i;
2124
2125         if (!ieee->current_network.QoS_Enable) {
2126                 /* legacy ac_xx_param update */
2127                 AcParam.longData = 0;
2128                 AcParam.f.AciAifsn.f.AIFSN = 2; /* Follow 802.11 DIFS. */
2129                 AcParam.f.AciAifsn.f.ACM = 0;
2130                 AcParam.f.Ecw.f.ECWmin = 3; /* Follow 802.11 CWmin. */
2131                 AcParam.f.Ecw.f.ECWmax = 7; /* Follow 802.11 CWmax. */
2132                 AcParam.f.TXOPLimit = 0;
2133                 for (eACI = 0; eACI < AC_MAX; eACI++) {
2134                         AcParam.f.AciAifsn.f.ACI = (u8)eACI;
2135                         {
2136                                 u8              u1bAIFS;
2137                                 u32             u4bAcParam;
2138                                 pAcParam = (PAC_PARAM)(&AcParam);
2139                                 /* Retrieve parameters to update. */
2140                                 u1bAIFS = pAcParam->f.AciAifsn.f.AIFSN * (((mode&IEEE_G) == IEEE_G) ? 9 : 20) + aSifsTime;
2141                                 u4bAcParam = ((((u32)(pAcParam->f.TXOPLimit))<<AC_PARAM_TXOP_LIMIT_OFFSET)|
2142                                               (((u32)(pAcParam->f.Ecw.f.ECWmax))<<AC_PARAM_ECW_MAX_OFFSET)|
2143                                               (((u32)(pAcParam->f.Ecw.f.ECWmin))<<AC_PARAM_ECW_MIN_OFFSET)|
2144                                                (((u32)u1bAIFS) << AC_PARAM_AIFS_OFFSET));
2145                                 switch (eACI) {
2146                                 case AC1_BK:
2147                                         write_nic_dword(dev, AC_BK_PARAM, u4bAcParam);
2148                                         break;
2149                                 case AC0_BE:
2150                                         write_nic_dword(dev, AC_BE_PARAM, u4bAcParam);
2151                                         break;
2152                                 case AC2_VI:
2153                                         write_nic_dword(dev, AC_VI_PARAM, u4bAcParam);
2154                                         break;
2155                                 case AC3_VO:
2156                                         write_nic_dword(dev, AC_VO_PARAM, u4bAcParam);
2157                                         break;
2158                                 default:
2159                                         printk(KERN_WARNING "SetHwReg8185():invalid ACI: %d!\n", eACI);
2160                                         break;
2161                                 }
2162                         }
2163                 }
2164                 return;
2165         }
2166
2167         for (i = 0; i < AC_MAX; i++) {
2168                 /* AcParam.longData = 0; */
2169                 pAcParam = (AC_PARAM *)ac_param;
2170                 {
2171                         AC_CODING       eACI;
2172                         u8              u1bAIFS;
2173                         u32             u4bAcParam;
2174
2175                         /* Retrieve parameters to update. */
2176                         eACI = pAcParam->f.AciAifsn.f.ACI;
2177                         /* Mode G/A: slotTimeTimer = 9; Mode B: 20 */
2178                         u1bAIFS = pAcParam->f.AciAifsn.f.AIFSN * (((mode&IEEE_G) == IEEE_G) ? 9 : 20) + aSifsTime;
2179                         u4bAcParam = ((((u32)(pAcParam->f.TXOPLimit)) << AC_PARAM_TXOP_LIMIT_OFFSET)    |
2180                                         (((u32)(pAcParam->f.Ecw.f.ECWmax)) << AC_PARAM_ECW_MAX_OFFSET)  |
2181                                         (((u32)(pAcParam->f.Ecw.f.ECWmin)) << AC_PARAM_ECW_MIN_OFFSET)  |
2182                                         (((u32)u1bAIFS) << AC_PARAM_AIFS_OFFSET));
2183
2184                         switch (eACI) {
2185                         case AC1_BK:
2186                                 write_nic_dword(dev, AC_BK_PARAM, u4bAcParam);
2187                                 break;
2188                         case AC0_BE:
2189                                 write_nic_dword(dev, AC_BE_PARAM, u4bAcParam);
2190                                 break;
2191                         case AC2_VI:
2192                                 write_nic_dword(dev, AC_VI_PARAM, u4bAcParam);
2193                                 break;
2194                         case AC3_VO:
2195                                 write_nic_dword(dev, AC_VO_PARAM, u4bAcParam);
2196                                 break;
2197                         default:
2198                                 printk(KERN_WARNING "SetHwReg8185(): invalid ACI: %d !\n", eACI);
2199                                 break;
2200                         }
2201                 }
2202                 ac_param += (sizeof(AC_PARAM));
2203         }
2204 }
2205
2206 void rtl8180_restart_wq(struct work_struct *work);
2207 /* void rtl8180_rq_tx_ack(struct work_struct *work); */
2208 void rtl8180_watch_dog_wq(struct work_struct *work);
2209 void rtl8180_hw_wakeup_wq(struct work_struct *work);
2210 void rtl8180_hw_sleep_wq(struct work_struct *work);
2211 void rtl8180_sw_antenna_wq(struct work_struct *work);
2212 void rtl8180_watch_dog(struct net_device *dev);
2213
2214 void watch_dog_adaptive(unsigned long data)
2215 {
2216         struct r8180_priv* priv = ieee80211_priv((struct net_device *)data);
2217
2218         if (!priv->up) {
2219                 DMESG("<----watch_dog_adaptive():driver is not up!\n");
2220                 return;
2221         }
2222
2223         /* Tx High Power Mechanism. */
2224         if (CheckHighPower((struct net_device *)data))
2225                 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->tx_pw_wq);
2226
2227         /* Tx Power Tracking on 87SE. */
2228         if (CheckTxPwrTracking((struct net_device *)data))
2229                 TxPwrTracking87SE((struct net_device *)data);
2230
2231         /* Perform DIG immediately. */
2232         if (CheckDig((struct net_device *)data) == true)
2233                 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_dig_wq);
2234         rtl8180_watch_dog((struct net_device *)data);
2235
2236         queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->GPIOChangeRFWorkItem);
2237
2238         priv->watch_dog_timer.expires = jiffies + MSECS(IEEE80211_WATCH_DOG_TIME);
2239         add_timer(&priv->watch_dog_timer);
2240 }
2241
2242 static CHANNEL_LIST ChannelPlan[] = {
2243         {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64},19},         /* FCC */
2244         {{1,2,3,4,5,6,7,8,9,10,11},11},                                 /* IC */
2245         {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21},   /* ETSI */
2246         {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21},   /* Spain. Change to ETSI. */
2247         {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21},   /* France. Change to ETSI. */
2248         {{14,36,40,44,48,52,56,60,64},9},                               /* MKK */
2249         {{1,2,3,4,5,6,7,8,9,10,11,12,13,14, 36,40,44,48,52,56,60,64},22},/* MKK1 */
2250         {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21},   /* Israel. */
2251         {{1,2,3,4,5,6,7,8,9,10,11,12,13,34,38,42,46},17},               /* For 11a , TELEC */
2252         {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14},  /* For Global Domain. 1-11:active scan, 12-14 passive scan. //+YJ, 080626 */
2253         {{1,2,3,4,5,6,7,8,9,10,11,12,13},13} /* world wide 13: ch1~ch11 active scan, ch12~13 passive //lzm add 080826 */
2254 };
2255
2256 static void rtl8180_set_channel_map(u8 channel_plan, struct ieee80211_device *ieee)
2257 {
2258         int i;
2259
2260         /* lzm add 080826 */
2261         ieee->MinPassiveChnlNum = MAX_CHANNEL_NUMBER+1;
2262         ieee->IbssStartChnl = 0;
2263
2264         switch (channel_plan) {
2265         case COUNTRY_CODE_FCC:
2266         case COUNTRY_CODE_IC:
2267         case COUNTRY_CODE_ETSI:
2268         case COUNTRY_CODE_SPAIN:
2269         case COUNTRY_CODE_FRANCE:
2270         case COUNTRY_CODE_MKK:
2271         case COUNTRY_CODE_MKK1:
2272         case COUNTRY_CODE_ISRAEL:
2273         case COUNTRY_CODE_TELEC:
2274                 {
2275                         Dot11d_Init(ieee);
2276                         ieee->bGlobalDomain = false;
2277                         if (ChannelPlan[channel_plan].Len != 0) {
2278                                 /* Clear old channel map */
2279                                 memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
2280                                 /* Set new channel map */
2281                                 for (i = 0; i < ChannelPlan[channel_plan].Len; i++) {
2282                                         if (ChannelPlan[channel_plan].Channel[i] <= 14)
2283                                                 GET_DOT11D_INFO(ieee)->channel_map[ChannelPlan[channel_plan].Channel[i]] = 1;
2284                                 }
2285                         }
2286                         break;
2287                 }
2288         case COUNTRY_CODE_GLOBAL_DOMAIN:
2289                 {
2290                         GET_DOT11D_INFO(ieee)->bEnabled = 0;
2291                         Dot11d_Reset(ieee);
2292                         ieee->bGlobalDomain = true;
2293                         break;
2294                 }
2295         case COUNTRY_CODE_WORLD_WIDE_13_INDEX:/* lzm add 080826 */
2296                 {
2297                         ieee->MinPassiveChnlNum = 12;
2298                         ieee->IbssStartChnl = 10;
2299                         break;
2300                 }
2301         default:
2302                 {
2303                         Dot11d_Init(ieee);
2304                         ieee->bGlobalDomain = false;
2305                         memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
2306                         for (i = 1; i <= 14; i++)
2307                                 GET_DOT11D_INFO(ieee)->channel_map[i] = 1;
2308                         break;
2309                 }
2310         }
2311 }
2312
2313 void GPIOChangeRFWorkItemCallBack(struct work_struct *work);
2314
2315 /* YJ,add,080828 */
2316 static void rtl8180_statistics_init(struct Stats *pstats)
2317 {
2318         memset(pstats, 0, sizeof(struct Stats));
2319 }
2320
2321 static void rtl8180_link_detect_init(plink_detect_t plink_detect)
2322 {
2323         memset(plink_detect, 0, sizeof(link_detect_t));
2324         plink_detect->SlotNum = DEFAULT_SLOT_NUM;
2325 }
2326
2327 /* YJ,add,080828,end */
2328 static void rtl8187se_eeprom_register_read(struct eeprom_93cx6 *eeprom)
2329 {
2330         struct net_device *dev = eeprom->data;
2331         u8 reg = read_nic_byte(dev, EPROM_CMD);
2332
2333         eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
2334         eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
2335         eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
2336         eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
2337 }
2338
2339 static void rtl8187se_eeprom_register_write(struct eeprom_93cx6 *eeprom)
2340 {
2341         struct net_device *dev = eeprom->data;
2342         u8 reg = 2 << 6;
2343
2344         if (eeprom->reg_data_in)
2345                 reg |= RTL818X_EEPROM_CMD_WRITE;
2346         if (eeprom->reg_data_out)
2347                 reg |= RTL818X_EEPROM_CMD_READ;
2348         if (eeprom->reg_data_clock)
2349                 reg |= RTL818X_EEPROM_CMD_CK;
2350         if (eeprom->reg_chip_select)
2351                 reg |= RTL818X_EEPROM_CMD_CS;
2352
2353         write_nic_byte(dev, EPROM_CMD, reg);
2354         read_nic_byte(dev, EPROM_CMD);
2355         udelay(10);
2356 }
2357
2358 short rtl8180_init(struct net_device *dev)
2359 {
2360         struct r8180_priv *priv = ieee80211_priv(dev);
2361         u16 word;
2362         u16 usValue;
2363         u16 tmpu16;
2364         int i, j;
2365         struct eeprom_93cx6 eeprom;
2366         u16 eeprom_val;
2367
2368         eeprom.data = dev;
2369         eeprom.register_read = rtl8187se_eeprom_register_read;
2370         eeprom.register_write = rtl8187se_eeprom_register_write;
2371         eeprom.width = PCI_EEPROM_WIDTH_93C46;
2372
2373         eeprom_93cx6_read(&eeprom, EEPROM_COUNTRY_CODE>>1, &eeprom_val);
2374         priv->channel_plan = eeprom_val & 0xFF;
2375         if (priv->channel_plan > COUNTRY_CODE_GLOBAL_DOMAIN) {
2376                 printk("rtl8180_init:Error channel plan! Set to default.\n");
2377                 priv->channel_plan = 0;
2378         }
2379
2380         DMESG("Channel plan is %d\n", priv->channel_plan);
2381         rtl8180_set_channel_map(priv->channel_plan, priv->ieee80211);
2382
2383         /* FIXME: these constants are placed in a bad pleace. */
2384         priv->txbuffsize = 2048;        /* 1024; */
2385         priv->txringcount = 32;         /* 32; */
2386         priv->rxbuffersize = 2048;      /* 1024; */
2387         priv->rxringcount = 64;         /* 32; */
2388         priv->txbeaconcount = 2;
2389         priv->rx_skb_complete = 1;
2390
2391         priv->RFChangeInProgress = false;
2392         priv->SetRFPowerStateInProgress = false;
2393         priv->RFProgType = 0;
2394
2395         priv->irq_enabled = 0;
2396
2397         rtl8180_statistics_init(&priv->stats);
2398         rtl8180_link_detect_init(&priv->link_detect);
2399
2400         priv->ack_tx_to_ieee = 0;
2401         priv->ieee80211->current_network.beacon_interval = DEFAULT_BEACONINTERVAL;
2402         priv->ieee80211->iw_mode = IW_MODE_INFRA;
2403         priv->ieee80211->softmac_features  = IEEE_SOFTMAC_SCAN |
2404                 IEEE_SOFTMAC_ASSOCIATE | IEEE_SOFTMAC_PROBERQ |
2405                 IEEE_SOFTMAC_PROBERS | IEEE_SOFTMAC_TX_QUEUE;
2406         priv->ieee80211->active_scan = 1;
2407         priv->ieee80211->rate = 110; /* 11 mbps */
2408         priv->ieee80211->modulation = IEEE80211_CCK_MODULATION;
2409         priv->ieee80211->host_encrypt = 1;
2410         priv->ieee80211->host_decrypt = 1;
2411         priv->ieee80211->sta_wake_up = rtl8180_hw_wakeup;
2412         priv->ieee80211->ps_request_tx_ack = rtl8180_rq_tx_ack;
2413         priv->ieee80211->enter_sleep_state = rtl8180_hw_sleep;
2414         priv->ieee80211->ps_is_queue_empty = rtl8180_is_tx_queue_empty;
2415
2416         priv->hw_wep = hwwep;
2417         priv->dev = dev;
2418         priv->retry_rts = DEFAULT_RETRY_RTS;
2419         priv->retry_data = DEFAULT_RETRY_DATA;
2420         priv->RFChangeInProgress = false;
2421         priv->SetRFPowerStateInProgress = false;
2422         priv->RFProgType = 0;
2423         priv->bInactivePs = true; /* false; */
2424         priv->ieee80211->bInactivePs = priv->bInactivePs;
2425         priv->bSwRfProcessing = false;
2426         priv->eRFPowerState = eRfOff;
2427         priv->RfOffReason = 0;
2428         priv->LedStrategy = SW_LED_MODE0;
2429         priv->TxPollingTimes = 0; /* lzm add 080826 */
2430         priv->bLeisurePs = true;
2431         priv->dot11PowerSaveMode = eActive;
2432         priv->AdMinCheckPeriod = 5;
2433         priv->AdMaxCheckPeriod = 10;
2434         priv->AdMaxRxSsThreshold = 30;  /* 60->30 */
2435         priv->AdRxSsThreshold = 20;     /* 50->20 */
2436         priv->AdCheckPeriod = priv->AdMinCheckPeriod;
2437         priv->AdTickCount = 0;
2438         priv->AdRxSignalStrength = -1;
2439         priv->RegSwAntennaDiversityMechanism = 0;
2440         priv->RegDefaultAntenna = 0;
2441         priv->SignalStrength = 0;
2442         priv->AdRxOkCnt = 0;
2443         priv->CurrAntennaIndex = 0;
2444         priv->AdRxSsBeforeSwitched = 0;
2445         init_timer(&priv->SwAntennaDiversityTimer);
2446         priv->SwAntennaDiversityTimer.data = (unsigned long)dev;
2447         priv->SwAntennaDiversityTimer.function = (void *)SwAntennaDiversityTimerCallback;
2448         priv->bDigMechanism = 1;
2449         priv->InitialGain = 6;
2450         priv->bXtalCalibration = false;
2451         priv->XtalCal_Xin = 0;
2452         priv->XtalCal_Xout = 0;
2453         priv->bTxPowerTrack = false;
2454         priv->ThermalMeter = 0;
2455         priv->FalseAlarmRegValue = 0;
2456         priv->RegDigOfdmFaUpTh = 0xc; /* Upper threshold of OFDM false alarm, which is used in DIG. */
2457         priv->DIG_NumberFallbackVote = 0;
2458         priv->DIG_NumberUpgradeVote = 0;
2459         priv->LastSignalStrengthInPercent = 0;
2460         priv->Stats_SignalStrength = 0;
2461         priv->LastRxPktAntenna = 0;
2462         priv->SignalQuality = 0; /* in 0-100 index. */
2463         priv->Stats_SignalQuality = 0;
2464         priv->RecvSignalPower = 0; /* in dBm. */
2465         priv->Stats_RecvSignalPower = 0;
2466         priv->AdMainAntennaRxOkCnt = 0;
2467         priv->AdAuxAntennaRxOkCnt = 0;
2468         priv->bHWAdSwitched = false;
2469         priv->bRegHighPowerMechanism = true;
2470         priv->RegHiPwrUpperTh = 77;
2471         priv->RegHiPwrLowerTh = 75;
2472         priv->RegRSSIHiPwrUpperTh = 70;
2473         priv->RegRSSIHiPwrLowerTh = 20;
2474         priv->bCurCCKPkt = false;
2475         priv->UndecoratedSmoothedSS = -1;
2476         priv->bToUpdateTxPwr = false;
2477         priv->CurCCKRSSI = 0;
2478         priv->RxPower = 0;
2479         priv->RSSI = 0;
2480         priv->NumTxOkTotal = 0;
2481         priv->NumTxUnicast = 0;
2482         priv->keepAliveLevel = DEFAULT_KEEP_ALIVE_LEVEL;
2483         priv->CurrRetryCnt = 0;
2484         priv->LastRetryCnt = 0;
2485         priv->LastTxokCnt = 0;
2486         priv->LastRxokCnt = 0;
2487         priv->LastRetryRate = 0;
2488         priv->bTryuping = 0;
2489         priv->CurrTxRate = 0;
2490         priv->CurrRetryRate = 0;
2491         priv->TryupingCount = 0;
2492         priv->TryupingCountNoData = 0;
2493         priv->TryDownCountLowData = 0;
2494         priv->LastTxOKBytes = 0;
2495         priv->LastFailTxRate = 0;
2496         priv->LastFailTxRateSS = 0;
2497         priv->FailTxRateCount = 0;
2498         priv->LastTxThroughput = 0;
2499         priv->NumTxOkBytesTotal = 0;
2500         priv->ForcedDataRate = 0;
2501         priv->RegBModeGainStage = 1;
2502
2503         priv->promisc = (dev->flags & IFF_PROMISC) ? 1 : 0;
2504         spin_lock_init(&priv->irq_th_lock);
2505         spin_lock_init(&priv->tx_lock);
2506         spin_lock_init(&priv->ps_lock);
2507         spin_lock_init(&priv->rf_ps_lock);
2508         sema_init(&priv->wx_sem, 1);
2509         INIT_WORK(&priv->reset_wq, (void *)rtl8180_restart_wq);
2510         INIT_DELAYED_WORK(&priv->ieee80211->hw_wakeup_wq,
2511                           (void *)rtl8180_hw_wakeup_wq);
2512         INIT_DELAYED_WORK(&priv->ieee80211->hw_sleep_wq,
2513                           (void *)rtl8180_hw_sleep_wq);
2514         INIT_WORK(&priv->ieee80211->wmm_param_update_wq,
2515                   (void *)rtl8180_wmm_param_update);
2516         INIT_DELAYED_WORK(&priv->ieee80211->rate_adapter_wq,
2517                           (void *)rtl8180_rate_adapter);
2518         INIT_DELAYED_WORK(&priv->ieee80211->hw_dig_wq,
2519                          (void *)rtl8180_hw_dig_wq);
2520         INIT_DELAYED_WORK(&priv->ieee80211->tx_pw_wq,
2521                          (void *)rtl8180_tx_pw_wq);
2522         INIT_DELAYED_WORK(&priv->ieee80211->GPIOChangeRFWorkItem,
2523                          (void *) GPIOChangeRFWorkItemCallBack);
2524         tasklet_init(&priv->irq_rx_tasklet,
2525                      (void(*)(unsigned long)) rtl8180_irq_rx_tasklet,
2526                      (unsigned long)priv);
2527
2528         init_timer(&priv->watch_dog_timer);
2529         priv->watch_dog_timer.data = (unsigned long)dev;
2530         priv->watch_dog_timer.function = watch_dog_adaptive;
2531
2532         init_timer(&priv->rateadapter_timer);
2533         priv->rateadapter_timer.data = (unsigned long)dev;
2534         priv->rateadapter_timer.function = timer_rate_adaptive;
2535         priv->RateAdaptivePeriod = RATE_ADAPTIVE_TIMER_PERIOD;
2536         priv->bEnhanceTxPwr = false;
2537
2538         priv->ieee80211->softmac_hard_start_xmit = rtl8180_hard_start_xmit;
2539         priv->ieee80211->set_chan = rtl8180_set_chan;
2540         priv->ieee80211->link_change = rtl8180_link_change;
2541         priv->ieee80211->softmac_data_hard_start_xmit = rtl8180_hard_data_xmit;
2542         priv->ieee80211->data_hard_stop = rtl8180_data_hard_stop;
2543         priv->ieee80211->data_hard_resume = rtl8180_data_hard_resume;
2544
2545         priv->ieee80211->init_wmmparam_flag = 0;
2546
2547         priv->ieee80211->start_send_beacons = rtl8180_start_tx_beacon;
2548         priv->ieee80211->stop_send_beacons = rtl8180_beacon_tx_disable;
2549         priv->ieee80211->fts = DEFAULT_FRAG_THRESHOLD;
2550
2551         priv->ShortRetryLimit = 7;
2552         priv->LongRetryLimit = 7;
2553         priv->EarlyRxThreshold = 7;
2554
2555         priv->TransmitConfig =  (1<<TCR_DurProcMode_OFFSET) |
2556                                 (7<<TCR_MXDMA_OFFSET) |
2557                                 (priv->ShortRetryLimit<<TCR_SRL_OFFSET) |
2558                                 (priv->LongRetryLimit<<TCR_LRL_OFFSET);
2559
2560         priv->ReceiveConfig =   RCR_AMF | RCR_ADF | RCR_ACF |
2561                                 RCR_AB | RCR_AM | RCR_APM |
2562                                 (7<<RCR_MXDMA_OFFSET) |
2563                                 (priv->EarlyRxThreshold<<RCR_FIFO_OFFSET) |
2564                                 (priv->EarlyRxThreshold == 7 ?
2565                                          RCR_ONLYERLPKT : 0);
2566
2567         priv->IntrMask          = IMR_TMGDOK | IMR_TBDER | IMR_THPDER |
2568                                   IMR_THPDER | IMR_THPDOK |
2569                                   IMR_TVODER | IMR_TVODOK |
2570                                   IMR_TVIDER | IMR_TVIDOK |
2571                                   IMR_TBEDER | IMR_TBEDOK |
2572                                   IMR_TBKDER | IMR_TBKDOK |
2573                                   IMR_RDU |
2574                                   IMR_RER | IMR_ROK |
2575                                   IMR_RQoSOK;
2576
2577         priv->InitialGain = 6;
2578
2579         DMESG("MAC controller is a RTL8187SE b/g");
2580
2581         priv->ieee80211->modulation |= IEEE80211_OFDM_MODULATION;
2582         priv->ieee80211->short_slot = 1;
2583
2584         eeprom_93cx6_read(&eeprom, EEPROM_SW_REVD_OFFSET, &usValue);
2585         DMESG("usValue is %#hx\n", usValue);
2586         /* 3Read AntennaDiversity */
2587
2588         /* SW Antenna Diversity. */
2589         priv->EEPROMSwAntennaDiversity = (usValue & EEPROM_SW_AD_MASK) ==
2590                 EEPROM_SW_AD_ENABLE;
2591
2592         /* Default Antenna to use. */
2593         priv->EEPROMDefaultAntenna1 = (usValue & EEPROM_DEF_ANT_MASK) ==
2594                 EEPROM_DEF_ANT_1;
2595
2596         if (priv->RegSwAntennaDiversityMechanism == 0) /* Auto */
2597                 /* 0: default from EEPROM. */
2598                 priv->bSwAntennaDiverity = priv->EEPROMSwAntennaDiversity;
2599         else
2600                 /* 1:disable antenna diversity, 2: enable antenna diversity. */
2601                 priv->bSwAntennaDiverity = priv->RegSwAntennaDiversityMechanism == 2;
2602
2603         if (priv->RegDefaultAntenna == 0)
2604                 /* 0: default from EEPROM. */
2605                 priv->bDefaultAntenna1 = priv->EEPROMDefaultAntenna1;
2606         else
2607                 /* 1: main, 2: aux. */
2608                 priv->bDefaultAntenna1 = priv->RegDefaultAntenna == 2;
2609
2610         priv->plcp_preamble_mode = 2;
2611         /* the eeprom type is stored in RCR register bit #6 */
2612         if (RCR_9356SEL & read_nic_dword(dev, RCR))
2613                 priv->epromtype = EPROM_93c56;
2614         else
2615                 priv->epromtype = EPROM_93c46;
2616
2617         eeprom_93cx6_multiread(&eeprom, 0x7, (__le16 *)
2618                                dev->dev_addr, 3);
2619
2620         for (i = 1, j = 0; i < 14; i += 2, j++) {
2621                 eeprom_93cx6_read(&eeprom, EPROM_TXPW_CH1_2 + j, &word);
2622                 priv->chtxpwr[i] = word & 0xff;
2623                 priv->chtxpwr[i+1] = (word & 0xff00)>>8;
2624         }
2625         for (i = 1, j = 0; i < 14; i += 2, j++) {
2626                 eeprom_93cx6_read(&eeprom, EPROM_TXPW_OFDM_CH1_2 + j, &word);
2627                 priv->chtxpwr_ofdm[i] = word & 0xff;
2628                 priv->chtxpwr_ofdm[i+1] = (word & 0xff00) >> 8;
2629         }
2630
2631         /* 3Read crystal calibration and thermal meter indication on 87SE. */
2632         eeprom_93cx6_read(&eeprom, EEPROM_RSV>>1, &tmpu16);
2633
2634         /* Crystal calibration for Xin and Xout resp. */
2635         priv->XtalCal_Xout = tmpu16 & EEPROM_XTAL_CAL_XOUT_MASK;
2636         priv->XtalCal_Xin = (tmpu16 & EEPROM_XTAL_CAL_XIN_MASK) >> 4;
2637         if ((tmpu16 & EEPROM_XTAL_CAL_ENABLE) >> 12)
2638                 priv->bXtalCalibration = true;
2639
2640         /* Thermal meter reference indication. */
2641         priv->ThermalMeter =  (u8)((tmpu16 & EEPROM_THERMAL_METER_MASK) >> 8);
2642         if ((tmpu16 & EEPROM_THERMAL_METER_ENABLE) >> 13)
2643                 priv->bTxPowerTrack = true;
2644
2645         priv->rf_sleep = rtl8225z4_rf_sleep;
2646         priv->rf_wakeup = rtl8225z4_rf_wakeup;
2647         DMESGW("**PLEASE** REPORT SUCCESSFUL/UNSUCCESSFUL TO Realtek!");
2648
2649         priv->rf_close = rtl8225z2_rf_close;
2650         priv->rf_init = rtl8225z2_rf_init;
2651         priv->rf_set_chan = rtl8225z2_rf_set_chan;
2652         priv->rf_set_sens = NULL;
2653
2654         if (0 != alloc_rx_desc_ring(dev, priv->rxbuffersize, priv->rxringcount))
2655                 return -ENOMEM;
2656
2657         if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2658                                   TX_MANAGEPRIORITY_RING_ADDR))
2659                 return -ENOMEM;
2660
2661         if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2662                                  TX_BKPRIORITY_RING_ADDR))
2663                 return -ENOMEM;
2664
2665         if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2666                                  TX_BEPRIORITY_RING_ADDR))
2667                 return -ENOMEM;
2668
2669         if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2670                                   TX_VIPRIORITY_RING_ADDR))
2671                 return -ENOMEM;
2672
2673         if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2674                                   TX_VOPRIORITY_RING_ADDR))
2675                 return -ENOMEM;
2676
2677         if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2678                                   TX_HIGHPRIORITY_RING_ADDR))
2679                 return -ENOMEM;
2680
2681         if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txbeaconcount,
2682                                   TX_BEACON_RING_ADDR))
2683                 return -ENOMEM;
2684
2685         if (request_irq(dev->irq, (void *)rtl8180_interrupt, IRQF_SHARED, dev->name, dev)) {
2686                 DMESGE("Error allocating IRQ %d", dev->irq);
2687                 return -1;
2688         } else {
2689                 priv->irq = dev->irq;
2690                 DMESG("IRQ %d", dev->irq);
2691         }
2692
2693         return 0;
2694 }
2695
2696 void rtl8180_no_hw_wep(struct net_device *dev)
2697 {
2698 }
2699
2700 void rtl8180_set_hw_wep(struct net_device *dev)
2701 {
2702         struct r8180_priv *priv = ieee80211_priv(dev);
2703         u8 pgreg;
2704         u8 security;
2705         u32 key0_word4;
2706
2707         pgreg = read_nic_byte(dev, PGSELECT);
2708         write_nic_byte(dev, PGSELECT, pgreg & ~(1<<PGSELECT_PG_SHIFT));
2709
2710         key0_word4 = read_nic_dword(dev, KEY0+4+4+4);
2711         key0_word4 &= ~0xff;
2712         key0_word4 |= priv->key0[3] & 0xff;
2713         write_nic_dword(dev, KEY0, (priv->key0[0]));
2714         write_nic_dword(dev, KEY0+4, (priv->key0[1]));
2715         write_nic_dword(dev, KEY0+4+4, (priv->key0[2]));
2716         write_nic_dword(dev, KEY0+4+4+4, (key0_word4));
2717
2718         security  = read_nic_byte(dev, SECURITY);
2719         security |= (1<<SECURITY_WEP_TX_ENABLE_SHIFT);
2720         security |= (1<<SECURITY_WEP_RX_ENABLE_SHIFT);
2721         security &= ~SECURITY_ENCRYP_MASK;
2722         security |= (SECURITY_ENCRYP_104<<SECURITY_ENCRYP_SHIFT);
2723
2724         write_nic_byte(dev, SECURITY, security);
2725
2726         DMESG("key %x %x %x %x", read_nic_dword(dev, KEY0+4+4+4),
2727               read_nic_dword(dev, KEY0+4+4), read_nic_dword(dev, KEY0+4),
2728               read_nic_dword(dev, KEY0));
2729 }
2730
2731
2732 void rtl8185_rf_pins_enable(struct net_device *dev)
2733 {
2734         /* u16 tmp; */
2735         /* tmp = read_nic_word(dev, RFPinsEnable); */
2736         write_nic_word(dev, RFPinsEnable, 0x1fff); /* | tmp); */
2737 }
2738
2739 void rtl8185_set_anaparam2(struct net_device *dev, u32 a)
2740 {
2741         u8 conf3;
2742
2743         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
2744
2745         conf3 = read_nic_byte(dev, CONFIG3);
2746         write_nic_byte(dev, CONFIG3, conf3 | (1<<CONFIG3_ANAPARAM_W_SHIFT));
2747         write_nic_dword(dev, ANAPARAM2, a);
2748
2749         conf3 = read_nic_byte(dev, CONFIG3);
2750         write_nic_byte(dev, CONFIG3, conf3 & ~(1<<CONFIG3_ANAPARAM_W_SHIFT));
2751         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
2752 }
2753
2754 void rtl8180_set_anaparam(struct net_device *dev, u32 a)
2755 {
2756         u8 conf3;
2757
2758         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
2759
2760         conf3 = read_nic_byte(dev, CONFIG3);
2761         write_nic_byte(dev, CONFIG3, conf3 | (1<<CONFIG3_ANAPARAM_W_SHIFT));
2762         write_nic_dword(dev, ANAPARAM, a);
2763
2764         conf3 = read_nic_byte(dev, CONFIG3);
2765         write_nic_byte(dev, CONFIG3, conf3 & ~(1<<CONFIG3_ANAPARAM_W_SHIFT));
2766         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
2767 }
2768
2769 void rtl8185_tx_antenna(struct net_device *dev, u8 ant)
2770 {
2771         write_nic_byte(dev, TX_ANTENNA, ant);
2772         force_pci_posting(dev);
2773         mdelay(1);
2774 }
2775
2776 void rtl8185_write_phy(struct net_device *dev, u8 adr, u32 data)
2777 {
2778         u32 phyw;
2779
2780         adr |= 0x80;
2781
2782         phyw = ((data<<8) | adr);
2783
2784         /* Note that, we must write 0xff7c after 0x7d-0x7f to write BB register. */
2785         write_nic_byte(dev, 0x7f, ((phyw & 0xff000000) >> 24));
2786         write_nic_byte(dev, 0x7e, ((phyw & 0x00ff0000) >> 16));
2787         write_nic_byte(dev, 0x7d, ((phyw & 0x0000ff00) >> 8));
2788         write_nic_byte(dev, 0x7c, ((phyw & 0x000000ff)));
2789
2790         /* this is ok to fail when we write AGC table. check for AGC table might be
2791          * done by masking with 0x7f instead of 0xff
2792          */
2793         /* if (phyr != (data&0xff)) DMESGW("Phy write timeout %x %x %x", phyr, data, adr); */
2794 }
2795
2796 inline void write_phy_ofdm(struct net_device *dev, u8 adr, u32 data)
2797 {
2798         data = data & 0xff;
2799         rtl8185_write_phy(dev, adr, data);
2800 }
2801
2802 void write_phy_cck(struct net_device *dev, u8 adr, u32 data)
2803 {
2804         data = data & 0xff;
2805         rtl8185_write_phy(dev, adr, data | 0x10000);
2806 }
2807
2808 /*
2809  * This configures registers for beacon tx and enables it via
2810  * rtl8180_beacon_tx_enable(). rtl8180_beacon_tx_disable() might
2811  * be used to stop beacon transmission
2812  */
2813 void rtl8180_start_tx_beacon(struct net_device *dev)
2814 {
2815         u16 word;
2816
2817         DMESG("Enabling beacon TX");
2818         rtl8180_prepare_beacon(dev);
2819         rtl8180_irq_disable(dev);
2820         rtl8180_beacon_tx_enable(dev);
2821
2822         word = read_nic_word(dev, AtimWnd) & ~AtimWnd_AtimWnd;
2823         write_nic_word(dev, AtimWnd, word); /* word |= */
2824
2825         word  = read_nic_word(dev, BintrItv);
2826         word &= ~BintrItv_BintrItv;
2827         word |= 1000; /* priv->ieee80211->current_network.beacon_interval *
2828                 ((priv->txbeaconcount > 1)?(priv->txbeaconcount-1):1);
2829         // FIXME: check if correct ^^ worked with 0x3e8;
2830         */
2831         write_nic_word(dev, BintrItv, word);
2832
2833         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
2834
2835         rtl8185b_irq_enable(dev);
2836 }
2837
2838 static struct net_device_stats *rtl8180_stats(struct net_device *dev)
2839 {
2840         struct r8180_priv *priv = ieee80211_priv(dev);
2841
2842         return &priv->ieee80211->stats;
2843 }
2844
2845 /*
2846  * Change current and default preamble mode.
2847  */
2848 bool
2849 MgntActSet_802_11_PowerSaveMode(
2850         struct r8180_priv *priv,
2851         RT_PS_MODE              rtPsMode
2852 )
2853 {
2854         /* Currently, we do not change power save mode on IBSS mode. */
2855         if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
2856                 return false;
2857
2858         priv->ieee80211->ps = rtPsMode;
2859
2860         return true;
2861 }
2862
2863 void LeisurePSEnter(struct r8180_priv *priv)
2864 {
2865         if (priv->bLeisurePs) {
2866                 if (priv->ieee80211->ps == IEEE80211_PS_DISABLED)
2867                         /* IEEE80211_PS_ENABLE */
2868                         MgntActSet_802_11_PowerSaveMode(priv, IEEE80211_PS_MBCAST|IEEE80211_PS_UNICAST);
2869         }
2870 }
2871
2872 void LeisurePSLeave(struct r8180_priv *priv)
2873 {
2874         if (priv->bLeisurePs) {
2875                 if (priv->ieee80211->ps != IEEE80211_PS_DISABLED)
2876                         MgntActSet_802_11_PowerSaveMode(priv, IEEE80211_PS_DISABLED);
2877         }
2878 }
2879
2880 void rtl8180_hw_wakeup_wq(struct work_struct *work)
2881 {
2882         struct delayed_work *dwork = to_delayed_work(work);
2883         struct ieee80211_device *ieee = container_of(dwork, struct ieee80211_device, hw_wakeup_wq);
2884         struct net_device *dev = ieee->dev;
2885
2886         rtl8180_hw_wakeup(dev);
2887 }
2888
2889 void rtl8180_hw_sleep_wq(struct work_struct *work)
2890 {
2891         struct delayed_work *dwork = to_delayed_work(work);
2892         struct ieee80211_device *ieee = container_of(dwork, struct ieee80211_device, hw_sleep_wq);
2893         struct net_device *dev = ieee->dev;
2894
2895         rtl8180_hw_sleep_down(dev);
2896 }
2897
2898 static void MgntLinkKeepAlive(struct r8180_priv *priv)
2899 {
2900         if (priv->keepAliveLevel == 0)
2901                 return;
2902
2903         if (priv->ieee80211->state == IEEE80211_LINKED) {
2904                 /*
2905                  * Keep-Alive.
2906                  */
2907
2908                 if ((priv->keepAliveLevel == 2) ||
2909                         (priv->link_detect.LastNumTxUnicast == priv->NumTxUnicast &&
2910                         priv->link_detect.LastNumRxUnicast == priv->ieee80211->NumRxUnicast)
2911                         ) {
2912                         priv->link_detect.IdleCount++;
2913
2914                         /*
2915                          * Send a Keep-Alive packet packet to AP if we had been idle for a while.
2916                          */
2917                         if (priv->link_detect.IdleCount >= ((KEEP_ALIVE_INTERVAL / CHECK_FOR_HANG_PERIOD)-1)) {
2918                                 priv->link_detect.IdleCount = 0;
2919                                 ieee80211_sta_ps_send_null_frame(priv->ieee80211, false);
2920                         }
2921                 } else {
2922                         priv->link_detect.IdleCount = 0;
2923                 }
2924                 priv->link_detect.LastNumTxUnicast = priv->NumTxUnicast;
2925                 priv->link_detect.LastNumRxUnicast = priv->ieee80211->NumRxUnicast;
2926         }
2927 }
2928
2929 void rtl8180_watch_dog(struct net_device *dev)
2930 {
2931         struct r8180_priv *priv = ieee80211_priv(dev);
2932         bool bEnterPS = false;
2933         bool bBusyTraffic = false;
2934         u32 TotalRxNum = 0;
2935         u16 SlotIndex = 0;
2936         u16 i = 0;
2937         if (priv->ieee80211->actscanning == false) {
2938                 if ((priv->ieee80211->iw_mode != IW_MODE_ADHOC) &&
2939                     (priv->ieee80211->state == IEEE80211_NOLINK) &&
2940                     (priv->ieee80211->beinretry == false) &&
2941                     (priv->eRFPowerState == eRfOn))
2942                         IPSEnter(dev);
2943         }
2944         /* YJ,add,080828,for link state check */
2945         if ((priv->ieee80211->state == IEEE80211_LINKED) && (priv->ieee80211->iw_mode == IW_MODE_INFRA)) {
2946                 SlotIndex = (priv->link_detect.SlotIndex++) % priv->link_detect.SlotNum;
2947                 priv->link_detect.RxFrameNum[SlotIndex] = priv->ieee80211->NumRxDataInPeriod + priv->ieee80211->NumRxBcnInPeriod;
2948                 for (i = 0; i < priv->link_detect.SlotNum; i++)
2949                         TotalRxNum += priv->link_detect.RxFrameNum[i];
2950
2951                 if (TotalRxNum == 0) {
2952                         priv->ieee80211->state = IEEE80211_ASSOCIATING;
2953                         queue_work(priv->ieee80211->wq, &priv->ieee80211->associate_procedure_wq);
2954                 }
2955         }
2956
2957         /* YJ,add,080828,for KeepAlive */
2958         MgntLinkKeepAlive(priv);
2959
2960         /* YJ,add,080828,for LPS */
2961         LeisurePSLeave(priv);
2962
2963         if (priv->ieee80211->state == IEEE80211_LINKED) {
2964                 priv->link_detect.NumRxOkInPeriod = priv->ieee80211->NumRxDataInPeriod;
2965                 if (priv->link_detect.NumRxOkInPeriod > 666 ||
2966                         priv->link_detect.NumTxOkInPeriod > 666) {
2967                         bBusyTraffic = true;
2968                 }
2969                 if (((priv->link_detect.NumRxOkInPeriod + priv->link_detect.NumTxOkInPeriod) > 8)
2970                         || (priv->link_detect.NumRxOkInPeriod > 2)) {
2971                         bEnterPS = false;
2972                 } else
2973                         bEnterPS = true;
2974
2975                 if (bEnterPS)
2976                         LeisurePSEnter(priv);
2977                 else
2978                         LeisurePSLeave(priv);
2979         } else
2980                 LeisurePSLeave(priv);
2981         priv->link_detect.bBusyTraffic = bBusyTraffic;
2982         priv->link_detect.NumRxOkInPeriod = 0;
2983         priv->link_detect.NumTxOkInPeriod = 0;
2984         priv->ieee80211->NumRxDataInPeriod = 0;
2985         priv->ieee80211->NumRxBcnInPeriod = 0;
2986 }
2987
2988 int _rtl8180_up(struct net_device *dev)
2989 {
2990         struct r8180_priv *priv = ieee80211_priv(dev);
2991
2992         priv->up = 1;
2993
2994         DMESG("Bringing up iface");
2995         rtl8185b_adapter_start(dev);
2996         rtl8185b_rx_enable(dev);
2997         rtl8185b_tx_enable(dev);
2998         if (priv->bInactivePs) {
2999                 if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
3000                         IPSLeave(dev);
3001         }
3002         timer_rate_adaptive((unsigned long)dev);
3003         watch_dog_adaptive((unsigned long)dev);
3004         if (priv->bSwAntennaDiverity)
3005                         SwAntennaDiversityTimerCallback(dev);
3006         ieee80211_softmac_start_protocol(priv->ieee80211);
3007         return 0;
3008 }
3009
3010 int rtl8180_open(struct net_device *dev)
3011 {
3012         struct r8180_priv *priv = ieee80211_priv(dev);
3013         int ret;
3014
3015         down(&priv->wx_sem);
3016         ret = rtl8180_up(dev);
3017         up(&priv->wx_sem);
3018         return ret;
3019 }
3020
3021 int rtl8180_up(struct net_device *dev)
3022 {
3023         struct r8180_priv *priv = ieee80211_priv(dev);
3024
3025         if (priv->up == 1)
3026                 return -1;
3027
3028         return _rtl8180_up(dev);
3029 }
3030
3031 int rtl8180_close(struct net_device *dev)
3032 {
3033         struct r8180_priv *priv = ieee80211_priv(dev);
3034         int ret;
3035
3036         down(&priv->wx_sem);
3037         ret = rtl8180_down(dev);
3038         up(&priv->wx_sem);
3039
3040         return ret;
3041 }
3042
3043 int rtl8180_down(struct net_device *dev)
3044 {
3045         struct r8180_priv *priv = ieee80211_priv(dev);
3046
3047         if (priv->up == 0)
3048                 return -1;
3049
3050         priv->up = 0;
3051
3052         ieee80211_softmac_stop_protocol(priv->ieee80211);
3053         /* FIXME */
3054         if (!netif_queue_stopped(dev))
3055                 netif_stop_queue(dev);
3056         rtl8180_rtx_disable(dev);
3057         rtl8180_irq_disable(dev);
3058         del_timer_sync(&priv->watch_dog_timer);
3059         del_timer_sync(&priv->rateadapter_timer);
3060         cancel_delayed_work(&priv->ieee80211->rate_adapter_wq);
3061         cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
3062         cancel_delayed_work(&priv->ieee80211->hw_sleep_wq);
3063         cancel_delayed_work(&priv->ieee80211->hw_dig_wq);
3064         cancel_delayed_work(&priv->ieee80211->tx_pw_wq);
3065         del_timer_sync(&priv->SwAntennaDiversityTimer);
3066         SetZebraRFPowerState8185(dev, eRfOff);
3067         memset(&(priv->ieee80211->current_network), 0, sizeof(struct ieee80211_network));
3068         priv->ieee80211->state = IEEE80211_NOLINK;
3069         return 0;
3070 }
3071
3072 void rtl8180_restart_wq(struct work_struct *work)
3073 {
3074         struct r8180_priv *priv = container_of(work, struct r8180_priv, reset_wq);
3075         struct net_device *dev = priv->dev;
3076
3077         down(&priv->wx_sem);
3078
3079         rtl8180_commit(dev);
3080
3081         up(&priv->wx_sem);
3082 }
3083
3084 void rtl8180_restart(struct net_device *dev)
3085 {
3086         struct r8180_priv *priv = ieee80211_priv(dev);
3087
3088         schedule_work(&priv->reset_wq);
3089 }
3090
3091 void rtl8180_commit(struct net_device *dev)
3092 {
3093         struct r8180_priv *priv = ieee80211_priv(dev);
3094
3095         if (priv->up == 0)
3096                 return ;
3097
3098         del_timer_sync(&priv->watch_dog_timer);
3099         del_timer_sync(&priv->rateadapter_timer);
3100         cancel_delayed_work(&priv->ieee80211->rate_adapter_wq);
3101         cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
3102         cancel_delayed_work(&priv->ieee80211->hw_sleep_wq);
3103         cancel_delayed_work(&priv->ieee80211->hw_dig_wq);
3104         cancel_delayed_work(&priv->ieee80211->tx_pw_wq);
3105         del_timer_sync(&priv->SwAntennaDiversityTimer);
3106         ieee80211_softmac_stop_protocol(priv->ieee80211);
3107         rtl8180_irq_disable(dev);
3108         rtl8180_rtx_disable(dev);
3109         _rtl8180_up(dev);
3110 }
3111
3112 static void r8180_set_multicast(struct net_device *dev)
3113 {
3114         struct r8180_priv *priv = ieee80211_priv(dev);
3115         short promisc;
3116
3117         promisc = (dev->flags & IFF_PROMISC) ? 1 : 0;
3118
3119         if (promisc != priv->promisc)
3120                 rtl8180_restart(dev);
3121
3122         priv->promisc = promisc;
3123 }
3124
3125 int r8180_set_mac_adr(struct net_device *dev, void *mac)
3126 {
3127         struct r8180_priv *priv = ieee80211_priv(dev);
3128         struct sockaddr *addr = mac;
3129
3130         down(&priv->wx_sem);
3131
3132         memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
3133
3134         if (priv->ieee80211->iw_mode == IW_MODE_MASTER)
3135                 memcpy(priv->ieee80211->current_network.bssid, dev->dev_addr, ETH_ALEN);
3136
3137         if (priv->up) {
3138                 rtl8180_down(dev);
3139                 rtl8180_up(dev);
3140         }
3141
3142         up(&priv->wx_sem);
3143
3144         return 0;
3145 }
3146
3147 /* based on ipw2200 driver */
3148 int rtl8180_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
3149 {
3150         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
3151         struct iwreq *wrq = (struct iwreq *) rq;
3152         int ret = -1;
3153
3154         switch (cmd) {
3155         case RTL_IOCTL_WPA_SUPPLICANT:
3156                 ret = ieee80211_wpa_supplicant_ioctl(priv->ieee80211, &wrq->u.data);
3157                 return ret;
3158         default:
3159                 return -EOPNOTSUPP;
3160         }
3161
3162         return -EOPNOTSUPP;
3163 }
3164
3165 static const struct net_device_ops rtl8180_netdev_ops = {
3166         .ndo_open               = rtl8180_open,
3167         .ndo_stop               = rtl8180_close,
3168         .ndo_get_stats          = rtl8180_stats,
3169         .ndo_tx_timeout         = rtl8180_restart,
3170         .ndo_do_ioctl           = rtl8180_ioctl,
3171         .ndo_set_rx_mode        = r8180_set_multicast,
3172         .ndo_set_mac_address    = r8180_set_mac_adr,
3173         .ndo_validate_addr      = eth_validate_addr,
3174         .ndo_change_mtu         = eth_change_mtu,
3175         .ndo_start_xmit         = ieee80211_rtl_xmit,
3176 };
3177
3178 static int __devinit rtl8180_pci_probe(struct pci_dev *pdev,
3179                                        const struct pci_device_id *id)
3180 {
3181         unsigned long ioaddr = 0;
3182         struct net_device *dev = NULL;
3183         struct r8180_priv *priv = NULL;
3184         u8 unit = 0;
3185         int ret = -ENODEV;
3186
3187         unsigned long pmem_start, pmem_len, pmem_flags;
3188
3189         DMESG("Configuring chip resources");
3190
3191         if (pci_enable_device(pdev)) {
3192                 DMESG("Failed to enable PCI device");
3193                 return -EIO;
3194         }
3195
3196         pci_set_master(pdev);
3197         pci_set_dma_mask(pdev, 0xffffff00ULL);
3198         pci_set_consistent_dma_mask(pdev, 0xffffff00ULL);
3199         dev = alloc_ieee80211(sizeof(struct r8180_priv));
3200         if (!dev) {
3201                 ret = -ENOMEM;
3202                 goto fail_free;
3203         }
3204         priv = ieee80211_priv(dev);
3205         priv->ieee80211 = netdev_priv(dev);
3206
3207         pci_set_drvdata(pdev, dev);
3208         SET_NETDEV_DEV(dev, &pdev->dev);
3209
3210         priv = ieee80211_priv(dev);
3211         priv->pdev = pdev;
3212
3213         pmem_start = pci_resource_start(pdev, 1);
3214         pmem_len = pci_resource_len(pdev, 1);
3215         pmem_flags = pci_resource_flags(pdev, 1);
3216
3217         if (!(pmem_flags & IORESOURCE_MEM)) {
3218                 DMESG("region #1 not a MMIO resource, aborting");
3219                 goto fail;
3220         }
3221
3222         if (!request_mem_region(pmem_start, pmem_len, RTL8180_MODULE_NAME)) {
3223                 DMESG("request_mem_region failed!");
3224                 goto fail;
3225         }
3226
3227         ioaddr = (unsigned long)ioremap_nocache(pmem_start, pmem_len);
3228         if (ioaddr == (unsigned long)NULL) {
3229                 DMESG("ioremap failed!");
3230                 goto fail1;
3231         }
3232
3233         dev->mem_start = ioaddr; /* shared mem start */
3234         dev->mem_end = ioaddr + pci_resource_len(pdev, 0); /* shared mem end */
3235
3236         pci_read_config_byte(pdev, 0x05, &unit);
3237         pci_write_config_byte(pdev, 0x05, unit & (~0x04));
3238
3239         dev->irq = pdev->irq;
3240         priv->irq = 0;
3241
3242         dev->netdev_ops = &rtl8180_netdev_ops;
3243         dev->wireless_handlers = &r8180_wx_handlers_def;
3244
3245         dev->type = ARPHRD_ETHER;
3246         dev->watchdog_timeo = HZ*3;
3247
3248         if (dev_alloc_name(dev, ifname) < 0) {
3249                 DMESG("Oops: devname already taken! Trying wlan%%d...\n");
3250                 strcpy(ifname, "wlan%d");
3251                 dev_alloc_name(dev, ifname);
3252         }
3253
3254         if (rtl8180_init(dev) != 0) {
3255                 DMESG("Initialization failed");
3256                 goto fail1;
3257         }
3258
3259         netif_carrier_off(dev);
3260
3261         if (register_netdev(dev))
3262                 goto fail1;
3263
3264         rtl8180_proc_init_one(dev);
3265
3266         DMESG("Driver probe completed\n");
3267         return 0;
3268 fail1:
3269         if (dev->mem_start != (unsigned long)NULL) {
3270                 iounmap((void *)dev->mem_start);
3271                 release_mem_region(pci_resource_start(pdev, 1),
3272                                    pci_resource_len(pdev, 1));
3273         }
3274 fail:
3275         if (dev) {
3276                 if (priv->irq) {
3277                         free_irq(dev->irq, dev);
3278                         dev->irq = 0;
3279                 }
3280                 free_ieee80211(dev);
3281         }
3282
3283 fail_free:
3284         pci_disable_device(pdev);
3285
3286         DMESG("wlan driver load failed\n");
3287         pci_set_drvdata(pdev, NULL);
3288         return ret;
3289 }
3290
3291 static void __devexit rtl8180_pci_remove(struct pci_dev *pdev)
3292 {
3293         struct r8180_priv *priv;
3294         struct net_device *dev = pci_get_drvdata(pdev);
3295
3296         if (dev) {
3297                 unregister_netdev(dev);
3298
3299                 priv = ieee80211_priv(dev);
3300
3301                 rtl8180_proc_remove_one(dev);
3302                 rtl8180_down(dev);
3303                 priv->rf_close(dev);
3304                 rtl8180_reset(dev);
3305                 mdelay(10);
3306
3307                 if (priv->irq) {
3308                         DMESG("Freeing irq %d", dev->irq);
3309                         free_irq(dev->irq, dev);
3310                         priv->irq = 0;
3311                 }
3312
3313                 free_rx_desc_ring(dev);
3314                 free_tx_desc_rings(dev);
3315
3316                 if (dev->mem_start != (unsigned long)NULL) {
3317                         iounmap((void *)dev->mem_start);
3318                         release_mem_region(pci_resource_start(pdev, 1),
3319                                            pci_resource_len(pdev, 1));
3320                 }
3321
3322                 free_ieee80211(dev);
3323         }
3324         pci_disable_device(pdev);
3325
3326         DMESG("wlan driver removed\n");
3327 }
3328
3329 /* fun with the built-in ieee80211 stack... */
3330 extern int ieee80211_crypto_init(void);
3331 extern void ieee80211_crypto_deinit(void);
3332 extern int ieee80211_crypto_tkip_init(void);
3333 extern void ieee80211_crypto_tkip_exit(void);
3334 extern int ieee80211_crypto_ccmp_init(void);
3335 extern void ieee80211_crypto_ccmp_exit(void);
3336 extern int ieee80211_crypto_wep_init(void);
3337 extern void ieee80211_crypto_wep_exit(void);
3338
3339 static int __init rtl8180_pci_module_init(void)
3340 {
3341         int ret;
3342
3343         ret = ieee80211_crypto_init();
3344         if (ret) {
3345                 printk(KERN_ERR "ieee80211_crypto_init() failed %d\n", ret);
3346                 return ret;
3347         }
3348         ret = ieee80211_crypto_tkip_init();
3349         if (ret) {
3350                 printk(KERN_ERR "ieee80211_crypto_tkip_init() failed %d\n", ret);
3351                 return ret;
3352         }
3353         ret = ieee80211_crypto_ccmp_init();
3354         if (ret) {
3355                 printk(KERN_ERR "ieee80211_crypto_ccmp_init() failed %d\n", ret);
3356                 return ret;
3357         }
3358         ret = ieee80211_crypto_wep_init();
3359         if (ret) {
3360                 printk(KERN_ERR "ieee80211_crypto_wep_init() failed %d\n", ret);
3361                 return ret;
3362         }
3363
3364         printk(KERN_INFO "\nLinux kernel driver for RTL8180 / RTL8185 based WLAN cards\n");
3365         printk(KERN_INFO "Copyright (c) 2004-2005, Andrea Merello\n");
3366         DMESG("Initializing module");
3367         DMESG("Wireless extensions version %d", WIRELESS_EXT);
3368         rtl8180_proc_module_init();
3369
3370         if (pci_register_driver(&rtl8180_pci_driver)) {
3371                 DMESG("No device found");
3372                 return -ENODEV;
3373         }
3374         return 0;
3375 }
3376
3377 static void __exit rtl8180_pci_module_exit(void)
3378 {
3379         pci_unregister_driver(&rtl8180_pci_driver);
3380         rtl8180_proc_module_remove();
3381         ieee80211_crypto_tkip_exit();
3382         ieee80211_crypto_ccmp_exit();
3383         ieee80211_crypto_wep_exit();
3384         ieee80211_crypto_deinit();
3385         DMESG("Exiting");
3386 }
3387
3388 void rtl8180_try_wake_queue(struct net_device *dev, int pri)
3389 {
3390         unsigned long flags;
3391         short enough_desc;
3392         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
3393
3394         spin_lock_irqsave(&priv->tx_lock, flags);
3395         enough_desc = check_nic_enought_desc(dev, pri);
3396         spin_unlock_irqrestore(&priv->tx_lock, flags);
3397
3398         if (enough_desc)
3399                 ieee80211_rtl_wake_queue(priv->ieee80211);
3400 }
3401
3402 void rtl8180_tx_isr(struct net_device *dev, int pri, short error)
3403 {
3404         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
3405         u32 *tail; /* tail virtual addr */
3406         u32 *head; /* head virtual addr */
3407         u32 *begin; /* start of ring virtual addr */
3408         u32 *nicv; /* nic pointer virtual addr */
3409         u32 nic; /* nic pointer physical addr */
3410         u32 nicbegin; /* start of ring physical addr */
3411         unsigned long flag;
3412         /* physical addr are ok on 32 bits since we set DMA mask */
3413         int offs;
3414         int j, i;
3415         int hd;
3416         if (error)
3417                 priv->stats.txretry++; /* tony 20060601 */
3418         spin_lock_irqsave(&priv->tx_lock, flag);
3419         switch (pri) {
3420         case MANAGE_PRIORITY:
3421                 tail = priv->txmapringtail;
3422                 begin = priv->txmapring;
3423                 head = priv->txmapringhead;
3424                 nic = read_nic_dword(dev, TX_MANAGEPRIORITY_RING_ADDR);
3425                 nicbegin = priv->txmapringdma;
3426                 break;
3427         case BK_PRIORITY:
3428                 tail = priv->txbkpringtail;
3429                 begin = priv->txbkpring;
3430                 head = priv->txbkpringhead;
3431                 nic = read_nic_dword(dev, TX_BKPRIORITY_RING_ADDR);
3432                 nicbegin = priv->txbkpringdma;
3433                 break;
3434         case BE_PRIORITY:
3435                 tail = priv->txbepringtail;
3436                 begin = priv->txbepring;
3437                 head = priv->txbepringhead;
3438                 nic = read_nic_dword(dev, TX_BEPRIORITY_RING_ADDR);
3439                 nicbegin = priv->txbepringdma;
3440                 break;
3441         case VI_PRIORITY:
3442                 tail = priv->txvipringtail;
3443                 begin = priv->txvipring;
3444                 head = priv->txvipringhead;
3445                 nic = read_nic_dword(dev, TX_VIPRIORITY_RING_ADDR);
3446                 nicbegin = priv->txvipringdma;
3447                 break;
3448         case VO_PRIORITY:
3449                 tail = priv->txvopringtail;
3450                 begin = priv->txvopring;
3451                 head = priv->txvopringhead;
3452                 nic = read_nic_dword(dev, TX_VOPRIORITY_RING_ADDR);
3453                 nicbegin = priv->txvopringdma;
3454                 break;
3455         case HI_PRIORITY:
3456                 tail = priv->txhpringtail;
3457                 begin = priv->txhpring;
3458                 head = priv->txhpringhead;
3459                 nic = read_nic_dword(dev, TX_HIGHPRIORITY_RING_ADDR);
3460                 nicbegin = priv->txhpringdma;
3461                 break;
3462
3463         default:
3464                 spin_unlock_irqrestore(&priv->tx_lock, flag);
3465                 return ;
3466         }
3467
3468         nicv = (u32 *)((nic - nicbegin) + (u8*)begin);
3469         if ((head <= tail && (nicv > tail || nicv < head)) ||
3470                 (head > tail && (nicv > tail && nicv < head))) {
3471                         DMESGW("nic has lost pointer");
3472                         spin_unlock_irqrestore(&priv->tx_lock, flag);
3473                         rtl8180_restart(dev);
3474                         return;
3475                 }
3476
3477         /*
3478          * We check all the descriptors between the head and the nic,
3479          * but not the currently pointed by the nic (the next to be txed)
3480          * and the previous of the pointed (might be in process ??)
3481          */
3482         offs = (nic - nicbegin);
3483         offs = offs / 8 / 4;
3484         hd = (head - begin) / 8;
3485
3486         if (offs >= hd)
3487                 j = offs - hd;
3488         else
3489                 j = offs + (priv->txringcount-1-hd);
3490
3491         j -= 2;
3492         if (j < 0)
3493                 j = 0;
3494
3495         for (i = 0; i < j; i++) {
3496                 if ((*head) & (1<<31))
3497                         break;
3498                 if (((*head)&(0x10000000)) != 0) {
3499                         priv->CurrRetryCnt += (u16)((*head) & (0x000000ff));
3500                         if (!error)
3501                                 priv->NumTxOkTotal++;
3502                 }
3503
3504                 if (!error)
3505                         priv->NumTxOkBytesTotal += (*(head+3)) & (0x00000fff);
3506
3507                 *head = *head & ~(1<<31);
3508
3509                 if ((head - begin)/8 == priv->txringcount-1)
3510                         head = begin;
3511                 else
3512                         head += 8;
3513         }
3514
3515         /*
3516          * The head has been moved to the last certainly TXed
3517          * (or at least processed by the nic) packet.
3518          * The driver take forcefully owning of all these packets
3519          * If the packet previous of the nic pointer has been
3520          * processed this doesn't matter: it will be checked
3521          * here at the next round. Anyway if no more packet are
3522          * TXed no memory leak occur at all.
3523          */
3524
3525         switch (pri) {
3526         case MANAGE_PRIORITY:
3527                 priv->txmapringhead = head;
3528
3529                 if (priv->ack_tx_to_ieee) {
3530                         if (rtl8180_is_tx_queue_empty(dev)) {
3531                                 priv->ack_tx_to_ieee = 0;
3532                                 ieee80211_ps_tx_ack(priv->ieee80211, !error);
3533                         }
3534                 }
3535                 break;
3536         case BK_PRIORITY:
3537                 priv->txbkpringhead = head;
3538                 break;
3539         case BE_PRIORITY:
3540                 priv->txbepringhead = head;
3541                 break;
3542         case VI_PRIORITY:
3543                 priv->txvipringhead = head;
3544                 break;
3545         case VO_PRIORITY:
3546                 priv->txvopringhead = head;
3547                 break;
3548         case HI_PRIORITY:
3549                 priv->txhpringhead = head;
3550                 break;
3551         }
3552
3553         spin_unlock_irqrestore(&priv->tx_lock, flag);
3554 }
3555
3556 irqreturn_t rtl8180_interrupt(int irq, void *netdev, struct pt_regs *regs)
3557 {
3558         struct net_device *dev = (struct net_device *) netdev;
3559         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
3560         unsigned long flags;
3561         u32 inta;
3562
3563         /* We should return IRQ_NONE, but for now let me keep this */
3564         if (priv->irq_enabled == 0)
3565                 return IRQ_HANDLED;
3566
3567         spin_lock_irqsave(&priv->irq_th_lock, flags);
3568
3569         /* ISR: 4bytes */
3570         inta = read_nic_dword(dev, ISR); /* & priv->IntrMask; */
3571         write_nic_dword(dev, ISR, inta); /* reset int situation */
3572
3573         priv->stats.shints++;
3574
3575         if (!inta) {
3576                 spin_unlock_irqrestore(&priv->irq_th_lock, flags);
3577                 return IRQ_HANDLED;
3578         /*
3579          * most probably we can safely return IRQ_NONE,
3580          * but for now is better to avoid problems
3581          */
3582         }
3583
3584         if (inta == 0xffff) {
3585                 /* HW disappeared */
3586                 spin_unlock_irqrestore(&priv->irq_th_lock, flags);
3587                 return IRQ_HANDLED;
3588         }
3589
3590         priv->stats.ints++;
3591
3592         if (!netif_running(dev)) {
3593                 spin_unlock_irqrestore(&priv->irq_th_lock, flags);
3594                 return IRQ_HANDLED;
3595         }
3596
3597         if (inta & ISR_TimeOut)
3598                 write_nic_dword(dev, TimerInt, 0);
3599
3600         if (inta & ISR_TBDOK)
3601                 priv->stats.txbeacon++;
3602
3603         if (inta & ISR_TBDER)
3604                 priv->stats.txbeaconerr++;
3605
3606         if (inta & IMR_TMGDOK)
3607                 rtl8180_tx_isr(dev, MANAGE_PRIORITY, 0);
3608
3609         if (inta & ISR_THPDER) {
3610                 priv->stats.txhperr++;
3611                 rtl8180_tx_isr(dev, HI_PRIORITY, 1);
3612                 priv->ieee80211->stats.tx_errors++;
3613         }
3614
3615         if (inta & ISR_THPDOK) { /* High priority tx ok */
3616                 priv->link_detect.NumTxOkInPeriod++; /* YJ,add,080828 */
3617                 priv->stats.txhpokint++;
3618                 rtl8180_tx_isr(dev, HI_PRIORITY, 0);
3619         }
3620
3621         if (inta & ISR_RER)
3622                 priv->stats.rxerr++;
3623
3624         if (inta & ISR_TBKDER) { /* corresponding to BK_PRIORITY */
3625                 priv->stats.txbkperr++;
3626                 priv->ieee80211->stats.tx_errors++;
3627                 rtl8180_tx_isr(dev, BK_PRIORITY, 1);
3628                 rtl8180_try_wake_queue(dev, BK_PRIORITY);
3629         }
3630
3631         if (inta & ISR_TBEDER) { /* corresponding to BE_PRIORITY */
3632                 priv->stats.txbeperr++;
3633                 priv->ieee80211->stats.tx_errors++;
3634                 rtl8180_tx_isr(dev, BE_PRIORITY, 1);
3635                 rtl8180_try_wake_queue(dev, BE_PRIORITY);
3636         }
3637         if (inta & ISR_TNPDER) { /* corresponding to VO_PRIORITY */
3638                 priv->stats.txnperr++;
3639                 priv->ieee80211->stats.tx_errors++;
3640                 rtl8180_tx_isr(dev, NORM_PRIORITY, 1);
3641                 rtl8180_try_wake_queue(dev, NORM_PRIORITY);
3642         }
3643
3644         if (inta & ISR_TLPDER) { /* corresponding to VI_PRIORITY */
3645                 priv->stats.txlperr++;
3646                 priv->ieee80211->stats.tx_errors++;
3647                 rtl8180_tx_isr(dev, LOW_PRIORITY, 1);
3648                 rtl8180_try_wake_queue(dev, LOW_PRIORITY);
3649         }
3650
3651         if (inta & ISR_ROK) {
3652                 priv->stats.rxint++;
3653                 tasklet_schedule(&priv->irq_rx_tasklet);
3654         }
3655
3656         if (inta & ISR_RQoSOK) {
3657                 priv->stats.rxint++;
3658                 tasklet_schedule(&priv->irq_rx_tasklet);
3659         }
3660
3661         if (inta & ISR_BcnInt)
3662                 rtl8180_prepare_beacon(dev);
3663
3664         if (inta & ISR_RDU) {
3665                 DMESGW("No RX descriptor available");
3666                 priv->stats.rxrdu++;
3667                 tasklet_schedule(&priv->irq_rx_tasklet);
3668         }
3669
3670         if (inta & ISR_RXFOVW) {
3671                 priv->stats.rxoverflow++;
3672                 tasklet_schedule(&priv->irq_rx_tasklet);
3673         }
3674
3675         if (inta & ISR_TXFOVW)
3676                 priv->stats.txoverflow++;
3677
3678         if (inta & ISR_TNPDOK) { /* Normal priority tx ok */
3679                 priv->link_detect.NumTxOkInPeriod++; /* YJ,add,080828 */
3680                 priv->stats.txnpokint++;
3681                 rtl8180_tx_isr(dev, NORM_PRIORITY, 0);
3682                 rtl8180_try_wake_queue(dev, NORM_PRIORITY);
3683         }
3684
3685         if (inta & ISR_TLPDOK) { /* Low priority tx ok */
3686                 priv->link_detect.NumTxOkInPeriod++; /* YJ,add,080828 */
3687                 priv->stats.txlpokint++;
3688                 rtl8180_tx_isr(dev, LOW_PRIORITY, 0);
3689                 rtl8180_try_wake_queue(dev, LOW_PRIORITY);
3690         }
3691
3692         if (inta & ISR_TBKDOK) { /* corresponding to BK_PRIORITY */
3693                 priv->stats.txbkpokint++;
3694                 priv->link_detect.NumTxOkInPeriod++; /* YJ,add,080828 */
3695                 rtl8180_tx_isr(dev, BK_PRIORITY, 0);
3696                 rtl8180_try_wake_queue(dev, BE_PRIORITY);
3697         }
3698
3699         if (inta & ISR_TBEDOK) { /* corresponding to BE_PRIORITY */
3700                 priv->stats.txbeperr++;
3701                 priv->link_detect.NumTxOkInPeriod++; /* YJ,add,080828 */
3702                 rtl8180_tx_isr(dev, BE_PRIORITY, 0);
3703                 rtl8180_try_wake_queue(dev, BE_PRIORITY);
3704         }
3705         force_pci_posting(dev);
3706         spin_unlock_irqrestore(&priv->irq_th_lock, flags);
3707
3708         return IRQ_HANDLED;
3709 }
3710
3711 void rtl8180_irq_rx_tasklet(struct r8180_priv *priv)
3712 {
3713         rtl8180_rx(priv->dev);
3714 }
3715
3716 void GPIOChangeRFWorkItemCallBack(struct work_struct *work)
3717 {
3718         struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, GPIOChangeRFWorkItem.work);
3719         struct net_device *dev = ieee->dev;
3720         struct r8180_priv *priv = ieee80211_priv(dev);
3721         u8 btPSR;
3722         u8 btConfig0;
3723         RT_RF_POWER_STATE       eRfPowerStateToSet;
3724         bool bActuallySet = false;
3725
3726         char *argv[3];
3727         static char *RadioPowerPath = "/etc/acpi/events/RadioPower.sh";
3728         static char *envp[] = {"HOME=/", "TERM=linux", "PATH=/usr/bin:/bin", NULL};
3729         static int readf_count = 0;
3730
3731         readf_count = (readf_count+1)%0xffff;
3732         /* We should turn off LED before polling FF51[4]. */
3733
3734         /* Turn off LED. */
3735         btPSR = read_nic_byte(dev, PSR);
3736         write_nic_byte(dev, PSR, (btPSR & ~BIT3));
3737
3738         /* It need to delay 4us suggested by Jong, 2008-01-16 */
3739         udelay(4);
3740
3741         /* HW radio On/Off according to the value of FF51[4](config0) */
3742         btConfig0 = btPSR = read_nic_byte(dev, CONFIG0);
3743
3744         eRfPowerStateToSet = (btConfig0 & BIT4) ?  eRfOn : eRfOff;
3745
3746         /* Turn LED back on when radio enabled */
3747         if (eRfPowerStateToSet == eRfOn)
3748                 write_nic_byte(dev, PSR, btPSR | BIT3);
3749
3750         if ((priv->ieee80211->bHwRadioOff == true) &&
3751            (eRfPowerStateToSet == eRfOn)) {
3752                 priv->ieee80211->bHwRadioOff = false;
3753                 bActuallySet = true;
3754         } else if ((priv->ieee80211->bHwRadioOff == false) &&
3755                   (eRfPowerStateToSet == eRfOff)) {
3756                 priv->ieee80211->bHwRadioOff = true;
3757                 bActuallySet = true;
3758         }
3759
3760         if (bActuallySet) {
3761                 MgntActSet_RF_State(dev, eRfPowerStateToSet, RF_CHANGE_BY_HW);
3762
3763                 /* To update the UI status for Power status changed */
3764                 if (priv->ieee80211->bHwRadioOff == true)
3765                         argv[1] = "RFOFF";
3766                 else
3767                         argv[1] = "RFON";
3768                 argv[0] = RadioPowerPath;
3769                 argv[2] = NULL;
3770
3771                 call_usermodehelper(RadioPowerPath, argv, envp, UMH_WAIT_PROC);
3772         }
3773 }
3774
3775 module_init(rtl8180_pci_module_init);
3776 module_exit(rtl8180_pci_module_exit);