4 * lirc_serial - Device driver that records pulse- and pause-lengths
5 * (space-lengths) between DDCD event on a serial port.
7 * Copyright (C) 1996,97 Ralph Metzler <rjkm@thp.uni-koeln.de>
8 * Copyright (C) 1998 Trent Piepho <xyzzy@u.washington.edu>
9 * Copyright (C) 1998 Ben Pfaff <blp@gnu.org>
10 * Copyright (C) 1999 Christoph Bartelmus <lirc@bartelmus.de>
11 * Copyright (C) 2007 Andrei Tanas <andrei@tanas.ca> (suspend/resume support)
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
29 * Steve's changes to improve transmission fidelity:
30 * - for systems with the rdtsc instruction and the clock counter, a
31 * send_pule that times the pulses directly using the counter.
32 * This means that the LIRC_SERIAL_TRANSMITTER_LATENCY fudge is
33 * not needed. Measurement shows very stable waveform, even where
34 * PCI activity slows the access to the UART, which trips up other
36 * - For other system, non-integer-microsecond pulse/space lengths,
37 * done using fixed point binary. So, much more accurate carrier
39 * - fine tuned transmitter latency, taking advantage of fractional
40 * microseconds in previous change
41 * - Fixed bug in the way transmitter latency was accounted for by
42 * tuning the pulse lengths down - the send_pulse routine ignored
43 * this overhead as it timed the overall pulse length - so the
44 * pulse frequency was right but overall pulse length was too
45 * long. Fixed by accounting for latency on each pulse/space
48 * Steve Davies <steve@daviesfam.org> July 2001
51 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
53 #include <linux/module.h>
54 #include <linux/errno.h>
55 #include <linux/signal.h>
56 #include <linux/sched.h>
58 #include <linux/interrupt.h>
59 #include <linux/ioport.h>
60 #include <linux/kernel.h>
61 #include <linux/serial_reg.h>
62 #include <linux/time.h>
63 #include <linux/string.h>
64 #include <linux/types.h>
65 #include <linux/wait.h>
67 #include <linux/delay.h>
68 #include <linux/poll.h>
69 #include <linux/platform_device.h>
72 #include <linux/irq.h>
73 #include <linux/fcntl.h>
74 #include <linux/spinlock.h>
76 #ifdef CONFIG_LIRC_SERIAL_NSLU2
77 #include <asm/hardware.h>
79 /* From Intel IXP42X Developer's Manual (#252480-005): */
80 /* ftp://download.intel.com/design/network/manuals/25248005.pdf */
81 #define UART_IE_IXP42X_UUE 0x40 /* IXP42X UART Unit enable */
82 #define UART_IE_IXP42X_RTOIE 0x10 /* IXP42X Receiver Data Timeout int.enable */
84 #include <media/lirc.h>
85 #include <media/lirc_dev.h>
87 #define LIRC_DRIVER_NAME "lirc_serial"
91 int signal_pin_change;
94 long (*send_pulse)(unsigned long length);
95 void (*send_space)(long length);
100 #define LIRC_HOMEBREW 0
102 #define LIRC_IRDEO_REMOTE 2
103 #define LIRC_ANIMAX 3
107 /*** module parameters ***/
113 static bool softcarrier = 1;
114 static bool share_irq;
116 static int sense = -1; /* -1 = auto, 0 = active high, 1 = active low */
117 static bool txsense; /* 0 = active high, 1 = active low */
119 #define dprintk(fmt, args...) \
122 printk(KERN_DEBUG LIRC_DRIVER_NAME ": " \
126 /* forward declarations */
127 static long send_pulse_irdeo(unsigned long length);
128 static long send_pulse_homebrew(unsigned long length);
129 static void send_space_irdeo(long length);
130 static void send_space_homebrew(long length);
132 static struct lirc_serial hardware[] = {
134 .lock = __SPIN_LOCK_UNLOCKED(hardware[LIRC_HOMEBREW].lock),
135 .signal_pin = UART_MSR_DCD,
136 .signal_pin_change = UART_MSR_DDCD,
137 .on = (UART_MCR_RTS | UART_MCR_OUT2 | UART_MCR_DTR),
138 .off = (UART_MCR_RTS | UART_MCR_OUT2),
139 .send_pulse = send_pulse_homebrew,
140 .send_space = send_space_homebrew,
141 #ifdef CONFIG_LIRC_SERIAL_TRANSMITTER
142 .features = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
143 LIRC_CAN_SET_SEND_CARRIER |
144 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
146 .features = LIRC_CAN_REC_MODE2
151 .lock = __SPIN_LOCK_UNLOCKED(hardware[LIRC_IRDEO].lock),
152 .signal_pin = UART_MSR_DSR,
153 .signal_pin_change = UART_MSR_DDSR,
155 .off = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
156 .send_pulse = send_pulse_irdeo,
157 .send_space = send_space_irdeo,
158 .features = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
159 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
162 [LIRC_IRDEO_REMOTE] = {
163 .lock = __SPIN_LOCK_UNLOCKED(hardware[LIRC_IRDEO_REMOTE].lock),
164 .signal_pin = UART_MSR_DSR,
165 .signal_pin_change = UART_MSR_DDSR,
166 .on = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
167 .off = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
168 .send_pulse = send_pulse_irdeo,
169 .send_space = send_space_irdeo,
170 .features = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
171 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
175 .lock = __SPIN_LOCK_UNLOCKED(hardware[LIRC_ANIMAX].lock),
176 .signal_pin = UART_MSR_DCD,
177 .signal_pin_change = UART_MSR_DDCD,
179 .off = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
182 .features = LIRC_CAN_REC_MODE2
186 .lock = __SPIN_LOCK_UNLOCKED(hardware[LIRC_IGOR].lock),
187 .signal_pin = UART_MSR_DSR,
188 .signal_pin_change = UART_MSR_DDSR,
189 .on = (UART_MCR_RTS | UART_MCR_OUT2 | UART_MCR_DTR),
190 .off = (UART_MCR_RTS | UART_MCR_OUT2),
191 .send_pulse = send_pulse_homebrew,
192 .send_space = send_space_homebrew,
193 #ifdef CONFIG_LIRC_SERIAL_TRANSMITTER
194 .features = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
195 LIRC_CAN_SET_SEND_CARRIER |
196 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
198 .features = LIRC_CAN_REC_MODE2
202 #ifdef CONFIG_LIRC_SERIAL_NSLU2
204 * Modified Linksys Network Storage Link USB 2.0 (NSLU2):
205 * We receive on CTS of the 2nd serial port (R142,LHS), we
206 * transmit with a IR diode between GPIO[1] (green status LED),
207 * and ground (Matthias Goebl <matthias.goebl@goebl.net>).
208 * See also http://www.nslu2-linux.org for this device
211 .lock = __SPIN_LOCK_UNLOCKED(hardware[LIRC_NSLU2].lock),
212 .signal_pin = UART_MSR_CTS,
213 .signal_pin_change = UART_MSR_DCTS,
214 .on = (UART_MCR_RTS | UART_MCR_OUT2 | UART_MCR_DTR),
215 .off = (UART_MCR_RTS | UART_MCR_OUT2),
216 .send_pulse = send_pulse_homebrew,
217 .send_space = send_space_homebrew,
218 #ifdef CONFIG_LIRC_SERIAL_TRANSMITTER
219 .features = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
220 LIRC_CAN_SET_SEND_CARRIER |
221 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
223 .features = LIRC_CAN_REC_MODE2
230 #define RS_ISR_PASS_LIMIT 256
233 * A long pulse code from a remote might take up to 300 bytes. The
234 * daemon should read the bytes as soon as they are generated, so take
235 * the number of keys you think you can push before the daemon runs
236 * and multiply by 300. The driver will warn you if you overrun this
237 * buffer. If you have a slow computer or non-busmastering IDE disks,
238 * maybe you will need to increase this.
241 /* This MUST be a power of two! It has to be larger than 1 as well. */
245 static struct timeval lasttv = {0, 0};
247 static struct lirc_buffer rbuf;
249 static unsigned int freq = 38000;
250 static unsigned int duty_cycle = 50;
252 /* Initialized in init_timing_params() */
253 static unsigned long period;
254 static unsigned long pulse_width;
255 static unsigned long space_width;
257 #if defined(__i386__)
260 * Linux I/O port programming mini-HOWTO
261 * Author: Riku Saikkonen <Riku.Saikkonen@hut.fi>
262 * v, 28 December 1997
265 * Actually, a port I/O instruction on most ports in the 0-0x3ff range
266 * takes almost exactly 1 microsecond, so if you're, for example, using
267 * the parallel port directly, just do additional inb()s from that port
271 /* transmitter latency 1.5625us 0x1.90 - this figure arrived at from
272 * comment above plus trimming to match actual measured frequency.
273 * This will be sensitive to cpu speed, though hopefully most of the 1.5us
274 * is spent in the uart access. Still - for reference test machine was a
275 * 1.13GHz Athlon system - Steve
279 * changed from 400 to 450 as this works better on slower machines;
280 * faster machines will use the rdtsc code anyway
282 #define LIRC_SERIAL_TRANSMITTER_LATENCY 450
286 /* does anybody have information on other platforms ? */
288 #define LIRC_SERIAL_TRANSMITTER_LATENCY 256
290 #endif /* __i386__ */
292 * FIXME: should we be using hrtimers instead of this
293 * LIRC_SERIAL_TRANSMITTER_LATENCY nonsense?
296 /* fetch serial input packet (1 byte) from register offset */
297 static u8 sinp(int offset)
300 /* the register is memory-mapped */
303 return inb(io + offset);
306 /* write serial output packet (1 byte) of value to register offset */
307 static void soutp(int offset, u8 value)
310 /* the register is memory-mapped */
313 outb(value, io + offset);
318 #ifdef CONFIG_LIRC_SERIAL_NSLU2
320 * On NSLU2, we put the transmit diode between the output of the green
321 * status LED and ground
323 if (type == LIRC_NSLU2) {
324 gpio_line_set(NSLU2_LED_GRN, IXP4XX_GPIO_LOW);
329 soutp(UART_MCR, hardware[type].off);
331 soutp(UART_MCR, hardware[type].on);
334 static void off(void)
336 #ifdef CONFIG_LIRC_SERIAL_NSLU2
337 if (type == LIRC_NSLU2) {
338 gpio_line_set(NSLU2_LED_GRN, IXP4XX_GPIO_HIGH);
343 soutp(UART_MCR, hardware[type].on);
345 soutp(UART_MCR, hardware[type].off);
348 #ifndef MAX_UDELAY_MS
349 #define MAX_UDELAY_US 5000
351 #define MAX_UDELAY_US (MAX_UDELAY_MS*1000)
354 static void safe_udelay(unsigned long usecs)
356 while (usecs > MAX_UDELAY_US) {
357 udelay(MAX_UDELAY_US);
358 usecs -= MAX_UDELAY_US;
365 * This is an overflow/precision juggle, complicated in that we can't
366 * do long long divide in the kernel
370 * When we use the rdtsc instruction to measure clocks, we keep the
371 * pulse and space widths as clock cycles. As this is CPU speed
372 * dependent, the widths must be calculated in init_port and ioctl
376 /* So send_pulse can quickly convert microseconds to clocks */
377 static unsigned long conv_us_to_clocks;
379 static int init_timing_params(unsigned int new_duty_cycle,
380 unsigned int new_freq)
382 __u64 loops_per_sec, work;
384 duty_cycle = new_duty_cycle;
387 loops_per_sec = __this_cpu_read(cpu.info.loops_per_jiffy);
390 /* How many clocks in a microsecond?, avoiding long long divide */
391 work = loops_per_sec;
392 work *= 4295; /* 4295 = 2^32 / 1e6 */
393 conv_us_to_clocks = (work >> 32);
396 * Carrier period in clocks, approach good up to 32GHz clock,
397 * gets carrier frequency within 8Hz
399 period = loops_per_sec >> 3;
400 period /= (freq >> 3);
402 /* Derive pulse and space from the period */
403 pulse_width = period * duty_cycle / 100;
404 space_width = period - pulse_width;
405 dprintk("in init_timing_params, freq=%d, duty_cycle=%d, "
406 "clk/jiffy=%ld, pulse=%ld, space=%ld, "
407 "conv_us_to_clocks=%ld\n",
408 freq, duty_cycle, __this_cpu_read(cpu_info.loops_per_jiffy),
409 pulse_width, space_width, conv_us_to_clocks);
412 #else /* ! USE_RDTSC */
413 static int init_timing_params(unsigned int new_duty_cycle,
414 unsigned int new_freq)
417 * period, pulse/space width are kept with 8 binary places -
418 * IE multiplied by 256.
420 if (256 * 1000000L / new_freq * new_duty_cycle / 100 <=
421 LIRC_SERIAL_TRANSMITTER_LATENCY)
423 if (256 * 1000000L / new_freq * (100 - new_duty_cycle) / 100 <=
424 LIRC_SERIAL_TRANSMITTER_LATENCY)
426 duty_cycle = new_duty_cycle;
428 period = 256 * 1000000L / freq;
429 pulse_width = period * duty_cycle / 100;
430 space_width = period - pulse_width;
431 dprintk("in init_timing_params, freq=%d pulse=%ld, "
432 "space=%ld\n", freq, pulse_width, space_width);
435 #endif /* USE_RDTSC */
438 /* return value: space length delta */
440 static long send_pulse_irdeo(unsigned long length)
444 unsigned char output;
445 unsigned char chunk, shifted;
447 /* how many bits have to be sent ? */
448 rawbits = length * 1152 / 10000;
453 for (i = 0, output = 0x7f; rawbits > 0; rawbits -= 3) {
454 shifted = chunk << (i * 3);
456 output &= (~shifted);
459 soutp(UART_TX, output);
460 while (!(sinp(UART_LSR) & UART_LSR_THRE))
467 soutp(UART_TX, output);
468 while (!(sinp(UART_LSR) & UART_LSR_TEMT))
473 ret = (-rawbits) * 10000 / 1152;
475 ret = (3 - i) * 3 * 10000 / 1152 + (-rawbits) * 10000 / 1152;
481 /* Version that uses Pentium rdtsc instruction to measure clocks */
484 * This version does sub-microsecond timing using rdtsc instruction,
485 * and does away with the fudged LIRC_SERIAL_TRANSMITTER_LATENCY
486 * Implicitly i586 architecture... - Steve
489 static long send_pulse_homebrew_softcarrier(unsigned long length)
492 unsigned long target, start, now;
494 /* Get going quick as we can */
497 /* Convert length from microseconds to clocks */
498 length *= conv_us_to_clocks;
499 /* And loop till time is up - flipping at right intervals */
501 target = pulse_width;
504 * FIXME: This looks like a hard busy wait, without even an occasional,
505 * polite, cpu_relax() call. There's got to be a better way?
507 * The i2c code has the result of a lot of bit-banging work, I wonder if
508 * there's something there which could be helpful here.
510 while ((now - start) < length) {
511 /* Delay till flip time */
514 } while ((now - start) < target);
520 target += space_width;
523 target += pulse_width;
528 return ((now - start) - length) / conv_us_to_clocks;
530 #else /* ! USE_RDTSC */
531 /* Version using udelay() */
534 * here we use fixed point arithmetic, with 8
535 * fractional bits. that gets us within 0.1% or so of the right average
536 * frequency, albeit with some jitter in pulse length - Steve
539 /* To match 8 fractional bits used for pulse/space length */
541 static long send_pulse_homebrew_softcarrier(unsigned long length)
544 unsigned long actual, target, d;
547 actual = 0; target = 0; flag = 0;
548 while (actual < length) {
551 target += space_width;
554 target += pulse_width;
556 d = (target - actual -
557 LIRC_SERIAL_TRANSMITTER_LATENCY + 128) >> 8;
559 * Note - we've checked in ioctl that the pulse/space
560 * widths are big enough so that d is > 0
563 actual += (d << 8) + LIRC_SERIAL_TRANSMITTER_LATENCY;
566 return (actual-length) >> 8;
568 #endif /* USE_RDTSC */
570 static long send_pulse_homebrew(unsigned long length)
576 return send_pulse_homebrew_softcarrier(length);
584 static void send_space_irdeo(long length)
592 static void send_space_homebrew(long length)
600 static void rbwrite(int l)
602 if (lirc_buffer_full(&rbuf)) {
603 /* no new signals will be accepted */
604 dprintk("Buffer overrun\n");
607 lirc_buffer_write(&rbuf, (void *)&l);
610 static void frbwrite(int l)
612 /* simple noise filter */
613 static int pulse, space;
614 static unsigned int ptr;
616 if (ptr > 0 && (l & PULSE_BIT)) {
617 pulse += l & PULSE_MASK;
620 rbwrite(pulse | PULSE_BIT);
626 if (!(l & PULSE_BIT)) {
636 if (space > PULSE_MASK)
639 if (space > PULSE_MASK)
645 rbwrite(pulse | PULSE_BIT);
653 static irqreturn_t irq_handler(int i, void *blah)
660 static int last_dcd = -1;
662 if ((sinp(UART_IIR) & UART_IIR_NO_INT)) {
663 /* not our interrupt */
670 status = sinp(UART_MSR);
671 if (counter > RS_ISR_PASS_LIMIT) {
672 pr_warn("AIEEEE: We're caught!\n");
675 if ((status & hardware[type].signal_pin_change)
677 /* get current time */
678 do_gettimeofday(&tv);
680 /* New mode, written by Trent Piepho
681 <xyzzy@u.washington.edu>. */
684 * The old format was not very portable.
685 * We now use an int to pass pulses
686 * and spaces to user space.
688 * If PULSE_BIT is set a pulse has been
689 * received, otherwise a space has been
690 * received. The driver needs to know if your
691 * receiver is active high or active low, or
692 * the space/pulse sense could be
693 * inverted. The bits denoted by PULSE_MASK are
694 * the length in microseconds. Lengths greater
695 * than or equal to 16 seconds are clamped to
696 * PULSE_MASK. All other bits are unused.
697 * This is a much simpler interface for user
698 * programs, as well as eliminating "out of
699 * phase" errors with space/pulse
703 /* calc time since last interrupt in microseconds */
704 dcd = (status & hardware[type].signal_pin) ? 1 : 0;
706 if (dcd == last_dcd) {
707 pr_warn("ignoring spike: %d %d %lx %lx %lx %lx\n",
709 tv.tv_sec, lasttv.tv_sec,
710 tv.tv_usec, lasttv.tv_usec);
714 deltv = tv.tv_sec-lasttv.tv_sec;
715 if (tv.tv_sec < lasttv.tv_sec ||
716 (tv.tv_sec == lasttv.tv_sec &&
717 tv.tv_usec < lasttv.tv_usec)) {
718 pr_warn("AIEEEE: your clock just jumped backwards\n");
719 pr_warn("%d %d %lx %lx %lx %lx\n",
721 tv.tv_sec, lasttv.tv_sec,
722 tv.tv_usec, lasttv.tv_usec);
724 } else if (deltv > 15) {
725 data = PULSE_MASK; /* really long time */
728 pr_warn("AIEEEE: %d %d %lx %lx %lx %lx\n",
730 tv.tv_sec, lasttv.tv_sec,
731 tv.tv_usec, lasttv.tv_usec);
733 * detecting pulse while this
736 sense = sense ? 0 : 1;
739 data = (int) (deltv*1000000 +
742 frbwrite(dcd^sense ? data : (data|PULSE_BIT));
745 wake_up_interruptible(&rbuf.wait_poll);
747 } while (!(sinp(UART_IIR) & UART_IIR_NO_INT)); /* still pending ? */
752 static int hardware_init_port(void)
754 u8 scratch, scratch2, scratch3;
757 * This is a simple port existence test, borrowed from the autoconfig
758 * function in drivers/serial/8250.c
760 scratch = sinp(UART_IER);
765 scratch2 = sinp(UART_IER) & 0x0f;
766 soutp(UART_IER, 0x0f);
770 scratch3 = sinp(UART_IER) & 0x0f;
771 soutp(UART_IER, scratch);
772 if (scratch2 != 0 || scratch3 != 0x0f) {
773 /* we fail, there's nothing here */
774 pr_err("port existence test failed, cannot continue\n");
781 soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
783 /* First of all, disable all interrupts */
784 soutp(UART_IER, sinp(UART_IER) &
785 (~(UART_IER_MSI|UART_IER_RLSI|UART_IER_THRI|UART_IER_RDI)));
787 /* Clear registers. */
793 #ifdef CONFIG_LIRC_SERIAL_NSLU2
794 if (type == LIRC_NSLU2) {
795 /* Setup NSLU2 UART */
798 soutp(UART_IER, sinp(UART_IER) | UART_IE_IXP42X_UUE);
799 /* Disable Receiver data Time out interrupt */
800 soutp(UART_IER, sinp(UART_IER) & ~UART_IE_IXP42X_RTOIE);
801 /* set out2 = interrupt unmask; off() doesn't set MCR
803 soutp(UART_MCR, UART_MCR_RTS|UART_MCR_OUT2);
807 /* Set line for power source */
810 /* Clear registers again to be sure. */
818 case LIRC_IRDEO_REMOTE:
819 /* setup port to 7N1 @ 115200 Baud */
820 /* 7N1+start = 9 bits at 115200 ~ 3 bits at 38kHz */
823 soutp(UART_LCR, sinp(UART_LCR) | UART_LCR_DLAB);
824 /* Set divisor to 1 => 115200 Baud */
827 /* Set DLAB 0 + 7N1 */
828 soutp(UART_LCR, UART_LCR_WLEN7);
829 /* THR interrupt already disabled at this point */
838 static int lirc_serial_probe(struct platform_device *dev)
840 int i, nlow, nhigh, result;
842 result = request_irq(irq, irq_handler,
843 (share_irq ? IRQF_SHARED : 0),
844 LIRC_DRIVER_NAME, (void *)&hardware);
846 if (result == -EBUSY)
847 dev_err(&dev->dev, "IRQ %d busy\n", irq);
848 else if (result == -EINVAL)
849 dev_err(&dev->dev, "Bad irq number or handler\n");
853 /* Reserve io region. */
855 * Future MMAP-Developers: Attention!
856 * For memory mapped I/O you *might* need to use ioremap() first,
857 * for the NSLU2 it's done in boot code.
860 && (request_mem_region(iommap, 8 << ioshift,
861 LIRC_DRIVER_NAME) == NULL))
863 && (request_region(io, 8, LIRC_DRIVER_NAME) == NULL))) {
864 dev_err(&dev->dev, "port %04x already in use\n", io);
865 dev_warn(&dev->dev, "use 'setserial /dev/ttySX uart none'\n");
867 "or compile the serial port driver as module and\n");
868 dev_warn(&dev->dev, "make sure this module is loaded first\n");
873 result = hardware_init_port();
875 goto exit_release_region;
877 /* Initialize pulse/space widths */
878 init_timing_params(duty_cycle, freq);
880 /* If pin is high, then this must be an active low receiver. */
882 /* wait 1/2 sec for the power supply */
886 * probe 9 times every 0.04s, collect "votes" for
891 for (i = 0; i < 9; i++) {
892 if (sinp(UART_MSR) & hardware[type].signal_pin)
898 sense = (nlow >= nhigh ? 1 : 0);
899 dev_info(&dev->dev, "auto-detected active %s receiver\n",
900 sense ? "low" : "high");
902 dev_info(&dev->dev, "Manually using active %s receiver\n",
903 sense ? "low" : "high");
905 dprintk("Interrupt %d, port %04x obtained\n", irq, io);
910 release_mem_region(iommap, 8 << ioshift);
912 release_region(io, 8);
914 free_irq(irq, (void *)&hardware);
919 static int lirc_serial_remove(struct platform_device *dev)
921 free_irq(irq, (void *)&hardware);
924 release_mem_region(iommap, 8 << ioshift);
926 release_region(io, 8);
931 static int set_use_inc(void *data)
935 /* initialize timestamp */
936 do_gettimeofday(&lasttv);
938 spin_lock_irqsave(&hardware[type].lock, flags);
941 soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
943 soutp(UART_IER, sinp(UART_IER)|UART_IER_MSI);
945 spin_unlock_irqrestore(&hardware[type].lock, flags);
950 static void set_use_dec(void *data)
951 { unsigned long flags;
953 spin_lock_irqsave(&hardware[type].lock, flags);
956 soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
958 /* First of all, disable all interrupts */
959 soutp(UART_IER, sinp(UART_IER) &
960 (~(UART_IER_MSI|UART_IER_RLSI|UART_IER_THRI|UART_IER_RDI)));
961 spin_unlock_irqrestore(&hardware[type].lock, flags);
964 static ssize_t lirc_write(struct file *file, const char *buf,
965 size_t n, loff_t *ppos)
972 if (!(hardware[type].features & LIRC_CAN_SEND_PULSE))
975 count = n / sizeof(int);
976 if (n % sizeof(int) || count % 2 == 0)
978 wbuf = memdup_user(buf, n);
980 return PTR_ERR(wbuf);
981 spin_lock_irqsave(&hardware[type].lock, flags);
982 if (type == LIRC_IRDEO) {
986 for (i = 0; i < count; i++) {
988 hardware[type].send_space(wbuf[i] - delta);
990 delta = hardware[type].send_pulse(wbuf[i]);
993 spin_unlock_irqrestore(&hardware[type].lock, flags);
998 static long lirc_ioctl(struct file *filep, unsigned int cmd, unsigned long arg)
1004 case LIRC_GET_SEND_MODE:
1005 if (!(hardware[type].features&LIRC_CAN_SEND_MASK))
1006 return -ENOIOCTLCMD;
1008 result = put_user(LIRC_SEND2MODE
1009 (hardware[type].features&LIRC_CAN_SEND_MASK),
1015 case LIRC_SET_SEND_MODE:
1016 if (!(hardware[type].features&LIRC_CAN_SEND_MASK))
1017 return -ENOIOCTLCMD;
1019 result = get_user(value, (__u32 *) arg);
1022 /* only LIRC_MODE_PULSE supported */
1023 if (value != LIRC_MODE_PULSE)
1027 case LIRC_GET_LENGTH:
1028 return -ENOIOCTLCMD;
1031 case LIRC_SET_SEND_DUTY_CYCLE:
1032 dprintk("SET_SEND_DUTY_CYCLE\n");
1033 if (!(hardware[type].features&LIRC_CAN_SET_SEND_DUTY_CYCLE))
1034 return -ENOIOCTLCMD;
1036 result = get_user(value, (__u32 *) arg);
1039 if (value <= 0 || value > 100)
1041 return init_timing_params(value, freq);
1044 case LIRC_SET_SEND_CARRIER:
1045 dprintk("SET_SEND_CARRIER\n");
1046 if (!(hardware[type].features&LIRC_CAN_SET_SEND_CARRIER))
1047 return -ENOIOCTLCMD;
1049 result = get_user(value, (__u32 *) arg);
1052 if (value > 500000 || value < 20000)
1054 return init_timing_params(duty_cycle, value);
1058 return lirc_dev_fop_ioctl(filep, cmd, arg);
1063 static const struct file_operations lirc_fops = {
1064 .owner = THIS_MODULE,
1065 .write = lirc_write,
1066 .unlocked_ioctl = lirc_ioctl,
1067 #ifdef CONFIG_COMPAT
1068 .compat_ioctl = lirc_ioctl,
1070 .read = lirc_dev_fop_read,
1071 .poll = lirc_dev_fop_poll,
1072 .open = lirc_dev_fop_open,
1073 .release = lirc_dev_fop_close,
1074 .llseek = no_llseek,
1077 static struct lirc_driver driver = {
1078 .name = LIRC_DRIVER_NAME,
1085 .set_use_inc = set_use_inc,
1086 .set_use_dec = set_use_dec,
1089 .owner = THIS_MODULE,
1092 static struct platform_device *lirc_serial_dev;
1094 static int lirc_serial_suspend(struct platform_device *dev,
1098 soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
1100 /* Disable all interrupts */
1101 soutp(UART_IER, sinp(UART_IER) &
1102 (~(UART_IER_MSI|UART_IER_RLSI|UART_IER_THRI|UART_IER_RDI)));
1104 /* Clear registers. */
1113 /* twisty maze... need a forward-declaration here... */
1114 static void lirc_serial_exit(void);
1116 static int lirc_serial_resume(struct platform_device *dev)
1118 unsigned long flags;
1121 result = hardware_init_port();
1125 spin_lock_irqsave(&hardware[type].lock, flags);
1126 /* Enable Interrupt */
1127 do_gettimeofday(&lasttv);
1128 soutp(UART_IER, sinp(UART_IER)|UART_IER_MSI);
1131 lirc_buffer_clear(&rbuf);
1133 spin_unlock_irqrestore(&hardware[type].lock, flags);
1138 static struct platform_driver lirc_serial_driver = {
1139 .probe = lirc_serial_probe,
1140 .remove = lirc_serial_remove,
1141 .suspend = lirc_serial_suspend,
1142 .resume = lirc_serial_resume,
1144 .name = "lirc_serial",
1145 .owner = THIS_MODULE,
1149 static int __init lirc_serial_init(void)
1153 /* Init read buffer. */
1154 result = lirc_buffer_init(&rbuf, sizeof(int), RBUF_LEN);
1158 result = platform_driver_register(&lirc_serial_driver);
1160 printk("lirc register returned %d\n", result);
1161 goto exit_buffer_free;
1164 lirc_serial_dev = platform_device_alloc("lirc_serial", 0);
1165 if (!lirc_serial_dev) {
1167 goto exit_driver_unregister;
1170 result = platform_device_add(lirc_serial_dev);
1172 goto exit_device_put;
1177 platform_device_put(lirc_serial_dev);
1178 exit_driver_unregister:
1179 platform_driver_unregister(&lirc_serial_driver);
1181 lirc_buffer_free(&rbuf);
1185 static void lirc_serial_exit(void)
1187 platform_device_unregister(lirc_serial_dev);
1188 platform_driver_unregister(&lirc_serial_driver);
1189 lirc_buffer_free(&rbuf);
1192 static int __init lirc_serial_init_module(void)
1199 case LIRC_IRDEO_REMOTE:
1202 /* if nothing specified, use ttyS0/com1 and irq 4 */
1203 io = io ? io : 0x3f8;
1204 irq = irq ? irq : 4;
1206 #ifdef CONFIG_LIRC_SERIAL_NSLU2
1208 io = io ? io : IRQ_IXP4XX_UART2;
1209 irq = irq ? irq : (IXP4XX_UART2_BASE_VIRT + REG_OFFSET);
1210 iommap = iommap ? iommap : IXP4XX_UART2_BASE_PHYS;
1211 ioshift = ioshift ? ioshift : 2;
1221 #ifdef CONFIG_LIRC_SERIAL_NSLU2
1224 hardware[type].features &=
1225 ~(LIRC_CAN_SET_SEND_DUTY_CYCLE|
1226 LIRC_CAN_SET_SEND_CARRIER);
1231 /* make sure sense is either -1, 0, or 1 */
1235 result = lirc_serial_init();
1239 driver.features = hardware[type].features;
1240 driver.dev = &lirc_serial_dev->dev;
1241 driver.minor = lirc_register_driver(&driver);
1242 if (driver.minor < 0) {
1243 pr_err("register_chrdev failed!\n");
1245 return driver.minor;
1250 static void __exit lirc_serial_exit_module(void)
1252 lirc_unregister_driver(driver.minor);
1254 dprintk("cleaned up module\n");
1258 module_init(lirc_serial_init_module);
1259 module_exit(lirc_serial_exit_module);
1261 MODULE_DESCRIPTION("Infra-red receiver driver for serial ports.");
1262 MODULE_AUTHOR("Ralph Metzler, Trent Piepho, Ben Pfaff, "
1263 "Christoph Bartelmus, Andrei Tanas");
1264 MODULE_LICENSE("GPL");
1266 module_param(type, int, S_IRUGO);
1267 MODULE_PARM_DESC(type, "Hardware type (0 = home-brew, 1 = IRdeo,"
1268 " 2 = IRdeo Remote, 3 = AnimaX, 4 = IgorPlug,"
1269 " 5 = NSLU2 RX:CTS2/TX:GreenLED)");
1271 module_param(io, int, S_IRUGO);
1272 MODULE_PARM_DESC(io, "I/O address base (0x3f8 or 0x2f8)");
1274 /* some architectures (e.g. intel xscale) have memory mapped registers */
1275 module_param(iommap, bool, S_IRUGO);
1276 MODULE_PARM_DESC(iommap, "physical base for memory mapped I/O"
1277 " (0 = no memory mapped io)");
1280 * some architectures (e.g. intel xscale) align the 8bit serial registers
1281 * on 32bit word boundaries.
1282 * See linux-kernel/drivers/tty/serial/8250/8250.c serial_in()/out()
1284 module_param(ioshift, int, S_IRUGO);
1285 MODULE_PARM_DESC(ioshift, "shift I/O register offset (0 = no shift)");
1287 module_param(irq, int, S_IRUGO);
1288 MODULE_PARM_DESC(irq, "Interrupt (4 or 3)");
1290 module_param(share_irq, bool, S_IRUGO);
1291 MODULE_PARM_DESC(share_irq, "Share interrupts (0 = off, 1 = on)");
1293 module_param(sense, int, S_IRUGO);
1294 MODULE_PARM_DESC(sense, "Override autodetection of IR receiver circuit"
1295 " (0 = active high, 1 = active low )");
1297 #ifdef CONFIG_LIRC_SERIAL_TRANSMITTER
1298 module_param(txsense, bool, S_IRUGO);
1299 MODULE_PARM_DESC(txsense, "Sense of transmitter circuit"
1300 " (0 = active high, 1 = active low )");
1303 module_param(softcarrier, bool, S_IRUGO);
1304 MODULE_PARM_DESC(softcarrier, "Software carrier (0 = off, 1 = on, default on)");
1306 module_param(debug, bool, S_IRUGO | S_IWUSR);
1307 MODULE_PARM_DESC(debug, "Enable debugging messages");