Merge branch 'x86-boot-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...
[firefly-linux-kernel-4.4.55.git] / drivers / staging / iio / adc / ad7793.c
1 /*
2  * AD7792/AD7793 SPI ADC driver
3  *
4  * Copyright 2011-2012 Analog Devices Inc.
5  *
6  * Licensed under the GPL-2.
7  */
8
9 #include <linux/interrupt.h>
10 #include <linux/device.h>
11 #include <linux/kernel.h>
12 #include <linux/slab.h>
13 #include <linux/sysfs.h>
14 #include <linux/spi/spi.h>
15 #include <linux/regulator/consumer.h>
16 #include <linux/err.h>
17 #include <linux/sched.h>
18 #include <linux/delay.h>
19 #include <linux/module.h>
20
21 #include <linux/iio/iio.h>
22 #include <linux/iio/sysfs.h>
23 #include <linux/iio/buffer.h>
24 #include <linux/iio/trigger.h>
25 #include <linux/iio/trigger_consumer.h>
26 #include <linux/iio/triggered_buffer.h>
27
28 #include "ad7793.h"
29
30 /* NOTE:
31  * The AD7792/AD7793 features a dual use data out ready DOUT/RDY output.
32  * In order to avoid contentions on the SPI bus, it's therefore necessary
33  * to use spi bus locking.
34  *
35  * The DOUT/RDY output must also be wired to an interrupt capable GPIO.
36  */
37
38 struct ad7793_chip_info {
39         struct iio_chan_spec            channel[7];
40 };
41
42 struct ad7793_state {
43         struct spi_device               *spi;
44         struct iio_trigger              *trig;
45         const struct ad7793_chip_info   *chip_info;
46         struct regulator                *reg;
47         struct ad7793_platform_data     *pdata;
48         wait_queue_head_t               wq_data_avail;
49         bool                            done;
50         bool                            irq_dis;
51         u16                             int_vref_mv;
52         u16                             mode;
53         u16                             conf;
54         u32                             scale_avail[8][2];
55
56         /*
57          * DMA (thus cache coherency maintenance) requires the
58          * transfer buffers to live in their own cache lines.
59          */
60         u8                              data[4] ____cacheline_aligned;
61 };
62
63 enum ad7793_supported_device_ids {
64         ID_AD7792,
65         ID_AD7793,
66 };
67
68 static int __ad7793_write_reg(struct ad7793_state *st, bool locked,
69                               bool cs_change, unsigned char reg,
70                               unsigned size, unsigned val)
71 {
72         u8 *data = st->data;
73         struct spi_transfer t = {
74                 .tx_buf         = data,
75                 .len            = size + 1,
76                 .cs_change      = cs_change,
77         };
78         struct spi_message m;
79
80         data[0] = AD7793_COMM_WRITE | AD7793_COMM_ADDR(reg);
81
82         switch (size) {
83         case 3:
84                 data[1] = val >> 16;
85                 data[2] = val >> 8;
86                 data[3] = val;
87                 break;
88         case 2:
89                 data[1] = val >> 8;
90                 data[2] = val;
91                 break;
92         case 1:
93                 data[1] = val;
94                 break;
95         default:
96                 return -EINVAL;
97         }
98
99         spi_message_init(&m);
100         spi_message_add_tail(&t, &m);
101
102         if (locked)
103                 return spi_sync_locked(st->spi, &m);
104         else
105                 return spi_sync(st->spi, &m);
106 }
107
108 static int ad7793_write_reg(struct ad7793_state *st,
109                             unsigned reg, unsigned size, unsigned val)
110 {
111         return __ad7793_write_reg(st, false, false, reg, size, val);
112 }
113
114 static int __ad7793_read_reg(struct ad7793_state *st, bool locked,
115                              bool cs_change, unsigned char reg,
116                              int *val, unsigned size)
117 {
118         u8 *data = st->data;
119         int ret;
120         struct spi_transfer t[] = {
121                 {
122                         .tx_buf = data,
123                         .len = 1,
124                 }, {
125                         .rx_buf = data,
126                         .len = size,
127                         .cs_change = cs_change,
128                 },
129         };
130         struct spi_message m;
131
132         data[0] = AD7793_COMM_READ | AD7793_COMM_ADDR(reg);
133
134         spi_message_init(&m);
135         spi_message_add_tail(&t[0], &m);
136         spi_message_add_tail(&t[1], &m);
137
138         if (locked)
139                 ret = spi_sync_locked(st->spi, &m);
140         else
141                 ret = spi_sync(st->spi, &m);
142
143         if (ret < 0)
144                 return ret;
145
146         switch (size) {
147         case 3:
148                 *val = data[0] << 16 | data[1] << 8 | data[2];
149                 break;
150         case 2:
151                 *val = data[0] << 8 | data[1];
152                 break;
153         case 1:
154                 *val = data[0];
155                 break;
156         default:
157                 return -EINVAL;
158         }
159
160         return 0;
161 }
162
163 static int ad7793_read_reg(struct ad7793_state *st,
164                            unsigned reg, int *val, unsigned size)
165 {
166         return __ad7793_read_reg(st, 0, 0, reg, val, size);
167 }
168
169 static int ad7793_read(struct ad7793_state *st, unsigned ch,
170                        unsigned len, int *val)
171 {
172         int ret;
173         st->conf = (st->conf & ~AD7793_CONF_CHAN(-1)) | AD7793_CONF_CHAN(ch);
174         st->mode = (st->mode & ~AD7793_MODE_SEL(-1)) |
175                 AD7793_MODE_SEL(AD7793_MODE_SINGLE);
176
177         ad7793_write_reg(st, AD7793_REG_CONF, sizeof(st->conf), st->conf);
178
179         spi_bus_lock(st->spi->master);
180         st->done = false;
181
182         ret = __ad7793_write_reg(st, 1, 1, AD7793_REG_MODE,
183                                  sizeof(st->mode), st->mode);
184         if (ret < 0)
185                 goto out;
186
187         st->irq_dis = false;
188         enable_irq(st->spi->irq);
189         wait_event_interruptible(st->wq_data_avail, st->done);
190
191         ret = __ad7793_read_reg(st, 1, 0, AD7793_REG_DATA, val, len);
192 out:
193         spi_bus_unlock(st->spi->master);
194
195         return ret;
196 }
197
198 static int ad7793_calibrate(struct ad7793_state *st, unsigned mode, unsigned ch)
199 {
200         int ret;
201
202         st->conf = (st->conf & ~AD7793_CONF_CHAN(-1)) | AD7793_CONF_CHAN(ch);
203         st->mode = (st->mode & ~AD7793_MODE_SEL(-1)) | AD7793_MODE_SEL(mode);
204
205         ad7793_write_reg(st, AD7793_REG_CONF, sizeof(st->conf), st->conf);
206
207         spi_bus_lock(st->spi->master);
208         st->done = false;
209
210         ret = __ad7793_write_reg(st, 1, 1, AD7793_REG_MODE,
211                                  sizeof(st->mode), st->mode);
212         if (ret < 0)
213                 goto out;
214
215         st->irq_dis = false;
216         enable_irq(st->spi->irq);
217         wait_event_interruptible(st->wq_data_avail, st->done);
218
219         st->mode = (st->mode & ~AD7793_MODE_SEL(-1)) |
220                 AD7793_MODE_SEL(AD7793_MODE_IDLE);
221
222         ret = __ad7793_write_reg(st, 1, 0, AD7793_REG_MODE,
223                                  sizeof(st->mode), st->mode);
224 out:
225         spi_bus_unlock(st->spi->master);
226
227         return ret;
228 }
229
230 static const u8 ad7793_calib_arr[6][2] = {
231         {AD7793_MODE_CAL_INT_ZERO, AD7793_CH_AIN1P_AIN1M},
232         {AD7793_MODE_CAL_INT_FULL, AD7793_CH_AIN1P_AIN1M},
233         {AD7793_MODE_CAL_INT_ZERO, AD7793_CH_AIN2P_AIN2M},
234         {AD7793_MODE_CAL_INT_FULL, AD7793_CH_AIN2P_AIN2M},
235         {AD7793_MODE_CAL_INT_ZERO, AD7793_CH_AIN3P_AIN3M},
236         {AD7793_MODE_CAL_INT_FULL, AD7793_CH_AIN3P_AIN3M}
237 };
238
239 static int ad7793_calibrate_all(struct ad7793_state *st)
240 {
241         int i, ret;
242
243         for (i = 0; i < ARRAY_SIZE(ad7793_calib_arr); i++) {
244                 ret = ad7793_calibrate(st, ad7793_calib_arr[i][0],
245                                        ad7793_calib_arr[i][1]);
246                 if (ret)
247                         goto out;
248         }
249
250         return 0;
251 out:
252         dev_err(&st->spi->dev, "Calibration failed\n");
253         return ret;
254 }
255
256 static int ad7793_setup(struct ad7793_state *st)
257 {
258         int i, ret = -1;
259         unsigned long long scale_uv;
260         u32 id;
261
262         /* reset the serial interface */
263         ret = spi_write(st->spi, (u8 *)&ret, sizeof(ret));
264         if (ret < 0)
265                 goto out;
266         msleep(1); /* Wait for at least 500us */
267
268         /* write/read test for device presence */
269         ret = ad7793_read_reg(st, AD7793_REG_ID, &id, 1);
270         if (ret)
271                 goto out;
272
273         id &= AD7793_ID_MASK;
274
275         if (!((id == AD7792_ID) || (id == AD7793_ID))) {
276                 dev_err(&st->spi->dev, "device ID query failed\n");
277                 goto out;
278         }
279
280         st->mode  = (st->pdata->mode & ~AD7793_MODE_SEL(-1)) |
281                         AD7793_MODE_SEL(AD7793_MODE_IDLE);
282         st->conf  = st->pdata->conf & ~AD7793_CONF_CHAN(-1);
283
284         ret = ad7793_write_reg(st, AD7793_REG_MODE, sizeof(st->mode), st->mode);
285         if (ret)
286                 goto out;
287
288         ret = ad7793_write_reg(st, AD7793_REG_CONF, sizeof(st->conf), st->conf);
289         if (ret)
290                 goto out;
291
292         ret = ad7793_write_reg(st, AD7793_REG_IO,
293                                sizeof(st->pdata->io), st->pdata->io);
294         if (ret)
295                 goto out;
296
297         ret = ad7793_calibrate_all(st);
298         if (ret)
299                 goto out;
300
301         /* Populate available ADC input ranges */
302         for (i = 0; i < ARRAY_SIZE(st->scale_avail); i++) {
303                 scale_uv = ((u64)st->int_vref_mv * 100000000)
304                         >> (st->chip_info->channel[0].scan_type.realbits -
305                         (!!(st->conf & AD7793_CONF_UNIPOLAR) ? 0 : 1));
306                 scale_uv >>= i;
307
308                 st->scale_avail[i][1] = do_div(scale_uv, 100000000) * 10;
309                 st->scale_avail[i][0] = scale_uv;
310         }
311
312         return 0;
313 out:
314         dev_err(&st->spi->dev, "setup failed\n");
315         return ret;
316 }
317
318 static int ad7793_ring_preenable(struct iio_dev *indio_dev)
319 {
320         struct ad7793_state *st = iio_priv(indio_dev);
321         unsigned channel;
322         int ret;
323
324         if (bitmap_empty(indio_dev->active_scan_mask, indio_dev->masklength))
325                 return -EINVAL;
326         ret = iio_sw_buffer_preenable(indio_dev);
327         if (ret < 0)
328                 return ret;
329
330         channel = find_first_bit(indio_dev->active_scan_mask,
331                                  indio_dev->masklength);
332
333         st->mode  = (st->mode & ~AD7793_MODE_SEL(-1)) |
334                     AD7793_MODE_SEL(AD7793_MODE_CONT);
335         st->conf  = (st->conf & ~AD7793_CONF_CHAN(-1)) |
336                     AD7793_CONF_CHAN(indio_dev->channels[channel].address);
337
338         ad7793_write_reg(st, AD7793_REG_CONF, sizeof(st->conf), st->conf);
339
340         spi_bus_lock(st->spi->master);
341         __ad7793_write_reg(st, 1, 1, AD7793_REG_MODE,
342                            sizeof(st->mode), st->mode);
343
344         st->irq_dis = false;
345         enable_irq(st->spi->irq);
346
347         return 0;
348 }
349
350 static int ad7793_ring_postdisable(struct iio_dev *indio_dev)
351 {
352         struct ad7793_state *st = iio_priv(indio_dev);
353
354         st->mode  = (st->mode & ~AD7793_MODE_SEL(-1)) |
355                     AD7793_MODE_SEL(AD7793_MODE_IDLE);
356
357         st->done = false;
358         wait_event_interruptible(st->wq_data_avail, st->done);
359
360         if (!st->irq_dis)
361                 disable_irq_nosync(st->spi->irq);
362
363         __ad7793_write_reg(st, 1, 0, AD7793_REG_MODE,
364                            sizeof(st->mode), st->mode);
365
366         return spi_bus_unlock(st->spi->master);
367 }
368
369 /**
370  * ad7793_trigger_handler() bh of trigger launched polling to ring buffer
371  **/
372
373 static irqreturn_t ad7793_trigger_handler(int irq, void *p)
374 {
375         struct iio_poll_func *pf = p;
376         struct iio_dev *indio_dev = pf->indio_dev;
377         struct iio_buffer *ring = indio_dev->buffer;
378         struct ad7793_state *st = iio_priv(indio_dev);
379         s64 dat64[2];
380         s32 *dat32 = (s32 *)dat64;
381
382         if (!bitmap_empty(indio_dev->active_scan_mask, indio_dev->masklength))
383                 __ad7793_read_reg(st, 1, 1, AD7793_REG_DATA,
384                                   dat32,
385                                   indio_dev->channels[0].scan_type.realbits/8);
386
387         /* Guaranteed to be aligned with 8 byte boundary */
388         if (indio_dev->scan_timestamp)
389                 dat64[1] = pf->timestamp;
390
391         ring->access->store_to(ring, (u8 *)dat64, pf->timestamp);
392
393         iio_trigger_notify_done(indio_dev->trig);
394         st->irq_dis = false;
395         enable_irq(st->spi->irq);
396
397         return IRQ_HANDLED;
398 }
399
400 static const struct iio_buffer_setup_ops ad7793_ring_setup_ops = {
401         .preenable = &ad7793_ring_preenable,
402         .postenable = &iio_triggered_buffer_postenable,
403         .predisable = &iio_triggered_buffer_predisable,
404         .postdisable = &ad7793_ring_postdisable,
405         .validate_scan_mask = &iio_validate_scan_mask_onehot,
406 };
407
408 static int ad7793_register_ring_funcs_and_init(struct iio_dev *indio_dev)
409 {
410         return iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time,
411                         &ad7793_trigger_handler, &ad7793_ring_setup_ops);
412 }
413
414 static void ad7793_ring_cleanup(struct iio_dev *indio_dev)
415 {
416         iio_triggered_buffer_cleanup(indio_dev);
417 }
418
419 /**
420  * ad7793_data_rdy_trig_poll() the event handler for the data rdy trig
421  **/
422 static irqreturn_t ad7793_data_rdy_trig_poll(int irq, void *private)
423 {
424         struct ad7793_state *st = iio_priv(private);
425
426         st->done = true;
427         wake_up_interruptible(&st->wq_data_avail);
428         disable_irq_nosync(irq);
429         st->irq_dis = true;
430         iio_trigger_poll(st->trig, iio_get_time_ns());
431
432         return IRQ_HANDLED;
433 }
434
435 static struct iio_trigger_ops ad7793_trigger_ops = {
436         .owner = THIS_MODULE,
437 };
438
439 static int ad7793_probe_trigger(struct iio_dev *indio_dev)
440 {
441         struct ad7793_state *st = iio_priv(indio_dev);
442         int ret;
443
444         st->trig = iio_trigger_alloc("%s-dev%d",
445                                         spi_get_device_id(st->spi)->name,
446                                         indio_dev->id);
447         if (st->trig == NULL) {
448                 ret = -ENOMEM;
449                 goto error_ret;
450         }
451         st->trig->ops = &ad7793_trigger_ops;
452
453         ret = request_irq(st->spi->irq,
454                           ad7793_data_rdy_trig_poll,
455                           IRQF_TRIGGER_LOW,
456                           spi_get_device_id(st->spi)->name,
457                           indio_dev);
458         if (ret)
459                 goto error_free_trig;
460
461         disable_irq_nosync(st->spi->irq);
462         st->irq_dis = true;
463         st->trig->dev.parent = &st->spi->dev;
464         st->trig->private_data = indio_dev;
465
466         ret = iio_trigger_register(st->trig);
467
468         /* select default trigger */
469         indio_dev->trig = st->trig;
470         if (ret)
471                 goto error_free_irq;
472
473         return 0;
474
475 error_free_irq:
476         free_irq(st->spi->irq, indio_dev);
477 error_free_trig:
478         iio_trigger_free(st->trig);
479 error_ret:
480         return ret;
481 }
482
483 static void ad7793_remove_trigger(struct iio_dev *indio_dev)
484 {
485         struct ad7793_state *st = iio_priv(indio_dev);
486
487         iio_trigger_unregister(st->trig);
488         free_irq(st->spi->irq, indio_dev);
489         iio_trigger_free(st->trig);
490 }
491
492 static const u16 sample_freq_avail[16] = {0, 470, 242, 123, 62, 50, 39, 33, 19,
493                                           17, 16, 12, 10, 8, 6, 4};
494
495 static ssize_t ad7793_read_frequency(struct device *dev,
496                 struct device_attribute *attr,
497                 char *buf)
498 {
499         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
500         struct ad7793_state *st = iio_priv(indio_dev);
501
502         return sprintf(buf, "%d\n",
503                        sample_freq_avail[AD7793_MODE_RATE(st->mode)]);
504 }
505
506 static ssize_t ad7793_write_frequency(struct device *dev,
507                 struct device_attribute *attr,
508                 const char *buf,
509                 size_t len)
510 {
511         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
512         struct ad7793_state *st = iio_priv(indio_dev);
513         long lval;
514         int i, ret;
515
516         mutex_lock(&indio_dev->mlock);
517         if (iio_buffer_enabled(indio_dev)) {
518                 mutex_unlock(&indio_dev->mlock);
519                 return -EBUSY;
520         }
521         mutex_unlock(&indio_dev->mlock);
522
523         ret = strict_strtol(buf, 10, &lval);
524         if (ret)
525                 return ret;
526
527         ret = -EINVAL;
528
529         for (i = 0; i < ARRAY_SIZE(sample_freq_avail); i++)
530                 if (lval == sample_freq_avail[i]) {
531                         mutex_lock(&indio_dev->mlock);
532                         st->mode &= ~AD7793_MODE_RATE(-1);
533                         st->mode |= AD7793_MODE_RATE(i);
534                         ad7793_write_reg(st, AD7793_REG_MODE,
535                                          sizeof(st->mode), st->mode);
536                         mutex_unlock(&indio_dev->mlock);
537                         ret = 0;
538                 }
539
540         return ret ? ret : len;
541 }
542
543 static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
544                 ad7793_read_frequency,
545                 ad7793_write_frequency);
546
547 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL(
548         "470 242 123 62 50 39 33 19 17 16 12 10 8 6 4");
549
550 static ssize_t ad7793_show_scale_available(struct device *dev,
551                         struct device_attribute *attr, char *buf)
552 {
553         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
554         struct ad7793_state *st = iio_priv(indio_dev);
555         int i, len = 0;
556
557         for (i = 0; i < ARRAY_SIZE(st->scale_avail); i++)
558                 len += sprintf(buf + len, "%d.%09u ", st->scale_avail[i][0],
559                                st->scale_avail[i][1]);
560
561         len += sprintf(buf + len, "\n");
562
563         return len;
564 }
565
566 static IIO_DEVICE_ATTR_NAMED(in_m_in_scale_available, in-in_scale_available,
567                              S_IRUGO, ad7793_show_scale_available, NULL, 0);
568
569 static struct attribute *ad7793_attributes[] = {
570         &iio_dev_attr_sampling_frequency.dev_attr.attr,
571         &iio_const_attr_sampling_frequency_available.dev_attr.attr,
572         &iio_dev_attr_in_m_in_scale_available.dev_attr.attr,
573         NULL
574 };
575
576 static const struct attribute_group ad7793_attribute_group = {
577         .attrs = ad7793_attributes,
578 };
579
580 static int ad7793_read_raw(struct iio_dev *indio_dev,
581                            struct iio_chan_spec const *chan,
582                            int *val,
583                            int *val2,
584                            long m)
585 {
586         struct ad7793_state *st = iio_priv(indio_dev);
587         int ret, smpl = 0;
588         unsigned long long scale_uv;
589         bool unipolar = !!(st->conf & AD7793_CONF_UNIPOLAR);
590
591         switch (m) {
592         case IIO_CHAN_INFO_RAW:
593                 mutex_lock(&indio_dev->mlock);
594                 if (iio_buffer_enabled(indio_dev))
595                         ret = -EBUSY;
596                 else
597                         ret = ad7793_read(st, chan->address,
598                                         chan->scan_type.realbits / 8, &smpl);
599                 mutex_unlock(&indio_dev->mlock);
600
601                 if (ret < 0)
602                         return ret;
603
604                 *val = (smpl >> chan->scan_type.shift) &
605                         ((1 << (chan->scan_type.realbits)) - 1);
606
607                 if (!unipolar)
608                         *val -= (1 << (chan->scan_type.realbits - 1));
609
610                 return IIO_VAL_INT;
611
612         case IIO_CHAN_INFO_SCALE:
613                 switch (chan->type) {
614                 case IIO_VOLTAGE:
615                         if (chan->differential) {
616                                 *val = st->
617                                         scale_avail[(st->conf >> 8) & 0x7][0];
618                                 *val2 = st->
619                                         scale_avail[(st->conf >> 8) & 0x7][1];
620                                 return IIO_VAL_INT_PLUS_NANO;
621                         } else {
622                                 /* 1170mV / 2^23 * 6 */
623                                 scale_uv = (1170ULL * 100000000ULL * 6ULL)
624                                         >> (chan->scan_type.realbits -
625                                             (unipolar ? 0 : 1));
626                         }
627                         break;
628                 case IIO_TEMP:
629                         /* Always uses unity gain and internal ref */
630                         scale_uv = (2500ULL * 100000000ULL)
631                                 >> (chan->scan_type.realbits -
632                                 (unipolar ? 0 : 1));
633                         break;
634                 default:
635                         return -EINVAL;
636                 }
637
638                 *val2 = do_div(scale_uv, 100000000) * 10;
639                 *val =  scale_uv;
640
641                 return IIO_VAL_INT_PLUS_NANO;
642         }
643         return -EINVAL;
644 }
645
646 static int ad7793_write_raw(struct iio_dev *indio_dev,
647                                struct iio_chan_spec const *chan,
648                                int val,
649                                int val2,
650                                long mask)
651 {
652         struct ad7793_state *st = iio_priv(indio_dev);
653         int ret, i;
654         unsigned int tmp;
655
656         mutex_lock(&indio_dev->mlock);
657         if (iio_buffer_enabled(indio_dev)) {
658                 mutex_unlock(&indio_dev->mlock);
659                 return -EBUSY;
660         }
661
662         switch (mask) {
663         case IIO_CHAN_INFO_SCALE:
664                 ret = -EINVAL;
665                 for (i = 0; i < ARRAY_SIZE(st->scale_avail); i++)
666                         if (val2 == st->scale_avail[i][1]) {
667                                 tmp = st->conf;
668                                 st->conf &= ~AD7793_CONF_GAIN(-1);
669                                 st->conf |= AD7793_CONF_GAIN(i);
670
671                                 if (tmp != st->conf) {
672                                         ad7793_write_reg(st, AD7793_REG_CONF,
673                                                          sizeof(st->conf),
674                                                          st->conf);
675                                         ad7793_calibrate_all(st);
676                                 }
677                                 ret = 0;
678                         }
679
680         default:
681                 ret = -EINVAL;
682         }
683
684         mutex_unlock(&indio_dev->mlock);
685         return ret;
686 }
687
688 static int ad7793_validate_trigger(struct iio_dev *indio_dev,
689                                    struct iio_trigger *trig)
690 {
691         if (indio_dev->trig != trig)
692                 return -EINVAL;
693
694         return 0;
695 }
696
697 static int ad7793_write_raw_get_fmt(struct iio_dev *indio_dev,
698                                struct iio_chan_spec const *chan,
699                                long mask)
700 {
701         return IIO_VAL_INT_PLUS_NANO;
702 }
703
704 static const struct iio_info ad7793_info = {
705         .read_raw = &ad7793_read_raw,
706         .write_raw = &ad7793_write_raw,
707         .write_raw_get_fmt = &ad7793_write_raw_get_fmt,
708         .attrs = &ad7793_attribute_group,
709         .validate_trigger = ad7793_validate_trigger,
710         .driver_module = THIS_MODULE,
711 };
712
713 static const struct ad7793_chip_info ad7793_chip_info_tbl[] = {
714         [ID_AD7793] = {
715                 .channel[0] = {
716                         .type = IIO_VOLTAGE,
717                         .differential = 1,
718                         .indexed = 1,
719                         .channel = 0,
720                         .channel2 = 0,
721                         .address = AD7793_CH_AIN1P_AIN1M,
722                         .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
723                         IIO_CHAN_INFO_SCALE_SHARED_BIT,
724                         .scan_index = 0,
725                         .scan_type = IIO_ST('s', 24, 32, 0)
726                 },
727                 .channel[1] = {
728                         .type = IIO_VOLTAGE,
729                         .differential = 1,
730                         .indexed = 1,
731                         .channel = 1,
732                         .channel2 = 1,
733                         .address = AD7793_CH_AIN2P_AIN2M,
734                         .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
735                         IIO_CHAN_INFO_SCALE_SHARED_BIT,
736                         .scan_index = 1,
737                         .scan_type = IIO_ST('s', 24, 32, 0)
738                 },
739                 .channel[2] = {
740                         .type = IIO_VOLTAGE,
741                         .differential = 1,
742                         .indexed = 1,
743                         .channel = 2,
744                         .channel2 = 2,
745                         .address = AD7793_CH_AIN3P_AIN3M,
746                         .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
747                         IIO_CHAN_INFO_SCALE_SHARED_BIT,
748                         .scan_index = 2,
749                         .scan_type = IIO_ST('s', 24, 32, 0)
750                 },
751                 .channel[3] = {
752                         .type = IIO_VOLTAGE,
753                         .differential = 1,
754                         .extend_name = "shorted",
755                         .indexed = 1,
756                         .channel = 2,
757                         .channel2 = 2,
758                         .address = AD7793_CH_AIN1M_AIN1M,
759                         .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
760                         IIO_CHAN_INFO_SCALE_SHARED_BIT,
761                         .scan_index = 3,
762                         .scan_type = IIO_ST('s', 24, 32, 0)
763                 },
764                 .channel[4] = {
765                         .type = IIO_TEMP,
766                         .indexed = 1,
767                         .channel = 0,
768                         .address = AD7793_CH_TEMP,
769                         .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
770                         IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
771                         .scan_index = 4,
772                         .scan_type = IIO_ST('s', 24, 32, 0),
773                 },
774                 .channel[5] = {
775                         .type = IIO_VOLTAGE,
776                         .extend_name = "supply",
777                         .indexed = 1,
778                         .channel = 4,
779                         .address = AD7793_CH_AVDD_MONITOR,
780                         .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
781                         IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
782                         .scan_index = 5,
783                         .scan_type = IIO_ST('s', 24, 32, 0),
784                 },
785                 .channel[6] = IIO_CHAN_SOFT_TIMESTAMP(6),
786         },
787         [ID_AD7792] = {
788                 .channel[0] = {
789                         .type = IIO_VOLTAGE,
790                         .differential = 1,
791                         .indexed = 1,
792                         .channel = 0,
793                         .channel2 = 0,
794                         .address = AD7793_CH_AIN1P_AIN1M,
795                         .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
796                         IIO_CHAN_INFO_SCALE_SHARED_BIT,
797                         .scan_index = 0,
798                         .scan_type = IIO_ST('s', 16, 32, 0)
799                 },
800                 .channel[1] = {
801                         .type = IIO_VOLTAGE,
802                         .differential = 1,
803                         .indexed = 1,
804                         .channel = 1,
805                         .channel2 = 1,
806                         .address = AD7793_CH_AIN2P_AIN2M,
807                         .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
808                         IIO_CHAN_INFO_SCALE_SHARED_BIT,
809                         .scan_index = 1,
810                         .scan_type = IIO_ST('s', 16, 32, 0)
811                 },
812                 .channel[2] = {
813                         .type = IIO_VOLTAGE,
814                         .differential = 1,
815                         .indexed = 1,
816                         .channel = 2,
817                         .channel2 = 2,
818                         .address = AD7793_CH_AIN3P_AIN3M,
819                         .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
820                         IIO_CHAN_INFO_SCALE_SHARED_BIT,
821                         .scan_index = 2,
822                         .scan_type = IIO_ST('s', 16, 32, 0)
823                 },
824                 .channel[3] = {
825                         .type = IIO_VOLTAGE,
826                         .differential = 1,
827                         .extend_name = "shorted",
828                         .indexed = 1,
829                         .channel = 2,
830                         .channel2 = 2,
831                         .address = AD7793_CH_AIN1M_AIN1M,
832                         .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
833                         IIO_CHAN_INFO_SCALE_SHARED_BIT,
834                         .scan_index = 3,
835                         .scan_type = IIO_ST('s', 16, 32, 0)
836                 },
837                 .channel[4] = {
838                         .type = IIO_TEMP,
839                         .indexed = 1,
840                         .channel = 0,
841                         .address = AD7793_CH_TEMP,
842                         .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
843                         IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
844                         .scan_index = 4,
845                         .scan_type = IIO_ST('s', 16, 32, 0),
846                 },
847                 .channel[5] = {
848                         .type = IIO_VOLTAGE,
849                         .extend_name = "supply",
850                         .indexed = 1,
851                         .channel = 4,
852                         .address = AD7793_CH_AVDD_MONITOR,
853                         .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
854                         IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
855                         .scan_index = 5,
856                         .scan_type = IIO_ST('s', 16, 32, 0),
857                 },
858                 .channel[6] = IIO_CHAN_SOFT_TIMESTAMP(6),
859         },
860 };
861
862 static int __devinit ad7793_probe(struct spi_device *spi)
863 {
864         struct ad7793_platform_data *pdata = spi->dev.platform_data;
865         struct ad7793_state *st;
866         struct iio_dev *indio_dev;
867         int ret, voltage_uv = 0;
868
869         if (!pdata) {
870                 dev_err(&spi->dev, "no platform data?\n");
871                 return -ENODEV;
872         }
873
874         if (!spi->irq) {
875                 dev_err(&spi->dev, "no IRQ?\n");
876                 return -ENODEV;
877         }
878
879         indio_dev = iio_device_alloc(sizeof(*st));
880         if (indio_dev == NULL)
881                 return -ENOMEM;
882
883         st = iio_priv(indio_dev);
884
885         st->reg = regulator_get(&spi->dev, "vcc");
886         if (!IS_ERR(st->reg)) {
887                 ret = regulator_enable(st->reg);
888                 if (ret)
889                         goto error_put_reg;
890
891                 voltage_uv = regulator_get_voltage(st->reg);
892         }
893
894         st->chip_info =
895                 &ad7793_chip_info_tbl[spi_get_device_id(spi)->driver_data];
896
897         st->pdata = pdata;
898
899         if (pdata && pdata->vref_mv)
900                 st->int_vref_mv = pdata->vref_mv;
901         else if (voltage_uv)
902                 st->int_vref_mv = voltage_uv / 1000;
903         else
904                 st->int_vref_mv = 2500; /* Build-in ref */
905
906         spi_set_drvdata(spi, indio_dev);
907         st->spi = spi;
908
909         indio_dev->dev.parent = &spi->dev;
910         indio_dev->name = spi_get_device_id(spi)->name;
911         indio_dev->modes = INDIO_DIRECT_MODE;
912         indio_dev->channels = st->chip_info->channel;
913         indio_dev->num_channels = 7;
914         indio_dev->info = &ad7793_info;
915
916         init_waitqueue_head(&st->wq_data_avail);
917
918         ret = ad7793_register_ring_funcs_and_init(indio_dev);
919         if (ret)
920                 goto error_disable_reg;
921
922         ret = ad7793_probe_trigger(indio_dev);
923         if (ret)
924                 goto error_unreg_ring;
925
926         ret = ad7793_setup(st);
927         if (ret)
928                 goto error_remove_trigger;
929
930         ret = iio_device_register(indio_dev);
931         if (ret)
932                 goto error_remove_trigger;
933
934         return 0;
935
936 error_remove_trigger:
937         ad7793_remove_trigger(indio_dev);
938 error_unreg_ring:
939         ad7793_ring_cleanup(indio_dev);
940 error_disable_reg:
941         if (!IS_ERR(st->reg))
942                 regulator_disable(st->reg);
943 error_put_reg:
944         if (!IS_ERR(st->reg))
945                 regulator_put(st->reg);
946
947         iio_device_free(indio_dev);
948
949         return ret;
950 }
951
952 static int ad7793_remove(struct spi_device *spi)
953 {
954         struct iio_dev *indio_dev = spi_get_drvdata(spi);
955         struct ad7793_state *st = iio_priv(indio_dev);
956
957         iio_device_unregister(indio_dev);
958         ad7793_remove_trigger(indio_dev);
959         ad7793_ring_cleanup(indio_dev);
960
961         if (!IS_ERR(st->reg)) {
962                 regulator_disable(st->reg);
963                 regulator_put(st->reg);
964         }
965
966         iio_device_free(indio_dev);
967
968         return 0;
969 }
970
971 static const struct spi_device_id ad7793_id[] = {
972         {"ad7792", ID_AD7792},
973         {"ad7793", ID_AD7793},
974         {}
975 };
976 MODULE_DEVICE_TABLE(spi, ad7793_id);
977
978 static struct spi_driver ad7793_driver = {
979         .driver = {
980                 .name   = "ad7793",
981                 .owner  = THIS_MODULE,
982         },
983         .probe          = ad7793_probe,
984         .remove         = __devexit_p(ad7793_remove),
985         .id_table       = ad7793_id,
986 };
987 module_spi_driver(ad7793_driver);
988
989 MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
990 MODULE_DESCRIPTION("Analog Devices AD7792/3 ADC");
991 MODULE_LICENSE("GPL v2");