2 * comedi/drivers/pcl818.c
5 * Description: Advantech PCL-818 cards, PCL-718
6 * Author: Michal Dobes <dobes@tesnet.cz>
7 * Devices: [Advantech] PCL-818L (pcl818l), PCL-818H (pcl818h),
8 * PCL-818HD (pcl818hd), PCL-818HG (pcl818hg), PCL-818 (pcl818),
12 * All cards have 16 SE/8 DIFF ADCs, one or two DACs, 16 DI and 16 DO.
13 * Differences are only at maximal sample speed, range list and FIFO
15 * The driver support AI mode 0, 1, 3 other subdevices (AO, DI, DO) support
16 * only mode 0. If DMA/FIFO/INT are disabled then AI support only mode 0.
17 * PCL-818HD and PCL-818HG support 1kword FIFO. Driver support this FIFO
18 * but this code is untested.
19 * A word or two about DMA. Driver support DMA operations at two ways:
20 * 1) DMA uses two buffers and after one is filled then is generated
21 * INT and DMA restart with second buffer. With this mode I'm unable run
22 * more that 80Ksamples/secs without data dropouts on K6/233.
23 * 2) DMA uses one buffer and run in autoinit mode and the data are
24 * from DMA buffer moved on the fly with 2kHz interrupts from RTC.
25 * This mode is used if the interrupt 8 is available for allocation.
26 * If not, then first DMA mode is used. With this I can run at
27 * full speed one card (100ksamples/secs) or two cards with
28 * 60ksamples/secs each (more is problem on account of ISA limitations).
29 * To use this mode you must have compiled kernel with disabled
30 * "Enhanced Real Time Clock Support".
31 * Maybe you can have problems if you use xntpd or similar.
32 * If you've data dropouts with DMA mode 2 then:
34 * b) switch text mode console to fb.
36 * Options for PCL-818L:
38 * [1] - IRQ (0=disable, 2, 3, 4, 5, 6, 7)
39 * [2] - DMA (0=disable, 1, 3)
40 * [3] - 0, 10=10MHz clock for 8254
41 * 1= 1MHz clock for 8254
42 * [4] - 0, 5=A/D input -5V.. +5V
43 * 1, 10=A/D input -10V..+10V
44 * [5] - 0, 5=D/A output 0-5V (internal reference -5V)
45 * 1, 10=D/A output 0-10V (internal reference -10V)
46 * 2 =D/A output unknown (external reference)
48 * Options for PCL-818, PCL-818H:
50 * [1] - IRQ (0=disable, 2, 3, 4, 5, 6, 7)
51 * [2] - DMA (0=disable, 1, 3)
52 * [3] - 0, 10=10MHz clock for 8254
53 * 1= 1MHz clock for 8254
54 * [4] - 0, 5=D/A output 0-5V (internal reference -5V)
55 * 1, 10=D/A output 0-10V (internal reference -10V)
56 * 2 =D/A output unknown (external reference)
58 * Options for PCL-818HD, PCL-818HG:
60 * [1] - IRQ (0=disable, 2, 3, 4, 5, 6, 7)
61 * [2] - DMA/FIFO (-1=use FIFO, 0=disable both FIFO and DMA,
62 * 1=use DMA ch 1, 3=use DMA ch 3)
63 * [3] - 0, 10=10MHz clock for 8254
64 * 1= 1MHz clock for 8254
65 * [4] - 0, 5=D/A output 0-5V (internal reference -5V)
66 * 1, 10=D/A output 0-10V (internal reference -10V)
67 * 2 =D/A output unknown (external reference)
69 * Options for PCL-718:
71 * [1] - IRQ (0=disable, 2, 3, 4, 5, 6, 7)
72 * [2] - DMA (0=disable, 1, 3)
73 * [3] - 0, 10=10MHz clock for 8254
74 * 1= 1MHz clock for 8254
75 * [4] - 0=A/D Range is +/-10V
80 * 5= user defined bipolar
85 * 10= user defined unipolar
86 * [5] - 0, 5=D/A outputs 0-5V (internal reference -5V)
87 * 1, 10=D/A outputs 0-10V (internal reference -10V)
88 * 2=D/A outputs unknown (external reference)
89 * [6] - 0, 60=max 60kHz A/D sampling
90 * 1,100=max 100kHz A/D sampling (PCL-718 with Option 001 installed)
94 #include <linux/module.h>
95 #include <linux/gfp.h>
96 #include <linux/delay.h>
98 #include <linux/interrupt.h>
100 #include "../comedidev.h"
102 #include "comedi_isadma.h"
103 #include "comedi_fc.h"
106 /* boards constants */
108 #define boardPCL818L 0
109 #define boardPCL818H 1
110 #define boardPCL818HD 2
111 #define boardPCL818HG 3
112 #define boardPCL818 4
113 #define boardPCL718 5
118 #define PCL818_AI_LSB_REG 0x00
119 #define PCL818_AI_MSB_REG 0x01
120 #define PCL818_RANGE_REG 0x01
121 #define PCL818_MUX_REG 0x02
122 #define PCL818_MUX_SCAN(_first, _last) (((_last) << 4) | (_first))
123 #define PCL818_DO_DI_LSB_REG 0x03
124 #define PCL818_AO_LSB_REG(x) (0x04 + ((x) * 2))
125 #define PCL818_AO_MSB_REG(x) (0x05 + ((x) * 2))
126 #define PCL818_STATUS_REG 0x08
127 #define PCL818_STATUS_NEXT_CHAN_MASK (0xf << 0)
128 #define PCL818_STATUS_INT (1 << 4)
129 #define PCL818_STATUS_MUX (1 << 5)
130 #define PCL818_STATUS_UNI (1 << 6)
131 #define PCL818_STATUS_EOC (1 << 7)
132 #define PCL818_CTRL_REG 0x09
133 #define PCL818_CTRL_DISABLE_TRIG (0 << 0)
134 #define PCL818_CTRL_SOFT_TRIG (1 << 0)
135 #define PCL818_CTRL_EXT_TRIG (2 << 0)
136 #define PCL818_CTRL_PACER_TRIG (3 << 0)
137 #define PCL818_CTRL_DMAE (1 << 2)
138 #define PCL818_CTRL_IRQ(x) ((x) << 4)
139 #define PCL818_CTRL_INTE (1 << 7)
140 #define PCL818_CNTENABLE_REG 0x0a
141 #define PCL818_CNTENABLE_PACER_ENA (0 << 0)
142 #define PCL818_CNTENABLE_PACER_TRIG0 (1 << 0)
143 #define PCL818_CNTENABLE_CNT0_EXT_CLK (0 << 1)
144 #define PCL818_CNTENABLE_CNT0_INT_CLK (1 << 1)
145 #define PCL818_DO_DI_MSB_REG 0x0b
146 #define PCL818_TIMER_BASE 0x0c
148 /* W: fifo enable/disable */
149 #define PCL818_FI_ENABLE 6
150 /* W: fifo interrupt clear */
151 #define PCL818_FI_INTCLR 20
152 /* W: fifo interrupt clear */
153 #define PCL818_FI_FLUSH 25
155 #define PCL818_FI_STATUS 25
156 /* R: one record from FIFO */
157 #define PCL818_FI_DATALO 23
158 #define PCL818_FI_DATAHI 24
160 #define MAGIC_DMA_WORD 0x5a5a
162 static const struct comedi_lrange range_pcl818h_ai = {
176 static const struct comedi_lrange range_pcl818hg_ai = {
193 static const struct comedi_lrange range_pcl818l_l_ai = {
202 static const struct comedi_lrange range_pcl818l_h_ai = {
211 static const struct comedi_lrange range718_bipolar1 = {
217 static const struct comedi_lrange range718_bipolar0_5 = {
223 static const struct comedi_lrange range718_unipolar2 = {
229 static const struct comedi_lrange range718_unipolar1 = {
235 struct pcl818_board {
239 const struct comedi_lrange *ai_range_type;
240 unsigned int has_dma:1;
241 unsigned int has_fifo:1;
242 unsigned int is_818:1;
245 static const struct pcl818_board boardtypes[] = {
250 .ai_range_type = &range_pcl818l_l_ai,
257 .ai_range_type = &range_pcl818h_ai,
264 .ai_range_type = &range_pcl818h_ai,
272 .ai_range_type = &range_pcl818hg_ai,
280 .ai_range_type = &range_pcl818h_ai,
287 .ai_range_type = &range_unipolar5,
292 .ai_range_type = &range_pcl818h_ai,
298 struct pcl818_private {
299 struct comedi_isadma *dma;
300 unsigned int ns_min; /* manimal allowed delay between samples (in us) for actual card */
301 int i8253_osc_base; /* 1/frequency of on board oscilator in ns */
302 unsigned int act_chanlist[16]; /* MUX setting for actual AI operations */
303 unsigned int act_chanlist_len; /* how long is actual MUX list */
304 unsigned int act_chanlist_pos; /* actual position in MUX list */
305 unsigned int divisor1;
306 unsigned int divisor2;
307 unsigned int usefifo:1;
308 unsigned int ai_cmd_running:1;
309 unsigned int ai_cmd_canceled:1;
312 static void pcl818_start_pacer(struct comedi_device *dev, bool load_counters)
314 struct pcl818_private *devpriv = dev->private;
315 unsigned long timer_base = dev->iobase + PCL818_TIMER_BASE;
317 i8254_set_mode(timer_base, 0, 2, I8254_MODE2 | I8254_BINARY);
318 i8254_set_mode(timer_base, 0, 1, I8254_MODE2 | I8254_BINARY);
322 i8254_write(timer_base, 0, 2, devpriv->divisor2);
323 i8254_write(timer_base, 0, 1, devpriv->divisor1);
327 static void pcl818_ai_setup_dma(struct comedi_device *dev,
328 struct comedi_subdevice *s,
329 unsigned int unread_samples)
331 struct pcl818_private *devpriv = dev->private;
332 struct comedi_isadma *dma = devpriv->dma;
333 struct comedi_isadma_desc *desc = &dma->desc[dma->cur_dma];
334 unsigned int max_samples = comedi_bytes_to_samples(s, desc->maxsize);
335 unsigned int nsamples;
337 comedi_isadma_disable(dma->chan);
340 * Determine dma size based on the buffer maxsize plus the number of
341 * unread samples and the number of samples remaining in the command.
343 nsamples = comedi_nsamples_left(s, max_samples + unread_samples);
344 if (nsamples > unread_samples) {
345 nsamples -= unread_samples;
346 desc->size = comedi_samples_to_bytes(s, nsamples);
347 comedi_isadma_program(desc);
351 static void pcl818_ai_set_chan_range(struct comedi_device *dev,
355 outb(chan, dev->iobase + PCL818_MUX_REG);
356 outb(range, dev->iobase + PCL818_RANGE_REG);
359 static void pcl818_ai_set_chan_scan(struct comedi_device *dev,
360 unsigned int first_chan,
361 unsigned int last_chan)
363 outb(PCL818_MUX_SCAN(first_chan, last_chan),
364 dev->iobase + PCL818_MUX_REG);
367 static void pcl818_ai_setup_chanlist(struct comedi_device *dev,
368 unsigned int *chanlist,
371 struct pcl818_private *devpriv = dev->private;
372 unsigned int first_chan = CR_CHAN(chanlist[0]);
373 unsigned int last_chan;
377 devpriv->act_chanlist_len = seglen;
378 devpriv->act_chanlist_pos = 0;
380 /* store range list to card */
381 for (i = 0; i < seglen; i++) {
382 last_chan = CR_CHAN(chanlist[i]);
383 range = CR_RANGE(chanlist[i]);
385 devpriv->act_chanlist[i] = last_chan;
387 pcl818_ai_set_chan_range(dev, last_chan, range);
392 pcl818_ai_set_chan_scan(dev, first_chan, last_chan);
395 static void pcl818_ai_clear_eoc(struct comedi_device *dev)
397 /* writing any value clears the interrupt request */
398 outb(0, dev->iobase + PCL818_STATUS_REG);
401 static void pcl818_ai_soft_trig(struct comedi_device *dev)
403 /* writing any value triggers a software conversion */
404 outb(0, dev->iobase + PCL818_AI_LSB_REG);
407 static unsigned int pcl818_ai_get_fifo_sample(struct comedi_device *dev,
408 struct comedi_subdevice *s,
413 val = inb(dev->iobase + PCL818_FI_DATALO);
414 val |= (inb(dev->iobase + PCL818_FI_DATAHI) << 8);
419 return (val >> 4) & s->maxdata;
422 static unsigned int pcl818_ai_get_sample(struct comedi_device *dev,
423 struct comedi_subdevice *s,
428 val = inb(dev->iobase + PCL818_AI_MSB_REG) << 8;
429 val |= inb(dev->iobase + PCL818_AI_LSB_REG);
434 return (val >> 4) & s->maxdata;
437 static int pcl818_ai_eoc(struct comedi_device *dev,
438 struct comedi_subdevice *s,
439 struct comedi_insn *insn,
440 unsigned long context)
444 status = inb(dev->iobase + PCL818_STATUS_REG);
445 if (status & PCL818_STATUS_INT)
450 static bool pcl818_ai_write_sample(struct comedi_device *dev,
451 struct comedi_subdevice *s,
452 unsigned int chan, unsigned int val)
454 struct pcl818_private *devpriv = dev->private;
455 struct comedi_cmd *cmd = &s->async->cmd;
456 unsigned int expected_chan;
458 expected_chan = devpriv->act_chanlist[devpriv->act_chanlist_pos];
459 if (chan != expected_chan) {
460 dev_dbg(dev->class_dev,
461 "A/D mode1/3 %s - channel dropout %d!=%d !\n",
462 (devpriv->dma) ? "DMA" :
463 (devpriv->usefifo) ? "FIFO" : "IRQ",
464 chan, expected_chan);
465 s->async->events |= COMEDI_CB_ERROR;
469 comedi_buf_write_samples(s, &val, 1);
471 devpriv->act_chanlist_pos++;
472 if (devpriv->act_chanlist_pos >= devpriv->act_chanlist_len)
473 devpriv->act_chanlist_pos = 0;
475 if (cmd->stop_src == TRIG_COUNT &&
476 s->async->scans_done >= cmd->stop_arg) {
477 s->async->events |= COMEDI_CB_EOA;
484 static void pcl818_handle_eoc(struct comedi_device *dev,
485 struct comedi_subdevice *s)
490 if (pcl818_ai_eoc(dev, s, NULL, 0)) {
491 dev_err(dev->class_dev, "A/D mode1/3 IRQ without DRDY!\n");
492 s->async->events |= COMEDI_CB_ERROR;
496 val = pcl818_ai_get_sample(dev, s, &chan);
497 pcl818_ai_write_sample(dev, s, chan, val);
500 static void pcl818_handle_dma(struct comedi_device *dev,
501 struct comedi_subdevice *s)
503 struct pcl818_private *devpriv = dev->private;
504 struct comedi_isadma *dma = devpriv->dma;
505 struct comedi_isadma_desc *desc = &dma->desc[dma->cur_dma];
506 unsigned short *ptr = desc->virt_addr;
507 unsigned int nsamples = comedi_bytes_to_samples(s, desc->size);
512 /* restart dma with the next buffer */
513 dma->cur_dma = 1 - dma->cur_dma;
514 pcl818_ai_setup_dma(dev, s, nsamples);
516 for (i = 0; i < nsamples; i++) {
519 val = (val >> 4) & s->maxdata;
520 if (!pcl818_ai_write_sample(dev, s, chan, val))
525 static void pcl818_handle_fifo(struct comedi_device *dev,
526 struct comedi_subdevice *s)
533 status = inb(dev->iobase + PCL818_FI_STATUS);
536 dev_err(dev->class_dev, "A/D mode1/3 FIFO overflow!\n");
537 s->async->events |= COMEDI_CB_ERROR;
542 dev_err(dev->class_dev,
543 "A/D mode1/3 FIFO interrupt without data!\n");
544 s->async->events |= COMEDI_CB_ERROR;
553 for (i = 0; i < len; i++) {
554 val = pcl818_ai_get_fifo_sample(dev, s, &chan);
555 if (!pcl818_ai_write_sample(dev, s, chan, val))
560 static irqreturn_t pcl818_interrupt(int irq, void *d)
562 struct comedi_device *dev = d;
563 struct pcl818_private *devpriv = dev->private;
564 struct comedi_subdevice *s = dev->read_subdev;
565 struct comedi_cmd *cmd = &s->async->cmd;
567 if (!dev->attached || !devpriv->ai_cmd_running) {
568 pcl818_ai_clear_eoc(dev);
572 if (devpriv->ai_cmd_canceled) {
574 * The cleanup from ai_cancel() has been delayed
575 * until now because the card doesn't seem to like
576 * being reprogrammed while a DMA transfer is in
579 s->async->scans_done = cmd->stop_arg;
585 pcl818_handle_dma(dev, s);
586 else if (devpriv->usefifo)
587 pcl818_handle_fifo(dev, s);
589 pcl818_handle_eoc(dev, s);
591 pcl818_ai_clear_eoc(dev);
593 comedi_handle_events(dev, s);
597 static int check_channel_list(struct comedi_device *dev,
598 struct comedi_subdevice *s,
599 unsigned int *chanlist, unsigned int n_chan)
601 unsigned int chansegment[16];
602 unsigned int i, nowmustbechan, seglen, segpos;
604 /* correct channel and range number check itself comedi/range.c */
606 dev_err(dev->class_dev, "range/channel list is empty!\n");
611 /* first channel is every time ok */
612 chansegment[0] = chanlist[0];
613 /* build part of chanlist */
614 for (i = 1, seglen = 1; i < n_chan; i++, seglen++) {
615 /* we detect loop, this must by finish */
617 if (chanlist[0] == chanlist[i])
620 (CR_CHAN(chansegment[i - 1]) + 1) % s->n_chan;
621 if (nowmustbechan != CR_CHAN(chanlist[i])) { /* channel list isn't continuous :-( */
622 dev_dbg(dev->class_dev,
623 "channel list must be continuous! chanlist[%i]=%d but must be %d or %d!\n",
624 i, CR_CHAN(chanlist[i]), nowmustbechan,
625 CR_CHAN(chanlist[0]));
628 /* well, this is next correct channel in list */
629 chansegment[i] = chanlist[i];
632 /* check whole chanlist */
633 for (i = 0, segpos = 0; i < n_chan; i++) {
634 if (chanlist[i] != chansegment[i % seglen]) {
635 dev_dbg(dev->class_dev,
636 "bad channel or range number! chanlist[%i]=%d,%d,%d and not %d,%d,%d!\n",
637 i, CR_CHAN(chansegment[i]),
638 CR_RANGE(chansegment[i]),
639 CR_AREF(chansegment[i]),
640 CR_CHAN(chanlist[i % seglen]),
641 CR_RANGE(chanlist[i % seglen]),
642 CR_AREF(chansegment[i % seglen]));
643 return 0; /* chan/gain list is strange */
652 static int check_single_ended(unsigned int port)
654 if (inb(port + PCL818_STATUS_REG) & PCL818_STATUS_MUX)
659 static int ai_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s,
660 struct comedi_cmd *cmd)
662 const struct pcl818_board *board = dev->board_ptr;
663 struct pcl818_private *devpriv = dev->private;
667 /* Step 1 : check if triggers are trivially valid */
669 err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW);
670 err |= cfc_check_trigger_src(&cmd->scan_begin_src, TRIG_FOLLOW);
671 err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_TIMER | TRIG_EXT);
672 err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
673 err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
678 /* Step 2a : make sure trigger sources are unique */
680 err |= cfc_check_trigger_is_unique(cmd->convert_src);
681 err |= cfc_check_trigger_is_unique(cmd->stop_src);
683 /* Step 2b : and mutually compatible */
688 /* Step 3: check if arguments are trivially valid */
690 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
691 err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
693 if (cmd->convert_src == TRIG_TIMER)
694 err |= cfc_check_trigger_arg_min(&cmd->convert_arg,
697 err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
699 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
701 if (cmd->stop_src == TRIG_COUNT)
702 err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
704 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
709 /* step 4: fix up any arguments */
711 if (cmd->convert_src == TRIG_TIMER) {
712 arg = cmd->convert_arg;
713 i8253_cascade_ns_to_timer(devpriv->i8253_osc_base,
717 err |= cfc_check_trigger_arg_is(&cmd->convert_arg, arg);
723 /* step 5: complain about special chanlist considerations */
726 if (!check_channel_list(dev, s, cmd->chanlist,
728 return 5; /* incorrect channels list */
734 static int pcl818_ai_cmd(struct comedi_device *dev,
735 struct comedi_subdevice *s)
737 struct pcl818_private *devpriv = dev->private;
738 struct comedi_isadma *dma = devpriv->dma;
739 struct comedi_cmd *cmd = &s->async->cmd;
740 unsigned int ctrl = 0;
743 if (devpriv->ai_cmd_running)
746 pcl818_start_pacer(dev, false);
748 seglen = check_channel_list(dev, s, cmd->chanlist, cmd->chanlist_len);
751 pcl818_ai_setup_chanlist(dev, cmd->chanlist, seglen);
753 devpriv->ai_cmd_running = 1;
754 devpriv->ai_cmd_canceled = 0;
755 devpriv->act_chanlist_pos = 0;
757 if (cmd->convert_src == TRIG_TIMER)
758 ctrl |= PCL818_CTRL_PACER_TRIG;
760 ctrl |= PCL818_CTRL_EXT_TRIG;
762 outb(PCL818_CNTENABLE_PACER_ENA, dev->iobase + PCL818_CNTENABLE_REG);
765 /* setup and enable dma for the first buffer */
767 pcl818_ai_setup_dma(dev, s, 0);
769 ctrl |= PCL818_CTRL_INTE | PCL818_CTRL_IRQ(dev->irq) |
771 } else if (devpriv->usefifo) {
773 outb(1, dev->iobase + PCL818_FI_ENABLE);
775 ctrl |= PCL818_CTRL_INTE | PCL818_CTRL_IRQ(dev->irq);
777 outb(ctrl, dev->iobase + PCL818_CTRL_REG);
779 if (cmd->convert_src == TRIG_TIMER)
780 pcl818_start_pacer(dev, true);
785 static int pcl818_ai_cancel(struct comedi_device *dev,
786 struct comedi_subdevice *s)
788 struct pcl818_private *devpriv = dev->private;
789 struct comedi_isadma *dma = devpriv->dma;
790 struct comedi_cmd *cmd = &s->async->cmd;
792 if (!devpriv->ai_cmd_running)
796 if (cmd->stop_src == TRIG_NONE ||
797 (cmd->stop_src == TRIG_COUNT &&
798 s->async->scans_done < cmd->stop_arg)) {
799 if (!devpriv->ai_cmd_canceled) {
801 * Wait for running dma transfer to end,
802 * do cleanup in interrupt.
804 devpriv->ai_cmd_canceled = 1;
808 comedi_isadma_disable(dma->chan);
811 outb(PCL818_CTRL_DISABLE_TRIG, dev->iobase + PCL818_CTRL_REG);
812 pcl818_start_pacer(dev, false);
813 pcl818_ai_clear_eoc(dev);
815 if (devpriv->usefifo) { /* FIFO shutdown */
816 outb(0, dev->iobase + PCL818_FI_INTCLR);
817 outb(0, dev->iobase + PCL818_FI_FLUSH);
818 outb(0, dev->iobase + PCL818_FI_ENABLE);
820 devpriv->ai_cmd_running = 0;
821 devpriv->ai_cmd_canceled = 0;
826 static int pcl818_ai_insn_read(struct comedi_device *dev,
827 struct comedi_subdevice *s,
828 struct comedi_insn *insn,
831 unsigned int chan = CR_CHAN(insn->chanspec);
832 unsigned int range = CR_RANGE(insn->chanspec);
836 outb(PCL818_CTRL_SOFT_TRIG, dev->iobase + PCL818_CTRL_REG);
838 pcl818_ai_set_chan_range(dev, chan, range);
839 pcl818_ai_set_chan_scan(dev, chan, chan);
841 for (i = 0; i < insn->n; i++) {
842 pcl818_ai_clear_eoc(dev);
843 pcl818_ai_soft_trig(dev);
845 ret = comedi_timeout(dev, s, insn, pcl818_ai_eoc, 0);
849 data[i] = pcl818_ai_get_sample(dev, s, NULL);
851 pcl818_ai_clear_eoc(dev);
853 return ret ? ret : insn->n;
856 static int pcl818_ao_insn_write(struct comedi_device *dev,
857 struct comedi_subdevice *s,
858 struct comedi_insn *insn,
861 unsigned int chan = CR_CHAN(insn->chanspec);
862 unsigned int val = s->readback[chan];
865 for (i = 0; i < insn->n; i++) {
867 outb((val & 0x000f) << 4,
868 dev->iobase + PCL818_AO_LSB_REG(chan));
869 outb((val & 0x0ff0) >> 4,
870 dev->iobase + PCL818_AO_MSB_REG(chan));
872 s->readback[chan] = val;
877 static int pcl818_di_insn_bits(struct comedi_device *dev,
878 struct comedi_subdevice *s,
879 struct comedi_insn *insn,
882 data[1] = inb(dev->iobase + PCL818_DO_DI_LSB_REG) |
883 (inb(dev->iobase + PCL818_DO_DI_MSB_REG) << 8);
888 static int pcl818_do_insn_bits(struct comedi_device *dev,
889 struct comedi_subdevice *s,
890 struct comedi_insn *insn,
893 if (comedi_dio_update_state(s, data)) {
894 outb(s->state & 0xff, dev->iobase + PCL818_DO_DI_LSB_REG);
895 outb((s->state >> 8), dev->iobase + PCL818_DO_DI_MSB_REG);
903 static void pcl818_reset(struct comedi_device *dev)
905 const struct pcl818_board *board = dev->board_ptr;
906 unsigned long timer_base = dev->iobase + PCL818_TIMER_BASE;
909 /* flush and disable the FIFO */
910 if (board->has_fifo) {
911 outb(0, dev->iobase + PCL818_FI_INTCLR);
912 outb(0, dev->iobase + PCL818_FI_FLUSH);
913 outb(0, dev->iobase + PCL818_FI_ENABLE);
916 /* disable analog input trigger */
917 outb(PCL818_CTRL_DISABLE_TRIG, dev->iobase + PCL818_CTRL_REG);
918 pcl818_ai_clear_eoc(dev);
920 pcl818_ai_set_chan_range(dev, 0, 0);
923 outb(PCL818_CNTENABLE_PACER_ENA, dev->iobase + PCL818_CNTENABLE_REG);
924 i8254_set_mode(timer_base, 0, 2, I8254_MODE0 | I8254_BINARY);
925 i8254_set_mode(timer_base, 0, 1, I8254_MODE0 | I8254_BINARY);
926 i8254_set_mode(timer_base, 0, 0, I8254_MODE0 | I8254_BINARY);
928 /* set analog output channels to 0V */
929 for (chan = 0; chan < board->n_aochan; chan++) {
930 outb(0, dev->iobase + PCL818_AO_LSB_REG(chan));
931 outb(0, dev->iobase + PCL818_AO_MSB_REG(chan));
934 /* set all digital outputs low */
935 outb(0, dev->iobase + PCL818_DO_DI_MSB_REG);
936 outb(0, dev->iobase + PCL818_DO_DI_LSB_REG);
939 static void pcl818_set_ai_range_table(struct comedi_device *dev,
940 struct comedi_subdevice *s,
941 struct comedi_devconfig *it)
943 const struct pcl818_board *board = dev->board_ptr;
945 /* default to the range table from the boardinfo */
946 s->range_table = board->ai_range_type;
948 /* now check the user config option based on the boardtype */
950 if (it->options[4] == 1 || it->options[4] == 10) {
951 /* secondary range list jumper selectable */
952 s->range_table = &range_pcl818l_h_ai;
955 switch (it->options[4]) {
957 s->range_table = &range_bipolar10;
960 s->range_table = &range_bipolar5;
963 s->range_table = &range_bipolar2_5;
966 s->range_table = &range718_bipolar1;
969 s->range_table = &range718_bipolar0_5;
972 s->range_table = &range_unipolar10;
975 s->range_table = &range_unipolar5;
978 s->range_table = &range718_unipolar2;
981 s->range_table = &range718_unipolar1;
984 s->range_table = &range_unknown;
990 static void pcl818_alloc_dma(struct comedi_device *dev, unsigned int dma_chan)
992 struct pcl818_private *devpriv = dev->private;
994 /* only DMA channels 3 and 1 are valid */
995 if (!(dma_chan == 3 || dma_chan == 1))
998 /* DMA uses two 16K buffers */
999 devpriv->dma = comedi_isadma_alloc(dev, 2, dma_chan, dma_chan,
1000 PAGE_SIZE * 4, COMEDI_ISADMA_READ);
1003 static void pcl818_free_dma(struct comedi_device *dev)
1005 struct pcl818_private *devpriv = dev->private;
1008 comedi_isadma_free(devpriv->dma);
1011 static int pcl818_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1013 const struct pcl818_board *board = dev->board_ptr;
1014 struct pcl818_private *devpriv;
1015 struct comedi_subdevice *s;
1018 devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
1022 ret = comedi_request_region(dev, it->options[0],
1023 board->has_fifo ? 0x20 : 0x10);
1027 /* we can use IRQ 2-7 for async command support */
1028 if (it->options[1] >= 2 && it->options[1] <= 7) {
1029 ret = request_irq(it->options[1], pcl818_interrupt, 0,
1030 dev->board_name, dev);
1032 dev->irq = it->options[1];
1035 /* should we use the FIFO? */
1036 if (dev->irq && board->has_fifo && it->options[2] == -1)
1037 devpriv->usefifo = 1;
1039 /* we need an IRQ to do DMA on channel 3 or 1 */
1040 if (dev->irq && board->has_dma)
1041 pcl818_alloc_dma(dev, it->options[2]);
1043 ret = comedi_alloc_subdevices(dev, 4);
1047 s = &dev->subdevices[0];
1048 s->type = COMEDI_SUBD_AI;
1049 s->subdev_flags = SDF_READABLE;
1050 if (check_single_ended(dev->iobase)) {
1052 s->subdev_flags |= SDF_COMMON | SDF_GROUND;
1055 s->subdev_flags |= SDF_DIFF;
1057 s->maxdata = 0x0fff;
1059 pcl818_set_ai_range_table(dev, s, it);
1061 s->insn_read = pcl818_ai_insn_read;
1063 dev->read_subdev = s;
1064 s->subdev_flags |= SDF_CMD_READ;
1065 s->len_chanlist = s->n_chan;
1066 s->do_cmdtest = ai_cmdtest;
1067 s->do_cmd = pcl818_ai_cmd;
1068 s->cancel = pcl818_ai_cancel;
1071 /* Analog Output subdevice */
1072 s = &dev->subdevices[1];
1073 if (board->n_aochan) {
1074 s->type = COMEDI_SUBD_AO;
1075 s->subdev_flags = SDF_WRITABLE | SDF_GROUND;
1076 s->n_chan = board->n_aochan;
1077 s->maxdata = 0x0fff;
1078 s->range_table = &range_unipolar5;
1079 if (board->is_818) {
1080 if ((it->options[4] == 1) || (it->options[4] == 10))
1081 s->range_table = &range_unipolar10;
1082 if (it->options[4] == 2)
1083 s->range_table = &range_unknown;
1085 if ((it->options[5] == 1) || (it->options[5] == 10))
1086 s->range_table = &range_unipolar10;
1087 if (it->options[5] == 2)
1088 s->range_table = &range_unknown;
1090 s->insn_write = pcl818_ao_insn_write;
1092 ret = comedi_alloc_subdev_readback(s);
1096 s->type = COMEDI_SUBD_UNUSED;
1099 /* Digital Input subdevice */
1100 s = &dev->subdevices[2];
1101 s->type = COMEDI_SUBD_DI;
1102 s->subdev_flags = SDF_READABLE;
1105 s->range_table = &range_digital;
1106 s->insn_bits = pcl818_di_insn_bits;
1108 /* Digital Output subdevice */
1109 s = &dev->subdevices[3];
1110 s->type = COMEDI_SUBD_DO;
1111 s->subdev_flags = SDF_WRITABLE;
1114 s->range_table = &range_digital;
1115 s->insn_bits = pcl818_do_insn_bits;
1117 /* select 1/10MHz oscilator */
1118 if ((it->options[3] == 0) || (it->options[3] == 10))
1119 devpriv->i8253_osc_base = I8254_OSC_BASE_10MHZ;
1121 devpriv->i8253_osc_base = I8254_OSC_BASE_1MHZ;
1123 /* max sampling speed */
1124 devpriv->ns_min = board->ns_min;
1126 if (!board->is_818) {
1127 if ((it->options[6] == 1) || (it->options[6] == 100))
1128 devpriv->ns_min = 10000; /* extended PCL718 to 100kHz DAC */
1136 static void pcl818_detach(struct comedi_device *dev)
1138 struct pcl818_private *devpriv = dev->private;
1141 pcl818_ai_cancel(dev, dev->read_subdev);
1144 pcl818_free_dma(dev);
1145 comedi_legacy_detach(dev);
1148 static struct comedi_driver pcl818_driver = {
1149 .driver_name = "pcl818",
1150 .module = THIS_MODULE,
1151 .attach = pcl818_attach,
1152 .detach = pcl818_detach,
1153 .board_name = &boardtypes[0].name,
1154 .num_names = ARRAY_SIZE(boardtypes),
1155 .offset = sizeof(struct pcl818_board),
1157 module_comedi_driver(pcl818_driver);
1159 MODULE_AUTHOR("Comedi http://www.comedi.org");
1160 MODULE_DESCRIPTION("Comedi low-level driver");
1161 MODULE_LICENSE("GPL");