drivers/staging/comedi/drivers/ni_labpc.c

   1 /*
   2     comedi/drivers/ni_labpc.c
   3     Driver for National Instruments Lab-PC series boards and compatibles
   4     Copyright (C) 2001, 2002, 2003 Frank Mori Hess <fmhess@users.sourceforge.net>
   5
   6     This program is free software; you can redistribute it and/or modify
   7     it under the terms of the GNU General Public License as published by
   8     the Free Software Foundation; either version 2 of the License, or
   9     (at your option) any later version.
  10
  11     This program is distributed in the hope that it will be useful,
  12     but WITHOUT ANY WARRANTY; without even the implied warranty of
  13     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14     GNU General Public License for more details.
  15
  16     You should have received a copy of the GNU General Public License
  17     along with this program; if not, write to the Free Software
  18     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19
  20 ************************************************************************
  21 */
  22 /*
  23 Driver: ni_labpc
  24 Description: National Instruments Lab-PC (& compatibles)
  25 Author: Frank Mori Hess <fmhess@users.sourceforge.net>
  26 Devices: [National Instruments] Lab-PC-1200 (labpc-1200),
  27   Lab-PC-1200AI (labpc-1200ai), Lab-PC+ (lab-pc+), PCI-1200 (ni_labpc)
  28 Status: works
  29
  30 Tested with lab-pc-1200.  For the older Lab-PC+, not all input ranges
  31 and analog references will work, the available ranges/arefs will
  32 depend on how you have configured the jumpers on your board
  33 (see your owner's manual).
  34
  35 Kernel-level ISA plug-and-play support for the lab-pc-1200
  36 boards has not
  37 yet been added to the driver, mainly due to the fact that
  38 I don't know the device id numbers.  If you have one
  39 of these boards,
  40 please file a bug report at https://bugs.comedi.org/
  41 so I can get the necessary information from you.
  42
  43 The 1200 series boards have onboard calibration dacs for correcting
  44 analog input/output offsets and gains.  The proper settings for these
  45 caldacs are stored on the board's eeprom.  To read the caldac values
  46 from the eeprom and store them into a file that can be then be used by
  47 comedilib, use the comedi_calibrate program.
  48
  49 Configuration options - ISA boards:
  50   [0] - I/O port base address
  51   [1] - IRQ (optional, required for timed or externally triggered conversions)
  52   [2] - DMA channel (optional)
  53
  54 Configuration options - PCI boards:
  55   [0] - bus (optional)
  56   [1] - slot (optional)
  57
  58 The Lab-pc+ has quirky chanlist requirements
  59 when scanning multiple channels.  Multiple channel scan
  60 sequence must start at highest channel, then decrement down to
  61 channel 0.  The rest of the cards can scan down like lab-pc+ or scan
  62 up from channel zero.  Chanlists consisting of all one channel
  63 are also legal, and allow you to pace conversions in bursts.
  64
  65 */
  66
  67 /*
  68
  69 NI manuals:
  70 341309a (labpc-1200 register manual)
  71 340914a (pci-1200)
  72 320502b (lab-pc+)
  73
  74 */
  75
  76 #undef LABPC_DEBUG
  77 /* #define LABPC_DEBUG    enable debugging messages */
  78
  79 #include <linux/interrupt.h>
  80 #include "../comedidev.h"
  81
  82 #include <linux/delay.h>
  83 #include <asm/dma.h>
  84
  85 #include "8253.h"
  86 #include "8255.h"
  87 #include "mite.h"
  88 #include "comedi_fc.h"
  89 #include "ni_labpc.h"
  90
  91 #define DRV_NAME "ni_labpc"
  92
  93 #define LABPC_SIZE           32 /*  size of io region used by board */
  94 #define LABPC_TIMER_BASE            500 /*  2 MHz master clock */
  95
  96 /* Registers for the lab-pc+ */
  97
  98 /* write-only registers */
  99 #define COMMAND1_REG    0x0
 100 #define   ADC_GAIN_MASK (0x7 << 4)
 101 #define   ADC_CHAN_BITS(x)      ((x) & 0x7)
 102 #define   ADC_SCAN_EN_BIT       0x80    /*  enables multi channel scans */
 103 #define COMMAND2_REG    0x1
 104 #define   PRETRIG_BIT   0x1     /*  enable pretriggering (used in conjunction with SWTRIG) */
 105 #define   HWTRIG_BIT    0x2     /*  enable paced conversions on external trigger */
 106 #define   SWTRIG_BIT    0x4     /*  enable paced conversions */
 107 #define   CASCADE_BIT   0x8     /*  use two cascaded counters for pacing */
 108 #define   DAC_PACED_BIT(channel)        (0x40 << ((channel) & 0x1))
 109 #define COMMAND3_REG    0x2
 110 #define   DMA_EN_BIT    0x1     /*  enable dma transfers */
 111 #define   DIO_INTR_EN_BIT       0x2     /*  enable interrupts for 8255 */
 112 #define   DMATC_INTR_EN_BIT     0x4     /*  enable dma terminal count interrupt */
 113 #define   TIMER_INTR_EN_BIT     0x8     /*  enable timer interrupt */
 114 #define   ERR_INTR_EN_BIT       0x10    /*  enable error interrupt */
 115 #define   ADC_FNE_INTR_EN_BIT   0x20    /*  enable fifo not empty interrupt */
 116 #define ADC_CONVERT_REG 0x3
 117 #define DAC_LSB_REG(channel)    (0x4 + 2 * ((channel) & 0x1))
 118 #define DAC_MSB_REG(channel)    (0x5 + 2 * ((channel) & 0x1))
 119 #define ADC_CLEAR_REG   0x8
 120 #define DMATC_CLEAR_REG 0xa
 121 #define TIMER_CLEAR_REG 0xc
 122 #define COMMAND6_REG    0xe     /*  1200 boards only */
 123 #define   ADC_COMMON_BIT        0x1     /*  select ground or common-mode reference */
 124 #define   ADC_UNIP_BIT  0x2     /*  adc unipolar */
 125 #define   DAC_UNIP_BIT(channel) (0x4 << ((channel) & 0x1))      /*  dac unipolar */
 126 #define   ADC_FHF_INTR_EN_BIT   0x20    /*  enable fifo half full interrupt */
 127 #define   A1_INTR_EN_BIT        0x40    /*  enable interrupt on end of hardware count */
 128 #define   ADC_SCAN_UP_BIT 0x80  /*  scan up from channel zero instead of down to zero */
 129 #define COMMAND4_REG    0xf
 130 #define   INTERVAL_SCAN_EN_BIT  0x1     /*  enables 'interval' scanning */
 131 #define   EXT_SCAN_EN_BIT       0x2     /*  enables external signal on counter b1 output to trigger scan */
 132 #define   EXT_CONVERT_OUT_BIT   0x4     /*  chooses direction (output or input) for EXTCONV* line */
 133 #define   ADC_DIFF_BIT  0x8     /*  chooses differential inputs for adc (in conjunction with board jumper) */
 134 #define   EXT_CONVERT_DISABLE_BIT       0x10
 135 #define COMMAND5_REG    0x1c    /*  1200 boards only, calibration stuff */
 136 #define   EEPROM_WRITE_UNPROTECT_BIT    0x4     /*  enable eeprom for write */
 137 #define   DITHER_EN_BIT 0x8     /*  enable dithering */
 138 #define   CALDAC_LOAD_BIT       0x10    /*  load calibration dac */
 139 #define   SCLOCK_BIT    0x20    /*  serial clock - rising edge writes, falling edge reads */
 140 #define   SDATA_BIT     0x40    /*  serial data bit for writing to eeprom or calibration dacs */
 141 #define   EEPROM_EN_BIT 0x80    /*  enable eeprom for read/write */
 142 #define INTERVAL_COUNT_REG      0x1e
 143 #define INTERVAL_LOAD_REG       0x1f
 144 #define   INTERVAL_LOAD_BITS    0x1
 145
 146 /* read-only registers */
 147 #define STATUS1_REG     0x0
 148 #define   DATA_AVAIL_BIT        0x1     /*  data is available in fifo */
 149 #define   OVERRUN_BIT   0x2     /*  overrun has occurred */
 150 #define   OVERFLOW_BIT  0x4     /*  fifo overflow */
 151 #define   TIMER_BIT     0x8     /*  timer interrupt has occured */
 152 #define   DMATC_BIT     0x10    /*  dma terminal count has occured */
 153 #define   EXT_TRIG_BIT  0x40    /*  external trigger has occured */
 154 #define STATUS2_REG     0x1d    /*  1200 boards only */
 155 #define   EEPROM_OUT_BIT        0x1     /*  programmable eeprom serial output */
 156 #define   A1_TC_BIT     0x2     /*  counter A1 terminal count */
 157 #define   FNHF_BIT      0x4     /*  fifo not half full */
 158 #define ADC_FIFO_REG    0xa
 159
 160 #define DIO_BASE_REG    0x10
 161 #define COUNTER_A_BASE_REG      0x14
 162 #define COUNTER_A_CONTROL_REG   (COUNTER_A_BASE_REG + 0x3)
 163 #define   INIT_A0_BITS  0x14    /*  check modes put conversion pacer output in harmless state (a0 mode 2) */
 164 #define   INIT_A1_BITS  0x70    /*  put hardware conversion counter output in harmless state (a1 mode 0) */
 165 #define COUNTER_B_BASE_REG      0x18
 166
 167 static int labpc_attach(struct comedi_device *dev, struct comedi_devconfig *it);
 168 static int labpc_cancel(struct comedi_device *dev, struct comedi_subdevice *s);
 169 static irqreturn_t labpc_interrupt(int irq, void *d);
 170 static int labpc_drain_fifo(struct comedi_device *dev);
 171 static void labpc_drain_dma(struct comedi_device *dev);
 172 static void handle_isa_dma(struct comedi_device *dev);
 173 static void labpc_drain_dregs(struct comedi_device *dev);
 174 static int labpc_ai_cmdtest(struct comedi_device *dev,
 175                             struct comedi_subdevice *s, struct comedi_cmd *cmd);
 176 static int labpc_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s);
 177 static int labpc_ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
 178                           struct comedi_insn *insn, unsigned int *data);
 179 static int labpc_ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s,
 180                           struct comedi_insn *insn, unsigned int *data);
 181 static int labpc_ao_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
 182                           struct comedi_insn *insn, unsigned int *data);
 183 static int labpc_calib_read_insn(struct comedi_device *dev,
 184                                  struct comedi_subdevice *s,
 185                                  struct comedi_insn *insn, unsigned int *data);
 186 static int labpc_calib_write_insn(struct comedi_device *dev,
 187                                   struct comedi_subdevice *s,
 188                                   struct comedi_insn *insn, unsigned int *data);
 189 static int labpc_eeprom_read_insn(struct comedi_device *dev,
 190                                   struct comedi_subdevice *s,
 191                                   struct comedi_insn *insn, unsigned int *data);
 192 static int labpc_eeprom_write_insn(struct comedi_device *dev,
 193                                    struct comedi_subdevice *s,
 194                                    struct comedi_insn *insn,
 195                                    unsigned int *data);
 196 static unsigned int labpc_suggest_transfer_size(struct comedi_cmd cmd);
 197 static void labpc_adc_timing(struct comedi_device *dev, struct comedi_cmd *cmd);
 198 #ifdef CONFIG_COMEDI_PCI
 199 static int labpc_find_device(struct comedi_device *dev, int bus, int slot);
 200 #endif
 201 static int labpc_dio_mem_callback(int dir, int port, int data,
 202                                   unsigned long arg);
 203 static void labpc_serial_out(struct comedi_device *dev, unsigned int value,
 204                              unsigned int num_bits);
 205 static unsigned int labpc_serial_in(struct comedi_device *dev);
 206 static unsigned int labpc_eeprom_read(struct comedi_device *dev,
 207                                       unsigned int address);
 208 static unsigned int labpc_eeprom_read_status(struct comedi_device *dev);
 209 static unsigned int labpc_eeprom_write(struct comedi_device *dev,
 210                                        unsigned int address,
 211                                        unsigned int value);
 212 static void write_caldac(struct comedi_device *dev, unsigned int channel,
 213                          unsigned int value);
 214
 215 enum scan_mode {
 216         MODE_SINGLE_CHAN,
 217         MODE_SINGLE_CHAN_INTERVAL,
 218         MODE_MULT_CHAN_UP,
 219         MODE_MULT_CHAN_DOWN,
 220 };
 221
 222 /* analog input ranges */
 223 #define NUM_LABPC_PLUS_AI_RANGES 16
 224 /* indicates unipolar ranges */
 225 static const int labpc_plus_is_unipolar[NUM_LABPC_PLUS_AI_RANGES] = {
 226         0,
 227         0,
 228         0,
 229         0,
 230         0,
 231         0,
 232         0,
 233         0,
 234         1,
 235         1,
 236         1,
 237         1,
 238         1,
 239         1,
 240         1,
 241         1,
 242 };
 243
 244 /* map range index to gain bits */
 245 static const int labpc_plus_ai_gain_bits[NUM_LABPC_PLUS_AI_RANGES] = {
 246         0x00,
 247         0x10,
 248         0x20,
 249         0x30,
 250         0x40,
 251         0x50,
 252         0x60,
 253         0x70,
 254         0x00,
 255         0x10,
 256         0x20,
 257         0x30,
 258         0x40,
 259         0x50,
 260         0x60,
 261         0x70,
 262 };
 263
 264 static const struct comedi_lrange range_labpc_plus_ai = {
 265         NUM_LABPC_PLUS_AI_RANGES,
 266         {
 267          BIP_RANGE(5),
 268          BIP_RANGE(4),
 269          BIP_RANGE(2.5),
 270          BIP_RANGE(1),
 271          BIP_RANGE(0.5),
 272          BIP_RANGE(0.25),
 273          BIP_RANGE(0.1),
 274          BIP_RANGE(0.05),
 275          UNI_RANGE(10),
 276          UNI_RANGE(8),
 277          UNI_RANGE(5),
 278          UNI_RANGE(2),
 279          UNI_RANGE(1),
 280          UNI_RANGE(0.5),
 281          UNI_RANGE(0.2),
 282          UNI_RANGE(0.1),
 283          }
 284 };
 285
 286 #define NUM_LABPC_1200_AI_RANGES 14
 287 /* indicates unipolar ranges */
 288 const int labpc_1200_is_unipolar[NUM_LABPC_1200_AI_RANGES] = {
 289         0,
 290         0,
 291         0,
 292         0,
 293         0,
 294         0,
 295         0,
 296         1,
 297         1,
 298         1,
 299         1,
 300         1,
 301         1,
 302         1,
 303 };
 304
 305 /* map range index to gain bits */
 306 const int labpc_1200_ai_gain_bits[NUM_LABPC_1200_AI_RANGES] = {
 307         0x00,
 308         0x20,
 309         0x30,
 310         0x40,
 311         0x50,
 312         0x60,
 313         0x70,
 314         0x00,
 315         0x20,
 316         0x30,
 317         0x40,
 318         0x50,
 319         0x60,
 320         0x70,
 321 };
 322
 323 const struct comedi_lrange range_labpc_1200_ai = {
 324         NUM_LABPC_1200_AI_RANGES,
 325         {
 326          BIP_RANGE(5),
 327          BIP_RANGE(2.5),
 328          BIP_RANGE(1),
 329          BIP_RANGE(0.5),
 330          BIP_RANGE(0.25),
 331          BIP_RANGE(0.1),
 332          BIP_RANGE(0.05),
 333          UNI_RANGE(10),
 334          UNI_RANGE(5),
 335          UNI_RANGE(2),
 336          UNI_RANGE(1),
 337          UNI_RANGE(0.5),
 338          UNI_RANGE(0.2),
 339          UNI_RANGE(0.1),
 340          }
 341 };
 342
 343 /* analog output ranges */
 344 #define AO_RANGE_IS_UNIPOLAR 0x1
 345 static const struct comedi_lrange range_labpc_ao = {
 346         2,
 347         {
 348          BIP_RANGE(5),
 349          UNI_RANGE(10),
 350          }
 351 };
 352
 353 /* functions that do inb/outb and readb/writeb so we can use
 354  * function pointers to decide which to use */
 355 static inline unsigned int labpc_inb(unsigned long address)
 356 {
 357         return inb(address);
 358 }
 359
 360 static inline void labpc_outb(unsigned int byte, unsigned long address)
 361 {
 362         outb(byte, address);
 363 }
 364
 365 static inline unsigned int labpc_readb(unsigned long address)
 366 {
 367         return readb((void *)address);
 368 }
 369
 370 static inline void labpc_writeb(unsigned int byte, unsigned long address)
 371 {
 372         writeb(byte, (void *)address);
 373 }
 374
 375 static const struct labpc_board_struct labpc_boards[] = {
 376         {
 377          .name = "lab-pc-1200",
 378          .ai_speed = 10000,
 379          .bustype = isa_bustype,
 380          .register_layout = labpc_1200_layout,
 381          .has_ao = 1,
 382          .ai_range_table = &range_labpc_1200_ai,
 383          .ai_range_code = labpc_1200_ai_gain_bits,
 384          .ai_range_is_unipolar = labpc_1200_is_unipolar,
 385          .ai_scan_up = 1,
 386          .memory_mapped_io = 0,
 387          },
 388         {
 389          .name = "lab-pc-1200ai",
 390          .ai_speed = 10000,
 391          .bustype = isa_bustype,
 392          .register_layout = labpc_1200_layout,
 393          .has_ao = 0,
 394          .ai_range_table = &range_labpc_1200_ai,
 395          .ai_range_code = labpc_1200_ai_gain_bits,
 396          .ai_range_is_unipolar = labpc_1200_is_unipolar,
 397          .ai_scan_up = 1,
 398          .memory_mapped_io = 0,
 399          },
 400         {
 401          .name = "lab-pc+",
 402          .ai_speed = 12000,
 403          .bustype = isa_bustype,
 404          .register_layout = labpc_plus_layout,
 405          .has_ao = 1,
 406          .ai_range_table = &range_labpc_plus_ai,
 407          .ai_range_code = labpc_plus_ai_gain_bits,
 408          .ai_range_is_unipolar = labpc_plus_is_unipolar,
 409          .ai_scan_up = 0,
 410          .memory_mapped_io = 0,
 411          },
 412 #ifdef CONFIG_COMEDI_PCI
 413         {
 414          .name = "pci-1200",
 415          .device_id = 0x161,
 416          .ai_speed = 10000,
 417          .bustype = pci_bustype,
 418          .register_layout = labpc_1200_layout,
 419          .has_ao = 1,
 420          .ai_range_table = &range_labpc_1200_ai,
 421          .ai_range_code = labpc_1200_ai_gain_bits,
 422          .ai_range_is_unipolar = labpc_1200_is_unipolar,
 423          .ai_scan_up = 1,
 424          .memory_mapped_io = 1,
 425          },
 426         /*  dummy entry so pci board works when comedi_config is passed driver name */
 427         {
 428          .name = DRV_NAME,
 429          .bustype = pci_bustype,
 430          },
 431 #endif
 432 };
 433
 434 /*
 435  * Useful for shorthand access to the particular board structure
 436  */
 437 #define thisboard ((struct labpc_board_struct *)dev->board_ptr)
 438
 439 static const int dma_buffer_size = 0xff00;      /*  size in bytes of dma buffer */
 440 static const int sample_size = 2;       /*  2 bytes per sample */
 441
 442 #define devpriv ((struct labpc_private *)dev->private)
 443
 444 static struct comedi_driver driver_labpc = {
 445         .driver_name = DRV_NAME,
 446         .module = THIS_MODULE,
 447         .attach = labpc_attach,
 448         .detach = labpc_common_detach,
 449         .num_names = ARRAY_SIZE(labpc_boards),
 450         .board_name = &labpc_boards[0].name,
 451         .offset = sizeof(struct labpc_board_struct),
 452 };
 453
 454 #ifdef CONFIG_COMEDI_PCI
 455 static DEFINE_PCI_DEVICE_TABLE(labpc_pci_table) = {
 456         {
 457         PCI_VENDOR_ID_NATINST, 0x161, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
 458         0}
 459 };
 460
 461 MODULE_DEVICE_TABLE(pci, labpc_pci_table);
 462 #endif /* CONFIG_COMEDI_PCI */
 463
 464 static inline int labpc_counter_load(struct comedi_device *dev,
 465                                      unsigned long base_address,
 466                                      unsigned int counter_number,
 467                                      unsigned int count, unsigned int mode)
 468 {
 469         if (thisboard->memory_mapped_io)
 470                 return i8254_mm_load((void *)base_address, 0, counter_number,
 471                                      count, mode);
 472         else
 473                 return i8254_load(base_address, 0, counter_number, count, mode);
 474 }
 475
 476 int labpc_common_attach(struct comedi_device *dev, unsigned long iobase,
 477                         unsigned int irq, unsigned int dma_chan)
 478 {
 479         struct comedi_subdevice *s;
 480         int i;
 481         unsigned long dma_flags, isr_flags;
 482         short lsb, msb;
 483
 484         printk("comedi%d: ni_labpc: %s, io 0x%lx", dev->minor, thisboard->name,
 485                iobase);
 486         if (irq) {
 487                 printk(", irq %u", irq);
 488         }
 489         if (dma_chan) {
 490                 printk(", dma %u", dma_chan);
 491         }
 492         printk("\n");
 493
 494         if (iobase == 0) {
 495                 printk("io base address is zero!\n");
 496                 return -EINVAL;
 497         }
 498         /*  request io regions for isa boards */
 499         if (thisboard->bustype == isa_bustype) {
 500                 /* check if io addresses are available */
 501                 if (!request_region(iobase, LABPC_SIZE,
 502                                     driver_labpc.driver_name)) {
 503                         printk("I/O port conflict\n");
 504                         return -EIO;
 505                 }
 506         }
 507         dev->iobase = iobase;
 508
 509         if (thisboard->memory_mapped_io) {
 510                 devpriv->read_byte = labpc_readb;
 511                 devpriv->write_byte = labpc_writeb;
 512         } else {
 513                 devpriv->read_byte = labpc_inb;
 514                 devpriv->write_byte = labpc_outb;
 515         }
 516         /*  initialize board's command registers */
 517         devpriv->write_byte(devpriv->command1_bits, dev->iobase + COMMAND1_REG);
 518         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
 519         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
 520         devpriv->write_byte(devpriv->command4_bits, dev->iobase + COMMAND4_REG);
 521         if (thisboard->register_layout == labpc_1200_layout) {
 522                 devpriv->write_byte(devpriv->command5_bits,
 523                                     dev->iobase + COMMAND5_REG);
 524                 devpriv->write_byte(devpriv->command6_bits,
 525                                     dev->iobase + COMMAND6_REG);
 526         }
 527
 528         /* grab our IRQ */
 529         if (irq) {
 530                 isr_flags = 0;
 531                 if (thisboard->bustype == pci_bustype
 532                     || thisboard->bustype == pcmcia_bustype)
 533                         isr_flags |= IRQF_SHARED;
 534                 if (request_irq(irq, labpc_interrupt, isr_flags,
 535                                 driver_labpc.driver_name, dev)) {
 536                         printk("unable to allocate irq %u\n", irq);
 537                         return -EINVAL;
 538                 }
 539         }
 540         dev->irq = irq;
 541
 542         /*  grab dma channel */
 543         if (dma_chan > 3) {
 544                 printk(" invalid dma channel %u\n", dma_chan);
 545                 return -EINVAL;
 546         } else if (dma_chan) {
 547                 /*  allocate dma buffer */
 548                 devpriv->dma_buffer =
 549                     kmalloc(dma_buffer_size, GFP_KERNEL | GFP_DMA);
 550                 if (devpriv->dma_buffer == NULL) {
 551                         printk(" failed to allocate dma buffer\n");
 552                         return -ENOMEM;
 553                 }
 554                 if (request_dma(dma_chan, driver_labpc.driver_name)) {
 555                         printk(" failed to allocate dma channel %u\n",
 556                                dma_chan);
 557                         return -EINVAL;
 558                 }
 559                 devpriv->dma_chan = dma_chan;
 560                 dma_flags = claim_dma_lock();
 561                 disable_dma(devpriv->dma_chan);
 562                 set_dma_mode(devpriv->dma_chan, DMA_MODE_READ);
 563                 release_dma_lock(dma_flags);
 564         }
 565
 566         dev->board_name = thisboard->name;
 567
 568         if (alloc_subdevices(dev, 5) < 0)
 569                 return -ENOMEM;
 570
 571         /* analog input subdevice */
 572         s = dev->subdevices + 0;
 573         dev->read_subdev = s;
 574         s->type = COMEDI_SUBD_AI;
 575         s->subdev_flags =
 576             SDF_READABLE | SDF_GROUND | SDF_COMMON | SDF_DIFF | SDF_CMD_READ;
 577         s->n_chan = 8;
 578         s->len_chanlist = 8;
 579         s->maxdata = (1 << 12) - 1;     /*  12 bit resolution */
 580         s->range_table = thisboard->ai_range_table;
 581         s->do_cmd = labpc_ai_cmd;
 582         s->do_cmdtest = labpc_ai_cmdtest;
 583         s->insn_read = labpc_ai_rinsn;
 584         s->cancel = labpc_cancel;
 585
 586         /* analog output */
 587         s = dev->subdevices + 1;
 588         if (thisboard->has_ao) {
 589 /* Could provide command support, except it only has a one sample
 590  * hardware buffer for analog output and no underrun flag. */
 591                 s->type = COMEDI_SUBD_AO;
 592                 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_GROUND;
 593                 s->n_chan = NUM_AO_CHAN;
 594                 s->maxdata = (1 << 12) - 1;     /*  12 bit resolution */
 595                 s->range_table = &range_labpc_ao;
 596                 s->insn_read = labpc_ao_rinsn;
 597                 s->insn_write = labpc_ao_winsn;
 598                 /* initialize analog outputs to a known value */
 599                 for (i = 0; i < s->n_chan; i++) {
 600                         devpriv->ao_value[i] = s->maxdata / 2;
 601                         lsb = devpriv->ao_value[i] & 0xff;
 602                         msb = (devpriv->ao_value[i] >> 8) & 0xff;
 603                         devpriv->write_byte(lsb, dev->iobase + DAC_LSB_REG(i));
 604                         devpriv->write_byte(msb, dev->iobase + DAC_MSB_REG(i));
 605                 }
 606         } else {
 607                 s->type = COMEDI_SUBD_UNUSED;
 608         }
 609
 610         /* 8255 dio */
 611         s = dev->subdevices + 2;
 612         /*  if board uses io memory we have to give a custom callback function to the 8255 driver */
 613         if (thisboard->memory_mapped_io)
 614                 subdev_8255_init(dev, s, labpc_dio_mem_callback,
 615                                  (unsigned long)(dev->iobase + DIO_BASE_REG));
 616         else
 617                 subdev_8255_init(dev, s, NULL, dev->iobase + DIO_BASE_REG);
 618
 619         /*  calibration subdevices for boards that have one */
 620         s = dev->subdevices + 3;
 621         if (thisboard->register_layout == labpc_1200_layout) {
 622                 s->type = COMEDI_SUBD_CALIB;
 623                 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
 624                 s->n_chan = 16;
 625                 s->maxdata = 0xff;
 626                 s->insn_read = labpc_calib_read_insn;
 627                 s->insn_write = labpc_calib_write_insn;
 628
 629                 for (i = 0; i < s->n_chan; i++)
 630                         write_caldac(dev, i, s->maxdata / 2);
 631         } else
 632                 s->type = COMEDI_SUBD_UNUSED;
 633
 634         /* EEPROM */
 635         s = dev->subdevices + 4;
 636         if (thisboard->register_layout == labpc_1200_layout) {
 637                 s->type = COMEDI_SUBD_MEMORY;
 638                 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
 639                 s->n_chan = EEPROM_SIZE;
 640                 s->maxdata = 0xff;
 641                 s->insn_read = labpc_eeprom_read_insn;
 642                 s->insn_write = labpc_eeprom_write_insn;
 643
 644                 for (i = 0; i < EEPROM_SIZE; i++) {
 645                         devpriv->eeprom_data[i] = labpc_eeprom_read(dev, i);
 646                 }
 647 #ifdef LABPC_DEBUG
 648                 printk(" eeprom:");
 649                 for (i = 0; i < EEPROM_SIZE; i++) {
 650                         printk(" %i:0x%x ", i, devpriv->eeprom_data[i]);
 651                 }
 652                 printk("\n");
 653 #endif
 654         } else
 655                 s->type = COMEDI_SUBD_UNUSED;
 656
 657         return 0;
 658 }
 659
 660 static int labpc_attach(struct comedi_device *dev, struct comedi_devconfig *it)
 661 {
 662         unsigned long iobase = 0;
 663         unsigned int irq = 0;
 664         unsigned int dma_chan = 0;
 665 #ifdef CONFIG_COMEDI_PCI
 666         int retval;
 667 #endif
 668
 669         /* allocate and initialize dev->private */
 670         if (alloc_private(dev, sizeof(struct labpc_private)) < 0)
 671                 return -ENOMEM;
 672
 673         /*  get base address, irq etc. based on bustype */
 674         switch (thisboard->bustype) {
 675         case isa_bustype:
 676                 iobase = it->options[0];
 677                 irq = it->options[1];
 678                 dma_chan = it->options[2];
 679                 break;
 680         case pci_bustype:
 681 #ifdef CONFIG_COMEDI_PCI
 682                 retval = labpc_find_device(dev, it->options[0], it->options[1]);
 683                 if (retval < 0) {
 684                         return retval;
 685                 }
 686                 retval = mite_setup(devpriv->mite);
 687                 if (retval < 0)
 688                         return retval;
 689                 iobase = (unsigned long)devpriv->mite->daq_io_addr;
 690                 irq = mite_irq(devpriv->mite);
 691 #else
 692                 printk(" this driver has not been built with PCI support.\n");
 693                 return -EINVAL;
 694 #endif
 695                 break;
 696         case pcmcia_bustype:
 697                 printk
 698                     (" this driver does not support pcmcia cards, use ni_labpc_cs.o\n");
 699                 return -EINVAL;
 700                 break;
 701         default:
 702                 printk("bug! couldn't determine board type\n");
 703                 return -EINVAL;
 704                 break;
 705         }
 706
 707         return labpc_common_attach(dev, iobase, irq, dma_chan);
 708 }
 709
 710 /* adapted from ni_pcimio for finding mite based boards (pc-1200) */
 711 #ifdef CONFIG_COMEDI_PCI
 712 static int labpc_find_device(struct comedi_device *dev, int bus, int slot)
 713 {
 714         struct mite_struct *mite;
 715         int i;
 716         for (mite = mite_devices; mite; mite = mite->next) {
 717                 if (mite->used)
 718                         continue;
 719                 /*  if bus/slot are specified then make sure we have the right bus/slot */
 720                 if (bus || slot) {
 721                         if (bus != mite->pcidev->bus->number
 722                             || slot != PCI_SLOT(mite->pcidev->devfn))
 723                                 continue;
 724                 }
 725                 for (i = 0; i < driver_labpc.num_names; i++) {
 726                         if (labpc_boards[i].bustype != pci_bustype)
 727                                 continue;
 728                         if (mite_device_id(mite) == labpc_boards[i].device_id) {
 729                                 devpriv->mite = mite;
 730                                 /*  fixup board pointer, in case we were using the dummy "ni_labpc" entry */
 731                                 dev->board_ptr = &labpc_boards[i];
 732                                 return 0;
 733                         }
 734                 }
 735         }
 736         printk("no device found\n");
 737         mite_list_devices();
 738         return -EIO;
 739 }
 740 #endif
 741
 742 int labpc_common_detach(struct comedi_device *dev)
 743 {
 744         printk("comedi%d: ni_labpc: detach\n", dev->minor);
 745
 746         if (dev->subdevices)
 747                 subdev_8255_cleanup(dev, dev->subdevices + 2);
 748
 749         /* only free stuff if it has been allocated by _attach */
 750         if (devpriv->dma_buffer)
 751                 kfree(devpriv->dma_buffer);
 752         if (devpriv->dma_chan)
 753                 free_dma(devpriv->dma_chan);
 754         if (dev->irq)
 755                 free_irq(dev->irq, dev);
 756         if (thisboard->bustype == isa_bustype && dev->iobase)
 757                 release_region(dev->iobase, LABPC_SIZE);
 758 #ifdef CONFIG_COMEDI_PCI
 759         if (devpriv->mite)
 760                 mite_unsetup(devpriv->mite);
 761 #endif
 762
 763         return 0;
 764 };
 765
 766 static void labpc_clear_adc_fifo(const struct comedi_device *dev)
 767 {
 768         devpriv->write_byte(0x1, dev->iobase + ADC_CLEAR_REG);
 769         devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
 770         devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
 771 }
 772
 773 static int labpc_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
 774 {
 775         unsigned long flags;
 776
 777         spin_lock_irqsave(&dev->spinlock, flags);
 778         devpriv->command2_bits &= ~SWTRIG_BIT & ~HWTRIG_BIT & ~PRETRIG_BIT;
 779         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
 780         spin_unlock_irqrestore(&dev->spinlock, flags);
 781
 782         devpriv->command3_bits = 0;
 783         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
 784
 785         return 0;
 786 }
 787
 788 static enum scan_mode labpc_ai_scan_mode(const struct comedi_cmd *cmd)
 789 {
 790         if (cmd->chanlist_len == 1)
 791                 return MODE_SINGLE_CHAN;
 792
 793         /* chanlist may be NULL during cmdtest. */
 794         if (cmd->chanlist == NULL)
 795                 return MODE_MULT_CHAN_UP;
 796
 797         if (CR_CHAN(cmd->chanlist[0]) == CR_CHAN(cmd->chanlist[1]))
 798                 return MODE_SINGLE_CHAN_INTERVAL;
 799
 800         if (CR_CHAN(cmd->chanlist[0]) < CR_CHAN(cmd->chanlist[1]))
 801                 return MODE_MULT_CHAN_UP;
 802
 803         if (CR_CHAN(cmd->chanlist[0]) > CR_CHAN(cmd->chanlist[1]))
 804                 return MODE_MULT_CHAN_DOWN;
 805
 806         printk("ni_labpc: bug! this should never happen\n");
 807
 808         return 0;
 809 }
 810
 811 static int labpc_ai_chanlist_invalid(const struct comedi_device *dev,
 812                                      const struct comedi_cmd *cmd)
 813 {
 814         int mode, channel, range, aref, i;
 815
 816         if (cmd->chanlist == NULL)
 817                 return 0;
 818
 819         mode = labpc_ai_scan_mode(cmd);
 820
 821         if (mode == MODE_SINGLE_CHAN)
 822                 return 0;
 823
 824         if (mode == MODE_SINGLE_CHAN_INTERVAL) {
 825                 if (cmd->chanlist_len > 0xff) {
 826                         comedi_error(dev,
 827                                      "ni_labpc: chanlist too long for single channel interval mode\n");
 828                         return 1;
 829                 }
 830         }
 831
 832         channel = CR_CHAN(cmd->chanlist[0]);
 833         range = CR_RANGE(cmd->chanlist[0]);
 834         aref = CR_AREF(cmd->chanlist[0]);
 835
 836         for (i = 0; i < cmd->chanlist_len; i++) {
 837
 838                 switch (mode) {
 839                 case MODE_SINGLE_CHAN_INTERVAL:
 840                         if (CR_CHAN(cmd->chanlist[i]) != channel) {
 841                                 comedi_error(dev,
 842                                              "channel scanning order specified in chanlist is not supported by hardware.\n");
 843                                 return 1;
 844                         }
 845                         break;
 846                 case MODE_MULT_CHAN_UP:
 847                         if (CR_CHAN(cmd->chanlist[i]) != i) {
 848                                 comedi_error(dev,
 849                                              "channel scanning order specified in chanlist is not supported by hardware.\n");
 850                                 return 1;
 851                         }
 852                         break;
 853                 case MODE_MULT_CHAN_DOWN:
 854                         if (CR_CHAN(cmd->chanlist[i]) !=
 855                             cmd->chanlist_len - i - 1) {
 856                                 comedi_error(dev,
 857                                              "channel scanning order specified in chanlist is not supported by hardware.\n");
 858                                 return 1;
 859                         }
 860                         break;
 861                 default:
 862                         printk("ni_labpc: bug! in chanlist check\n");
 863                         return 1;
 864                         break;
 865                 }
 866
 867                 if (CR_RANGE(cmd->chanlist[i]) != range) {
 868                         comedi_error(dev,
 869                                      "entries in chanlist must all have the same range\n");
 870                         return 1;
 871                 }
 872
 873                 if (CR_AREF(cmd->chanlist[i]) != aref) {
 874                         comedi_error(dev,
 875                                      "entries in chanlist must all have the same reference\n");
 876                         return 1;
 877                 }
 878         }
 879
 880         return 0;
 881 }
 882
 883 static int labpc_use_continuous_mode(const struct comedi_cmd *cmd)
 884 {
 885         if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN)
 886                 return 1;
 887
 888         if (cmd->scan_begin_src == TRIG_FOLLOW)
 889                 return 1;
 890
 891         return 0;
 892 }
 893
 894 static unsigned int labpc_ai_convert_period(const struct comedi_cmd *cmd)
 895 {
 896         if (cmd->convert_src != TRIG_TIMER)
 897                 return 0;
 898
 899         if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN &&
 900             cmd->scan_begin_src == TRIG_TIMER)
 901                 return cmd->scan_begin_arg;
 902
 903         return cmd->convert_arg;
 904 }
 905
 906 static void labpc_set_ai_convert_period(struct comedi_cmd *cmd, unsigned int ns)
 907 {
 908         if (cmd->convert_src != TRIG_TIMER)
 909                 return;
 910
 911         if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN &&
 912             cmd->scan_begin_src == TRIG_TIMER) {
 913                 cmd->scan_begin_arg = ns;
 914                 if (cmd->convert_arg > cmd->scan_begin_arg)
 915                         cmd->convert_arg = cmd->scan_begin_arg;
 916         } else
 917                 cmd->convert_arg = ns;
 918 }
 919
 920 static unsigned int labpc_ai_scan_period(const struct comedi_cmd *cmd)
 921 {
 922         if (cmd->scan_begin_src != TRIG_TIMER)
 923                 return 0;
 924
 925         if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN &&
 926             cmd->convert_src == TRIG_TIMER)
 927                 return 0;
 928
 929         return cmd->scan_begin_arg;
 930 }
 931
 932 static void labpc_set_ai_scan_period(struct comedi_cmd *cmd, unsigned int ns)
 933 {
 934         if (cmd->scan_begin_src != TRIG_TIMER)
 935                 return;
 936
 937         if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN &&
 938             cmd->convert_src == TRIG_TIMER)
 939                 return;
 940
 941         cmd->scan_begin_arg = ns;
 942 }
 943
 944 static int labpc_ai_cmdtest(struct comedi_device *dev,
 945                             struct comedi_subdevice *s, struct comedi_cmd *cmd)
 946 {
 947         int err = 0;
 948         int tmp, tmp2;
 949         int stop_mask;
 950
 951         /* step 1: make sure trigger sources are trivially valid */
 952
 953         tmp = cmd->start_src;
 954         cmd->start_src &= TRIG_NOW | TRIG_EXT;
 955         if (!cmd->start_src || tmp != cmd->start_src)
 956                 err++;
 957
 958         tmp = cmd->scan_begin_src;
 959         cmd->scan_begin_src &= TRIG_TIMER | TRIG_FOLLOW | TRIG_EXT;
 960         if (!cmd->scan_begin_src || tmp != cmd->scan_begin_src)
 961                 err++;
 962
 963         tmp = cmd->convert_src;
 964         cmd->convert_src &= TRIG_TIMER | TRIG_EXT;
 965         if (!cmd->convert_src || tmp != cmd->convert_src)
 966                 err++;
 967
 968         tmp = cmd->scan_end_src;
 969         cmd->scan_end_src &= TRIG_COUNT;
 970         if (!cmd->scan_end_src || tmp != cmd->scan_end_src)
 971                 err++;
 972
 973         tmp = cmd->stop_src;
 974         stop_mask = TRIG_COUNT | TRIG_NONE;
 975         if (thisboard->register_layout == labpc_1200_layout)
 976                 stop_mask |= TRIG_EXT;
 977         cmd->stop_src &= stop_mask;
 978         if (!cmd->stop_src || tmp != cmd->stop_src)
 979                 err++;
 980
 981         if (err)
 982                 return 1;
 983
 984         /* step 2: make sure trigger sources are unique and mutually compatible */
 985
 986         if (cmd->start_src != TRIG_NOW && cmd->start_src != TRIG_EXT)
 987                 err++;
 988         if (cmd->scan_begin_src != TRIG_TIMER &&
 989             cmd->scan_begin_src != TRIG_FOLLOW &&
 990             cmd->scan_begin_src != TRIG_EXT)
 991                 err++;
 992         if (cmd->convert_src != TRIG_TIMER && cmd->convert_src != TRIG_EXT)
 993                 err++;
 994         if (cmd->stop_src != TRIG_COUNT &&
 995             cmd->stop_src != TRIG_EXT && cmd->stop_src != TRIG_NONE)
 996                 err++;
 997
 998         /*  can't have external stop and start triggers at once */
 999         if (cmd->start_src == TRIG_EXT && cmd->stop_src == TRIG_EXT)
1000                 err++;
1001
1002         if (err)
1003                 return 2;
1004
1005         /* step 3: make sure arguments are trivially compatible */
1006
1007         if (cmd->start_arg == TRIG_NOW && cmd->start_arg != 0) {
1008                 cmd->start_arg = 0;
1009                 err++;
1010         }
1011
1012         if (!cmd->chanlist_len) {
1013                 err++;
1014         }
1015         if (cmd->scan_end_arg != cmd->chanlist_len) {
1016                 cmd->scan_end_arg = cmd->chanlist_len;
1017                 err++;
1018         }
1019
1020         if (cmd->convert_src == TRIG_TIMER) {
1021                 if (cmd->convert_arg < thisboard->ai_speed) {
1022                         cmd->convert_arg = thisboard->ai_speed;
1023                         err++;
1024                 }
1025         }
1026         /*  make sure scan timing is not too fast */
1027         if (cmd->scan_begin_src == TRIG_TIMER) {
1028                 if (cmd->convert_src == TRIG_TIMER &&
1029                     cmd->scan_begin_arg <
1030                     cmd->convert_arg * cmd->chanlist_len) {
1031                         cmd->scan_begin_arg =
1032                             cmd->convert_arg * cmd->chanlist_len;
1033                         err++;
1034                 }
1035                 if (cmd->scan_begin_arg <
1036                     thisboard->ai_speed * cmd->chanlist_len) {
1037                         cmd->scan_begin_arg =
1038                             thisboard->ai_speed * cmd->chanlist_len;
1039                         err++;
1040                 }
1041         }
1042         /*  stop source */
1043         switch (cmd->stop_src) {
1044         case TRIG_COUNT:
1045                 if (!cmd->stop_arg) {
1046                         cmd->stop_arg = 1;
1047                         err++;
1048                 }
1049                 break;
1050         case TRIG_NONE:
1051                 if (cmd->stop_arg != 0) {
1052                         cmd->stop_arg = 0;
1053                         err++;
1054                 }
1055                 break;
1056                 /*  TRIG_EXT doesn't care since it doesn't trigger off a numbered channel */
1057         default:
1058                 break;
1059         }
1060
1061         if (err)
1062                 return 3;
1063
1064         /* step 4: fix up any arguments */
1065
1066         tmp = cmd->convert_arg;
1067         tmp2 = cmd->scan_begin_arg;
1068         labpc_adc_timing(dev, cmd);
1069         if (tmp != cmd->convert_arg || tmp2 != cmd->scan_begin_arg)
1070                 err++;
1071
1072         if (err)
1073                 return 4;
1074
1075         if (labpc_ai_chanlist_invalid(dev, cmd))
1076                 return 5;
1077
1078         return 0;
1079 }
1080
1081 static int labpc_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
1082 {
1083         int channel, range, aref;
1084         unsigned long irq_flags;
1085         int ret;
1086         struct comedi_async *async = s->async;
1087         struct comedi_cmd *cmd = &async->cmd;
1088         enum transfer_type xfer;
1089         unsigned long flags;
1090
1091         if (!dev->irq) {
1092                 comedi_error(dev, "no irq assigned, cannot perform command");
1093                 return -1;
1094         }
1095
1096         range = CR_RANGE(cmd->chanlist[0]);
1097         aref = CR_AREF(cmd->chanlist[0]);
1098
1099         /*  make sure board is disabled before setting up aquisition */
1100         spin_lock_irqsave(&dev->spinlock, flags);
1101         devpriv->command2_bits &= ~SWTRIG_BIT & ~HWTRIG_BIT & ~PRETRIG_BIT;
1102         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1103         spin_unlock_irqrestore(&dev->spinlock, flags);
1104
1105         devpriv->command3_bits = 0;
1106         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
1107
1108         /*  initialize software conversion count */
1109         if (cmd->stop_src == TRIG_COUNT) {
1110                 devpriv->count = cmd->stop_arg * cmd->chanlist_len;
1111         }
1112         /*  setup hardware conversion counter */
1113         if (cmd->stop_src == TRIG_EXT) {
1114                 /*  load counter a1 with count of 3 (pc+ manual says this is minimum allowed) using mode 0 */
1115                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_A_BASE_REG,
1116                                          1, 3, 0);
1117                 if (ret < 0) {
1118                         comedi_error(dev, "error loading counter a1");
1119                         return -1;
1120                 }
1121         } else                  /*  otherwise, just put a1 in mode 0 with no count to set its output low */
1122                 devpriv->write_byte(INIT_A1_BITS,
1123                                     dev->iobase + COUNTER_A_CONTROL_REG);
1124
1125         /*  figure out what method we will use to transfer data */
1126         if (devpriv->dma_chan &&        /*  need a dma channel allocated */
1127             /*  dma unsafe at RT priority, and too much setup time for TRIG_WAKE_EOS for */
1128             (cmd->flags & (TRIG_WAKE_EOS | TRIG_RT)) == 0 &&
1129             /*  only available on the isa boards */
1130             thisboard->bustype == isa_bustype) {
1131                 xfer = isa_dma_transfer;
1132         } else if (thisboard->register_layout == labpc_1200_layout &&   /*  pc-plus has no fifo-half full interrupt */
1133                    /*  wake-end-of-scan should interrupt on fifo not empty */
1134                    (cmd->flags & TRIG_WAKE_EOS) == 0 &&
1135                    /*  make sure we are taking more than just a few points */
1136                    (cmd->stop_src != TRIG_COUNT || devpriv->count > 256)) {
1137                 xfer = fifo_half_full_transfer;
1138         } else
1139                 xfer = fifo_not_empty_transfer;
1140         devpriv->current_transfer = xfer;
1141
1142         /*  setup command6 register for 1200 boards */
1143         if (thisboard->register_layout == labpc_1200_layout) {
1144                 /*  reference inputs to ground or common? */
1145                 if (aref != AREF_GROUND)
1146                         devpriv->command6_bits |= ADC_COMMON_BIT;
1147                 else
1148                         devpriv->command6_bits &= ~ADC_COMMON_BIT;
1149                 /*  bipolar or unipolar range? */
1150                 if (thisboard->ai_range_is_unipolar[range])
1151                         devpriv->command6_bits |= ADC_UNIP_BIT;
1152                 else
1153                         devpriv->command6_bits &= ~ADC_UNIP_BIT;
1154                 /*  interrupt on fifo half full? */
1155                 if (xfer == fifo_half_full_transfer)
1156                         devpriv->command6_bits |= ADC_FHF_INTR_EN_BIT;
1157                 else
1158                         devpriv->command6_bits &= ~ADC_FHF_INTR_EN_BIT;
1159                 /*  enable interrupt on counter a1 terminal count? */
1160                 if (cmd->stop_src == TRIG_EXT)
1161                         devpriv->command6_bits |= A1_INTR_EN_BIT;
1162                 else
1163                         devpriv->command6_bits &= ~A1_INTR_EN_BIT;
1164                 /*  are we scanning up or down through channels? */
1165                 if (labpc_ai_scan_mode(cmd) == MODE_MULT_CHAN_UP)
1166                         devpriv->command6_bits |= ADC_SCAN_UP_BIT;
1167                 else
1168                         devpriv->command6_bits &= ~ADC_SCAN_UP_BIT;
1169                 /*  write to register */
1170                 devpriv->write_byte(devpriv->command6_bits,
1171                                     dev->iobase + COMMAND6_REG);
1172         }
1173
1174         /* setup channel list, etc (command1 register) */
1175         devpriv->command1_bits = 0;
1176         if (labpc_ai_scan_mode(cmd) == MODE_MULT_CHAN_UP)
1177                 channel = CR_CHAN(cmd->chanlist[cmd->chanlist_len - 1]);
1178         else
1179                 channel = CR_CHAN(cmd->chanlist[0]);
1180         /*  munge channel bits for differential / scan disabled mode */
1181         if (labpc_ai_scan_mode(cmd) != MODE_SINGLE_CHAN && aref == AREF_DIFF)
1182                 channel *= 2;
1183         devpriv->command1_bits |= ADC_CHAN_BITS(channel);
1184         devpriv->command1_bits |= thisboard->ai_range_code[range];
1185         devpriv->write_byte(devpriv->command1_bits, dev->iobase + COMMAND1_REG);
1186         /*  manual says to set scan enable bit on second pass */
1187         if (labpc_ai_scan_mode(cmd) == MODE_MULT_CHAN_UP ||
1188             labpc_ai_scan_mode(cmd) == MODE_MULT_CHAN_DOWN) {
1189                 devpriv->command1_bits |= ADC_SCAN_EN_BIT;
1190                 /* need a brief delay before enabling scan, or scan list will get screwed when you switch
1191                  * between scan up to scan down mode - dunno why */
1192                 udelay(1);
1193                 devpriv->write_byte(devpriv->command1_bits,
1194                                     dev->iobase + COMMAND1_REG);
1195         }
1196         /*  setup any external triggering/pacing (command4 register) */
1197         devpriv->command4_bits = 0;
1198         if (cmd->convert_src != TRIG_EXT)
1199                 devpriv->command4_bits |= EXT_CONVERT_DISABLE_BIT;
1200         /* XXX should discard first scan when using interval scanning
1201          * since manual says it is not synced with scan clock */
1202         if (labpc_use_continuous_mode(cmd) == 0) {
1203                 devpriv->command4_bits |= INTERVAL_SCAN_EN_BIT;
1204                 if (cmd->scan_begin_src == TRIG_EXT)
1205                         devpriv->command4_bits |= EXT_SCAN_EN_BIT;
1206         }
1207         /*  single-ended/differential */
1208         if (aref == AREF_DIFF)
1209                 devpriv->command4_bits |= ADC_DIFF_BIT;
1210         devpriv->write_byte(devpriv->command4_bits, dev->iobase + COMMAND4_REG);
1211
1212         devpriv->write_byte(cmd->chanlist_len,
1213                             dev->iobase + INTERVAL_COUNT_REG);
1214         /*  load count */
1215         devpriv->write_byte(INTERVAL_LOAD_BITS,
1216                             dev->iobase + INTERVAL_LOAD_REG);
1217
1218         if (cmd->convert_src == TRIG_TIMER || cmd->scan_begin_src == TRIG_TIMER) {
1219                 /*  set up pacing */
1220                 labpc_adc_timing(dev, cmd);
1221                 /*  load counter b0 in mode 3 */
1222                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_B_BASE_REG,
1223                                          0, devpriv->divisor_b0, 3);
1224                 if (ret < 0) {
1225                         comedi_error(dev, "error loading counter b0");
1226                         return -1;
1227                 }
1228         }
1229         /*  set up conversion pacing */
1230         if (labpc_ai_convert_period(cmd)) {
1231                 /*  load counter a0 in mode 2 */
1232                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_A_BASE_REG,
1233                                          0, devpriv->divisor_a0, 2);
1234                 if (ret < 0) {
1235                         comedi_error(dev, "error loading counter a0");
1236                         return -1;
1237                 }
1238         } else
1239                 devpriv->write_byte(INIT_A0_BITS,
1240                                     dev->iobase + COUNTER_A_CONTROL_REG);
1241
1242         /*  set up scan pacing */
1243         if (labpc_ai_scan_period(cmd)) {
1244                 /*  load counter b1 in mode 2 */
1245                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_B_BASE_REG,
1246                                          1, devpriv->divisor_b1, 2);
1247                 if (ret < 0) {
1248                         comedi_error(dev, "error loading counter b1");
1249                         return -1;
1250                 }
1251         }
1252
1253         labpc_clear_adc_fifo(dev);
1254
1255         /*  set up dma transfer */
1256         if (xfer == isa_dma_transfer) {
1257                 irq_flags = claim_dma_lock();
1258                 disable_dma(devpriv->dma_chan);
1259                 /* clear flip-flop to make sure 2-byte registers for
1260                  * count and address get set correctly */
1261                 clear_dma_ff(devpriv->dma_chan);
1262                 set_dma_addr(devpriv->dma_chan,
1263                              virt_to_bus(devpriv->dma_buffer));
1264                 /*  set appropriate size of transfer */
1265                 devpriv->dma_transfer_size = labpc_suggest_transfer_size(*cmd);
1266                 if (cmd->stop_src == TRIG_COUNT &&
1267                     devpriv->count * sample_size < devpriv->dma_transfer_size) {
1268                         devpriv->dma_transfer_size =
1269                             devpriv->count * sample_size;
1270                 }
1271                 set_dma_count(devpriv->dma_chan, devpriv->dma_transfer_size);
1272                 enable_dma(devpriv->dma_chan);
1273                 release_dma_lock(irq_flags);
1274                 /*  enable board's dma */
1275                 devpriv->command3_bits |= DMA_EN_BIT | DMATC_INTR_EN_BIT;
1276         } else
1277                 devpriv->command3_bits &= ~DMA_EN_BIT & ~DMATC_INTR_EN_BIT;
1278
1279         /*  enable error interrupts */
1280         devpriv->command3_bits |= ERR_INTR_EN_BIT;
1281         /*  enable fifo not empty interrupt? */
1282         if (xfer == fifo_not_empty_transfer)
1283                 devpriv->command3_bits |= ADC_FNE_INTR_EN_BIT;
1284         else
1285                 devpriv->command3_bits &= ~ADC_FNE_INTR_EN_BIT;
1286         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
1287
1288         /*  startup aquisition */
1289
1290         /*  command2 reg */
1291         /*  use 2 cascaded counters for pacing */
1292         spin_lock_irqsave(&dev->spinlock, flags);
1293         devpriv->command2_bits |= CASCADE_BIT;
1294         switch (cmd->start_src) {
1295         case TRIG_EXT:
1296                 devpriv->command2_bits |= HWTRIG_BIT;
1297                 devpriv->command2_bits &= ~PRETRIG_BIT & ~SWTRIG_BIT;
1298                 break;
1299         case TRIG_NOW:
1300                 devpriv->command2_bits |= SWTRIG_BIT;
1301                 devpriv->command2_bits &= ~PRETRIG_BIT & ~HWTRIG_BIT;
1302                 break;
1303         default:
1304                 comedi_error(dev, "bug with start_src");
1305                 return -1;
1306                 break;
1307         }
1308         switch (cmd->stop_src) {
1309         case TRIG_EXT:
1310                 devpriv->command2_bits |= HWTRIG_BIT | PRETRIG_BIT;
1311                 break;
1312         case TRIG_COUNT:
1313         case TRIG_NONE:
1314                 break;
1315         default:
1316                 comedi_error(dev, "bug with stop_src");
1317                 return -1;
1318         }
1319         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1320         spin_unlock_irqrestore(&dev->spinlock, flags);
1321
1322         return 0;
1323 }
1324
1325 /* interrupt service routine */
1326 static irqreturn_t labpc_interrupt(int irq, void *d)
1327 {
1328         struct comedi_device *dev = d;
1329         struct comedi_subdevice *s = dev->read_subdev;
1330         struct comedi_async *async;
1331         struct comedi_cmd *cmd;
1332
1333         if (dev->attached == 0) {
1334                 comedi_error(dev, "premature interrupt");
1335                 return IRQ_HANDLED;
1336         }
1337
1338         async = s->async;
1339         cmd = &async->cmd;
1340         async->events = 0;
1341
1342         /*  read board status */
1343         devpriv->status1_bits = devpriv->read_byte(dev->iobase + STATUS1_REG);
1344         if (thisboard->register_layout == labpc_1200_layout)
1345                 devpriv->status2_bits =
1346                     devpriv->read_byte(dev->iobase + STATUS2_REG);
1347
1348         if ((devpriv->status1_bits & (DMATC_BIT | TIMER_BIT | OVERFLOW_BIT |
1349                                       OVERRUN_BIT | DATA_AVAIL_BIT)) == 0
1350             && (devpriv->status2_bits & A1_TC_BIT) == 0
1351             && (devpriv->status2_bits & FNHF_BIT)) {
1352                 return IRQ_NONE;
1353         }
1354
1355         if (devpriv->status1_bits & OVERRUN_BIT) {
1356                 /*  clear error interrupt */
1357                 devpriv->write_byte(0x1, dev->iobase + ADC_CLEAR_REG);
1358                 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1359                 comedi_event(dev, s);
1360                 comedi_error(dev, "overrun");
1361                 return IRQ_HANDLED;
1362         }
1363
1364         if (devpriv->current_transfer == isa_dma_transfer) {
1365                 /*  if a dma terminal count of external stop trigger has occurred */
1366                 if (devpriv->status1_bits & DMATC_BIT ||
1367                     (thisboard->register_layout == labpc_1200_layout
1368                      && devpriv->status2_bits & A1_TC_BIT)) {
1369                         handle_isa_dma(dev);
1370                 }
1371         } else
1372                 labpc_drain_fifo(dev);
1373
1374         if (devpriv->status1_bits & TIMER_BIT) {
1375                 comedi_error(dev, "handled timer interrupt?");
1376                 /*  clear it */
1377                 devpriv->write_byte(0x1, dev->iobase + TIMER_CLEAR_REG);
1378         }
1379
1380         if (devpriv->status1_bits & OVERFLOW_BIT) {
1381                 /*  clear error interrupt */
1382                 devpriv->write_byte(0x1, dev->iobase + ADC_CLEAR_REG);
1383                 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1384                 comedi_event(dev, s);
1385                 comedi_error(dev, "overflow");
1386                 return IRQ_HANDLED;
1387         }
1388         /*  handle external stop trigger */
1389         if (cmd->stop_src == TRIG_EXT) {
1390                 if (devpriv->status2_bits & A1_TC_BIT) {
1391                         labpc_drain_dregs(dev);
1392                         labpc_cancel(dev, s);
1393                         async->events |= COMEDI_CB_EOA;
1394                 }
1395         }
1396
1397         /* TRIG_COUNT end of acquisition */
1398         if (cmd->stop_src == TRIG_COUNT) {
1399                 if (devpriv->count == 0) {
1400                         labpc_cancel(dev, s);
1401                         async->events |= COMEDI_CB_EOA;
1402                 }
1403         }
1404
1405         comedi_event(dev, s);
1406         return IRQ_HANDLED;
1407 }
1408
1409 /* read all available samples from ai fifo */
1410 static int labpc_drain_fifo(struct comedi_device *dev)
1411 {
1412         unsigned int lsb, msb;
1413         short data;
1414         struct comedi_async *async = dev->read_subdev->async;
1415         const int timeout = 10000;
1416         unsigned int i;
1417
1418         devpriv->status1_bits = devpriv->read_byte(dev->iobase + STATUS1_REG);
1419
1420         for (i = 0; (devpriv->status1_bits & DATA_AVAIL_BIT) && i < timeout;
1421              i++) {
1422                 /*  quit if we have all the data we want */
1423                 if (async->cmd.stop_src == TRIG_COUNT) {
1424                         if (devpriv->count == 0)
1425                                 break;
1426                         devpriv->count--;
1427                 }
1428                 lsb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1429                 msb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1430                 data = (msb << 8) | lsb;
1431                 cfc_write_to_buffer(dev->read_subdev, data);
1432                 devpriv->status1_bits =
1433                     devpriv->read_byte(dev->iobase + STATUS1_REG);
1434         }
1435         if (i == timeout) {
1436                 comedi_error(dev, "ai timeout, fifo never empties");
1437                 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1438                 return -1;
1439         }
1440
1441         return 0;
1442 }
1443
1444 static void labpc_drain_dma(struct comedi_device *dev)
1445 {
1446         struct comedi_subdevice *s = dev->read_subdev;
1447         struct comedi_async *async = s->async;
1448         int status;
1449         unsigned long flags;
1450         unsigned int max_points, num_points, residue, leftover;
1451         int i;
1452
1453         status = devpriv->status1_bits;
1454
1455         flags = claim_dma_lock();
1456         disable_dma(devpriv->dma_chan);
1457         /* clear flip-flop to make sure 2-byte registers for
1458          * count and address get set correctly */
1459         clear_dma_ff(devpriv->dma_chan);
1460
1461         /*  figure out how many points to read */
1462         max_points = devpriv->dma_transfer_size / sample_size;
1463         /* residue is the number of points left to be done on the dma
1464          * transfer.  It should always be zero at this point unless
1465          * the stop_src is set to external triggering.
1466          */
1467         residue = get_dma_residue(devpriv->dma_chan) / sample_size;
1468         num_points = max_points - residue;
1469         if (devpriv->count < num_points && async->cmd.stop_src == TRIG_COUNT)
1470                 num_points = devpriv->count;
1471
1472         /*  figure out how many points will be stored next time */
1473         leftover = 0;
1474         if (async->cmd.stop_src != TRIG_COUNT) {
1475                 leftover = devpriv->dma_transfer_size / sample_size;
1476         } else if (devpriv->count > num_points) {
1477                 leftover = devpriv->count - num_points;
1478                 if (leftover > max_points)
1479                         leftover = max_points;
1480         }
1481
1482         /* write data to comedi buffer */
1483         for (i = 0; i < num_points; i++) {
1484                 cfc_write_to_buffer(s, devpriv->dma_buffer[i]);
1485         }
1486         if (async->cmd.stop_src == TRIG_COUNT)
1487                 devpriv->count -= num_points;
1488
1489         /*  set address and count for next transfer */
1490         set_dma_addr(devpriv->dma_chan, virt_to_bus(devpriv->dma_buffer));
1491         set_dma_count(devpriv->dma_chan, leftover * sample_size);
1492         release_dma_lock(flags);
1493
1494         async->events |= COMEDI_CB_BLOCK;
1495 }
1496
1497 static void handle_isa_dma(struct comedi_device *dev)
1498 {
1499         labpc_drain_dma(dev);
1500
1501         enable_dma(devpriv->dma_chan);
1502
1503         /*  clear dma tc interrupt */
1504         devpriv->write_byte(0x1, dev->iobase + DMATC_CLEAR_REG);
1505 }
1506
1507 /* makes sure all data aquired by board is transfered to comedi (used
1508  * when aquisition is terminated by stop_src == TRIG_EXT). */
1509 static void labpc_drain_dregs(struct comedi_device *dev)
1510 {
1511         if (devpriv->current_transfer == isa_dma_transfer)
1512                 labpc_drain_dma(dev);
1513
1514         labpc_drain_fifo(dev);
1515 }
1516
1517 static int labpc_ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
1518                           struct comedi_insn *insn, unsigned int *data)
1519 {
1520         int i, n;
1521         int chan, range;
1522         int lsb, msb;
1523         int timeout = 1000;
1524         unsigned long flags;
1525
1526         /*  disable timed conversions */
1527         spin_lock_irqsave(&dev->spinlock, flags);
1528         devpriv->command2_bits &= ~SWTRIG_BIT & ~HWTRIG_BIT & ~PRETRIG_BIT;
1529         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1530         spin_unlock_irqrestore(&dev->spinlock, flags);
1531
1532         /*  disable interrupt generation and dma */
1533         devpriv->command3_bits = 0;
1534         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
1535
1536         /* set gain and channel */
1537         devpriv->command1_bits = 0;
1538         chan = CR_CHAN(insn->chanspec);
1539         range = CR_RANGE(insn->chanspec);
1540         devpriv->command1_bits |= thisboard->ai_range_code[range];
1541         /*  munge channel bits for differential/scan disabled mode */
1542         if (CR_AREF(insn->chanspec) == AREF_DIFF)
1543                 chan *= 2;
1544         devpriv->command1_bits |= ADC_CHAN_BITS(chan);
1545         devpriv->write_byte(devpriv->command1_bits, dev->iobase + COMMAND1_REG);
1546
1547         /*  setup command6 register for 1200 boards */
1548         if (thisboard->register_layout == labpc_1200_layout) {
1549                 /*  reference inputs to ground or common? */
1550                 if (CR_AREF(insn->chanspec) != AREF_GROUND)
1551                         devpriv->command6_bits |= ADC_COMMON_BIT;
1552                 else
1553                         devpriv->command6_bits &= ~ADC_COMMON_BIT;
1554                 /*  bipolar or unipolar range? */
1555                 if (thisboard->ai_range_is_unipolar[range])
1556                         devpriv->command6_bits |= ADC_UNIP_BIT;
1557                 else
1558                         devpriv->command6_bits &= ~ADC_UNIP_BIT;
1559                 /*  don't interrupt on fifo half full */
1560                 devpriv->command6_bits &= ~ADC_FHF_INTR_EN_BIT;
1561                 /*  don't enable interrupt on counter a1 terminal count? */
1562                 devpriv->command6_bits &= ~A1_INTR_EN_BIT;
1563                 /*  write to register */
1564                 devpriv->write_byte(devpriv->command6_bits,
1565                                     dev->iobase + COMMAND6_REG);
1566         }
1567         /*  setup command4 register */
1568         devpriv->command4_bits = 0;
1569         devpriv->command4_bits |= EXT_CONVERT_DISABLE_BIT;
1570         /*  single-ended/differential */
1571         if (CR_AREF(insn->chanspec) == AREF_DIFF)
1572                 devpriv->command4_bits |= ADC_DIFF_BIT;
1573         devpriv->write_byte(devpriv->command4_bits, dev->iobase + COMMAND4_REG);
1574
1575         /*  initialize pacer counter output to make sure it doesn't cause any problems */
1576         devpriv->write_byte(INIT_A0_BITS, dev->iobase + COUNTER_A_CONTROL_REG);
1577
1578         labpc_clear_adc_fifo(dev);
1579
1580         for (n = 0; n < insn->n; n++) {
1581                 /* trigger conversion */
1582                 devpriv->write_byte(0x1, dev->iobase + ADC_CONVERT_REG);
1583
1584                 for (i = 0; i < timeout; i++) {
1585                         if (devpriv->read_byte(dev->iobase +
1586                                                STATUS1_REG) & DATA_AVAIL_BIT)
1587                                 break;
1588                         udelay(1);
1589                 }
1590                 if (i == timeout) {
1591                         comedi_error(dev, "timeout");
1592                         return -ETIME;
1593                 }
1594                 lsb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1595                 msb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1596                 data[n] = (msb << 8) | lsb;
1597         }
1598
1599         return n;
1600 }
1601
1602 /* analog output insn */
1603 static int labpc_ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s,
1604                           struct comedi_insn *insn, unsigned int *data)
1605 {
1606         int channel, range;
1607         unsigned long flags;
1608         int lsb, msb;
1609
1610         channel = CR_CHAN(insn->chanspec);
1611
1612         /*  turn off pacing of analog output channel */
1613         /* note: hardware bug in daqcard-1200 means pacing cannot
1614          * be independently enabled/disabled for its the two channels */
1615         spin_lock_irqsave(&dev->spinlock, flags);
1616         devpriv->command2_bits &= ~DAC_PACED_BIT(channel);
1617         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1618         spin_unlock_irqrestore(&dev->spinlock, flags);
1619
1620         /*  set range */
1621         if (thisboard->register_layout == labpc_1200_layout) {
1622                 range = CR_RANGE(insn->chanspec);
1623                 if (range & AO_RANGE_IS_UNIPOLAR)
1624                         devpriv->command6_bits |= DAC_UNIP_BIT(channel);
1625                 else
1626                         devpriv->command6_bits &= ~DAC_UNIP_BIT(channel);
1627                 /*  write to register */
1628                 devpriv->write_byte(devpriv->command6_bits,
1629                                     dev->iobase + COMMAND6_REG);
1630         }
1631         /*  send data */
1632         lsb = data[0] & 0xff;
1633         msb = (data[0] >> 8) & 0xff;
1634         devpriv->write_byte(lsb, dev->iobase + DAC_LSB_REG(channel));
1635         devpriv->write_byte(msb, dev->iobase + DAC_MSB_REG(channel));
1636
1637         /*  remember value for readback */
1638         devpriv->ao_value[channel] = data[0];
1639
1640         return 1;
1641 }
1642
1643 /* analog output readback insn */
1644 static int labpc_ao_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
1645                           struct comedi_insn *insn, unsigned int *data)
1646 {
1647         data[0] = devpriv->ao_value[CR_CHAN(insn->chanspec)];
1648
1649         return 1;
1650 }
1651
1652 static int labpc_calib_read_insn(struct comedi_device *dev,
1653                                  struct comedi_subdevice *s,
1654                                  struct comedi_insn *insn, unsigned int *data)
1655 {
1656         data[0] = devpriv->caldac[CR_CHAN(insn->chanspec)];
1657
1658         return 1;
1659 }
1660
1661 static int labpc_calib_write_insn(struct comedi_device *dev,
1662                                   struct comedi_subdevice *s,
1663                                   struct comedi_insn *insn, unsigned int *data)
1664 {
1665         int channel = CR_CHAN(insn->chanspec);
1666
1667         write_caldac(dev, channel, data[0]);
1668         return 1;
1669 }
1670
1671 static int labpc_eeprom_read_insn(struct comedi_device *dev,
1672                                   struct comedi_subdevice *s,
1673                                   struct comedi_insn *insn, unsigned int *data)
1674 {
1675         data[0] = devpriv->eeprom_data[CR_CHAN(insn->chanspec)];
1676
1677         return 1;
1678 }
1679
1680 static int labpc_eeprom_write_insn(struct comedi_device *dev,
1681                                    struct comedi_subdevice *s,
1682                                    struct comedi_insn *insn, unsigned int *data)
1683 {
1684         int channel = CR_CHAN(insn->chanspec);
1685         int ret;
1686
1687         /*  only allow writes to user area of eeprom */
1688         if (channel < 16 || channel > 127) {
1689                 printk
1690                     ("eeprom writes are only allowed to channels 16 through 127 (the pointer and user areas)");
1691                 return -EINVAL;
1692         }
1693
1694         ret = labpc_eeprom_write(dev, channel, data[0]);
1695         if (ret < 0)
1696                 return ret;
1697
1698         return 1;
1699 }
1700
1701 /* utility function that suggests a dma transfer size in bytes */
1702 static unsigned int labpc_suggest_transfer_size(struct comedi_cmd cmd)
1703 {
1704         unsigned int size;
1705         unsigned int freq;
1706
1707         if (cmd.convert_src == TRIG_TIMER)
1708                 freq = 1000000000 / cmd.convert_arg;
1709         /*  return some default value */
1710         else
1711                 freq = 0xffffffff;
1712
1713         /*  make buffer fill in no more than 1/3 second */
1714         size = (freq / 3) * sample_size;
1715
1716         /*  set a minimum and maximum size allowed */
1717         if (size > dma_buffer_size)
1718                 size = dma_buffer_size - dma_buffer_size % sample_size;
1719         else if (size < sample_size)
1720                 size = sample_size;
1721
1722         return size;
1723 }
1724
1725 /* figures out what counter values to use based on command */
1726 static void labpc_adc_timing(struct comedi_device *dev, struct comedi_cmd *cmd)
1727 {
1728         const int max_counter_value = 0x10000;  /*  max value for 16 bit counter in mode 2 */
1729         const int min_counter_value = 2;        /*  min value for 16 bit counter in mode 2 */
1730         unsigned int base_period;
1731
1732         /*  if both convert and scan triggers are TRIG_TIMER, then they both rely on counter b0 */
1733         if (labpc_ai_convert_period(cmd) && labpc_ai_scan_period(cmd)) {
1734                 /*  pick the lowest b0 divisor value we can (for maximum input clock speed on convert and scan counters) */
1735                 devpriv->divisor_b0 = (labpc_ai_scan_period(cmd) - 1) /
1736                     (LABPC_TIMER_BASE * max_counter_value) + 1;
1737                 if (devpriv->divisor_b0 < min_counter_value)
1738                         devpriv->divisor_b0 = min_counter_value;
1739                 if (devpriv->divisor_b0 > max_counter_value)
1740                         devpriv->divisor_b0 = max_counter_value;
1741
1742                 base_period = LABPC_TIMER_BASE * devpriv->divisor_b0;
1743
1744                 /*  set a0 for conversion frequency and b1 for scan frequency */
1745                 switch (cmd->flags & TRIG_ROUND_MASK) {
1746                 default:
1747                 case TRIG_ROUND_NEAREST:
1748                         devpriv->divisor_a0 =
1749                             (labpc_ai_convert_period(cmd) +
1750                              (base_period / 2)) / base_period;
1751                         devpriv->divisor_b1 =
1752                             (labpc_ai_scan_period(cmd) +
1753                              (base_period / 2)) / base_period;
1754                         break;
1755                 case TRIG_ROUND_UP:
1756                         devpriv->divisor_a0 =
1757                             (labpc_ai_convert_period(cmd) + (base_period -
1758                                                              1)) / base_period;
1759                         devpriv->divisor_b1 =
1760                             (labpc_ai_scan_period(cmd) + (base_period -
1761                                                           1)) / base_period;
1762                         break;
1763                 case TRIG_ROUND_DOWN:
1764                         devpriv->divisor_a0 =
1765                             labpc_ai_convert_period(cmd) / base_period;
1766                         devpriv->divisor_b1 =
1767                             labpc_ai_scan_period(cmd) / base_period;
1768                         break;
1769                 }
1770                 /*  make sure a0 and b1 values are acceptable */
1771                 if (devpriv->divisor_a0 < min_counter_value)
1772                         devpriv->divisor_a0 = min_counter_value;
1773                 if (devpriv->divisor_a0 > max_counter_value)
1774                         devpriv->divisor_a0 = max_counter_value;
1775                 if (devpriv->divisor_b1 < min_counter_value)
1776                         devpriv->divisor_b1 = min_counter_value;
1777                 if (devpriv->divisor_b1 > max_counter_value)
1778                         devpriv->divisor_b1 = max_counter_value;
1779                 /*  write corrected timings to command */
1780                 labpc_set_ai_convert_period(cmd,
1781                                             base_period * devpriv->divisor_a0);
1782                 labpc_set_ai_scan_period(cmd,
1783                                          base_period * devpriv->divisor_b1);
1784                 /*  if only one TRIG_TIMER is used, we can employ the generic cascaded timing functions */
1785         } else if (labpc_ai_scan_period(cmd)) {
1786                 unsigned int scan_period;
1787
1788                 scan_period = labpc_ai_scan_period(cmd);
1789                 /* calculate cascaded counter values that give desired scan timing */
1790                 i8253_cascade_ns_to_timer_2div(LABPC_TIMER_BASE,
1791                                                &(devpriv->divisor_b1),
1792                                                &(devpriv->divisor_b0),
1793                                                &scan_period,
1794                                                cmd->flags & TRIG_ROUND_MASK);
1795                 labpc_set_ai_scan_period(cmd, scan_period);
1796         } else if (labpc_ai_convert_period(cmd)) {
1797                 unsigned int convert_period;
1798
1799                 convert_period = labpc_ai_convert_period(cmd);
1800                 /* calculate cascaded counter values that give desired conversion timing */
1801                 i8253_cascade_ns_to_timer_2div(LABPC_TIMER_BASE,
1802                                                &(devpriv->divisor_a0),
1803                                                &(devpriv->divisor_b0),
1804                                                &convert_period,
1805                                                cmd->flags & TRIG_ROUND_MASK);
1806                 labpc_set_ai_convert_period(cmd, convert_period);
1807         }
1808 }
1809
1810 static int labpc_dio_mem_callback(int dir, int port, int data,
1811                                   unsigned long iobase)
1812 {
1813         if (dir) {
1814                 writeb(data, (void *)(iobase + port));
1815                 return 0;
1816         } else {
1817                 return readb((void *)(iobase + port));
1818         }
1819 }
1820
1821 /* lowlevel write to eeprom/dac */
1822 static void labpc_serial_out(struct comedi_device *dev, unsigned int value,
1823                              unsigned int value_width)
1824 {
1825         int i;
1826
1827         for (i = 1; i <= value_width; i++) {
1828                 /*  clear serial clock */
1829                 devpriv->command5_bits &= ~SCLOCK_BIT;
1830                 /*  send bits most significant bit first */
1831                 if (value & (1 << (value_width - i)))
1832                         devpriv->command5_bits |= SDATA_BIT;
1833                 else
1834                         devpriv->command5_bits &= ~SDATA_BIT;
1835                 udelay(1);
1836                 devpriv->write_byte(devpriv->command5_bits,
1837                                     dev->iobase + COMMAND5_REG);
1838                 /*  set clock to load bit */
1839                 devpriv->command5_bits |= SCLOCK_BIT;
1840                 udelay(1);
1841                 devpriv->write_byte(devpriv->command5_bits,
1842                                     dev->iobase + COMMAND5_REG);
1843         }
1844 }
1845
1846 /* lowlevel read from eeprom */
1847 static unsigned int labpc_serial_in(struct comedi_device *dev)
1848 {
1849         unsigned int value = 0;
1850         int i;
1851         const int value_width = 8;      /*  number of bits wide values are */
1852
1853         for (i = 1; i <= value_width; i++) {
1854                 /*  set serial clock */
1855                 devpriv->command5_bits |= SCLOCK_BIT;
1856                 udelay(1);
1857                 devpriv->write_byte(devpriv->command5_bits,
1858                                     dev->iobase + COMMAND5_REG);
1859                 /*  clear clock bit */
1860                 devpriv->command5_bits &= ~SCLOCK_BIT;
1861                 udelay(1);
1862                 devpriv->write_byte(devpriv->command5_bits,
1863                                     dev->iobase + COMMAND5_REG);
1864                 /*  read bits most significant bit first */
1865                 udelay(1);
1866                 devpriv->status2_bits =
1867                     devpriv->read_byte(dev->iobase + STATUS2_REG);
1868                 if (devpriv->status2_bits & EEPROM_OUT_BIT) {
1869                         value |= 1 << (value_width - i);
1870                 }
1871         }
1872
1873         return value;
1874 }
1875
1876 static unsigned int labpc_eeprom_read(struct comedi_device *dev,
1877                                       unsigned int address)
1878 {
1879         unsigned int value;
1880         const int read_instruction = 0x3;       /*  bits to tell eeprom to expect a read */
1881         const int write_length = 8;     /*  8 bit write lengths to eeprom */
1882
1883         /*  enable read/write to eeprom */
1884         devpriv->command5_bits &= ~EEPROM_EN_BIT;
1885         udelay(1);
1886         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1887         devpriv->command5_bits |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT;
1888         udelay(1);
1889         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1890
1891         /*  send read instruction */
1892         labpc_serial_out(dev, read_instruction, write_length);
1893         /*  send 8 bit address to read from */
1894         labpc_serial_out(dev, address, write_length);
1895         /*  read result */
1896         value = labpc_serial_in(dev);
1897
1898         /*  disable read/write to eeprom */
1899         devpriv->command5_bits &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
1900         udelay(1);
1901         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1902
1903         return value;
1904 }
1905
1906 static unsigned int labpc_eeprom_write(struct comedi_device *dev,
1907                                        unsigned int address, unsigned int value)
1908 {
1909         const int write_enable_instruction = 0x6;
1910         const int write_instruction = 0x2;
1911         const int write_length = 8;     /*  8 bit write lengths to eeprom */
1912         const int write_in_progress_bit = 0x1;
1913         const int timeout = 10000;
1914         int i;
1915
1916         /*  make sure there isn't already a write in progress */
1917         for (i = 0; i < timeout; i++) {
1918                 if ((labpc_eeprom_read_status(dev) & write_in_progress_bit) ==
1919                     0)
1920                         break;
1921         }
1922         if (i == timeout) {
1923                 comedi_error(dev, "eeprom write timed out");
1924                 return -ETIME;
1925         }
1926         /*  update software copy of eeprom */
1927         devpriv->eeprom_data[address] = value;
1928
1929         /*  enable read/write to eeprom */
1930         devpriv->command5_bits &= ~EEPROM_EN_BIT;
1931         udelay(1);
1932         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1933         devpriv->command5_bits |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT;
1934         udelay(1);
1935         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1936
1937         /*  send write_enable instruction */
1938         labpc_serial_out(dev, write_enable_instruction, write_length);
1939         devpriv->command5_bits &= ~EEPROM_EN_BIT;
1940         udelay(1);
1941         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1942
1943         /*  send write instruction */
1944         devpriv->command5_bits |= EEPROM_EN_BIT;
1945         udelay(1);
1946         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1947         labpc_serial_out(dev, write_instruction, write_length);
1948         /*  send 8 bit address to write to */
1949         labpc_serial_out(dev, address, write_length);
1950         /*  write value */
1951         labpc_serial_out(dev, value, write_length);
1952         devpriv->command5_bits &= ~EEPROM_EN_BIT;
1953         udelay(1);
1954         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1955
1956         /*  disable read/write to eeprom */
1957         devpriv->command5_bits &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
1958         udelay(1);
1959         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1960
1961         return 0;
1962 }
1963
1964 static unsigned int labpc_eeprom_read_status(struct comedi_device *dev)
1965 {
1966         unsigned int value;
1967         const int read_status_instruction = 0x5;
1968         const int write_length = 8;     /*  8 bit write lengths to eeprom */
1969
1970         /*  enable read/write to eeprom */
1971         devpriv->command5_bits &= ~EEPROM_EN_BIT;
1972         udelay(1);
1973         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1974         devpriv->command5_bits |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT;
1975         udelay(1);
1976         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1977
1978         /*  send read status instruction */
1979         labpc_serial_out(dev, read_status_instruction, write_length);
1980         /*  read result */
1981         value = labpc_serial_in(dev);
1982
1983         /*  disable read/write to eeprom */
1984         devpriv->command5_bits &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
1985         udelay(1);
1986         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1987
1988         return value;
1989 }
1990
1991 /* writes to 8 bit calibration dacs */
1992 static void write_caldac(struct comedi_device *dev, unsigned int channel,
1993                          unsigned int value)
1994 {
1995         if (value == devpriv->caldac[channel])
1996                 return;
1997         devpriv->caldac[channel] = value;
1998
1999         /*  clear caldac load bit and make sure we don't write to eeprom */
2000         devpriv->command5_bits &=
2001             ~CALDAC_LOAD_BIT & ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
2002         udelay(1);
2003         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2004
2005         /*  write 4 bit channel */
2006         labpc_serial_out(dev, channel, 4);
2007         /*  write 8 bit caldac value */
2008         labpc_serial_out(dev, value, 8);
2009
2010         /*  set and clear caldac bit to load caldac value */
2011         devpriv->command5_bits |= CALDAC_LOAD_BIT;
2012         udelay(1);
2013         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2014         devpriv->command5_bits &= ~CALDAC_LOAD_BIT;
2015         udelay(1);
2016         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2017 }
2018
2019 #ifdef CONFIG_COMEDI_PCI
2020 COMEDI_PCI_INITCLEANUP(driver_labpc, labpc_pci_table);
2021 #else
2022 COMEDI_INITCLEANUP(driver_labpc);
2023 #endif
2024
2025 EXPORT_SYMBOL_GPL(labpc_common_attach);
2026 EXPORT_SYMBOL_GPL(labpc_common_detach);
2027 EXPORT_SYMBOL_GPL(range_labpc_1200_ai);
2028 EXPORT_SYMBOL_GPL(labpc_1200_ai_gain_bits);
2029 EXPORT_SYMBOL_GPL(labpc_1200_is_unipolar);