3 * Driver for NI AT-AO-6/10 boards
5 * COMEDI - Linux Control and Measurement Device Interface
6 * Copyright (C) 2000,2002 David A. Schleef <ds@schleef.org>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
21 * Description: National Instruments AT-AO-6/10
22 * Devices: (National Instruments) AT-AO-6 [at-ao-6]
23 * (National Instruments) AT-AO-10 [at-ao-10]
25 * Author: David A. Schleef <ds@schleef.org>
26 * Updated: Sun Dec 26 12:26:28 EST 2004
28 * Configuration options:
29 * [0] - I/O port base address
32 * [3] - analog output range, set by jumpers on hardware
33 * 0 for -10 to 10V bipolar
34 * 1 for 0V to 10V unipolar
37 #include <linux/module.h>
39 #include "../comedidev.h"
46 * Register-level programming information can be found in NI
47 * document 320379.pdf.
49 #define ATAO_DIO_REG 0x00
50 #define ATAO_CFG2_REG 0x02
51 #define ATAO_CFG2_CALLD_NOP (0 << 14)
52 #define ATAO_CFG2_CALLD(x) ((((x) >> 3) + 1) << 14)
53 #define ATAO_CFG2_FFRTEN (1 << 13)
54 #define ATAO_CFG2_DACS(x) (1 << (((x) / 2) + 8))
55 #define ATAO_CFG2_LDAC(x) (1 << (((x) / 2) + 3))
56 #define ATAO_CFG2_PROMEN (1 << 2)
57 #define ATAO_CFG2_SCLK (1 << 1)
58 #define ATAO_CFG2_SDATA (1 << 0)
59 #define ATAO_CFG3_REG 0x04
60 #define ATAO_CFG3_DMAMODE (1 << 6)
61 #define ATAO_CFG3_CLKOUT (1 << 5)
62 #define ATAO_CFG3_RCLKEN (1 << 4)
63 #define ATAO_CFG3_DOUTEN2 (1 << 3)
64 #define ATAO_CFG3_DOUTEN1 (1 << 2)
65 #define ATAO_CFG3_EN2_5V (1 << 1)
66 #define ATAO_CFG3_SCANEN (1 << 0)
67 #define ATAO_82C53_BASE 0x06
68 #define ATAO_CFG1_REG 0x0a
69 #define ATAO_CFG1_EXTINT2EN (1 << 15)
70 #define ATAO_CFG1_EXTINT1EN (1 << 14)
71 #define ATAO_CFG1_CNTINT2EN (1 << 13)
72 #define ATAO_CFG1_CNTINT1EN (1 << 12)
73 #define ATAO_CFG1_TCINTEN (1 << 11)
74 #define ATAO_CFG1_CNT1SRC (1 << 10)
75 #define ATAO_CFG1_CNT2SRC (1 << 9)
76 #define ATAO_CFG1_FIFOEN (1 << 8)
77 #define ATAO_CFG1_GRP2WR (1 << 7)
78 #define ATAO_CFG1_EXTUPDEN (1 << 6)
79 #define ATAO_CFG1_DMARQ (1 << 5)
80 #define ATAO_CFG1_DMAEN (1 << 4)
81 #define ATAO_CFG1_CH(x) (((x) & 0xf) << 0)
82 #define ATAO_STATUS_REG 0x0a
83 #define ATAO_STATUS_FH (1 << 6)
84 #define ATAO_STATUS_FE (1 << 5)
85 #define ATAO_STATUS_FF (1 << 4)
86 #define ATAO_STATUS_INT2 (1 << 3)
87 #define ATAO_STATUS_INT1 (1 << 2)
88 #define ATAO_STATUS_TCINT (1 << 1)
89 #define ATAO_STATUS_PROMOUT (1 << 0)
90 #define ATAO_FIFO_WRITE_REG 0x0c
91 #define ATAO_FIFO_CLEAR_REG 0x0c
92 #define ATAO_AO_REG(x) (0x0c + ((x) * 2))
94 /* registers with _2_ are accessed when GRP2WR is set in CFG1 */
95 #define ATAO_2_DMATCCLR_REG 0x00
96 #define ATAO_2_INT1CLR_REG 0x02
97 #define ATAO_2_INT2CLR_REG 0x04
98 #define ATAO_2_RTSISHFT_REG 0x06
99 #define ATAO_2_RTSISHFT_RSI (1 << 0)
100 #define ATAO_2_RTSISTRB_REG 0x07
107 static const struct atao_board atao_boards[] = {
117 struct atao_private {
121 /* Used for caldac readback */
122 unsigned char caldac[21];
125 static void atao_select_reg_group(struct comedi_device *dev, int group)
127 struct atao_private *devpriv = dev->private;
130 devpriv->cfg1 |= ATAO_CFG1_GRP2WR;
132 devpriv->cfg1 &= ~ATAO_CFG1_GRP2WR;
133 outw(devpriv->cfg1, dev->iobase + ATAO_CFG1_REG);
136 static int atao_ao_insn_write(struct comedi_device *dev,
137 struct comedi_subdevice *s,
138 struct comedi_insn *insn,
141 unsigned int chan = CR_CHAN(insn->chanspec);
142 unsigned int val = s->readback[chan];
146 atao_select_reg_group(dev, 1);
148 for (i = 0; i < insn->n; i++) {
151 /* the hardware expects two's complement values */
152 outw(comedi_offset_munge(s, val),
153 dev->iobase + ATAO_AO_REG(chan));
155 s->readback[chan] = val;
158 atao_select_reg_group(dev, 0);
163 static int atao_dio_insn_bits(struct comedi_device *dev,
164 struct comedi_subdevice *s,
165 struct comedi_insn *insn,
168 if (comedi_dio_update_state(s, data))
169 outw(s->state, dev->iobase + ATAO_DIO_REG);
171 data[1] = inw(dev->iobase + ATAO_DIO_REG);
176 static int atao_dio_insn_config(struct comedi_device *dev,
177 struct comedi_subdevice *s,
178 struct comedi_insn *insn,
181 struct atao_private *devpriv = dev->private;
182 unsigned int chan = CR_CHAN(insn->chanspec);
191 ret = comedi_dio_insn_config(dev, s, insn, data, mask);
195 if (s->io_bits & 0x0f)
196 devpriv->cfg3 |= ATAO_CFG3_DOUTEN1;
198 devpriv->cfg3 &= ~ATAO_CFG3_DOUTEN1;
199 if (s->io_bits & 0xf0)
200 devpriv->cfg3 |= ATAO_CFG3_DOUTEN2;
202 devpriv->cfg3 &= ~ATAO_CFG3_DOUTEN2;
204 outw(devpriv->cfg3, dev->iobase + ATAO_CFG3_REG);
210 * There are three DAC8800 TrimDACs on the board. These are 8-channel,
211 * 8-bit DACs that are used to calibrate the Analog Output channels.
212 * The factory default calibration values are stored in the EEPROM.
213 * The TrimDACs, and EEPROM addresses, are mapped as:
215 * Channel EEPROM Description
216 * ----------------- ------ -----------------------------------
217 * 0 - DAC0 Chan 0 0x30 AO Channel 0 Offset
218 * 1 - DAC0 Chan 1 0x31 AO Channel 0 Gain
219 * 2 - DAC0 Chan 2 0x32 AO Channel 1 Offset
220 * 3 - DAC0 Chan 3 0x33 AO Channel 1 Gain
221 * 4 - DAC0 Chan 4 0x34 AO Channel 2 Offset
222 * 5 - DAC0 Chan 5 0x35 AO Channel 2 Gain
223 * 6 - DAC0 Chan 6 0x36 AO Channel 3 Offset
224 * 7 - DAC0 Chan 7 0x37 AO Channel 3 Gain
225 * 8 - DAC1 Chan 0 0x38 AO Channel 4 Offset
226 * 9 - DAC1 Chan 1 0x39 AO Channel 4 Gain
227 * 10 - DAC1 Chan 2 0x3a AO Channel 5 Offset
228 * 11 - DAC1 Chan 3 0x3b AO Channel 5 Gain
229 * 12 - DAC1 Chan 4 0x3c 2.5V Offset
230 * 13 - DAC1 Chan 5 0x3d AO Channel 6 Offset (at-ao-10 only)
231 * 14 - DAC1 Chan 6 0x3e AO Channel 6 Gain (at-ao-10 only)
232 * 15 - DAC1 Chan 7 0x3f AO Channel 7 Offset (at-ao-10 only)
233 * 16 - DAC2 Chan 0 0x40 AO Channel 7 Gain (at-ao-10 only)
234 * 17 - DAC2 Chan 1 0x41 AO Channel 8 Offset (at-ao-10 only)
235 * 18 - DAC2 Chan 2 0x42 AO Channel 8 Gain (at-ao-10 only)
236 * 19 - DAC2 Chan 3 0x43 AO Channel 9 Offset (at-ao-10 only)
237 * 20 - DAC2 Chan 4 0x44 AO Channel 9 Gain (at-ao-10 only)
238 * DAC2 Chan 5 0x45 Reserved
239 * DAC2 Chan 6 0x46 Reserved
240 * DAC2 Chan 7 0x47 Reserved
242 static int atao_calib_insn_write(struct comedi_device *dev,
243 struct comedi_subdevice *s,
244 struct comedi_insn *insn,
247 unsigned int chan = CR_CHAN(insn->chanspec);
250 unsigned int val = data[insn->n - 1];
251 unsigned int bitstring = ((chan & 0x7) << 8) | val;
255 /* write the channel and last data value to the caldac */
256 /* clock the bitstring to the caldac; MSB -> LSB */
257 for (bit = 1 << 10; bit; bit >>= 1) {
258 bits = (bit & bitstring) ? ATAO_CFG2_SDATA : 0;
260 outw(bits, dev->iobase + ATAO_CFG2_REG);
261 outw(bits | ATAO_CFG2_SCLK,
262 dev->iobase + ATAO_CFG2_REG);
265 /* strobe the caldac to load the value */
266 outw(ATAO_CFG2_CALLD(chan), dev->iobase + ATAO_CFG2_REG);
267 outw(ATAO_CFG2_CALLD_NOP, dev->iobase + ATAO_CFG2_REG);
269 s->readback[chan] = val;
275 static void atao_reset(struct comedi_device *dev)
277 struct atao_private *devpriv = dev->private;
278 unsigned long timer_base = dev->iobase + ATAO_82C53_BASE;
280 /* This is the reset sequence described in the manual */
283 outw(devpriv->cfg1, dev->iobase + ATAO_CFG1_REG);
285 /* Put outputs of counter 1 and counter 2 in a high state */
286 i8254_set_mode(timer_base, 0, 0, I8254_MODE4 | I8254_BINARY);
287 i8254_set_mode(timer_base, 0, 1, I8254_MODE4 | I8254_BINARY);
288 i8254_write(timer_base, 0, 0, 0x0003);
290 outw(ATAO_CFG2_CALLD_NOP, dev->iobase + ATAO_CFG2_REG);
293 outw(devpriv->cfg3, dev->iobase + ATAO_CFG3_REG);
295 inw(dev->iobase + ATAO_FIFO_CLEAR_REG);
297 atao_select_reg_group(dev, 1);
298 outw(0, dev->iobase + ATAO_2_INT1CLR_REG);
299 outw(0, dev->iobase + ATAO_2_INT2CLR_REG);
300 outw(0, dev->iobase + ATAO_2_DMATCCLR_REG);
301 atao_select_reg_group(dev, 0);
304 static int atao_attach(struct comedi_device *dev, struct comedi_devconfig *it)
306 const struct atao_board *board = dev->board_ptr;
307 struct atao_private *devpriv;
308 struct comedi_subdevice *s;
311 ret = comedi_request_region(dev, it->options[0], 0x20);
315 devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
319 ret = comedi_alloc_subdevices(dev, 4);
323 /* Analog Output subdevice */
324 s = &dev->subdevices[0];
325 s->type = COMEDI_SUBD_AO;
326 s->subdev_flags = SDF_WRITABLE;
327 s->n_chan = board->n_ao_chans;
329 s->range_table = it->options[3] ? &range_unipolar10 : &range_bipolar10;
330 s->insn_write = atao_ao_insn_write;
332 ret = comedi_alloc_subdev_readback(s);
336 /* Digital I/O subdevice */
337 s = &dev->subdevices[1];
338 s->type = COMEDI_SUBD_DIO;
339 s->subdev_flags = SDF_READABLE | SDF_WRITABLE;
342 s->range_table = &range_digital;
343 s->insn_bits = atao_dio_insn_bits;
344 s->insn_config = atao_dio_insn_config;
346 /* caldac subdevice */
347 s = &dev->subdevices[2];
348 s->type = COMEDI_SUBD_CALIB;
349 s->subdev_flags = SDF_WRITABLE | SDF_INTERNAL;
350 s->n_chan = (board->n_ao_chans * 2) + 1;
352 s->insn_write = atao_calib_insn_write;
354 ret = comedi_alloc_subdev_readback(s);
358 /* EEPROM subdevice */
359 s = &dev->subdevices[3];
360 s->type = COMEDI_SUBD_UNUSED;
367 static struct comedi_driver ni_at_ao_driver = {
368 .driver_name = "ni_at_ao",
369 .module = THIS_MODULE,
370 .attach = atao_attach,
371 .detach = comedi_legacy_detach,
372 .board_name = &atao_boards[0].name,
373 .offset = sizeof(struct atao_board),
374 .num_names = ARRAY_SIZE(atao_boards),
376 module_comedi_driver(ni_at_ao_driver);
378 MODULE_AUTHOR("Comedi http://www.comedi.org");
379 MODULE_DESCRIPTION("Comedi driver for NI AT-AO-6/10 boards");
380 MODULE_LICENSE("GPL");