3 * Data Translation DT3000 series driver
5 * COMEDI - Linux Control and Measurement Device Interface
6 * Copyright (C) 1999 David A. Schleef <ds@schleef.org>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
21 * Description: Data Translation DT3000 series
22 * Devices: [Data Translation] DT3001 (dt3000), DT3001-PGL, DT3002, DT3003,
23 * DT3003-PGL, DT3004, DT3005, DT3004-200
25 * Updated: Mon, 14 Apr 2008 15:41:24 +0100
28 * Configuration Options: not applicable, uses PCI auto config
30 * There is code to support AI commands, but it may not work.
32 * AO commands are not supported.
36 * The DT3000 series is Data Translation's attempt to make a PCI
37 * data acquisition board. The design of this series is very nice,
38 * since each board has an on-board DSP (Texas Instruments TMS320C52).
39 * However, a few details are a little annoying. The boards lack
40 * bus-mastering DMA, which eliminates them from serious work.
41 * They also are not capable of autocalibration, which is a common
42 * feature in modern hardware. The default firmware is pretty bad,
43 * making it nearly impossible to write an RT compatible driver.
44 * It would make an interesting project to write a decent firmware
47 * Data Translation originally wanted an NDA for the documentation
48 * for the 3k series. However, if you ask nicely, they might send
49 * you the docs without one, also.
52 #include <linux/module.h>
53 #include <linux/delay.h>
54 #include <linux/interrupt.h>
56 #include "../comedi_pci.h"
59 * PCI BAR0 - dual-ported RAM location definitions (dev->mmio)
61 #define DPR_DAC_BUFFER (4 * 0x000)
62 #define DPR_ADC_BUFFER (4 * 0x800)
63 #define DPR_COMMAND (4 * 0xfd3)
64 #define DPR_SUBSYS (4 * 0xfd3)
65 #define DPR_SUBSYS_AI 0
66 #define DPR_SUBSYS_AO 1
67 #define DPR_SUBSYS_DIN 2
68 #define DPR_SUBSYS_DOUT 3
69 #define DPR_SUBSYS_MEM 4
70 #define DPR_SUBSYS_CT 5
71 #define DPR_ENCODE (4 * 0xfd4)
72 #define DPR_PARAMS(x) (4 * (0xfd5 + (x)))
73 #define DPR_TICK_REG_LO (4 * 0xff5)
74 #define DPR_TICK_REG_HI (4 * 0xff6)
75 #define DPR_DA_BUF_FRONT (4 * 0xff7)
76 #define DPR_DA_BUF_REAR (4 * 0xff8)
77 #define DPR_AD_BUF_FRONT (4 * 0xff9)
78 #define DPR_AD_BUF_REAR (4 * 0xffa)
79 #define DPR_INT_MASK (4 * 0xffb)
80 #define DPR_INTR_FLAG (4 * 0xffc)
81 #define DPR_INTR_CMDONE BIT(7)
82 #define DPR_INTR_CTDONE BIT(6)
83 #define DPR_INTR_DAHWERR BIT(5)
84 #define DPR_INTR_DASWERR BIT(4)
85 #define DPR_INTR_DAEMPTY BIT(3)
86 #define DPR_INTR_ADHWERR BIT(2)
87 #define DPR_INTR_ADSWERR BIT(1)
88 #define DPR_INTR_ADFULL BIT(0)
89 #define DPR_RESPONSE_MBX (4 * 0xffe)
90 #define DPR_CMD_MBX (4 * 0xfff)
91 #define DPR_CMD_COMPLETION(x) ((x) << 8)
92 #define DPR_CMD_NOTPROCESSED DPR_CMD_COMPLETION(0x00)
93 #define DPR_CMD_NOERROR DPR_CMD_COMPLETION(0x55)
94 #define DPR_CMD_ERROR DPR_CMD_COMPLETION(0xaa)
95 #define DPR_CMD_NOTSUPPORTED DPR_CMD_COMPLETION(0xff)
96 #define DPR_CMD_COMPLETION_MASK DPR_CMD_COMPLETION(0xff)
97 #define DPR_CMD(x) ((x) << 0)
98 #define DPR_CMD_GETBRDINFO DPR_CMD(0)
99 #define DPR_CMD_CONFIG DPR_CMD(1)
100 #define DPR_CMD_GETCONFIG DPR_CMD(2)
101 #define DPR_CMD_START DPR_CMD(3)
102 #define DPR_CMD_STOP DPR_CMD(4)
103 #define DPR_CMD_READSINGLE DPR_CMD(5)
104 #define DPR_CMD_WRITESINGLE DPR_CMD(6)
105 #define DPR_CMD_CALCCLOCK DPR_CMD(7)
106 #define DPR_CMD_READEVENTS DPR_CMD(8)
107 #define DPR_CMD_WRITECTCTRL DPR_CMD(16)
108 #define DPR_CMD_READCTCTRL DPR_CMD(17)
109 #define DPR_CMD_WRITECT DPR_CMD(18)
110 #define DPR_CMD_READCT DPR_CMD(19)
111 #define DPR_CMD_WRITEDATA DPR_CMD(32)
112 #define DPR_CMD_READDATA DPR_CMD(33)
113 #define DPR_CMD_WRITEIO DPR_CMD(34)
114 #define DPR_CMD_READIO DPR_CMD(35)
115 #define DPR_CMD_WRITECODE DPR_CMD(36)
116 #define DPR_CMD_READCODE DPR_CMD(37)
117 #define DPR_CMD_EXECUTE DPR_CMD(38)
118 #define DPR_CMD_HALT DPR_CMD(48)
119 #define DPR_CMD_MASK DPR_CMD(0xff)
121 #define DPR_PARAM5_AD_TRIG(x) (((x) & 0x7) << 2)
122 #define DPR_PARAM5_AD_TRIG_INT DPR_PARAM5_AD_TRIG(0)
123 #define DPR_PARAM5_AD_TRIG_EXT DPR_PARAM5_AD_TRIG(1)
124 #define DPR_PARAM5_AD_TRIG_INT_RETRIG DPR_PARAM5_AD_TRIG(2)
125 #define DPR_PARAM5_AD_TRIG_EXT_RETRIG DPR_PARAM5_AD_TRIG(3)
126 #define DPR_PARAM5_AD_TRIG_INT_RETRIG2 DPR_PARAM5_AD_TRIG(4)
128 #define DPR_PARAM6_AD_DIFF BIT(0)
130 #define DPR_AI_FIFO_DEPTH 2003
131 #define DPR_AO_FIFO_DEPTH 2048
133 #define DPR_EXTERNAL_CLOCK 1
134 #define DPR_RISING_EDGE 2
136 #define DPR_TMODE_MASK 0x1c
138 #define DPR_CMD_TIMEOUT 100
140 static const struct comedi_lrange range_dt3000_ai = {
149 static const struct comedi_lrange range_dt3000_ai_pgl = {
168 struct dt3k_boardtype {
173 const struct comedi_lrange *adrange;
178 static const struct dt3k_boardtype dt3k_boardtypes[] = {
183 .adrange = &range_dt3000_ai,
188 [BOARD_DT3001_PGL] = {
189 .name = "dt3001-pgl",
192 .adrange = &range_dt3000_ai_pgl,
201 .adrange = &range_dt3000_ai,
208 .adrange = &range_dt3000_ai,
213 [BOARD_DT3003_PGL] = {
214 .name = "dt3003-pgl",
217 .adrange = &range_dt3000_ai_pgl,
226 .adrange = &range_dt3000_ai,
232 .name = "dt3005", /* a.k.a. 3004-200 */
235 .adrange = &range_dt3000_ai,
242 struct dt3k_private {
244 unsigned int ai_front;
245 unsigned int ai_rear;
248 static void dt3k_send_cmd(struct comedi_device *dev, unsigned int cmd)
251 unsigned int status = 0;
253 writew(cmd, dev->mmio + DPR_CMD_MBX);
255 for (i = 0; i < DPR_CMD_TIMEOUT; i++) {
256 status = readw(dev->mmio + DPR_CMD_MBX);
257 status &= DPR_CMD_COMPLETION_MASK;
258 if (status != DPR_CMD_NOTPROCESSED)
263 if (status != DPR_CMD_NOERROR)
264 dev_dbg(dev->class_dev, "%s: timeout/error status=0x%04x\n",
268 static unsigned int dt3k_readsingle(struct comedi_device *dev,
269 unsigned int subsys, unsigned int chan,
272 writew(subsys, dev->mmio + DPR_SUBSYS);
274 writew(chan, dev->mmio + DPR_PARAMS(0));
275 writew(gain, dev->mmio + DPR_PARAMS(1));
277 dt3k_send_cmd(dev, DPR_CMD_READSINGLE);
279 return readw(dev->mmio + DPR_PARAMS(2));
282 static void dt3k_writesingle(struct comedi_device *dev, unsigned int subsys,
283 unsigned int chan, unsigned int data)
285 writew(subsys, dev->mmio + DPR_SUBSYS);
287 writew(chan, dev->mmio + DPR_PARAMS(0));
288 writew(0, dev->mmio + DPR_PARAMS(1));
289 writew(data, dev->mmio + DPR_PARAMS(2));
291 dt3k_send_cmd(dev, DPR_CMD_WRITESINGLE);
294 static void dt3k_ai_empty_fifo(struct comedi_device *dev,
295 struct comedi_subdevice *s)
297 struct dt3k_private *devpriv = dev->private;
304 front = readw(dev->mmio + DPR_AD_BUF_FRONT);
305 count = front - devpriv->ai_front;
307 count += DPR_AI_FIFO_DEPTH;
309 rear = devpriv->ai_rear;
311 for (i = 0; i < count; i++) {
312 data = readw(dev->mmio + DPR_ADC_BUFFER + rear);
313 comedi_buf_write_samples(s, &data, 1);
315 if (rear >= DPR_AI_FIFO_DEPTH)
319 devpriv->ai_rear = rear;
320 writew(rear, dev->mmio + DPR_AD_BUF_REAR);
323 static int dt3k_ai_cancel(struct comedi_device *dev,
324 struct comedi_subdevice *s)
326 writew(DPR_SUBSYS_AI, dev->mmio + DPR_SUBSYS);
327 dt3k_send_cmd(dev, DPR_CMD_STOP);
329 writew(0, dev->mmio + DPR_INT_MASK);
334 static int debug_n_ints;
336 /* FIXME! Assumes shared interrupt is for this card. */
337 /* What's this debug_n_ints stuff? Obviously needs some work... */
338 static irqreturn_t dt3k_interrupt(int irq, void *d)
340 struct comedi_device *dev = d;
341 struct comedi_subdevice *s = dev->read_subdev;
347 status = readw(dev->mmio + DPR_INTR_FLAG);
349 if (status & DPR_INTR_ADFULL)
350 dt3k_ai_empty_fifo(dev, s);
352 if (status & (DPR_INTR_ADSWERR | DPR_INTR_ADHWERR))
353 s->async->events |= COMEDI_CB_ERROR;
356 if (debug_n_ints >= 10)
357 s->async->events |= COMEDI_CB_EOA;
359 comedi_handle_events(dev, s);
363 static int dt3k_ns_to_timer(unsigned int timer_base, unsigned int *nanosec,
366 int divider, base, prescale;
368 /* This function needs improvment */
369 /* Don't know if divider==0 works. */
371 for (prescale = 0; prescale < 16; prescale++) {
372 base = timer_base * (prescale + 1);
373 switch (flags & CMDF_ROUND_MASK) {
374 case CMDF_ROUND_NEAREST:
376 divider = (*nanosec + base / 2) / base;
378 case CMDF_ROUND_DOWN:
379 divider = (*nanosec) / base;
382 divider = (*nanosec) / base;
385 if (divider < 65536) {
386 *nanosec = divider * base;
387 return (prescale << 16) | (divider);
392 base = timer_base * (1 << prescale);
394 *nanosec = divider * base;
395 return (prescale << 16) | (divider);
398 static int dt3k_ai_cmdtest(struct comedi_device *dev,
399 struct comedi_subdevice *s, struct comedi_cmd *cmd)
401 const struct dt3k_boardtype *board = dev->board_ptr;
405 /* Step 1 : check if triggers are trivially valid */
407 err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW);
408 err |= comedi_check_trigger_src(&cmd->scan_begin_src, TRIG_TIMER);
409 err |= comedi_check_trigger_src(&cmd->convert_src, TRIG_TIMER);
410 err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
411 err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_COUNT);
416 /* Step 2a : make sure trigger sources are unique */
417 /* Step 2b : and mutually compatible */
419 /* Step 3: check if arguments are trivially valid */
421 err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
423 if (cmd->scan_begin_src == TRIG_TIMER) {
424 err |= comedi_check_trigger_arg_min(&cmd->scan_begin_arg,
426 err |= comedi_check_trigger_arg_max(&cmd->scan_begin_arg,
430 if (cmd->convert_src == TRIG_TIMER) {
431 err |= comedi_check_trigger_arg_min(&cmd->convert_arg,
433 err |= comedi_check_trigger_arg_max(&cmd->convert_arg,
437 err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
440 if (cmd->stop_src == TRIG_COUNT)
441 err |= comedi_check_trigger_arg_max(&cmd->stop_arg, 0x00ffffff);
443 err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
448 /* step 4: fix up any arguments */
450 if (cmd->scan_begin_src == TRIG_TIMER) {
451 arg = cmd->scan_begin_arg;
452 dt3k_ns_to_timer(100, &arg, cmd->flags);
453 err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, arg);
456 if (cmd->convert_src == TRIG_TIMER) {
457 arg = cmd->convert_arg;
458 dt3k_ns_to_timer(50, &arg, cmd->flags);
459 err |= comedi_check_trigger_arg_is(&cmd->convert_arg, arg);
461 if (cmd->scan_begin_src == TRIG_TIMER) {
462 arg = cmd->convert_arg * cmd->scan_end_arg;
463 err |= comedi_check_trigger_arg_min(&cmd->
475 static int dt3k_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
477 struct comedi_cmd *cmd = &s->async->cmd;
479 unsigned int chan, range, aref;
480 unsigned int divider;
481 unsigned int tscandiv;
483 for (i = 0; i < cmd->chanlist_len; i++) {
484 chan = CR_CHAN(cmd->chanlist[i]);
485 range = CR_RANGE(cmd->chanlist[i]);
487 writew((range << 6) | chan, dev->mmio + DPR_ADC_BUFFER + i);
489 aref = CR_AREF(cmd->chanlist[0]);
491 writew(cmd->scan_end_arg, dev->mmio + DPR_PARAMS(0));
493 if (cmd->convert_src == TRIG_TIMER) {
494 divider = dt3k_ns_to_timer(50, &cmd->convert_arg, cmd->flags);
495 writew((divider >> 16), dev->mmio + DPR_PARAMS(1));
496 writew((divider & 0xffff), dev->mmio + DPR_PARAMS(2));
499 if (cmd->scan_begin_src == TRIG_TIMER) {
500 tscandiv = dt3k_ns_to_timer(100, &cmd->scan_begin_arg,
502 writew((tscandiv >> 16), dev->mmio + DPR_PARAMS(3));
503 writew((tscandiv & 0xffff), dev->mmio + DPR_PARAMS(4));
506 writew(DPR_PARAM5_AD_TRIG_INT_RETRIG, dev->mmio + DPR_PARAMS(5));
507 writew((aref == AREF_DIFF) ? DPR_PARAM6_AD_DIFF : 0,
508 dev->mmio + DPR_PARAMS(6));
510 writew(DPR_AI_FIFO_DEPTH / 2, dev->mmio + DPR_PARAMS(7));
512 writew(DPR_SUBSYS_AI, dev->mmio + DPR_SUBSYS);
513 dt3k_send_cmd(dev, DPR_CMD_CONFIG);
515 writew(DPR_INTR_ADFULL | DPR_INTR_ADSWERR | DPR_INTR_ADHWERR,
516 dev->mmio + DPR_INT_MASK);
520 writew(DPR_SUBSYS_AI, dev->mmio + DPR_SUBSYS);
521 dt3k_send_cmd(dev, DPR_CMD_START);
526 static int dt3k_ai_insn(struct comedi_device *dev, struct comedi_subdevice *s,
527 struct comedi_insn *insn, unsigned int *data)
530 unsigned int chan, gain, aref;
532 chan = CR_CHAN(insn->chanspec);
533 gain = CR_RANGE(insn->chanspec);
534 /* XXX docs don't explain how to select aref */
535 aref = CR_AREF(insn->chanspec);
537 for (i = 0; i < insn->n; i++)
538 data[i] = dt3k_readsingle(dev, DPR_SUBSYS_AI, chan, gain);
543 static int dt3k_ao_insn_write(struct comedi_device *dev,
544 struct comedi_subdevice *s,
545 struct comedi_insn *insn,
548 unsigned int chan = CR_CHAN(insn->chanspec);
549 unsigned int val = s->readback[chan];
552 for (i = 0; i < insn->n; i++) {
554 dt3k_writesingle(dev, DPR_SUBSYS_AO, chan, val);
556 s->readback[chan] = val;
561 static void dt3k_dio_config(struct comedi_device *dev, int bits)
564 writew(DPR_SUBSYS_DOUT, dev->mmio + DPR_SUBSYS);
566 writew(bits, dev->mmio + DPR_PARAMS(0));
569 writew(0, dev->mmio + DPR_PARAMS(1));
570 writew(0, dev->mmio + DPR_PARAMS(2));
573 dt3k_send_cmd(dev, DPR_CMD_CONFIG);
576 static int dt3k_dio_insn_config(struct comedi_device *dev,
577 struct comedi_subdevice *s,
578 struct comedi_insn *insn,
581 unsigned int chan = CR_CHAN(insn->chanspec);
590 ret = comedi_dio_insn_config(dev, s, insn, data, mask);
594 dt3k_dio_config(dev, (s->io_bits & 0x01) | ((s->io_bits & 0x10) >> 3));
599 static int dt3k_dio_insn_bits(struct comedi_device *dev,
600 struct comedi_subdevice *s,
601 struct comedi_insn *insn,
604 if (comedi_dio_update_state(s, data))
605 dt3k_writesingle(dev, DPR_SUBSYS_DOUT, 0, s->state);
607 data[1] = dt3k_readsingle(dev, DPR_SUBSYS_DIN, 0, 0);
612 static int dt3k_mem_insn_read(struct comedi_device *dev,
613 struct comedi_subdevice *s,
614 struct comedi_insn *insn,
617 unsigned int addr = CR_CHAN(insn->chanspec);
620 for (i = 0; i < insn->n; i++) {
621 writew(DPR_SUBSYS_MEM, dev->mmio + DPR_SUBSYS);
622 writew(addr, dev->mmio + DPR_PARAMS(0));
623 writew(1, dev->mmio + DPR_PARAMS(1));
625 dt3k_send_cmd(dev, DPR_CMD_READCODE);
627 data[i] = readw(dev->mmio + DPR_PARAMS(2));
633 static int dt3000_auto_attach(struct comedi_device *dev,
634 unsigned long context)
636 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
637 const struct dt3k_boardtype *board = NULL;
638 struct dt3k_private *devpriv;
639 struct comedi_subdevice *s;
642 if (context < ARRAY_SIZE(dt3k_boardtypes))
643 board = &dt3k_boardtypes[context];
646 dev->board_ptr = board;
647 dev->board_name = board->name;
649 devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
653 ret = comedi_pci_enable(dev);
657 dev->mmio = pci_ioremap_bar(pcidev, 0);
662 ret = request_irq(pcidev->irq, dt3k_interrupt, IRQF_SHARED,
663 dev->board_name, dev);
665 dev->irq = pcidev->irq;
668 ret = comedi_alloc_subdevices(dev, 4);
672 s = &dev->subdevices[0];
674 s->type = COMEDI_SUBD_AI;
675 s->subdev_flags = SDF_READABLE | SDF_GROUND | SDF_DIFF;
676 s->n_chan = board->adchan;
677 s->insn_read = dt3k_ai_insn;
678 s->maxdata = (1 << board->adbits) - 1;
679 s->range_table = &range_dt3000_ai; /* XXX */
681 dev->read_subdev = s;
682 s->subdev_flags |= SDF_CMD_READ;
683 s->len_chanlist = 512;
684 s->do_cmd = dt3k_ai_cmd;
685 s->do_cmdtest = dt3k_ai_cmdtest;
686 s->cancel = dt3k_ai_cancel;
689 s = &dev->subdevices[1];
691 s->type = COMEDI_SUBD_AO;
692 s->subdev_flags = SDF_WRITABLE;
694 s->maxdata = (1 << board->dabits) - 1;
696 s->range_table = &range_bipolar10;
697 s->insn_write = dt3k_ao_insn_write;
699 ret = comedi_alloc_subdev_readback(s);
703 s = &dev->subdevices[2];
705 s->type = COMEDI_SUBD_DIO;
706 s->subdev_flags = SDF_READABLE | SDF_WRITABLE;
708 s->insn_config = dt3k_dio_insn_config;
709 s->insn_bits = dt3k_dio_insn_bits;
712 s->range_table = &range_digital;
714 s = &dev->subdevices[3];
716 s->type = COMEDI_SUBD_MEMORY;
717 s->subdev_flags = SDF_READABLE;
719 s->insn_read = dt3k_mem_insn_read;
722 s->range_table = &range_unknown;
727 static struct comedi_driver dt3000_driver = {
728 .driver_name = "dt3000",
729 .module = THIS_MODULE,
730 .auto_attach = dt3000_auto_attach,
731 .detach = comedi_pci_detach,
734 static int dt3000_pci_probe(struct pci_dev *dev,
735 const struct pci_device_id *id)
737 return comedi_pci_auto_config(dev, &dt3000_driver, id->driver_data);
740 static const struct pci_device_id dt3000_pci_table[] = {
741 { PCI_VDEVICE(DT, 0x0022), BOARD_DT3001 },
742 { PCI_VDEVICE(DT, 0x0023), BOARD_DT3002 },
743 { PCI_VDEVICE(DT, 0x0024), BOARD_DT3003 },
744 { PCI_VDEVICE(DT, 0x0025), BOARD_DT3004 },
745 { PCI_VDEVICE(DT, 0x0026), BOARD_DT3005 },
746 { PCI_VDEVICE(DT, 0x0027), BOARD_DT3001_PGL },
747 { PCI_VDEVICE(DT, 0x0028), BOARD_DT3003_PGL },
750 MODULE_DEVICE_TABLE(pci, dt3000_pci_table);
752 static struct pci_driver dt3000_pci_driver = {
754 .id_table = dt3000_pci_table,
755 .probe = dt3000_pci_probe,
756 .remove = comedi_pci_auto_unconfig,
758 module_comedi_pci_driver(dt3000_driver, dt3000_pci_driver);
760 MODULE_AUTHOR("Comedi http://www.comedi.org");
761 MODULE_DESCRIPTION("Comedi low-level driver");
762 MODULE_LICENSE("GPL");