3 * Comedi driver for DAS6402 compatible boards
4 * Copyright(c) 2014 H Hartley Sweeten <hsweeten@visionengravers.com>
6 * Rewrite of an experimental driver by:
7 * Copyright (C) 1999 Oystein Svendsen <svendsen@pvv.org>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
22 * Description: Keithley Metrabyte DAS6402 (& compatibles)
23 * Devices: [Keithley Metrabyte] DAS6402-12 (das6402-12),
24 * DAS6402-16 (das6402-16)
25 * Author: H Hartley Sweeten <hsweeten@visionengravers.com>
26 * Updated: Fri, 14 Mar 2014 10:18:43 -0700
29 * Configuration Options:
30 * [0] - I/O base address
31 * [1] - IRQ (optional, needed for async command support)
34 #include <linux/module.h>
35 #include <linux/interrupt.h>
37 #include "../comedidev.h"
38 #include "comedi_fc.h"
44 #define DAS6402_AI_DATA_REG 0x00
45 #define DAS6402_AI_MUX_REG 0x02
46 #define DAS6402_AI_MUX_LO(x) (((x) & 0x3f) << 0)
47 #define DAS6402_AI_MUX_HI(x) (((x) & 0x3f) << 8)
48 #define DAS6402_DI_DO_REG 0x03
49 #define DAS6402_AO_DATA_REG(x) (0x04 + ((x) * 2))
50 #define DAS6402_AO_LSB_REG(x) (0x04 + ((x) * 2))
51 #define DAS6402_AO_MSB_REG(x) (0x05 + ((x) * 2))
52 #define DAS6402_STATUS_REG 0x08
53 #define DAS6402_STATUS_FFNE (1 << 0)
54 #define DAS6402_STATUS_FHALF (1 << 1)
55 #define DAS6402_STATUS_FFULL (1 << 2)
56 #define DAS6402_STATUS_XINT (1 << 3)
57 #define DAS6402_STATUS_INT (1 << 4)
58 #define DAS6402_STATUS_XTRIG (1 << 5)
59 #define DAS6402_STATUS_INDGT (1 << 6)
60 #define DAS6402_STATUS_10MHZ (1 << 7)
61 #define DAS6402_STATUS_W_CLRINT (1 << 0)
62 #define DAS6402_STATUS_W_CLRXTR (1 << 1)
63 #define DAS6402_STATUS_W_CLRXIN (1 << 2)
64 #define DAS6402_STATUS_W_EXTEND (1 << 4)
65 #define DAS6402_STATUS_W_ARMED (1 << 5)
66 #define DAS6402_STATUS_W_POSTMODE (1 << 6)
67 #define DAS6402_STATUS_W_10MHZ (1 << 7)
68 #define DAS6402_CTRL_REG 0x09
69 #define DAS6402_CTRL_SOFT_TRIG (0 << 0)
70 #define DAS6402_CTRL_EXT_FALL_TRIG (1 << 0)
71 #define DAS6402_CTRL_EXT_RISE_TRIG (2 << 0)
72 #define DAS6402_CTRL_PACER_TRIG (3 << 0)
73 #define DAS6402_CTRL_BURSTEN (1 << 2)
74 #define DAS6402_CTRL_XINTE (1 << 3)
75 #define DAS6402_CTRL_IRQ(x) ((x) << 4)
76 #define DAS6402_CTRL_INTE (1 << 7)
77 #define DAS6402_TRIG_REG 0x0a
78 #define DAS6402_TRIG_TGEN (1 << 0)
79 #define DAS6402_TRIG_TGSEL (1 << 1)
80 #define DAS6402_TRIG_TGPOL (1 << 2)
81 #define DAS6402_TRIG_PRETRIG (1 << 3)
82 #define DAS6402_AO_RANGE(_chan, _range) ((_range) << ((_chan) ? 6 : 4))
83 #define DAS6402_AO_RANGE_MASK(_chan) (3 << ((_chan) ? 6 : 4))
84 #define DAS6402_MODE_REG 0x0b
85 #define DAS6402_MODE_RANGE(x) ((x) << 0)
86 #define DAS6402_MODE_POLLED (0 << 2)
87 #define DAS6402_MODE_FIFONEPTY (1 << 2)
88 #define DAS6402_MODE_FIFOHFULL (2 << 2)
89 #define DAS6402_MODE_EOB (3 << 2)
90 #define DAS6402_MODE_ENHANCED (1 << 4)
91 #define DAS6402_MODE_SE (1 << 5)
92 #define DAS6402_MODE_UNI (1 << 6)
93 #define DAS6402_MODE_DMA1 (0 << 7)
94 #define DAS6402_MODE_DMA3 (1 << 7)
95 #define DAS6402_TIMER_BASE 0x0c
97 static const struct comedi_lrange das6402_ai_ranges = {
111 * Analog output ranges are programmable on the DAS6402/12.
112 * For the DAS6402/16 the range bits have no function, the
113 * DAC ranges are selected by switches on the board.
115 static const struct comedi_lrange das6402_ao_ranges = {
124 struct das6402_boardinfo {
126 unsigned int maxdata;
129 static struct das6402_boardinfo das6402_boards[] = {
131 .name = "das6402-12",
134 .name = "das6402-16",
139 struct das6402_private {
143 unsigned int divider1;
144 unsigned int divider2;
146 unsigned int ao_range;
149 static void das6402_set_mode(struct comedi_device *dev,
152 outb(DAS6402_MODE_ENHANCED | mode, dev->iobase + DAS6402_MODE_REG);
155 static void das6402_set_extended(struct comedi_device *dev,
158 outb(DAS6402_STATUS_W_EXTEND, dev->iobase + DAS6402_STATUS_REG);
159 outb(DAS6402_STATUS_W_EXTEND | val, dev->iobase + DAS6402_STATUS_REG);
160 outb(val, dev->iobase + DAS6402_STATUS_REG);
163 static void das6402_clear_all_interrupts(struct comedi_device *dev)
165 outb(DAS6402_STATUS_W_CLRINT |
166 DAS6402_STATUS_W_CLRXTR |
167 DAS6402_STATUS_W_CLRXIN, dev->iobase + DAS6402_STATUS_REG);
170 static void das6402_ai_clear_eoc(struct comedi_device *dev)
172 outb(DAS6402_STATUS_W_CLRINT, dev->iobase + DAS6402_STATUS_REG);
175 static void das6402_enable_counter(struct comedi_device *dev, bool load)
177 struct das6402_private *devpriv = dev->private;
178 unsigned long timer_iobase = dev->iobase + DAS6402_TIMER_BASE;
181 i8254_set_mode(timer_iobase, 0, 0, I8254_MODE0 | I8254_BINARY);
182 i8254_set_mode(timer_iobase, 0, 1, I8254_MODE2 | I8254_BINARY);
183 i8254_set_mode(timer_iobase, 0, 2, I8254_MODE2 | I8254_BINARY);
185 i8254_write(timer_iobase, 0, 0, devpriv->count);
186 i8254_write(timer_iobase, 0, 1, devpriv->divider1);
187 i8254_write(timer_iobase, 0, 2, devpriv->divider2);
190 i8254_set_mode(timer_iobase, 0, 0, I8254_MODE0 | I8254_BINARY);
191 i8254_set_mode(timer_iobase, 0, 1, I8254_MODE0 | I8254_BINARY);
192 i8254_set_mode(timer_iobase, 0, 2, I8254_MODE0 | I8254_BINARY);
196 static unsigned int das6402_ai_read_sample(struct comedi_device *dev,
197 struct comedi_subdevice *s)
201 val = inw(dev->iobase + DAS6402_AI_DATA_REG);
202 if (s->maxdata == 0x0fff)
207 static irqreturn_t das6402_interrupt(int irq, void *d)
209 struct comedi_device *dev = d;
210 struct comedi_subdevice *s = dev->read_subdev;
211 struct comedi_async *async = s->async;
212 struct comedi_cmd *cmd = &async->cmd;
215 status = inb(dev->iobase + DAS6402_STATUS_REG);
216 if ((status & DAS6402_STATUS_INT) == 0)
219 if (status & DAS6402_STATUS_FFULL) {
220 async->events |= COMEDI_CB_OVERFLOW;
221 } else if (status & DAS6402_STATUS_FFNE) {
224 val = das6402_ai_read_sample(dev, s);
225 comedi_buf_write_samples(s, &val, 1);
227 if (cmd->stop_src == TRIG_COUNT &&
228 async->scans_done >= cmd->stop_arg)
229 async->events |= COMEDI_CB_EOA;
232 das6402_clear_all_interrupts(dev);
234 comedi_handle_events(dev, s);
239 static void das6402_ai_set_mode(struct comedi_device *dev,
240 struct comedi_subdevice *s,
241 unsigned int chanspec,
244 unsigned int range = CR_RANGE(chanspec);
245 unsigned int aref = CR_AREF(chanspec);
247 mode |= DAS6402_MODE_RANGE(range);
248 if (aref == AREF_GROUND)
249 mode |= DAS6402_MODE_SE;
250 if (comedi_range_is_unipolar(s, range))
251 mode |= DAS6402_MODE_UNI;
253 das6402_set_mode(dev, mode);
256 static int das6402_ai_cmd(struct comedi_device *dev,
257 struct comedi_subdevice *s)
259 struct das6402_private *devpriv = dev->private;
260 struct comedi_cmd *cmd = &s->async->cmd;
261 unsigned int chan_lo = CR_CHAN(cmd->chanlist[0]);
262 unsigned int chan_hi = CR_CHAN(cmd->chanlist[cmd->chanlist_len - 1]);
264 das6402_ai_set_mode(dev, s, cmd->chanlist[0], DAS6402_MODE_FIFONEPTY);
266 /* load the mux for chanlist conversion */
267 outw(DAS6402_AI_MUX_HI(chan_hi) | DAS6402_AI_MUX_LO(chan_lo),
268 dev->iobase + DAS6402_AI_MUX_REG);
270 das6402_enable_counter(dev, true);
272 /* enable interrupt and pacer trigger */
273 outb(DAS6402_CTRL_INTE |
274 DAS6402_CTRL_IRQ(devpriv->irq) |
275 DAS6402_CTRL_PACER_TRIG, dev->iobase + DAS6402_CTRL_REG);
280 static int das6402_ai_check_chanlist(struct comedi_device *dev,
281 struct comedi_subdevice *s,
282 struct comedi_cmd *cmd)
284 unsigned int chan0 = CR_CHAN(cmd->chanlist[0]);
285 unsigned int range0 = CR_RANGE(cmd->chanlist[0]);
286 unsigned int aref0 = CR_AREF(cmd->chanlist[0]);
289 for (i = 1; i < cmd->chanlist_len; i++) {
290 unsigned int chan = CR_CHAN(cmd->chanlist[i]);
291 unsigned int range = CR_RANGE(cmd->chanlist[i]);
292 unsigned int aref = CR_AREF(cmd->chanlist[i]);
294 if (chan != chan0 + i) {
295 dev_dbg(dev->class_dev,
296 "chanlist must be consecutive\n");
300 if (range != range0) {
301 dev_dbg(dev->class_dev,
302 "chanlist must have the same range\n");
307 dev_dbg(dev->class_dev,
308 "chanlist must have the same reference\n");
312 if (aref0 == AREF_DIFF && chan > (s->n_chan / 2)) {
313 dev_dbg(dev->class_dev,
314 "chanlist differential channel to large\n");
321 static int das6402_ai_cmdtest(struct comedi_device *dev,
322 struct comedi_subdevice *s,
323 struct comedi_cmd *cmd)
325 struct das6402_private *devpriv = dev->private;
329 /* Step 1 : check if triggers are trivially valid */
331 err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW);
332 err |= cfc_check_trigger_src(&cmd->scan_begin_src, TRIG_FOLLOW);
333 err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_TIMER);
334 err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
335 err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
340 /* Step 2a : make sure trigger sources are unique */
342 err |= cfc_check_trigger_is_unique(cmd->stop_src);
344 /* Step 2b : and mutually compatible */
349 /* Step 3: check if arguments are trivially valid */
351 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
352 err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
353 err |= cfc_check_trigger_arg_min(&cmd->convert_arg, 10000);
354 err |= cfc_check_trigger_arg_min(&cmd->chanlist_len, 1);
355 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
357 if (cmd->stop_src == TRIG_COUNT)
358 err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
360 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
365 /* step 4: fix up any arguments */
367 if (cmd->convert_src == TRIG_TIMER) {
368 arg = cmd->convert_arg;
369 i8253_cascade_ns_to_timer(I8254_OSC_BASE_10MHZ,
373 err |= cfc_check_trigger_arg_is(&cmd->convert_arg, arg);
379 /* Step 5: check channel list if it exists */
380 if (cmd->chanlist && cmd->chanlist_len > 0)
381 err |= das6402_ai_check_chanlist(dev, s, cmd);
389 static int das6402_ai_cancel(struct comedi_device *dev,
390 struct comedi_subdevice *s)
392 outb(DAS6402_CTRL_SOFT_TRIG, dev->iobase + DAS6402_CTRL_REG);
397 static void das6402_ai_soft_trig(struct comedi_device *dev)
399 outw(0, dev->iobase + DAS6402_AI_DATA_REG);
402 static int das6402_ai_eoc(struct comedi_device *dev,
403 struct comedi_subdevice *s,
404 struct comedi_insn *insn,
405 unsigned long context)
409 status = inb(dev->iobase + DAS6402_STATUS_REG);
410 if (status & DAS6402_STATUS_FFNE)
415 static int das6402_ai_insn_read(struct comedi_device *dev,
416 struct comedi_subdevice *s,
417 struct comedi_insn *insn,
420 unsigned int chan = CR_CHAN(insn->chanspec);
421 unsigned int aref = CR_AREF(insn->chanspec);
425 if (aref == AREF_DIFF && chan > (s->n_chan / 2))
428 /* enable software conversion trigger */
429 outb(DAS6402_CTRL_SOFT_TRIG, dev->iobase + DAS6402_CTRL_REG);
431 das6402_ai_set_mode(dev, s, insn->chanspec, DAS6402_MODE_POLLED);
433 /* load the mux for single channel conversion */
434 outw(DAS6402_AI_MUX_HI(chan) | DAS6402_AI_MUX_LO(chan),
435 dev->iobase + DAS6402_AI_MUX_REG);
437 for (i = 0; i < insn->n; i++) {
438 das6402_ai_clear_eoc(dev);
439 das6402_ai_soft_trig(dev);
441 ret = comedi_timeout(dev, s, insn, das6402_ai_eoc, 0);
445 data[i] = das6402_ai_read_sample(dev, s);
448 das6402_ai_clear_eoc(dev);
453 static int das6402_ao_insn_write(struct comedi_device *dev,
454 struct comedi_subdevice *s,
455 struct comedi_insn *insn,
458 struct das6402_private *devpriv = dev->private;
459 unsigned int chan = CR_CHAN(insn->chanspec);
460 unsigned int range = CR_RANGE(insn->chanspec);
464 /* set the range for this channel */
465 val = devpriv->ao_range;
466 val &= ~DAS6402_AO_RANGE_MASK(chan);
467 val |= DAS6402_AO_RANGE(chan, range);
468 if (val != devpriv->ao_range) {
469 devpriv->ao_range = val;
470 outb(val, dev->iobase + DAS6402_TRIG_REG);
474 * The DAS6402/16 has a jumper to select either individual
475 * update (UPDATE) or simultaneous updating (XFER) of both
476 * DAC's. In UPDATE mode, when the MSB is written, that DAC
477 * is updated. In XFER mode, after both DAC's are loaded,
478 * a read cycle of any DAC register will update both DAC's
481 * If you have XFER mode enabled a (*insn_read) will need
482 * to be performed in order to update the DAC's with the
483 * last value written.
485 for (i = 0; i < insn->n; i++) {
488 s->readback[chan] = val;
490 if (s->maxdata == 0x0fff) {
492 * DAS6402/12 has the two 8-bit DAC registers, left
493 * justified (the 4 LSB bits are don't care). Data
494 * can be written as one word.
497 outw(val, dev->iobase + DAS6402_AO_DATA_REG(chan));
500 * DAS6402/16 uses both 8-bit DAC registers and needs
501 * to be written LSB then MSB.
504 dev->iobase + DAS6402_AO_LSB_REG(chan));
505 outb((val >> 8) & 0xff,
506 dev->iobase + DAS6402_AO_LSB_REG(chan));
513 static int das6402_ao_insn_read(struct comedi_device *dev,
514 struct comedi_subdevice *s,
515 struct comedi_insn *insn,
518 unsigned int chan = CR_CHAN(insn->chanspec);
521 * If XFER mode is enabled, reading any DAC register
522 * will update both DAC's simultaneously.
524 inw(dev->iobase + DAS6402_AO_LSB_REG(chan));
526 return comedi_readback_insn_read(dev, s, insn, data);
529 static int das6402_di_insn_bits(struct comedi_device *dev,
530 struct comedi_subdevice *s,
531 struct comedi_insn *insn,
534 data[1] = inb(dev->iobase + DAS6402_DI_DO_REG);
539 static int das6402_do_insn_bits(struct comedi_device *dev,
540 struct comedi_subdevice *s,
541 struct comedi_insn *insn,
544 if (comedi_dio_update_state(s, data))
545 outb(s->state, dev->iobase + DAS6402_DI_DO_REG);
552 static void das6402_reset(struct comedi_device *dev)
554 struct das6402_private *devpriv = dev->private;
556 /* enable "Enhanced" mode */
557 outb(DAS6402_MODE_ENHANCED, dev->iobase + DAS6402_MODE_REG);
559 /* enable 10MHz pacer clock */
560 das6402_set_extended(dev, DAS6402_STATUS_W_10MHZ);
562 /* enable software conversion trigger */
563 outb(DAS6402_CTRL_SOFT_TRIG, dev->iobase + DAS6402_CTRL_REG);
565 /* default ADC to single-ended unipolar 10V inputs */
566 das6402_set_mode(dev, DAS6402_MODE_RANGE(0) |
567 DAS6402_MODE_POLLED |
571 /* default mux for single channel conversion (channel 0) */
572 outw(DAS6402_AI_MUX_HI(0) | DAS6402_AI_MUX_LO(0),
573 dev->iobase + DAS6402_AI_MUX_REG);
575 /* set both DAC's for unipolar 5V output range */
576 devpriv->ao_range = DAS6402_AO_RANGE(0, 2) | DAS6402_AO_RANGE(1, 2);
577 outb(devpriv->ao_range, dev->iobase + DAS6402_TRIG_REG);
579 /* set both DAC's to 0V */
580 outw(0, dev->iobase + DAS6402_AO_DATA_REG(0));
581 outw(0, dev->iobase + DAS6402_AO_DATA_REG(0));
582 inw(dev->iobase + DAS6402_AO_LSB_REG(0));
584 das6402_enable_counter(dev, false);
586 /* set all digital outputs low */
587 outb(0, dev->iobase + DAS6402_DI_DO_REG);
589 das6402_clear_all_interrupts(dev);
592 static int das6402_attach(struct comedi_device *dev,
593 struct comedi_devconfig *it)
595 const struct das6402_boardinfo *board = dev->board_ptr;
596 struct das6402_private *devpriv;
597 struct comedi_subdevice *s;
600 devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
604 ret = comedi_request_region(dev, it->options[0], 0x10);
610 /* IRQs 2,3,5,6,7, 10,11,15 are valid for "enhanced" mode */
611 if ((1 << it->options[1]) & 0x8cec) {
612 ret = request_irq(it->options[1], das6402_interrupt, 0,
613 dev->board_name, dev);
615 dev->irq = it->options[1];
628 devpriv->irq = dev->irq;
634 ret = comedi_alloc_subdevices(dev, 4);
638 /* Analog Input subdevice */
639 s = &dev->subdevices[0];
640 s->type = COMEDI_SUBD_AI;
641 s->subdev_flags = SDF_READABLE | SDF_GROUND | SDF_DIFF;
643 s->maxdata = board->maxdata;
644 s->range_table = &das6402_ai_ranges;
645 s->insn_read = das6402_ai_insn_read;
647 dev->read_subdev = s;
648 s->subdev_flags |= SDF_CMD_READ;
649 s->len_chanlist = s->n_chan;
650 s->do_cmdtest = das6402_ai_cmdtest;
651 s->do_cmd = das6402_ai_cmd;
652 s->cancel = das6402_ai_cancel;
655 /* Analog Output subdevice */
656 s = &dev->subdevices[1];
657 s->type = COMEDI_SUBD_AO;
658 s->subdev_flags = SDF_WRITABLE;
660 s->maxdata = board->maxdata;
661 s->range_table = &das6402_ao_ranges;
662 s->insn_write = das6402_ao_insn_write;
663 s->insn_read = das6402_ao_insn_read;
665 ret = comedi_alloc_subdev_readback(s);
669 /* Digital Input subdevice */
670 s = &dev->subdevices[2];
671 s->type = COMEDI_SUBD_DI;
672 s->subdev_flags = SDF_READABLE;
675 s->range_table = &range_digital;
676 s->insn_bits = das6402_di_insn_bits;
678 /* Digital Input subdevice */
679 s = &dev->subdevices[3];
680 s->type = COMEDI_SUBD_DO;
681 s->subdev_flags = SDF_WRITABLE;
684 s->range_table = &range_digital;
685 s->insn_bits = das6402_do_insn_bits;
690 static struct comedi_driver das6402_driver = {
691 .driver_name = "das6402",
692 .module = THIS_MODULE,
693 .attach = das6402_attach,
694 .detach = comedi_legacy_detach,
695 .board_name = &das6402_boards[0].name,
696 .num_names = ARRAY_SIZE(das6402_boards),
697 .offset = sizeof(struct das6402_boardinfo),
699 module_comedi_driver(das6402_driver)
701 MODULE_AUTHOR("H Hartley Sweeten <hsweeten@visionengravers.com>");
702 MODULE_DESCRIPTION("Comedi driver for DAS6402 compatible boards");
703 MODULE_LICENSE("GPL");