2 comedi/drivers/cb_pcidas.c
4 Developed by Ivan Martinez and Frank Mori Hess, with valuable help from
5 David Schleef and the rest of the Comedi developers comunity.
7 Copyright (C) 2001-2003 Ivan Martinez <imr@oersted.dtu.dk>
8 Copyright (C) 2001,2002 Frank Mori Hess <fmhess@users.sourceforge.net>
10 COMEDI - Linux Control and Measurement Device Interface
11 Copyright (C) 1997-8 David A. Schleef <ds@schleef.org>
13 This program is free software; you can redistribute it and/or modify
14 it under the terms of the GNU General Public License as published by
15 the Free Software Foundation; either version 2 of the License, or
16 (at your option) any later version.
18 This program is distributed in the hope that it will be useful,
19 but WITHOUT ANY WARRANTY; without even the implied warranty of
20 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 GNU General Public License for more details.
23 You should have received a copy of the GNU General Public License
24 along with this program; if not, write to the Free Software
25 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
27 ************************************************************************
31 Description: MeasurementComputing PCI-DAS series with the AMCC S5933 PCI controller
32 Author: Ivan Martinez <imr@oersted.dtu.dk>,
33 Frank Mori Hess <fmhess@users.sourceforge.net>
35 Devices: [Measurement Computing] PCI-DAS1602/16 (cb_pcidas),
36 PCI-DAS1602/16jr, PCI-DAS1602/12, PCI-DAS1200, PCI-DAS1200jr,
37 PCI-DAS1000, PCI-DAS1001, PCI_DAS1002
40 There are many reports of the driver being used with most of the
41 supported cards. Despite no detailed log is maintained, it can
42 be said that the driver is quite tested and stable.
44 The boards may be autocalibrated using the comedi_calibrate
47 Configuration options:
48 [0] - PCI bus of device (optional)
49 [1] - PCI slot of device (optional)
50 If bus/slot is not specified, the first supported
51 PCI device found will be used.
53 For commands, the scanned channels must be consecutive
54 (i.e. 4-5-6-7, 2-3-4,...), and must all have the same
58 For start_src == TRIG_EXT, the A/D EXTERNAL TRIGGER IN (pin 45) is used.
59 For 1602 series, the start_arg is interpreted as follows:
60 start_arg == 0 => gated triger (level high)
61 start_arg == CR_INVERT => gated triger (level low)
62 start_arg == CR_EDGE => Rising edge
63 start_arg == CR_EDGE | CR_INVERT => Falling edge
64 For the other boards the trigger will be done on rising edge
70 analog triggering on 1602 series
73 #include "../comedidev.h"
74 #include <linux/delay.h>
75 #include <linux/interrupt.h>
79 #include "amcc_s5933.h"
80 #include "comedi_pci.h"
81 #include "comedi_fc.h"
83 #undef CB_PCIDAS_DEBUG /* disable debugging code */
84 /* #define CB_PCIDAS_DEBUG enable debugging code */
86 /* PCI vendor number of ComputerBoards/MeasurementComputing */
87 #define PCI_VENDOR_ID_CB 0x1307
88 #define TIMER_BASE 100 /* 10MHz master clock */
89 #define AI_BUFFER_SIZE 1024 /* maximum fifo size of any supported board */
90 #define AO_BUFFER_SIZE 1024 /* maximum fifo size of any supported board */
91 #define NUM_CHANNELS_8800 8
92 #define NUM_CHANNELS_7376 1
93 #define NUM_CHANNELS_8402 2
94 #define NUM_CHANNELS_DAC08 1
96 /* PCI-DAS base addresses */
98 /* indices of base address regions */
99 #define S5933_BADRINDEX 0
100 #define CONT_STAT_BADRINDEX 1
101 #define ADC_FIFO_BADRINDEX 2
102 #define PACER_BADRINDEX 3
103 #define AO_BADRINDEX 4
104 /* sizes of io regions */
105 #define CONT_STAT_SIZE 10
106 #define ADC_FIFO_SIZE 4
107 #define PACER_SIZE 12
110 /* Control/Status registers */
111 #define INT_ADCFIFO 0 /* INTERRUPT / ADC FIFO register */
112 #define INT_EOS 0x1 /* interrupt end of scan */
113 #define INT_FHF 0x2 /* interrupt fifo half full */
114 #define INT_FNE 0x3 /* interrupt fifo not empty */
115 #define INT_MASK 0x3 /* mask of interrupt select bits */
116 #define INTE 0x4 /* interrupt enable */
117 #define DAHFIE 0x8 /* dac half full interrupt enable */
118 #define EOAIE 0x10 /* end of acquisition interrupt enable */
119 #define DAHFI 0x20 /* dac half full read status / write interrupt clear */
120 #define EOAI 0x40 /* read end of acq. interrupt status / write clear */
121 #define INT 0x80 /* read interrupt status / write clear */
122 #define EOBI 0x200 /* read end of burst interrupt status */
123 #define ADHFI 0x400 /* read half-full interrupt status */
124 #define ADNEI 0x800 /* read fifo not empty interrupt latch status */
125 #define ADNE 0x1000 /* read, fifo not empty (realtime, not latched) status */
126 #define DAEMIE 0x1000 /* write, dac empty interrupt enable */
127 #define LADFUL 0x2000 /* read fifo overflow / write clear */
128 #define DAEMI 0x4000 /* dac fifo empty interrupt status / write clear */
130 #define ADCMUX_CONT 2 /* ADC CHANNEL MUX AND CONTROL register */
131 #define BEGIN_SCAN(x) ((x) & 0xf)
132 #define END_SCAN(x) (((x) & 0xf) << 4)
133 #define GAIN_BITS(x) (((x) & 0x3) << 8)
134 #define UNIP 0x800 /* Analog front-end unipolar for range */
135 #define SE 0x400 /* Inputs in single-ended mode */
136 #define PACER_MASK 0x3000 /* pacer source bits */
137 #define PACER_INT 0x1000 /* internal pacer */
138 #define PACER_EXT_FALL 0x2000 /* external falling edge */
139 #define PACER_EXT_RISE 0x3000 /* external rising edge */
140 #define EOC 0x4000 /* adc not busy */
142 #define TRIG_CONTSTAT 4 /* TRIGGER CONTROL/STATUS register */
143 #define SW_TRIGGER 0x1 /* software start trigger */
144 #define EXT_TRIGGER 0x2 /* external start trigger */
145 #define ANALOG_TRIGGER 0x3 /* external analog trigger */
146 #define TRIGGER_MASK 0x3 /* mask of bits that determine start trigger */
147 #define TGPOL 0x04 /* invert the edge/level of the external trigger (1602 only) */
148 #define TGSEL 0x08 /* if set edge triggered, otherwise level trigerred (1602 only) */
149 #define TGEN 0x10 /* enable external start trigger */
150 #define BURSTE 0x20 /* burst mode enable */
151 #define XTRCL 0x80 /* clear external trigger */
153 #define CALIBRATION_REG 6 /* CALIBRATION register */
154 #define SELECT_8800_BIT 0x100 /* select 8800 caldac */
155 #define SELECT_TRIMPOT_BIT 0x200 /* select ad7376 trim pot */
156 #define SELECT_DAC08_BIT 0x400 /* select dac08 caldac */
157 #define CAL_SRC_BITS(x) (((x) & 0x7) << 11)
158 #define CAL_EN_BIT 0x4000 /* read calibration source instead of analog input channel 0 */
159 #define SERIAL_DATA_IN_BIT 0x8000 /* serial data stream going to 8800 and 7376 */
161 #define DAC_CSR 0x8 /* dac control and status register */
163 DACEN = 0x2, /* dac enable */
164 DAC_MODE_UPDATE_BOTH = 0x80, /* update both dacs when dac0 is written */
166 static inline unsigned int DAC_RANGE(unsigned int channel, unsigned int range)
168 return (range & 0x3) << (8 + 2 * (channel & 0x1));
171 static inline unsigned int DAC_RANGE_MASK(unsigned int channel)
173 return 0x3 << (8 + 2 * (channel & 0x1));
176 /* bits for 1602 series only */
177 enum dac_csr_bits_1602 {
178 DAC_EMPTY = 0x1, /* dac fifo empty, read, write clear */
179 DAC_START = 0x4, /* start/arm dac fifo operations */
180 DAC_PACER_MASK = 0x18, /* bits that set dac pacer source */
181 DAC_PACER_INT = 0x8, /* dac internal pacing */
182 DAC_PACER_EXT_FALL = 0x10, /* dac external pacing, falling edge */
183 DAC_PACER_EXT_RISE = 0x18, /* dac external pacing, rising edge */
185 static inline unsigned int DAC_CHAN_EN(unsigned int channel)
187 return 1 << (5 + (channel & 0x1)); /* enable channel 0 or 1 */
190 /* analog input fifo */
191 #define ADCDATA 0 /* ADC DATA register */
192 #define ADCFIFOCLR 2 /* ADC FIFO CLEAR */
194 /* pacer, counter, dio registers */
199 /* analog output registers for 100x, 1200 series */
200 static inline unsigned int DAC_DATA_REG(unsigned int channel)
202 return 2 * (channel & 0x1);
205 /* analog output registers for 1602 series*/
206 #define DACDATA 0 /* DAC DATA register */
207 #define DACFIFOCLR 2 /* DAC FIFO CLEAR */
209 /* bit in hexadecimal representation of range index that indicates unipolar input range */
210 #define IS_UNIPOLAR 0x4
211 /* analog input ranges for most boards */
212 static const struct comedi_lrange cb_pcidas_ranges = {
226 /* pci-das1001 input ranges */
227 static const struct comedi_lrange cb_pcidas_alt_ranges = {
241 /* analog output ranges */
242 static const struct comedi_lrange cb_pcidas_ao_ranges = {
257 struct cb_pcidas_board {
259 unsigned short device_id;
260 int ai_se_chans; /* Inputs in single-ended mode */
261 int ai_diff_chans; /* Inputs in differential mode */
262 int ai_bits; /* analog input resolution */
263 int ai_speed; /* fastest conversion period in ns */
264 int ao_nchan; /* number of analog out channels */
265 int has_ao_fifo; /* analog output has fifo */
266 int ao_scan_speed; /* analog output speed for 1602 series (for a scan, not conversion) */
267 int fifo_size; /* number of samples fifo can hold */
268 const struct comedi_lrange *ranges;
269 enum trimpot_model trimpot;
270 unsigned has_dac08:1;
271 unsigned has_ai_trig_gated:1; /* Tells if the AI trigger can be gated */
272 unsigned has_ai_trig_invert:1; /* Tells if the AI trigger can be inverted */
275 static const struct cb_pcidas_board cb_pcidas_boards[] = {
277 .name = "pci-das1602/16",
285 .ao_scan_speed = 10000,
287 .ranges = &cb_pcidas_ranges,
290 .has_ai_trig_gated = 1,
291 .has_ai_trig_invert = 1,
294 .name = "pci-das1200",
303 .ranges = &cb_pcidas_ranges,
306 .has_ai_trig_gated = 0,
307 .has_ai_trig_invert = 0,
310 .name = "pci-das1602/12",
318 .ao_scan_speed = 4000,
320 .ranges = &cb_pcidas_ranges,
323 .has_ai_trig_gated = 1,
324 .has_ai_trig_invert = 1,
327 .name = "pci-das1200/jr",
336 .ranges = &cb_pcidas_ranges,
339 .has_ai_trig_gated = 0,
340 .has_ai_trig_invert = 0,
343 .name = "pci-das1602/16/jr",
352 .ranges = &cb_pcidas_ranges,
355 .has_ai_trig_gated = 1,
356 .has_ai_trig_invert = 1,
359 .name = "pci-das1000",
368 .ranges = &cb_pcidas_ranges,
371 .has_ai_trig_gated = 0,
372 .has_ai_trig_invert = 0,
375 .name = "pci-das1001",
384 .ranges = &cb_pcidas_alt_ranges,
387 .has_ai_trig_gated = 0,
388 .has_ai_trig_invert = 0,
391 .name = "pci-das1002",
400 .ranges = &cb_pcidas_ranges,
403 .has_ai_trig_gated = 0,
404 .has_ai_trig_invert = 0,
409 * Useful for shorthand access to the particular board structure
411 #define thisboard ((const struct cb_pcidas_board *)dev->board_ptr)
413 /* this structure is for data unique to this hardware driver. If
414 several hardware drivers keep similar information in this structure,
415 feel free to suggest moving the variable to the struct comedi_device struct. */
416 struct cb_pcidas_private {
417 /* would be useful for a PCI device */
418 struct pci_dev *pci_dev;
420 unsigned long s5933_config;
421 unsigned long control_status;
422 unsigned long adc_fifo;
423 unsigned long pacer_counter_dio;
424 unsigned long ao_registers;
425 /* divisors of master clock for analog input pacing */
426 unsigned int divisor1;
427 unsigned int divisor2;
428 volatile unsigned int count; /* number of analog input samples remaining */
429 volatile unsigned int adc_fifo_bits; /* bits to write to interrupt/adcfifo register */
430 volatile unsigned int s5933_intcsr_bits; /* bits to write to amcc s5933 interrupt control/status register */
431 volatile unsigned int ao_control_bits; /* bits to write to ao control and status register */
432 short ai_buffer[AI_BUFFER_SIZE];
433 short ao_buffer[AO_BUFFER_SIZE];
434 /* divisors of master clock for analog output pacing */
435 unsigned int ao_divisor1;
436 unsigned int ao_divisor2;
437 volatile unsigned int ao_count; /* number of analog output samples remaining */
438 int ao_value[2]; /* remember what the analog outputs are set to, to allow readback */
439 unsigned int caldac_value[NUM_CHANNELS_8800]; /* for readback of caldac */
440 unsigned int trimpot_value[NUM_CHANNELS_8402]; /* for readback of trimpot */
441 unsigned int dac08_value;
442 unsigned int calibration_source;
446 * most drivers define the following macro to make it easy to
447 * access the private structure.
449 #define devpriv ((struct cb_pcidas_private *)dev->private)
451 static int cb_pcidas_ai_rinsn(struct comedi_device *dev,
452 struct comedi_subdevice *s,
453 struct comedi_insn *insn, unsigned int *data);
454 static int ai_config_insn(struct comedi_device *dev, struct comedi_subdevice *s,
455 struct comedi_insn *insn, unsigned int *data);
456 static int cb_pcidas_ao_nofifo_winsn(struct comedi_device *dev,
457 struct comedi_subdevice *s,
458 struct comedi_insn *insn,
460 static int cb_pcidas_ao_fifo_winsn(struct comedi_device *dev,
461 struct comedi_subdevice *s,
462 struct comedi_insn *insn,
464 static int cb_pcidas_ao_readback_insn(struct comedi_device *dev,
465 struct comedi_subdevice *s,
466 struct comedi_insn *insn,
468 static int cb_pcidas_ai_cmd(struct comedi_device *dev,
469 struct comedi_subdevice *s);
470 static int cb_pcidas_ai_cmdtest(struct comedi_device *dev,
471 struct comedi_subdevice *s,
472 struct comedi_cmd *cmd);
473 static int cb_pcidas_ao_cmd(struct comedi_device *dev,
474 struct comedi_subdevice *s);
475 static int cb_pcidas_ao_inttrig(struct comedi_device *dev,
476 struct comedi_subdevice *subdev,
477 unsigned int trig_num);
478 static int cb_pcidas_ao_cmdtest(struct comedi_device *dev,
479 struct comedi_subdevice *s,
480 struct comedi_cmd *cmd);
481 static irqreturn_t cb_pcidas_interrupt(int irq, void *d);
482 static void handle_ao_interrupt(struct comedi_device *dev, unsigned int status);
483 static int cb_pcidas_cancel(struct comedi_device *dev,
484 struct comedi_subdevice *s);
485 static int cb_pcidas_ao_cancel(struct comedi_device *dev,
486 struct comedi_subdevice *s);
487 static void cb_pcidas_load_counters(struct comedi_device *dev, unsigned int *ns,
489 static int eeprom_read_insn(struct comedi_device *dev,
490 struct comedi_subdevice *s,
491 struct comedi_insn *insn, unsigned int *data);
492 static int caldac_read_insn(struct comedi_device *dev,
493 struct comedi_subdevice *s,
494 struct comedi_insn *insn, unsigned int *data);
495 static int caldac_write_insn(struct comedi_device *dev,
496 struct comedi_subdevice *s,
497 struct comedi_insn *insn, unsigned int *data);
498 static int trimpot_read_insn(struct comedi_device *dev,
499 struct comedi_subdevice *s,
500 struct comedi_insn *insn, unsigned int *data);
501 static int cb_pcidas_trimpot_write(struct comedi_device *dev,
502 unsigned int channel, unsigned int value);
503 static int trimpot_write_insn(struct comedi_device *dev,
504 struct comedi_subdevice *s,
505 struct comedi_insn *insn, unsigned int *data);
506 static int dac08_read_insn(struct comedi_device *dev,
507 struct comedi_subdevice *s, struct comedi_insn *insn,
509 static int dac08_write(struct comedi_device *dev, unsigned int value);
510 static int dac08_write_insn(struct comedi_device *dev,
511 struct comedi_subdevice *s,
512 struct comedi_insn *insn, unsigned int *data);
513 static int caldac_8800_write(struct comedi_device *dev, unsigned int address,
515 static int trimpot_7376_write(struct comedi_device *dev, uint8_t value);
516 static int trimpot_8402_write(struct comedi_device *dev, unsigned int channel,
518 static int nvram_read(struct comedi_device *dev, unsigned int address,
521 static inline unsigned int cal_enable_bits(struct comedi_device *dev)
523 return CAL_EN_BIT | CAL_SRC_BITS(devpriv->calibration_source);
527 * Attach is called by the Comedi core to configure the driver
528 * for a particular board.
530 static int cb_pcidas_attach(struct comedi_device *dev,
531 struct comedi_devconfig *it)
533 struct comedi_subdevice *s;
534 struct pci_dev *pcidev = NULL;
539 * Allocate the private structure area.
541 if (alloc_private(dev, sizeof(struct cb_pcidas_private)) < 0)
545 * Probe the device to determine what device in the series it is.
548 for_each_pci_dev(pcidev) {
549 /* is it not a computer boards card? */
550 if (pcidev->vendor != PCI_VENDOR_ID_CB)
552 /* loop through cards supported by this driver */
553 for (index = 0; index < ARRAY_SIZE(cb_pcidas_boards); index++) {
554 if (cb_pcidas_boards[index].device_id != pcidev->device)
556 /* was a particular bus/slot requested? */
557 if (it->options[0] || it->options[1]) {
558 /* are we on the wrong bus/slot? */
559 if (pcidev->bus->number != it->options[0] ||
560 PCI_SLOT(pcidev->devfn) != it->options[1]) {
564 devpriv->pci_dev = pcidev;
565 dev->board_ptr = cb_pcidas_boards + index;
570 dev_err(dev->hw_dev, "No supported ComputerBoards/MeasurementComputing card found on requested position\n");
575 dev_dbg(dev->hw_dev, "Found %s on bus %i, slot %i\n",
576 cb_pcidas_boards[index].name, pcidev->bus->number,
577 PCI_SLOT(pcidev->devfn));
580 * Enable PCI device and reserve I/O ports.
582 if (comedi_pci_enable(pcidev, "cb_pcidas")) {
583 dev_err(dev->hw_dev, "Failed to enable PCI device and request regions\n");
587 * Initialize devpriv->control_status and devpriv->adc_fifo to point to
588 * their base address.
590 devpriv->s5933_config =
591 pci_resource_start(devpriv->pci_dev, S5933_BADRINDEX);
592 devpriv->control_status =
593 pci_resource_start(devpriv->pci_dev, CONT_STAT_BADRINDEX);
595 pci_resource_start(devpriv->pci_dev, ADC_FIFO_BADRINDEX);
596 devpriv->pacer_counter_dio =
597 pci_resource_start(devpriv->pci_dev, PACER_BADRINDEX);
598 if (thisboard->ao_nchan) {
599 devpriv->ao_registers =
600 pci_resource_start(devpriv->pci_dev, AO_BADRINDEX);
602 /* disable and clear interrupts on amcc s5933 */
603 outl(INTCSR_INBOX_INTR_STATUS,
604 devpriv->s5933_config + AMCC_OP_REG_INTCSR);
607 if (request_irq(devpriv->pci_dev->irq, cb_pcidas_interrupt,
608 IRQF_SHARED, "cb_pcidas", dev)) {
609 dev_dbg(dev->hw_dev, "unable to allocate irq %d\n",
610 devpriv->pci_dev->irq);
613 dev->irq = devpriv->pci_dev->irq;
615 /* Initialize dev->board_name */
616 dev->board_name = thisboard->name;
619 * Allocate the subdevice structures.
621 if (alloc_subdevices(dev, 7) < 0)
624 s = dev->subdevices + 0;
625 /* analog input subdevice */
626 dev->read_subdev = s;
627 s->type = COMEDI_SUBD_AI;
628 s->subdev_flags = SDF_READABLE | SDF_GROUND | SDF_DIFF | SDF_CMD_READ;
629 /* WARNING: Number of inputs in differential mode is ignored */
630 s->n_chan = thisboard->ai_se_chans;
631 s->len_chanlist = thisboard->ai_se_chans;
632 s->maxdata = (1 << thisboard->ai_bits) - 1;
633 s->range_table = thisboard->ranges;
634 s->insn_read = cb_pcidas_ai_rinsn;
635 s->insn_config = ai_config_insn;
636 s->do_cmd = cb_pcidas_ai_cmd;
637 s->do_cmdtest = cb_pcidas_ai_cmdtest;
638 s->cancel = cb_pcidas_cancel;
640 /* analog output subdevice */
641 s = dev->subdevices + 1;
642 if (thisboard->ao_nchan) {
643 s->type = COMEDI_SUBD_AO;
644 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_GROUND;
645 s->n_chan = thisboard->ao_nchan;
646 /* analog out resolution is the same as analog input resolution, so use ai_bits */
647 s->maxdata = (1 << thisboard->ai_bits) - 1;
648 s->range_table = &cb_pcidas_ao_ranges;
649 s->insn_read = cb_pcidas_ao_readback_insn;
650 if (thisboard->has_ao_fifo) {
651 dev->write_subdev = s;
652 s->subdev_flags |= SDF_CMD_WRITE;
653 s->insn_write = cb_pcidas_ao_fifo_winsn;
654 s->do_cmdtest = cb_pcidas_ao_cmdtest;
655 s->do_cmd = cb_pcidas_ao_cmd;
656 s->cancel = cb_pcidas_ao_cancel;
658 s->insn_write = cb_pcidas_ao_nofifo_winsn;
661 s->type = COMEDI_SUBD_UNUSED;
665 s = dev->subdevices + 2;
666 subdev_8255_init(dev, s, NULL, devpriv->pacer_counter_dio + DIO_8255);
669 s = dev->subdevices + 3;
670 s->type = COMEDI_SUBD_MEMORY;
671 s->subdev_flags = SDF_READABLE | SDF_INTERNAL;
674 s->insn_read = eeprom_read_insn;
677 s = dev->subdevices + 4;
678 s->type = COMEDI_SUBD_CALIB;
679 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
680 s->n_chan = NUM_CHANNELS_8800;
682 s->insn_read = caldac_read_insn;
683 s->insn_write = caldac_write_insn;
684 for (i = 0; i < s->n_chan; i++)
685 caldac_8800_write(dev, i, s->maxdata / 2);
687 /* trim potentiometer */
688 s = dev->subdevices + 5;
689 s->type = COMEDI_SUBD_CALIB;
690 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
691 if (thisboard->trimpot == AD7376) {
692 s->n_chan = NUM_CHANNELS_7376;
695 s->n_chan = NUM_CHANNELS_8402;
698 s->insn_read = trimpot_read_insn;
699 s->insn_write = trimpot_write_insn;
700 for (i = 0; i < s->n_chan; i++)
701 cb_pcidas_trimpot_write(dev, i, s->maxdata / 2);
704 s = dev->subdevices + 6;
705 if (thisboard->has_dac08) {
706 s->type = COMEDI_SUBD_CALIB;
707 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
708 s->n_chan = NUM_CHANNELS_DAC08;
709 s->insn_read = dac08_read_insn;
710 s->insn_write = dac08_write_insn;
712 dac08_write(dev, s->maxdata / 2);
714 s->type = COMEDI_SUBD_UNUSED;
716 /* make sure mailbox 4 is empty */
717 inl(devpriv->s5933_config + AMCC_OP_REG_IMB4);
718 /* Set bits to enable incoming mailbox interrupts on amcc s5933. */
719 devpriv->s5933_intcsr_bits =
720 INTCSR_INBOX_BYTE(3) | INTCSR_INBOX_SELECT(3) |
721 INTCSR_INBOX_FULL_INT;
722 /* clear and enable interrupt on amcc s5933 */
723 outl(devpriv->s5933_intcsr_bits | INTCSR_INBOX_INTR_STATUS,
724 devpriv->s5933_config + AMCC_OP_REG_INTCSR);
729 static void cb_pcidas_detach(struct comedi_device *dev)
732 if (devpriv->s5933_config) {
733 outl(INTCSR_INBOX_INTR_STATUS,
734 devpriv->s5933_config + AMCC_OP_REG_INTCSR);
738 free_irq(dev->irq, dev);
740 subdev_8255_cleanup(dev, dev->subdevices + 2);
741 if (devpriv && devpriv->pci_dev) {
742 if (devpriv->s5933_config)
743 comedi_pci_disable(devpriv->pci_dev);
744 pci_dev_put(devpriv->pci_dev);
749 * "instructions" read/write data in "one-shot" or "software-triggered"
752 static int cb_pcidas_ai_rinsn(struct comedi_device *dev,
753 struct comedi_subdevice *s,
754 struct comedi_insn *insn, unsigned int *data)
758 static const int timeout = 10000;
760 /* enable calibration input if appropriate */
761 if (insn->chanspec & CR_ALT_SOURCE) {
762 outw(cal_enable_bits(dev),
763 devpriv->control_status + CALIBRATION_REG);
766 outw(0, devpriv->control_status + CALIBRATION_REG);
767 channel = CR_CHAN(insn->chanspec);
769 /* set mux limits and gain */
770 bits = BEGIN_SCAN(channel) |
771 END_SCAN(channel) | GAIN_BITS(CR_RANGE(insn->chanspec));
772 /* set unipolar/bipolar */
773 if (CR_RANGE(insn->chanspec) & IS_UNIPOLAR)
775 /* set singleended/differential */
776 if (CR_AREF(insn->chanspec) != AREF_DIFF)
778 outw(bits, devpriv->control_status + ADCMUX_CONT);
781 outw(0, devpriv->adc_fifo + ADCFIFOCLR);
783 /* convert n samples */
784 for (n = 0; n < insn->n; n++) {
785 /* trigger conversion */
786 outw(0, devpriv->adc_fifo + ADCDATA);
788 /* wait for conversion to end */
789 /* return -ETIMEDOUT if there is a timeout */
790 for (i = 0; i < timeout; i++) {
791 if (inw(devpriv->control_status + ADCMUX_CONT) & EOC)
798 data[n] = inw(devpriv->adc_fifo + ADCDATA);
801 /* return the number of samples read/written */
805 static int ai_config_calibration_source(struct comedi_device *dev,
808 static const int num_calibration_sources = 8;
809 unsigned int source = data[1];
811 if (source >= num_calibration_sources) {
812 dev_err(dev->hw_dev, "invalid calibration source: %i\n",
817 devpriv->calibration_source = source;
822 static int ai_config_insn(struct comedi_device *dev, struct comedi_subdevice *s,
823 struct comedi_insn *insn, unsigned int *data)
828 case INSN_CONFIG_ALT_SOURCE:
829 return ai_config_calibration_source(dev, data);
838 /* analog output insn for pcidas-1000 and 1200 series */
839 static int cb_pcidas_ao_nofifo_winsn(struct comedi_device *dev,
840 struct comedi_subdevice *s,
841 struct comedi_insn *insn,
847 /* set channel and range */
848 channel = CR_CHAN(insn->chanspec);
849 spin_lock_irqsave(&dev->spinlock, flags);
850 devpriv->ao_control_bits &=
851 ~DAC_MODE_UPDATE_BOTH & ~DAC_RANGE_MASK(channel);
852 devpriv->ao_control_bits |=
853 DACEN | DAC_RANGE(channel, CR_RANGE(insn->chanspec));
854 outw(devpriv->ao_control_bits, devpriv->control_status + DAC_CSR);
855 spin_unlock_irqrestore(&dev->spinlock, flags);
857 /* remember value for readback */
858 devpriv->ao_value[channel] = data[0];
860 outw(data[0], devpriv->ao_registers + DAC_DATA_REG(channel));
865 /* analog output insn for pcidas-1602 series */
866 static int cb_pcidas_ao_fifo_winsn(struct comedi_device *dev,
867 struct comedi_subdevice *s,
868 struct comedi_insn *insn, unsigned int *data)
874 outw(0, devpriv->ao_registers + DACFIFOCLR);
876 /* set channel and range */
877 channel = CR_CHAN(insn->chanspec);
878 spin_lock_irqsave(&dev->spinlock, flags);
879 devpriv->ao_control_bits &=
880 ~DAC_CHAN_EN(0) & ~DAC_CHAN_EN(1) & ~DAC_RANGE_MASK(channel) &
882 devpriv->ao_control_bits |=
883 DACEN | DAC_RANGE(channel,
885 chanspec)) | DAC_CHAN_EN(channel) |
887 outw(devpriv->ao_control_bits, devpriv->control_status + DAC_CSR);
888 spin_unlock_irqrestore(&dev->spinlock, flags);
890 /* remember value for readback */
891 devpriv->ao_value[channel] = data[0];
893 outw(data[0], devpriv->ao_registers + DACDATA);
898 /* analog output readback insn */
899 /* XXX loses track of analog output value back after an analog ouput command is executed */
900 static int cb_pcidas_ao_readback_insn(struct comedi_device *dev,
901 struct comedi_subdevice *s,
902 struct comedi_insn *insn,
905 data[0] = devpriv->ao_value[CR_CHAN(insn->chanspec)];
910 static int eeprom_read_insn(struct comedi_device *dev,
911 struct comedi_subdevice *s,
912 struct comedi_insn *insn, unsigned int *data)
917 retval = nvram_read(dev, CR_CHAN(insn->chanspec), &nvram_data);
921 data[0] = nvram_data;
926 static int caldac_write_insn(struct comedi_device *dev,
927 struct comedi_subdevice *s,
928 struct comedi_insn *insn, unsigned int *data)
930 const unsigned int channel = CR_CHAN(insn->chanspec);
932 return caldac_8800_write(dev, channel, data[0]);
935 static int caldac_read_insn(struct comedi_device *dev,
936 struct comedi_subdevice *s,
937 struct comedi_insn *insn, unsigned int *data)
939 data[0] = devpriv->caldac_value[CR_CHAN(insn->chanspec)];
944 /* 1602/16 pregain offset */
945 static int dac08_write(struct comedi_device *dev, unsigned int value)
947 if (devpriv->dac08_value == value)
950 devpriv->dac08_value = value;
952 outw(cal_enable_bits(dev) | (value & 0xff),
953 devpriv->control_status + CALIBRATION_REG);
955 outw(cal_enable_bits(dev) | SELECT_DAC08_BIT | (value & 0xff),
956 devpriv->control_status + CALIBRATION_REG);
958 outw(cal_enable_bits(dev) | (value & 0xff),
959 devpriv->control_status + CALIBRATION_REG);
965 static int dac08_write_insn(struct comedi_device *dev,
966 struct comedi_subdevice *s,
967 struct comedi_insn *insn, unsigned int *data)
969 return dac08_write(dev, data[0]);
972 static int dac08_read_insn(struct comedi_device *dev,
973 struct comedi_subdevice *s, struct comedi_insn *insn,
976 data[0] = devpriv->dac08_value;
981 static int cb_pcidas_trimpot_write(struct comedi_device *dev,
982 unsigned int channel, unsigned int value)
984 if (devpriv->trimpot_value[channel] == value)
987 devpriv->trimpot_value[channel] = value;
988 switch (thisboard->trimpot) {
990 trimpot_7376_write(dev, value);
993 trimpot_8402_write(dev, channel, value);
996 comedi_error(dev, "driver bug?");
1004 static int trimpot_write_insn(struct comedi_device *dev,
1005 struct comedi_subdevice *s,
1006 struct comedi_insn *insn, unsigned int *data)
1008 unsigned int channel = CR_CHAN(insn->chanspec);
1010 return cb_pcidas_trimpot_write(dev, channel, data[0]);
1013 static int trimpot_read_insn(struct comedi_device *dev,
1014 struct comedi_subdevice *s,
1015 struct comedi_insn *insn, unsigned int *data)
1017 unsigned int channel = CR_CHAN(insn->chanspec);
1019 data[0] = devpriv->trimpot_value[channel];
1024 static int cb_pcidas_ai_cmdtest(struct comedi_device *dev,
1025 struct comedi_subdevice *s,
1026 struct comedi_cmd *cmd)
1030 int i, gain, start_chan;
1032 /* cmdtest tests a particular command to see if it is valid.
1033 * Using the cmdtest ioctl, a user can create a valid cmd
1034 * and then have it executes by the cmd ioctl.
1036 * cmdtest returns 1,2,3,4 or 0, depending on which tests
1037 * the command passes. */
1039 /* step 1: make sure trigger sources are trivially valid */
1041 tmp = cmd->start_src;
1042 cmd->start_src &= TRIG_NOW | TRIG_EXT;
1043 if (!cmd->start_src || tmp != cmd->start_src)
1046 tmp = cmd->scan_begin_src;
1047 cmd->scan_begin_src &= TRIG_FOLLOW | TRIG_TIMER | TRIG_EXT;
1048 if (!cmd->scan_begin_src || tmp != cmd->scan_begin_src)
1051 tmp = cmd->convert_src;
1052 cmd->convert_src &= TRIG_TIMER | TRIG_NOW | TRIG_EXT;
1053 if (!cmd->convert_src || tmp != cmd->convert_src)
1056 tmp = cmd->scan_end_src;
1057 cmd->scan_end_src &= TRIG_COUNT;
1058 if (!cmd->scan_end_src || tmp != cmd->scan_end_src)
1061 tmp = cmd->stop_src;
1062 cmd->stop_src &= TRIG_COUNT | TRIG_NONE;
1063 if (!cmd->stop_src || tmp != cmd->stop_src)
1069 /* step 2: make sure trigger sources are unique and mutually compatible */
1071 if (cmd->start_src != TRIG_NOW && cmd->start_src != TRIG_EXT)
1073 if (cmd->scan_begin_src != TRIG_FOLLOW &&
1074 cmd->scan_begin_src != TRIG_TIMER &&
1075 cmd->scan_begin_src != TRIG_EXT)
1077 if (cmd->convert_src != TRIG_TIMER &&
1078 cmd->convert_src != TRIG_EXT && cmd->convert_src != TRIG_NOW)
1080 if (cmd->stop_src != TRIG_COUNT && cmd->stop_src != TRIG_NONE)
1083 /* make sure trigger sources are compatible with each other */
1084 if (cmd->scan_begin_src == TRIG_FOLLOW && cmd->convert_src == TRIG_NOW)
1086 if (cmd->scan_begin_src != TRIG_FOLLOW && cmd->convert_src != TRIG_NOW)
1088 if (cmd->start_src == TRIG_EXT &&
1089 (cmd->convert_src == TRIG_EXT || cmd->scan_begin_src == TRIG_EXT))
1095 /* step 3: make sure arguments are trivially compatible */
1097 switch (cmd->start_src) {
1099 /* External trigger, only CR_EDGE and CR_INVERT flags allowed */
1101 & (CR_FLAGS_MASK & ~(CR_EDGE | CR_INVERT))) != 0) {
1103 ~(CR_FLAGS_MASK & ~(CR_EDGE | CR_INVERT));
1106 if (!thisboard->has_ai_trig_invert &&
1107 (cmd->start_arg & CR_INVERT)) {
1108 cmd->start_arg &= (CR_FLAGS_MASK & ~CR_INVERT);
1113 if (cmd->start_arg != 0) {
1120 if (cmd->scan_begin_src == TRIG_TIMER) {
1121 if (cmd->scan_begin_arg <
1122 thisboard->ai_speed * cmd->chanlist_len) {
1123 cmd->scan_begin_arg =
1124 thisboard->ai_speed * cmd->chanlist_len;
1128 if (cmd->convert_src == TRIG_TIMER) {
1129 if (cmd->convert_arg < thisboard->ai_speed) {
1130 cmd->convert_arg = thisboard->ai_speed;
1135 if (cmd->scan_end_arg != cmd->chanlist_len) {
1136 cmd->scan_end_arg = cmd->chanlist_len;
1139 if (cmd->stop_src == TRIG_NONE) {
1141 if (cmd->stop_arg != 0) {
1150 /* step 4: fix up any arguments */
1152 if (cmd->scan_begin_src == TRIG_TIMER) {
1153 tmp = cmd->scan_begin_arg;
1154 i8253_cascade_ns_to_timer_2div(TIMER_BASE,
1155 &(devpriv->divisor1),
1156 &(devpriv->divisor2),
1157 &(cmd->scan_begin_arg),
1158 cmd->flags & TRIG_ROUND_MASK);
1159 if (tmp != cmd->scan_begin_arg)
1162 if (cmd->convert_src == TRIG_TIMER) {
1163 tmp = cmd->convert_arg;
1164 i8253_cascade_ns_to_timer_2div(TIMER_BASE,
1165 &(devpriv->divisor1),
1166 &(devpriv->divisor2),
1167 &(cmd->convert_arg),
1168 cmd->flags & TRIG_ROUND_MASK);
1169 if (tmp != cmd->convert_arg)
1176 /* check channel/gain list against card's limitations */
1177 if (cmd->chanlist) {
1178 gain = CR_RANGE(cmd->chanlist[0]);
1179 start_chan = CR_CHAN(cmd->chanlist[0]);
1180 for (i = 1; i < cmd->chanlist_len; i++) {
1181 if (CR_CHAN(cmd->chanlist[i]) !=
1182 (start_chan + i) % s->n_chan) {
1184 "entries in chanlist must be consecutive channels, counting upwards\n");
1187 if (CR_RANGE(cmd->chanlist[i]) != gain) {
1189 "entries in chanlist must all have the same gain\n");
1201 static int cb_pcidas_ai_cmd(struct comedi_device *dev,
1202 struct comedi_subdevice *s)
1204 struct comedi_async *async = s->async;
1205 struct comedi_cmd *cmd = &async->cmd;
1207 unsigned long flags;
1209 /* make sure CAL_EN_BIT is disabled */
1210 outw(0, devpriv->control_status + CALIBRATION_REG);
1211 /* initialize before settings pacer source and count values */
1212 outw(0, devpriv->control_status + TRIG_CONTSTAT);
1214 outw(0, devpriv->adc_fifo + ADCFIFOCLR);
1216 /* set mux limits, gain and pacer source */
1217 bits = BEGIN_SCAN(CR_CHAN(cmd->chanlist[0])) |
1218 END_SCAN(CR_CHAN(cmd->chanlist[cmd->chanlist_len - 1])) |
1219 GAIN_BITS(CR_RANGE(cmd->chanlist[0]));
1220 /* set unipolar/bipolar */
1221 if (CR_RANGE(cmd->chanlist[0]) & IS_UNIPOLAR)
1223 /* set singleended/differential */
1224 if (CR_AREF(cmd->chanlist[0]) != AREF_DIFF)
1226 /* set pacer source */
1227 if (cmd->convert_src == TRIG_EXT || cmd->scan_begin_src == TRIG_EXT)
1228 bits |= PACER_EXT_RISE;
1231 outw(bits, devpriv->control_status + ADCMUX_CONT);
1233 #ifdef CB_PCIDAS_DEBUG
1234 dev_dbg(dev->hw_dev, "comedi: sent 0x%x to adcmux control\n", bits);
1238 if (cmd->convert_src == TRIG_TIMER)
1239 cb_pcidas_load_counters(dev, &cmd->convert_arg,
1240 cmd->flags & TRIG_ROUND_MASK);
1241 else if (cmd->scan_begin_src == TRIG_TIMER)
1242 cb_pcidas_load_counters(dev, &cmd->scan_begin_arg,
1243 cmd->flags & TRIG_ROUND_MASK);
1245 /* set number of conversions */
1246 if (cmd->stop_src == TRIG_COUNT)
1247 devpriv->count = cmd->chanlist_len * cmd->stop_arg;
1248 /* enable interrupts */
1249 spin_lock_irqsave(&dev->spinlock, flags);
1250 devpriv->adc_fifo_bits |= INTE;
1251 devpriv->adc_fifo_bits &= ~INT_MASK;
1252 if (cmd->flags & TRIG_WAKE_EOS) {
1253 if (cmd->convert_src == TRIG_NOW && cmd->chanlist_len > 1)
1254 devpriv->adc_fifo_bits |= INT_EOS; /* interrupt end of burst */
1256 devpriv->adc_fifo_bits |= INT_FNE; /* interrupt fifo not empty */
1258 devpriv->adc_fifo_bits |= INT_FHF; /* interrupt fifo half full */
1260 #ifdef CB_PCIDAS_DEBUG
1261 dev_dbg(dev->hw_dev, "comedi: adc_fifo_bits are 0x%x\n",
1262 devpriv->adc_fifo_bits);
1264 /* enable (and clear) interrupts */
1265 outw(devpriv->adc_fifo_bits | EOAI | INT | LADFUL,
1266 devpriv->control_status + INT_ADCFIFO);
1267 spin_unlock_irqrestore(&dev->spinlock, flags);
1269 /* set start trigger and burst mode */
1271 if (cmd->start_src == TRIG_NOW)
1273 else if (cmd->start_src == TRIG_EXT) {
1274 bits |= EXT_TRIGGER | TGEN | XTRCL;
1275 if (thisboard->has_ai_trig_invert
1276 && (cmd->start_arg & CR_INVERT))
1278 if (thisboard->has_ai_trig_gated && (cmd->start_arg & CR_EDGE))
1281 comedi_error(dev, "bug!");
1284 if (cmd->convert_src == TRIG_NOW && cmd->chanlist_len > 1)
1286 outw(bits, devpriv->control_status + TRIG_CONTSTAT);
1287 #ifdef CB_PCIDAS_DEBUG
1288 dev_dbg(dev->hw_dev, "comedi: sent 0x%x to trig control\n", bits);
1294 static int cb_pcidas_ao_cmdtest(struct comedi_device *dev,
1295 struct comedi_subdevice *s,
1296 struct comedi_cmd *cmd)
1301 /* cmdtest tests a particular command to see if it is valid.
1302 * Using the cmdtest ioctl, a user can create a valid cmd
1303 * and then have it executes by the cmd ioctl.
1305 * cmdtest returns 1,2,3,4 or 0, depending on which tests
1306 * the command passes. */
1308 /* step 1: make sure trigger sources are trivially valid */
1310 tmp = cmd->start_src;
1311 cmd->start_src &= TRIG_INT;
1312 if (!cmd->start_src || tmp != cmd->start_src)
1315 tmp = cmd->scan_begin_src;
1316 cmd->scan_begin_src &= TRIG_TIMER | TRIG_EXT;
1317 if (!cmd->scan_begin_src || tmp != cmd->scan_begin_src)
1320 tmp = cmd->convert_src;
1321 cmd->convert_src &= TRIG_NOW;
1322 if (!cmd->convert_src || tmp != cmd->convert_src)
1325 tmp = cmd->scan_end_src;
1326 cmd->scan_end_src &= TRIG_COUNT;
1327 if (!cmd->scan_end_src || tmp != cmd->scan_end_src)
1330 tmp = cmd->stop_src;
1331 cmd->stop_src &= TRIG_COUNT | TRIG_NONE;
1332 if (!cmd->stop_src || tmp != cmd->stop_src)
1338 /* step 2: make sure trigger sources are unique and mutually compatible */
1340 if (cmd->scan_begin_src != TRIG_TIMER &&
1341 cmd->scan_begin_src != TRIG_EXT)
1343 if (cmd->stop_src != TRIG_COUNT && cmd->stop_src != TRIG_NONE)
1349 /* step 3: make sure arguments are trivially compatible */
1351 if (cmd->start_arg != 0) {
1356 if (cmd->scan_begin_src == TRIG_TIMER) {
1357 if (cmd->scan_begin_arg < thisboard->ao_scan_speed) {
1358 cmd->scan_begin_arg = thisboard->ao_scan_speed;
1363 if (cmd->scan_end_arg != cmd->chanlist_len) {
1364 cmd->scan_end_arg = cmd->chanlist_len;
1367 if (cmd->stop_src == TRIG_NONE) {
1369 if (cmd->stop_arg != 0) {
1378 /* step 4: fix up any arguments */
1380 if (cmd->scan_begin_src == TRIG_TIMER) {
1381 tmp = cmd->scan_begin_arg;
1382 i8253_cascade_ns_to_timer_2div(TIMER_BASE,
1383 &(devpriv->ao_divisor1),
1384 &(devpriv->ao_divisor2),
1385 &(cmd->scan_begin_arg),
1386 cmd->flags & TRIG_ROUND_MASK);
1387 if (tmp != cmd->scan_begin_arg)
1394 /* check channel/gain list against card's limitations */
1395 if (cmd->chanlist && cmd->chanlist_len > 1) {
1396 if (CR_CHAN(cmd->chanlist[0]) != 0 ||
1397 CR_CHAN(cmd->chanlist[1]) != 1) {
1399 "channels must be ordered channel 0, channel 1 in chanlist\n");
1410 static int cb_pcidas_ao_cmd(struct comedi_device *dev,
1411 struct comedi_subdevice *s)
1413 struct comedi_async *async = s->async;
1414 struct comedi_cmd *cmd = &async->cmd;
1416 unsigned long flags;
1418 /* set channel limits, gain */
1419 spin_lock_irqsave(&dev->spinlock, flags);
1420 for (i = 0; i < cmd->chanlist_len; i++) {
1421 /* enable channel */
1422 devpriv->ao_control_bits |=
1423 DAC_CHAN_EN(CR_CHAN(cmd->chanlist[i]));
1425 devpriv->ao_control_bits |= DAC_RANGE(CR_CHAN(cmd->chanlist[i]),
1430 /* disable analog out before settings pacer source and count values */
1431 outw(devpriv->ao_control_bits, devpriv->control_status + DAC_CSR);
1432 spin_unlock_irqrestore(&dev->spinlock, flags);
1435 outw(0, devpriv->ao_registers + DACFIFOCLR);
1438 if (cmd->scan_begin_src == TRIG_TIMER) {
1439 i8253_cascade_ns_to_timer_2div(TIMER_BASE,
1440 &(devpriv->ao_divisor1),
1441 &(devpriv->ao_divisor2),
1442 &(cmd->scan_begin_arg),
1445 /* Write the values of ctr1 and ctr2 into counters 1 and 2 */
1446 i8254_load(devpriv->pacer_counter_dio + DAC8254, 0, 1,
1447 devpriv->ao_divisor1, 2);
1448 i8254_load(devpriv->pacer_counter_dio + DAC8254, 0, 2,
1449 devpriv->ao_divisor2, 2);
1451 /* set number of conversions */
1452 if (cmd->stop_src == TRIG_COUNT)
1453 devpriv->ao_count = cmd->chanlist_len * cmd->stop_arg;
1454 /* set pacer source */
1455 spin_lock_irqsave(&dev->spinlock, flags);
1456 switch (cmd->scan_begin_src) {
1458 devpriv->ao_control_bits |= DAC_PACER_INT;
1461 devpriv->ao_control_bits |= DAC_PACER_EXT_RISE;
1464 spin_unlock_irqrestore(&dev->spinlock, flags);
1465 comedi_error(dev, "error setting dac pacer source");
1469 spin_unlock_irqrestore(&dev->spinlock, flags);
1471 async->inttrig = cb_pcidas_ao_inttrig;
1476 static int cb_pcidas_ao_inttrig(struct comedi_device *dev,
1477 struct comedi_subdevice *s,
1478 unsigned int trig_num)
1480 unsigned int num_bytes, num_points = thisboard->fifo_size;
1481 struct comedi_async *async = s->async;
1482 struct comedi_cmd *cmd = &s->async->cmd;
1483 unsigned long flags;
1489 if (cmd->stop_src == TRIG_COUNT && devpriv->ao_count < num_points)
1490 num_points = devpriv->ao_count;
1492 num_bytes = cfc_read_array_from_buffer(s, devpriv->ao_buffer,
1493 num_points * sizeof(short));
1494 num_points = num_bytes / sizeof(short);
1496 if (cmd->stop_src == TRIG_COUNT)
1497 devpriv->ao_count -= num_points;
1498 /* write data to board's fifo */
1499 outsw(devpriv->ao_registers + DACDATA, devpriv->ao_buffer, num_bytes);
1501 /* enable dac half-full and empty interrupts */
1502 spin_lock_irqsave(&dev->spinlock, flags);
1503 devpriv->adc_fifo_bits |= DAEMIE | DAHFIE;
1504 #ifdef CB_PCIDAS_DEBUG
1505 dev_dbg(dev->hw_dev, "comedi: adc_fifo_bits are 0x%x\n",
1506 devpriv->adc_fifo_bits);
1508 /* enable and clear interrupts */
1509 outw(devpriv->adc_fifo_bits | DAEMI | DAHFI,
1510 devpriv->control_status + INT_ADCFIFO);
1513 devpriv->ao_control_bits |= DAC_START | DACEN | DAC_EMPTY;
1514 outw(devpriv->ao_control_bits, devpriv->control_status + DAC_CSR);
1515 #ifdef CB_PCIDAS_DEBUG
1516 dev_dbg(dev->hw_dev, "comedi: sent 0x%x to dac control\n",
1517 devpriv->ao_control_bits);
1519 spin_unlock_irqrestore(&dev->spinlock, flags);
1521 async->inttrig = NULL;
1526 static irqreturn_t cb_pcidas_interrupt(int irq, void *d)
1528 struct comedi_device *dev = (struct comedi_device *)d;
1529 struct comedi_subdevice *s = dev->read_subdev;
1530 struct comedi_async *async;
1531 int status, s5933_status;
1532 int half_fifo = thisboard->fifo_size / 2;
1533 unsigned int num_samples, i;
1534 static const int timeout = 10000;
1535 unsigned long flags;
1537 if (dev->attached == 0)
1543 s5933_status = inl(devpriv->s5933_config + AMCC_OP_REG_INTCSR);
1544 #ifdef CB_PCIDAS_DEBUG
1545 dev_dbg(dev->hw_dev, "intcsr 0x%x\n", s5933_status);
1546 dev_dbg(dev->hw_dev, "mbef 0x%x\n",
1547 inl(devpriv->s5933_config + AMCC_OP_REG_MBEF));
1550 if ((INTCSR_INTR_ASSERTED & s5933_status) == 0)
1553 /* make sure mailbox 4 is empty */
1554 inl_p(devpriv->s5933_config + AMCC_OP_REG_IMB4);
1555 /* clear interrupt on amcc s5933 */
1556 outl(devpriv->s5933_intcsr_bits | INTCSR_INBOX_INTR_STATUS,
1557 devpriv->s5933_config + AMCC_OP_REG_INTCSR);
1559 status = inw(devpriv->control_status + INT_ADCFIFO);
1560 #ifdef CB_PCIDAS_DEBUG
1561 if ((status & (INT | EOAI | LADFUL | DAHFI | DAEMI)) == 0)
1562 comedi_error(dev, "spurious interrupt");
1565 /* check for analog output interrupt */
1566 if (status & (DAHFI | DAEMI))
1567 handle_ao_interrupt(dev, status);
1568 /* check for analog input interrupts */
1569 /* if fifo half-full */
1570 if (status & ADHFI) {
1572 num_samples = half_fifo;
1573 if (async->cmd.stop_src == TRIG_COUNT &&
1574 num_samples > devpriv->count) {
1575 num_samples = devpriv->count;
1577 insw(devpriv->adc_fifo + ADCDATA, devpriv->ai_buffer,
1579 cfc_write_array_to_buffer(s, devpriv->ai_buffer,
1580 num_samples * sizeof(short));
1581 devpriv->count -= num_samples;
1582 if (async->cmd.stop_src == TRIG_COUNT && devpriv->count == 0) {
1583 async->events |= COMEDI_CB_EOA;
1584 cb_pcidas_cancel(dev, s);
1586 /* clear half-full interrupt latch */
1587 spin_lock_irqsave(&dev->spinlock, flags);
1588 outw(devpriv->adc_fifo_bits | INT,
1589 devpriv->control_status + INT_ADCFIFO);
1590 spin_unlock_irqrestore(&dev->spinlock, flags);
1591 /* else if fifo not empty */
1592 } else if (status & (ADNEI | EOBI)) {
1593 for (i = 0; i < timeout; i++) {
1594 /* break if fifo is empty */
1595 if ((ADNE & inw(devpriv->control_status +
1598 cfc_write_to_buffer(s, inw(devpriv->adc_fifo));
1599 if (async->cmd.stop_src == TRIG_COUNT && --devpriv->count == 0) { /* end of acquisition */
1600 cb_pcidas_cancel(dev, s);
1601 async->events |= COMEDI_CB_EOA;
1605 /* clear not-empty interrupt latch */
1606 spin_lock_irqsave(&dev->spinlock, flags);
1607 outw(devpriv->adc_fifo_bits | INT,
1608 devpriv->control_status + INT_ADCFIFO);
1609 spin_unlock_irqrestore(&dev->spinlock, flags);
1610 } else if (status & EOAI) {
1612 "bug! encountered end of acquisition interrupt?");
1613 /* clear EOA interrupt latch */
1614 spin_lock_irqsave(&dev->spinlock, flags);
1615 outw(devpriv->adc_fifo_bits | EOAI,
1616 devpriv->control_status + INT_ADCFIFO);
1617 spin_unlock_irqrestore(&dev->spinlock, flags);
1619 /* check for fifo overflow */
1620 if (status & LADFUL) {
1621 comedi_error(dev, "fifo overflow");
1622 /* clear overflow interrupt latch */
1623 spin_lock_irqsave(&dev->spinlock, flags);
1624 outw(devpriv->adc_fifo_bits | LADFUL,
1625 devpriv->control_status + INT_ADCFIFO);
1626 spin_unlock_irqrestore(&dev->spinlock, flags);
1627 cb_pcidas_cancel(dev, s);
1628 async->events |= COMEDI_CB_EOA | COMEDI_CB_ERROR;
1631 comedi_event(dev, s);
1636 static void handle_ao_interrupt(struct comedi_device *dev, unsigned int status)
1638 struct comedi_subdevice *s = dev->write_subdev;
1639 struct comedi_async *async = s->async;
1640 struct comedi_cmd *cmd = &async->cmd;
1641 unsigned int half_fifo = thisboard->fifo_size / 2;
1642 unsigned int num_points;
1643 unsigned long flags;
1647 if (status & DAEMI) {
1648 /* clear dac empty interrupt latch */
1649 spin_lock_irqsave(&dev->spinlock, flags);
1650 outw(devpriv->adc_fifo_bits | DAEMI,
1651 devpriv->control_status + INT_ADCFIFO);
1652 spin_unlock_irqrestore(&dev->spinlock, flags);
1653 if (inw(devpriv->ao_registers + DAC_CSR) & DAC_EMPTY) {
1654 if (cmd->stop_src == TRIG_NONE ||
1655 (cmd->stop_src == TRIG_COUNT
1656 && devpriv->ao_count)) {
1657 comedi_error(dev, "dac fifo underflow");
1658 cb_pcidas_ao_cancel(dev, s);
1659 async->events |= COMEDI_CB_ERROR;
1661 async->events |= COMEDI_CB_EOA;
1663 } else if (status & DAHFI) {
1664 unsigned int num_bytes;
1666 /* figure out how many points we are writing to fifo */
1667 num_points = half_fifo;
1668 if (cmd->stop_src == TRIG_COUNT &&
1669 devpriv->ao_count < num_points)
1670 num_points = devpriv->ao_count;
1672 cfc_read_array_from_buffer(s, devpriv->ao_buffer,
1673 num_points * sizeof(short));
1674 num_points = num_bytes / sizeof(short);
1676 if (async->cmd.stop_src == TRIG_COUNT)
1677 devpriv->ao_count -= num_points;
1678 /* write data to board's fifo */
1679 outsw(devpriv->ao_registers + DACDATA, devpriv->ao_buffer,
1681 /* clear half-full interrupt latch */
1682 spin_lock_irqsave(&dev->spinlock, flags);
1683 outw(devpriv->adc_fifo_bits | DAHFI,
1684 devpriv->control_status + INT_ADCFIFO);
1685 spin_unlock_irqrestore(&dev->spinlock, flags);
1688 comedi_event(dev, s);
1691 /* cancel analog input command */
1692 static int cb_pcidas_cancel(struct comedi_device *dev,
1693 struct comedi_subdevice *s)
1695 unsigned long flags;
1697 spin_lock_irqsave(&dev->spinlock, flags);
1698 /* disable interrupts */
1699 devpriv->adc_fifo_bits &= ~INTE & ~EOAIE;
1700 outw(devpriv->adc_fifo_bits, devpriv->control_status + INT_ADCFIFO);
1701 spin_unlock_irqrestore(&dev->spinlock, flags);
1703 /* disable start trigger source and burst mode */
1704 outw(0, devpriv->control_status + TRIG_CONTSTAT);
1705 /* software pacer source */
1706 outw(0, devpriv->control_status + ADCMUX_CONT);
1711 /* cancel analog output command */
1712 static int cb_pcidas_ao_cancel(struct comedi_device *dev,
1713 struct comedi_subdevice *s)
1715 unsigned long flags;
1717 spin_lock_irqsave(&dev->spinlock, flags);
1718 /* disable interrupts */
1719 devpriv->adc_fifo_bits &= ~DAHFIE & ~DAEMIE;
1720 outw(devpriv->adc_fifo_bits, devpriv->control_status + INT_ADCFIFO);
1722 /* disable output */
1723 devpriv->ao_control_bits &= ~DACEN & ~DAC_PACER_MASK;
1724 outw(devpriv->ao_control_bits, devpriv->control_status + DAC_CSR);
1725 spin_unlock_irqrestore(&dev->spinlock, flags);
1730 static void cb_pcidas_load_counters(struct comedi_device *dev, unsigned int *ns,
1733 i8253_cascade_ns_to_timer_2div(TIMER_BASE, &(devpriv->divisor1),
1734 &(devpriv->divisor2), ns,
1735 rounding_flags & TRIG_ROUND_MASK);
1737 /* Write the values of ctr1 and ctr2 into counters 1 and 2 */
1738 i8254_load(devpriv->pacer_counter_dio + ADC8254, 0, 1,
1739 devpriv->divisor1, 2);
1740 i8254_load(devpriv->pacer_counter_dio + ADC8254, 0, 2,
1741 devpriv->divisor2, 2);
1744 static void write_calibration_bitstream(struct comedi_device *dev,
1745 unsigned int register_bits,
1746 unsigned int bitstream,
1747 unsigned int bitstream_length)
1749 static const int write_delay = 1;
1752 for (bit = 1 << (bitstream_length - 1); bit; bit >>= 1) {
1753 if (bitstream & bit)
1754 register_bits |= SERIAL_DATA_IN_BIT;
1756 register_bits &= ~SERIAL_DATA_IN_BIT;
1757 udelay(write_delay);
1758 outw(register_bits, devpriv->control_status + CALIBRATION_REG);
1762 static int caldac_8800_write(struct comedi_device *dev, unsigned int address,
1765 static const int num_caldac_channels = 8;
1766 static const int bitstream_length = 11;
1767 unsigned int bitstream = ((address & 0x7) << 8) | value;
1768 static const int caldac_8800_udelay = 1;
1770 if (address >= num_caldac_channels) {
1771 comedi_error(dev, "illegal caldac channel");
1775 if (value == devpriv->caldac_value[address])
1778 devpriv->caldac_value[address] = value;
1780 write_calibration_bitstream(dev, cal_enable_bits(dev), bitstream,
1783 udelay(caldac_8800_udelay);
1784 outw(cal_enable_bits(dev) | SELECT_8800_BIT,
1785 devpriv->control_status + CALIBRATION_REG);
1786 udelay(caldac_8800_udelay);
1787 outw(cal_enable_bits(dev), devpriv->control_status + CALIBRATION_REG);
1792 static int trimpot_7376_write(struct comedi_device *dev, uint8_t value)
1794 static const int bitstream_length = 7;
1795 unsigned int bitstream = value & 0x7f;
1796 unsigned int register_bits;
1797 static const int ad7376_udelay = 1;
1799 register_bits = cal_enable_bits(dev) | SELECT_TRIMPOT_BIT;
1800 udelay(ad7376_udelay);
1801 outw(register_bits, devpriv->control_status + CALIBRATION_REG);
1803 write_calibration_bitstream(dev, register_bits, bitstream,
1806 udelay(ad7376_udelay);
1807 outw(cal_enable_bits(dev), devpriv->control_status + CALIBRATION_REG);
1814 * ch 1 : adc postgain offset */
1815 static int trimpot_8402_write(struct comedi_device *dev, unsigned int channel,
1818 static const int bitstream_length = 10;
1819 unsigned int bitstream = ((channel & 0x3) << 8) | (value & 0xff);
1820 unsigned int register_bits;
1821 static const int ad8402_udelay = 1;
1823 register_bits = cal_enable_bits(dev) | SELECT_TRIMPOT_BIT;
1824 udelay(ad8402_udelay);
1825 outw(register_bits, devpriv->control_status + CALIBRATION_REG);
1827 write_calibration_bitstream(dev, register_bits, bitstream,
1830 udelay(ad8402_udelay);
1831 outw(cal_enable_bits(dev), devpriv->control_status + CALIBRATION_REG);
1836 static int wait_for_nvram_ready(unsigned long s5933_base_addr)
1838 static const int timeout = 1000;
1841 for (i = 0; i < timeout; i++) {
1842 if ((inb(s5933_base_addr +
1843 AMCC_OP_REG_MCSR_NVCMD) & MCSR_NV_BUSY)
1851 static int nvram_read(struct comedi_device *dev, unsigned int address,
1854 unsigned long iobase = devpriv->s5933_config;
1856 if (wait_for_nvram_ready(iobase) < 0)
1859 outb(MCSR_NV_ENABLE | MCSR_NV_LOAD_LOW_ADDR,
1860 iobase + AMCC_OP_REG_MCSR_NVCMD);
1861 outb(address & 0xff, iobase + AMCC_OP_REG_MCSR_NVDATA);
1862 outb(MCSR_NV_ENABLE | MCSR_NV_LOAD_HIGH_ADDR,
1863 iobase + AMCC_OP_REG_MCSR_NVCMD);
1864 outb((address >> 8) & 0xff, iobase + AMCC_OP_REG_MCSR_NVDATA);
1865 outb(MCSR_NV_ENABLE | MCSR_NV_READ, iobase + AMCC_OP_REG_MCSR_NVCMD);
1867 if (wait_for_nvram_ready(iobase) < 0)
1870 *data = inb(iobase + AMCC_OP_REG_MCSR_NVDATA);
1875 static struct comedi_driver cb_pcidas_driver = {
1876 .driver_name = "cb_pcidas",
1877 .module = THIS_MODULE,
1878 .attach = cb_pcidas_attach,
1879 .detach = cb_pcidas_detach,
1882 static int __devinit cb_pcidas_pci_probe(struct pci_dev *dev,
1883 const struct pci_device_id *ent)
1885 return comedi_pci_auto_config(dev, &cb_pcidas_driver);
1888 static void __devexit cb_pcidas_pci_remove(struct pci_dev *dev)
1890 comedi_pci_auto_unconfig(dev);
1893 static DEFINE_PCI_DEVICE_TABLE(cb_pcidas_pci_table) = {
1894 { PCI_DEVICE(PCI_VENDOR_ID_CB, 0x0001) },
1895 { PCI_DEVICE(PCI_VENDOR_ID_CB, 0x000f) },
1896 { PCI_DEVICE(PCI_VENDOR_ID_CB, 0x0010) },
1897 { PCI_DEVICE(PCI_VENDOR_ID_CB, 0x0019) },
1898 { PCI_DEVICE(PCI_VENDOR_ID_CB, 0x001c) },
1899 { PCI_DEVICE(PCI_VENDOR_ID_CB, 0x004c) },
1900 { PCI_DEVICE(PCI_VENDOR_ID_CB, 0x001a) },
1901 { PCI_DEVICE(PCI_VENDOR_ID_CB, 0x001b) },
1904 MODULE_DEVICE_TABLE(pci, cb_pcidas_pci_table);
1906 static struct pci_driver cb_pcidas_pci_driver = {
1907 .name = "cb_pcidas",
1908 .id_table = cb_pcidas_pci_table,
1909 .probe = cb_pcidas_pci_probe,
1910 .remove = __devexit_p(cb_pcidas_pci_remove)
1912 module_comedi_pci_driver(cb_pcidas_driver, cb_pcidas_pci_driver);
1914 MODULE_AUTHOR("Comedi http://www.comedi.org");
1915 MODULE_DESCRIPTION("Comedi low-level driver");
1916 MODULE_LICENSE("GPL");