3 * Copyright (C) 2004,2005 ADDI-DATA GmbH for the source code of this module.
4 * Project manager: Eric Stolz
9 * Tel: +19(0)7223/9493-0
10 * Fax: +49(0)7223/9493-92
11 * http://www.addi-data.com
14 * This program is free software; you can redistribute it and/or modify it
15 * under the terms of the GNU General Public License as published by the
16 * Free Software Foundation; either version 2 of the License, or (at your
17 * option) any later version.
19 * This program is distributed in the hope that it will be useful, but WITHOUT
20 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
21 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
24 * You should have received a copy of the GNU General Public License along with
25 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
26 * Place, Suite 330, Boston, MA 02111-1307 USA
28 * You should also find the complete GPL in the COPYING file accompanying this
32 #include <linux/pci.h>
33 #include <linux/interrupt.h>
35 #include "../comedidev.h"
36 #include "comedi_fc.h"
37 #include "amcc_s5933.h"
42 #define APCI1032_DI_REG 0x00
43 #define APCI1032_MODE1_REG 0x04
44 #define APCI1032_MODE2_REG 0x08
45 #define APCI1032_STATUS_REG 0x0c
46 #define APCI1032_CTRL_REG 0x10
47 #define APCI1032_CTRL_INT_OR (0 << 1)
48 #define APCI1032_CTRL_INT_AND (1 << 1)
49 #define APCI1032_CTRL_INT_ENA (1 << 2)
51 struct apci1032_private {
52 unsigned long amcc_iobase; /* base of AMCC I/O registers */
53 unsigned int mode1; /* rising-edge/high level channels */
54 unsigned int mode2; /* falling-edge/low level channels */
55 unsigned int ctrl; /* interrupt mode OR (edge) . AND (level) */
58 static int apci1032_reset(struct comedi_device *dev)
60 /* disable the interrupts */
61 outl(0x0, dev->iobase + APCI1032_CTRL_REG);
62 /* Reset the interrupt status register */
63 inl(dev->iobase + APCI1032_STATUS_REG);
64 /* Disable the and/or interrupt */
65 outl(0x0, dev->iobase + APCI1032_MODE1_REG);
66 outl(0x0, dev->iobase + APCI1032_MODE2_REG);
72 * Change-Of-State (COS) interrupt configuration
74 * Channels 0 to 15 are interruptible. These channels can be configured
75 * to generate interrupts based on AND/OR logic for the desired channels.
78 * - reacts to rising or falling edges
79 * - interrupt is generated when any enabled channel
80 * meet the desired interrupt condition
83 * - reacts to changes in level of the selected inputs
84 * - interrupt is generated when all enabled channels
85 * meet the desired interrupt condition
86 * - after an interrupt, a change in level must occur on
87 * the selected inputs to release the IRQ logic
89 * The COS interrupt must be configured before it can be enabled.
91 * data[0] : INSN_CONFIG_DIGITAL_TRIG
92 * data[1] : trigger number (= 0)
93 * data[2] : configuration operation:
94 * COMEDI_DIGITAL_TRIG_DISABLE = no interrupts
95 * COMEDI_DIGITAL_TRIG_ENABLE_EDGES = OR (edge) interrupts
96 * COMEDI_DIGITAL_TRIG_ENABLE_LEVELS = AND (level) interrupts
97 * data[3] : left-shift for data[4] and data[5]
98 * data[4] : rising-edge/high level channels
99 * data[5] : falling-edge/low level channels
101 static int apci1032_cos_insn_config(struct comedi_device *dev,
102 struct comedi_subdevice *s,
103 struct comedi_insn *insn,
106 struct apci1032_private *devpriv = dev->private;
107 unsigned int shift, oldmask;
110 case INSN_CONFIG_DIGITAL_TRIG:
114 oldmask = (1U << shift) - 1;
116 case COMEDI_DIGITAL_TRIG_DISABLE:
122 case COMEDI_DIGITAL_TRIG_ENABLE_EDGES:
123 if (devpriv->ctrl != (APCI1032_CTRL_INT_ENA |
124 APCI1032_CTRL_INT_OR)) {
125 /* switching to 'OR' mode */
126 devpriv->ctrl = APCI1032_CTRL_INT_ENA |
127 APCI1032_CTRL_INT_OR;
128 /* wipe old channels */
132 /* preserve unspecified channels */
133 devpriv->mode1 &= oldmask;
134 devpriv->mode2 &= oldmask;
136 /* configure specified channels */
137 devpriv->mode1 |= data[4] << shift;
138 devpriv->mode2 |= data[5] << shift;
140 case COMEDI_DIGITAL_TRIG_ENABLE_LEVELS:
141 if (devpriv->ctrl != (APCI1032_CTRL_INT_ENA |
142 APCI1032_CTRL_INT_AND)) {
143 /* switching to 'AND' mode */
144 devpriv->ctrl = APCI1032_CTRL_INT_ENA |
145 APCI1032_CTRL_INT_AND;
146 /* wipe old channels */
150 /* preserve unspecified channels */
151 devpriv->mode1 &= oldmask;
152 devpriv->mode2 &= oldmask;
154 /* configure specified channels */
155 devpriv->mode1 |= data[4] << shift;
156 devpriv->mode2 |= data[5] << shift;
169 static int apci1032_cos_insn_bits(struct comedi_device *dev,
170 struct comedi_subdevice *s,
171 struct comedi_insn *insn,
179 static int apci1032_cos_cmdtest(struct comedi_device *dev,
180 struct comedi_subdevice *s,
181 struct comedi_cmd *cmd)
185 /* Step 1 : check if triggers are trivially valid */
187 err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW);
188 err |= cfc_check_trigger_src(&cmd->scan_begin_src, TRIG_EXT);
189 err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_FOLLOW);
190 err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
191 err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_NONE);
196 /* Step 2a : make sure trigger sources are unique */
197 /* Step 2b : and mutually compatible */
202 /* Step 3: check if arguments are trivially valid */
204 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
205 err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
206 err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
207 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, 1);
208 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
213 /* step 4: ignored */
222 * Change-Of-State (COS) 'do_cmd' operation
224 * Enable the COS interrupt as configured by apci1032_cos_insn_config().
226 static int apci1032_cos_cmd(struct comedi_device *dev,
227 struct comedi_subdevice *s)
229 struct apci1032_private *devpriv = dev->private;
231 if (!devpriv->ctrl) {
232 dev_warn(dev->class_dev,
233 "Interrupts disabled due to mode configuration!\n");
237 outl(devpriv->mode1, dev->iobase + APCI1032_MODE1_REG);
238 outl(devpriv->mode2, dev->iobase + APCI1032_MODE2_REG);
239 outl(devpriv->ctrl, dev->iobase + APCI1032_CTRL_REG);
244 static int apci1032_cos_cancel(struct comedi_device *dev,
245 struct comedi_subdevice *s)
247 return apci1032_reset(dev);
250 static irqreturn_t apci1032_interrupt(int irq, void *d)
252 struct comedi_device *dev = d;
253 struct apci1032_private *devpriv = dev->private;
254 struct comedi_subdevice *s = dev->read_subdev;
257 /* check interrupt is from this device */
258 if ((inl(devpriv->amcc_iobase + AMCC_OP_REG_INTCSR) &
259 INTCSR_INTR_ASSERTED) == 0)
262 /* check interrupt is enabled */
263 ctrl = inl(dev->iobase + APCI1032_CTRL_REG);
264 if ((ctrl & APCI1032_CTRL_INT_ENA) == 0)
267 /* disable the interrupt */
268 outl(ctrl & ~APCI1032_CTRL_INT_ENA, dev->iobase + APCI1032_CTRL_REG);
270 s->state = inl(dev->iobase + APCI1032_STATUS_REG) & 0xffff;
271 comedi_buf_put(s->async, s->state);
272 s->async->events |= COMEDI_CB_BLOCK | COMEDI_CB_EOS;
273 comedi_event(dev, s);
275 /* enable the interrupt */
276 outl(ctrl, dev->iobase + APCI1032_CTRL_REG);
281 static int apci1032_di_insn_bits(struct comedi_device *dev,
282 struct comedi_subdevice *s,
283 struct comedi_insn *insn,
286 data[1] = inl(dev->iobase + APCI1032_DI_REG);
291 static int apci1032_auto_attach(struct comedi_device *dev,
292 unsigned long context_unused)
294 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
295 struct apci1032_private *devpriv;
296 struct comedi_subdevice *s;
299 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
302 dev->private = devpriv;
304 ret = comedi_pci_enable(dev);
308 devpriv->amcc_iobase = pci_resource_start(pcidev, 0);
309 dev->iobase = pci_resource_start(pcidev, 1);
311 if (pcidev->irq > 0) {
312 ret = request_irq(pcidev->irq, apci1032_interrupt, IRQF_SHARED,
313 dev->board_name, dev);
315 dev->irq = pcidev->irq;
318 ret = comedi_alloc_subdevices(dev, 2);
322 /* Allocate and Initialise DI Subdevice Structures */
323 s = &dev->subdevices[0];
324 s->type = COMEDI_SUBD_DI;
325 s->subdev_flags = SDF_READABLE;
328 s->range_table = &range_digital;
329 s->insn_bits = apci1032_di_insn_bits;
331 /* Change-Of-State (COS) interrupt subdevice */
332 s = &dev->subdevices[1];
334 dev->read_subdev = s;
335 s->type = COMEDI_SUBD_DI | SDF_CMD_READ;
336 s->subdev_flags = SDF_READABLE;
339 s->range_table = &range_digital;
340 s->insn_config = apci1032_cos_insn_config;
341 s->insn_bits = apci1032_cos_insn_bits;
342 s->do_cmdtest = apci1032_cos_cmdtest;
343 s->do_cmd = apci1032_cos_cmd;
344 s->cancel = apci1032_cos_cancel;
346 s->type = COMEDI_SUBD_UNUSED;
352 static void apci1032_detach(struct comedi_device *dev)
357 free_irq(dev->irq, dev);
358 comedi_pci_disable(dev);
361 static struct comedi_driver apci1032_driver = {
362 .driver_name = "addi_apci_1032",
363 .module = THIS_MODULE,
364 .auto_attach = apci1032_auto_attach,
365 .detach = apci1032_detach,
368 static int apci1032_pci_probe(struct pci_dev *dev,
369 const struct pci_device_id *id)
371 return comedi_pci_auto_config(dev, &apci1032_driver, id->driver_data);
374 static DEFINE_PCI_DEVICE_TABLE(apci1032_pci_table) = {
375 { PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x1003) },
378 MODULE_DEVICE_TABLE(pci, apci1032_pci_table);
380 static struct pci_driver apci1032_pci_driver = {
381 .name = "addi_apci_1032",
382 .id_table = apci1032_pci_table,
383 .probe = apci1032_pci_probe,
384 .remove = comedi_pci_auto_unconfig,
386 module_comedi_pci_driver(apci1032_driver, apci1032_pci_driver);
388 MODULE_AUTHOR("Comedi http://www.comedi.org");
389 MODULE_DESCRIPTION("Comedi low-level driver");
390 MODULE_LICENSE("GPL");