drivers/soc/rockchip/rk_fiq_debugger.c

   1 /*
   2  * drivers/soc/rockchip/rk_fiq_debugger.c
   3  *
   4  * Serial Debugger Interface for Rockchip
   5  *
   6  * Copyright (C) 2012 ROCKCHIP, Inc.
   7  * Copyright (C) 2008 Google, Inc.
   8  *
   9  * This software is licensed under the terms of the GNU General Public
  10  * License version 2, as published by the Free Software Foundation, and
  11  * may be copied, distributed, and modified under those terms.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  */
  18
  19 #include <stdarg.h>
  20 #include <linux/cpu.h>
  21 #include <linux/cpu_pm.h>
  22 #include <linux/module.h>
  23 #include <linux/io.h>
  24 #include <linux/of.h>
  25 #include <linux/of_address.h>
  26 #include <linux/of_irq.h>
  27 #include <linux/interrupt.h>
  28 #include <linux/clk.h>
  29 #include <linux/platform_device.h>
  30 #include <linux/irq.h>
  31 #include <linux/serial_reg.h>
  32 #include <linux/slab.h>
  33 #include <linux/stacktrace.h>
  34 #include <linux/uaccess.h>
  35 #include <linux/kfifo.h>
  36 #include <linux/kthread.h>
  37 #include <linux/sched/rt.h>
  38 #include <../drivers/staging/android/fiq_debugger/fiq_debugger.h>
  39 #include <linux/irqchip/arm-gic.h>
  40 #include <linux/clk.h>
  41 #include <linux/delay.h>
  42 #include <linux/soc/rockchip/rk_fiq_debugger.h>
  43
  44 #ifdef CONFIG_FIQ_DEBUGGER_TRUST_ZONE
  45 #include <linux/rockchip/rockchip_sip.h>
  46 #endif
  47
  48 #define UART_USR        0x1f    /* In: UART Status Register */
  49 #define UART_USR_RX_FIFO_FULL           0x10 /* Receive FIFO full */
  50 #define UART_USR_RX_FIFO_NOT_EMPTY      0x08 /* Receive FIFO not empty */
  51 #define UART_USR_TX_FIFO_EMPTY          0x04 /* Transmit FIFO empty */
  52 #define UART_USR_TX_FIFO_NOT_FULL       0x02 /* Transmit FIFO not full */
  53 #define UART_USR_BUSY                   0x01 /* UART busy indicator */
  54 #define UART_SRR                        0x22 /* software reset register */
  55
  56 struct rk_fiq_debugger {
  57         int irq;
  58         int baudrate;
  59         struct fiq_debugger_pdata pdata;
  60         void __iomem *debug_port_base;
  61         bool break_seen;
  62 #ifdef CONFIG_RK_CONSOLE_THREAD
  63         struct task_struct *console_task;
  64 #endif
  65 };
  66
  67 static int rk_fiq_debugger_id;
  68 static int serial_hwirq;
  69
  70 #ifdef CONFIG_FIQ_DEBUGGER_TRUST_ZONE
  71 static bool tf_fiq_sup;
  72 #endif
  73
  74 static inline void rk_fiq_write(struct rk_fiq_debugger *t,
  75         unsigned int val, unsigned int off)
  76 {
  77         __raw_writel(val, t->debug_port_base + off * 4);
  78 }
  79
  80 static inline unsigned int rk_fiq_read(struct rk_fiq_debugger *t,
  81         unsigned int off)
  82 {
  83         return __raw_readl(t->debug_port_base + off * 4);
  84 }
  85
  86 static inline unsigned int rk_fiq_read_lsr(struct rk_fiq_debugger *t)
  87 {
  88         unsigned int lsr;
  89
  90         lsr = rk_fiq_read(t, UART_LSR);
  91         if (lsr & UART_LSR_BI)
  92                 t->break_seen = true;
  93
  94         return lsr;
  95 }
  96
  97 static int debug_port_init(struct platform_device *pdev)
  98 {
  99         int dll = 0, dlm = 0;
 100         struct rk_fiq_debugger *t;
 101
 102         t = container_of(dev_get_platdata(&pdev->dev), typeof(*t), pdata);
 103
 104         if (rk_fiq_read(t, UART_LSR) & UART_LSR_DR)
 105                 (void)rk_fiq_read(t, UART_RX);
 106
 107         switch (t->baudrate) {
 108         case 1500000:
 109                 dll = 0x1;
 110                 break;
 111         case 115200:
 112         default:
 113                 dll = 0xd;
 114                 break;
 115         }
 116         /* reset uart */
 117         rk_fiq_write(t, 0x07, UART_SRR);
 118         udelay(10);
 119         /* set uart to loop back mode */
 120         rk_fiq_write(t, 0x10, UART_MCR);
 121
 122         rk_fiq_write(t, 0x83, UART_LCR);
 123         /* set baud rate */
 124         rk_fiq_write(t, dll, UART_DLL);
 125         rk_fiq_write(t, dlm, UART_DLM);
 126         rk_fiq_write(t, 0x03, UART_LCR);
 127
 128         /* enable rx and lsr interrupt */
 129         rk_fiq_write(t, UART_IER_RLSI | UART_IER_RDI, UART_IER);
 130         /* interrupt on every character when receive,but we can enable fifo for TX
 131         I found that if we enable the RX fifo, some problem may vanish such as when
 132         you continuously input characters in the command line the uart irq may be disable
 133         because of the uart irq is served when CPU is at IRQ exception,but it is
 134         found unregistered, so it is disable.
 135         hhb@rock-chips.com */
 136         rk_fiq_write(t, 0xc1, UART_FCR);
 137         rk_fiq_write(t, 0x0, UART_MCR);
 138
 139         return 0;
 140 }
 141
 142 static int debug_getc(struct platform_device *pdev)
 143 {
 144         unsigned int lsr;
 145         struct rk_fiq_debugger *t;
 146         unsigned int temp;
 147         static unsigned int n;
 148         static char buf[32];
 149
 150         t = container_of(dev_get_platdata(&pdev->dev), typeof(*t), pdata);
 151
 152         lsr = rk_fiq_read_lsr(t);
 153
 154         if (lsr & UART_LSR_BI || t->break_seen) {
 155                 t->break_seen = false;
 156                 return FIQ_DEBUGGER_NO_CHAR;
 157         }
 158
 159         if (lsr & UART_LSR_DR) {
 160                 temp = rk_fiq_read(t, UART_RX);
 161                 buf[n & 0x1f] = temp;
 162                 n++;
 163                 if (temp == 'q' && n > 2) {
 164                         if ((buf[(n - 2) & 0x1f] == 'i') &&
 165                             (buf[(n - 3) & 0x1f] == 'f'))
 166                                 return FIQ_DEBUGGER_BREAK;
 167                         else
 168                                 return temp;
 169                 } else {
 170                         return temp;
 171                 }
 172         }
 173
 174         return FIQ_DEBUGGER_NO_CHAR;
 175 }
 176
 177 static void debug_putc(struct platform_device *pdev, unsigned int c)
 178 {
 179         struct rk_fiq_debugger *t;
 180
 181         t = container_of(dev_get_platdata(&pdev->dev), typeof(*t), pdata);
 182
 183         while (!(rk_fiq_read(t, UART_USR) & UART_USR_TX_FIFO_NOT_FULL))
 184                 cpu_relax();
 185         rk_fiq_write(t, c, UART_TX);
 186 }
 187
 188 static void debug_flush(struct platform_device *pdev)
 189 {
 190         struct rk_fiq_debugger *t;
 191         t = container_of(dev_get_platdata(&pdev->dev), typeof(*t), pdata);
 192
 193         while (!(rk_fiq_read_lsr(t) & UART_LSR_TEMT))
 194                 cpu_relax();
 195 }
 196
 197 static int uart_dev_resume(struct platform_device *pdev)
 198 {
 199         debug_port_init(pdev);
 200         return 0;
 201 }
 202
 203 #ifdef CONFIG_RK_CONSOLE_THREAD
 204 #define FIFO_SIZE SZ_64K
 205 static DEFINE_KFIFO(fifo, unsigned char, FIFO_SIZE);
 206 static bool console_thread_stop;
 207
 208 static int console_thread(void *data)
 209 {
 210         struct platform_device *pdev = data;
 211         struct rk_fiq_debugger *t;
 212         unsigned char c;
 213         t = container_of(dev_get_platdata(&pdev->dev), typeof(*t), pdata);
 214
 215         while (1) {
 216                 set_current_state(TASK_INTERRUPTIBLE);
 217                 schedule();
 218                 if (kthread_should_stop())
 219                         break;
 220                 set_current_state(TASK_RUNNING);
 221                 while (!console_thread_stop && kfifo_get(&fifo, &c))
 222                         debug_putc(pdev, c);
 223                 if (!console_thread_stop)
 224                         debug_flush(pdev);
 225         }
 226
 227         return 0;
 228 }
 229
 230 static void console_write(struct platform_device *pdev, const char *s, unsigned int count)
 231 {
 232         unsigned int fifo_count = FIFO_SIZE;
 233         unsigned char c, r = '\r';
 234         struct rk_fiq_debugger *t;
 235         t = container_of(dev_get_platdata(&pdev->dev), typeof(*t), pdata);
 236
 237         if (console_thread_stop ||
 238             oops_in_progress ||
 239             system_state == SYSTEM_HALT ||
 240             system_state == SYSTEM_POWER_OFF ||
 241             system_state == SYSTEM_RESTART) {
 242                 if (!console_thread_stop) {
 243                         console_thread_stop = true;
 244                         smp_wmb();
 245                         debug_flush(pdev);
 246                         while (fifo_count-- && kfifo_get(&fifo, &c))
 247                                 debug_putc(pdev, c);
 248                 }
 249                 while (count--) {
 250                         if (*s == '\n') {
 251                                 debug_putc(pdev, r);
 252                         }
 253                         debug_putc(pdev, *s++);
 254                 }
 255                 debug_flush(pdev);
 256         } else {
 257                 while (count--) {
 258                         if (*s == '\n') {
 259                                 kfifo_put(&fifo, r);
 260                         }
 261                         kfifo_put(&fifo, *s++);
 262                 }
 263                 wake_up_process(t->console_task);
 264         }
 265 }
 266 #endif
 267
 268
 269 static void fiq_enable(struct platform_device *pdev, unsigned int irq, bool on)
 270 {
 271         if (on)
 272                 enable_irq(irq);
 273         else
 274                 disable_irq(irq);
 275 }
 276
 277 #ifdef CONFIG_FIQ_DEBUGGER_TRUST_ZONE
 278 static struct pt_regs fiq_pt_regs;
 279
 280 static void rk_fiq_debugger_switch_cpu(struct platform_device *pdev,
 281                                        unsigned int cpu)
 282 {
 283         sip_fiq_debugger_switch_cpu(cpu);
 284 }
 285
 286 static void rk_fiq_debugger_enable_debug(struct platform_device *pdev, bool val)
 287 {
 288         sip_fiq_debugger_enable_debug(val);
 289 }
 290
 291 static void fiq_debugger_uart_irq_tf(struct pt_regs _pt_regs, u64 cpu)
 292 {
 293         fiq_pt_regs = _pt_regs;
 294
 295         fiq_debugger_fiq(&fiq_pt_regs, cpu);
 296 }
 297
 298 static int rk_fiq_debugger_uart_dev_resume(struct platform_device *pdev)
 299 {
 300         struct rk_fiq_debugger *t;
 301
 302         t = container_of(dev_get_platdata(&pdev->dev), typeof(*t), pdata);
 303         sip_fiq_debugger_uart_irq_tf_init(serial_hwirq,
 304                                           fiq_debugger_uart_irq_tf);
 305         return 0;
 306 }
 307
 308 static int fiq_debugger_cpu_resume_fiq(struct notifier_block *nb,
 309                                        unsigned long action, void *hcpu)
 310 {
 311         switch (action) {
 312         case CPU_PM_EXIT:
 313                 if ((sip_fiq_debugger_is_enabled()) &&
 314                     (sip_fiq_debugger_get_target_cpu() == smp_processor_id()))
 315                         sip_fiq_debugger_enable_fiq(true, smp_processor_id());
 316                 break;
 317         default:
 318                 break;
 319         }
 320
 321         return NOTIFY_OK;
 322 }
 323
 324 static int fiq_debugger_cpu_migrate_fiq(struct notifier_block *nb,
 325                                         unsigned long action, void *hcpu)
 326 {
 327         int target_cpu, cpu = (long)hcpu;
 328
 329         switch (action) {
 330         case CPU_DEAD:
 331                 if ((sip_fiq_debugger_is_enabled()) &&
 332                     (sip_fiq_debugger_get_target_cpu() == cpu)) {
 333                         target_cpu = cpumask_first(cpu_online_mask);
 334                         sip_fiq_debugger_switch_cpu(target_cpu);
 335                 }
 336                 break;
 337         default:
 338                 break;
 339         }
 340
 341         return NOTIFY_OK;
 342 }
 343
 344 static struct notifier_block fiq_debugger_pm_notifier = {
 345         .notifier_call = fiq_debugger_cpu_resume_fiq,
 346         .priority = 100,
 347 };
 348
 349 static struct notifier_block fiq_debugger_cpu_notifier = {
 350         .notifier_call = fiq_debugger_cpu_migrate_fiq,
 351         .priority = 100,
 352 };
 353
 354 static int rk_fiq_debugger_register_cpu_pm_notify(void)
 355 {
 356         int err;
 357
 358         err = register_cpu_notifier(&fiq_debugger_cpu_notifier);
 359         if (err) {
 360                 pr_err("fiq debugger register cpu notifier failed!\n");
 361                 return err;
 362         }
 363
 364         err = cpu_pm_register_notifier(&fiq_debugger_pm_notifier);
 365         if (err) {
 366                 pr_err("fiq debugger register pm notifier failed!\n");
 367                 return err;
 368         }
 369
 370         return 0;
 371 }
 372
 373 static int fiq_debugger_bind_sip_smc(struct rk_fiq_debugger *t,
 374                                      phys_addr_t phy_base,
 375                                      int hwirq,
 376                                      int signal_irq,
 377                                      unsigned int baudrate)
 378 {
 379         int err;
 380
 381         err = sip_fiq_debugger_request_share_memory();
 382         if (err) {
 383                 pr_err("fiq debugger request share memory failed: %d\n", err);
 384                 goto exit;
 385         }
 386
 387         err = rk_fiq_debugger_register_cpu_pm_notify();
 388         if (err) {
 389                 pr_err("fiq debugger register cpu pm notify failed: %d\n", err);
 390                 goto exit;
 391         }
 392
 393         err = sip_fiq_debugger_uart_irq_tf_init(hwirq,
 394                                 fiq_debugger_uart_irq_tf);
 395         if (err) {
 396                 pr_err("fiq debugger bind fiq to trustzone failed: %d\n", err);
 397                 goto exit;
 398         }
 399
 400         t->pdata.uart_dev_resume = rk_fiq_debugger_uart_dev_resume;
 401         t->pdata.switch_cpu = rk_fiq_debugger_switch_cpu;
 402         t->pdata.enable_debug = rk_fiq_debugger_enable_debug;
 403         sip_fiq_debugger_set_print_port(phy_base, baudrate);
 404
 405         pr_info("fiq debugger fiq mode enabled\n");
 406
 407         return 0;
 408
 409 exit:
 410         t->pdata.switch_cpu = NULL;
 411         t->pdata.enable_debug = NULL;
 412
 413         return err;
 414 }
 415 #endif
 416
 417 void rk_serial_debug_init(void __iomem *base, phys_addr_t phy_base,
 418                           int irq, int signal_irq,
 419                           int wakeup_irq, unsigned int baudrate)
 420 {
 421         struct rk_fiq_debugger *t = NULL;
 422         struct platform_device *pdev = NULL;
 423         struct resource *res = NULL;
 424         int res_count = 0;
 425 #ifdef CONFIG_FIQ_DEBUGGER_TRUST_ZONE
 426         int ret = 0;
 427 #endif
 428
 429         if (!base) {
 430                 pr_err("Invalid fiq debugger uart base\n");
 431                 return;
 432         }
 433
 434         t = kzalloc(sizeof(struct rk_fiq_debugger), GFP_KERNEL);
 435         if (!t) {
 436                 pr_err("Failed to allocate for fiq debugger\n");
 437                 return;
 438         }
 439
 440         t->irq = irq;
 441         t->baudrate = baudrate;
 442         t->pdata.uart_init = debug_port_init;
 443         t->pdata.uart_getc = debug_getc;
 444         t->pdata.uart_putc = debug_putc;
 445         t->pdata.uart_dev_resume = uart_dev_resume;
 446 #ifndef CONFIG_RK_CONSOLE_THREAD
 447         t->pdata.uart_flush = debug_flush;
 448 #endif
 449         t->pdata.fiq_enable = fiq_enable;
 450         t->pdata.force_irq = NULL;
 451         t->debug_port_base = base;
 452
 453         res = kzalloc(sizeof(struct resource) * 3, GFP_KERNEL);
 454         if (!res) {
 455                 pr_err("Failed to alloc fiq debugger resources\n");
 456                 goto out2;
 457         }
 458
 459         pdev = kzalloc(sizeof(struct platform_device), GFP_KERNEL);
 460         if (!pdev) {
 461                 pr_err("Failed to alloc fiq debugger platform device\n");
 462                 goto out3;
 463         };
 464
 465 #ifdef CONFIG_FIQ_DEBUGGER_TRUST_ZONE
 466         if ((signal_irq > 0) && (serial_hwirq > 0)) {
 467                 ret = fiq_debugger_bind_sip_smc(t, phy_base, serial_hwirq,
 468                                                 signal_irq, baudrate);
 469                 if (ret)
 470                         tf_fiq_sup = false;
 471                 else
 472                         tf_fiq_sup = true;
 473         }
 474 #endif
 475
 476         if (irq > 0) {
 477                 res[0].flags = IORESOURCE_IRQ;
 478                 res[0].start = irq;
 479                 res[0].end = irq;
 480 #if defined(CONFIG_FIQ_GLUE)
 481                 if (signal_irq > 0)
 482                         res[0].name = "fiq";
 483                 else
 484                         res[0].name = "uart_irq";
 485 #elif defined(CONFIG_FIQ_DEBUGGER_TRUST_ZONE)
 486                 if (tf_fiq_sup && (signal_irq > 0))
 487                         res[0].name = "fiq";
 488                 else
 489                         res[0].name = "uart_irq";
 490 #else
 491                 res[0].name = "uart_irq";
 492 #endif
 493                 res_count++;
 494         }
 495
 496         if (signal_irq > 0) {
 497                 res[1].flags = IORESOURCE_IRQ;
 498                 res[1].start = signal_irq;
 499                 res[1].end = signal_irq;
 500                 res[1].name = "signal";
 501                 res_count++;
 502         }
 503
 504         if (wakeup_irq > 0) {
 505                 res[2].flags = IORESOURCE_IRQ;
 506                 res[2].start = wakeup_irq;
 507                 res[2].end = wakeup_irq;
 508                 res[2].name = "wakeup";
 509                 res_count++;
 510         }
 511
 512 #ifdef CONFIG_RK_CONSOLE_THREAD
 513         t->console_task = kthread_create(console_thread, pdev, "kconsole");
 514         if (!IS_ERR(t->console_task))
 515                 t->pdata.console_write = console_write;
 516 #endif
 517
 518         pdev->name = "fiq_debugger";
 519         pdev->id = rk_fiq_debugger_id++;
 520         pdev->dev.platform_data = &t->pdata;
 521         pdev->resource = res;
 522         pdev->num_resources = res_count;
 523         if (platform_device_register(pdev)) {
 524                 pr_err("Failed to register fiq debugger\n");
 525                 goto out4;
 526         }
 527         return;
 528
 529 out4:
 530         kfree(pdev);
 531 out3:
 532         kfree(res);
 533 out2:
 534         kfree(t);
 535 }
 536
 537 static const struct of_device_id ids[] __initconst = {
 538         { .compatible = "rockchip,fiq-debugger" },
 539         {}
 540 };
 541
 542 static int __init rk_fiq_debugger_init(void) {
 543
 544         void __iomem *base;
 545         struct device_node *np;
 546         unsigned int id, ok = 0;
 547         int irq, signal_irq = 0, wake_irq = 0;
 548         unsigned int baudrate = 0, irq_mode = 0;
 549         phys_addr_t phy_base = 0;
 550         int serial_id;
 551         struct clk *clk;
 552         struct clk *pclk;
 553         struct of_phandle_args oirq;
 554         struct resource res;
 555
 556         np = of_find_matching_node(NULL, ids);
 557
 558         if (!np) {
 559                 pr_err("fiq-debugger is missing in device tree!\n");
 560                 return -ENODEV;
 561         }
 562
 563         if (!of_device_is_available(np)) {
 564                 pr_err("fiq-debugger is disabled in device tree\n");
 565                 return -ENODEV;
 566         }
 567
 568         if (of_property_read_u32(np, "rockchip,serial-id", &serial_id))
 569                 return -EINVAL;
 570
 571         if (of_property_read_u32(np, "rockchip,irq-mode-enable", &irq_mode))
 572                 irq_mode = -1;
 573
 574         if (irq_mode == 1)
 575                 signal_irq = -1;
 576         else if (of_property_read_u32(np, "rockchip,signal-irq", &signal_irq))
 577                 signal_irq = -1;
 578
 579         if (of_property_read_u32(np, "rockchip,wake-irq", &wake_irq))
 580                 wake_irq = -1;
 581
 582         if (of_property_read_u32(np, "rockchip,baudrate", &baudrate))
 583                 baudrate = -1;
 584
 585         if (signal_irq > 0) {
 586                 signal_irq = irq_of_parse_and_map(np, 0);
 587                 if (!signal_irq)
 588                         return -EINVAL;
 589         }
 590
 591         np = NULL;
 592
 593         do {
 594                 np = of_find_node_by_name(np, "serial");
 595                 if (np) {
 596                         id = of_alias_get_id(np, "serial");
 597                         if (id == serial_id) {
 598                                 ok = 1;
 599                                 break;
 600                         }
 601                 }
 602         } while(np);
 603
 604         if (!ok)
 605                 return -EINVAL;
 606
 607         /* parse serial hw irq */
 608         if (!of_irq_parse_one(np, 0, &oirq))
 609                 serial_hwirq = oirq.args[1] + 32;
 610
 611         /* parse serial phy base address */
 612         if (!of_address_to_resource(np, 0, &res))
 613                 phy_base = res.start;
 614
 615         pclk = of_clk_get_by_name(np, "apb_pclk");
 616         clk = of_clk_get_by_name(np, "baudclk");
 617         if (unlikely(IS_ERR(clk)) || unlikely(IS_ERR(pclk))) {
 618                 pr_err("fiq-debugger get clock fail\n");
 619                 return -EINVAL;
 620         }
 621
 622         clk_prepare_enable(clk);
 623         clk_prepare_enable(pclk);
 624
 625         irq = irq_of_parse_and_map(np, 0);
 626         if (!irq)
 627                 return -EINVAL;
 628
 629         base = of_iomap(np, 0);
 630         if (base)
 631                 rk_serial_debug_init(base, phy_base,
 632                                      irq, signal_irq, wake_irq, baudrate);
 633         return 0;
 634 }
 635 #ifdef CONFIG_FIQ_GLUE
 636 postcore_initcall_sync(rk_fiq_debugger_init);
 637 #else
 638 arch_initcall_sync(rk_fiq_debugger_init);
 639 #endif