drivers/serial/rk_serial.c

   1 /*\r
   2  * Driver for RK-UART controller.\r
   3  * Based on drivers/tty/serial/8250.c\r
   4  *\r
   5  * Copyright (C) 2011 Rochchip.\r
   6  *\r
   7  * This program is free software; you can redistribute it and/or modify\r
   8  * it under the terms of the GNU General Public License as published by\r
   9  * the Free Software Foundation; either version 2 of the License, or\r
  10 \r
  11  * (at your option) any later version.\r
  12  *\r
  13  * Author: hhb@rock-chips.com\r
  14  * Date: 2011.06.18\r
  15  */\r
  16 \r
  17 #ifndef CONFIG_SERIAL_RK_CONSOLE\r
  18 #if defined(CONFIG_SERIAL_RK29_CONSOLE)\r
  19 #define CONFIG_SERIAL_RK_CONSOLE\r
  20 #endif\r
  21 #endif\r
  22 \r
  23 #if defined(CONFIG_SERIAL_RK_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)\r
  24 #define SUPPORT_SYSRQ\r
  25 #endif\r
  26 \r
  27 //#define DEBUG\r
  28 #include <linux/module.h>\r
  29 #include <linux/ioport.h>\r
  30 #include <linux/init.h>\r
  31 #include <linux/console.h>\r
  32 #include <linux/sysrq.h>\r
  33 #include <linux/delay.h>\r
  34 #include <linux/platform_device.h>\r
  35 #include <linux/tty.h>\r
  36 #include <linux/ratelimit.h>\r
  37 #include <linux/tty_flip.h>\r
  38 #include <linux/serial_reg.h>\r
  39 #include <linux/serial_core.h>\r
  40 #include <linux/serial.h>\r
  41 #include <linux/serial_8250.h>\r
  42 #include <linux/nmi.h>\r
  43 #include <linux/mutex.h>\r
  44 #include <linux/slab.h>\r
  45 #include <linux/clk.h>\r
  46 #include <linux/timer.h>\r
  47 #include <linux/workqueue.h>\r
  48 #include <mach/rk29-dma-pl330.h>\r
  49 #include <linux/dma-mapping.h>\r
  50 \r
  51 #include <asm/io.h>\r
  52 #include <asm/irq.h>\r
  53 \r
  54 #include <mach/iomux.h>\r
  55 #include <mach/gpio.h>\r
  56 \r
  57 \r
  58 \r
  59 #define PORT_RK         90\r
  60 #define UART_USR        0x1F    /* UART Status Register */\r
  61 #define UART_IER_PTIME  0x80    /* Programmable THRE Interrupt Mode Enable */\r
  62 #define RX_TIMEOUT              (3000*10)  //uint ms\r
  63 \r
  64 #define BOTH_EMPTY      (UART_LSR_TEMT | UART_LSR_THRE)\r
  65 \r
  66 #define UART_NR 4   //uart port number\r
  67 \r
  68 /* configurate whether the port transmit-receive by DMA */\r
  69 #define OPEN_DMA      1\r
  70 #define CLOSE_DMA     0\r
  71 \r
  72 #ifdef CONFIG_UART0_DMA_RK29\r
  73 #define UART0_USE_DMA OPEN_DMA\r
  74 #else\r
  75 #define UART0_USE_DMA CLOSE_DMA\r
  76 #endif\r
  77 \r
  78 #ifdef CONFIG_UART2_DMA_RK29\r
  79 #define UART2_USE_DMA OPEN_DMA\r
  80 #else\r
  81 #define UART2_USE_DMA CLOSE_DMA\r
  82 #endif\r
  83 \r
  84 #ifdef CONFIG_UART3_DMA_RK29\r
  85 #define UART3_USE_DMA OPEN_DMA\r
  86 #else\r
  87 #define UART3_USE_DMA CLOSE_DMA\r
  88 #endif\r
  89 \r
  90 #define UART1_USE_DMA CLOSE_DMA\r
  91 \r
  92 #define DMA_TX_TRRIGE_LEVEL 30\r
  93 \r
  94 #define USE_TIMER 1           // use timer for dma transport\r
  95 #define THRE_MODE 0X00   //0yhh\r
  96 \r
  97 //define which uart the bluetooth use on which board\r
  98 #ifdef CONFIG_MACH_RK29_PHONESDK\r
  99 #define BLUETOOTH_UART  2\r
 100 #else\r
 101 #define BLUETOOTH_UART  2\r
 102 #endif\r
 103 \r
 104 \r
 105 static struct uart_driver serial_rk_reg;\r
 106 \r
 107 /*\r
 108  * Debugging.\r
 109  */\r
 110 \r
 111 #define DBG_PORT  2    // 0,1,2,3,  other numbers is default\r
 112 #if 0\r
 113 #define DBG(msg...)     printk(msg);\r
 114 #define DEBUG_INTR(fmt...)      if (!uart_console(&up->port)) DBG(fmt)\r
 115 #else\r
 116 #define DBG(...)\r
 117 #define DEBUG_INTR(fmt...)      do { } while (0)\r
 118 #endif\r
 119 \r
 120 #ifdef CONFIG_SERIAL_CORE_CONSOLE\r
 121 #define uart_console(port)      ((port)->cons && (port)->cons->index == (port)->line)\r
 122 #else\r
 123 #define uart_console(port)      (0)\r
 124 #endif\r
 125 \r
 126 \r
 127 \r
 128 /* added by hhb@rock-chips.com for uart dma transfer */\r
 129 \r
 130 struct rk29_uart_dma_t {\r
 131         u32 use_dma;            //1:used\r
 132         u32 rx_dma_start;\r
 133         enum dma_ch rx_dmach;\r
 134         enum dma_ch tx_dmach;\r
 135         u32 tx_dma_inited;\r
 136         u32 rx_dma_inited;\r
 137         spinlock_t              tx_lock;\r
 138         spinlock_t              rx_lock;\r
 139         char * rx_buffer;\r
 140         char * tx_buffer;\r
 141         dma_addr_t rx_phy_addr;\r
 142         dma_addr_t tx_phy_addr;\r
 143         u32 rx_buffer_size;\r
 144         u32 tx_buffer_size;\r
 145 \r
 146         u32 rb_cur_pos;\r
 147         u32 rb_pre_pos;\r
 148         u32 rx_size;\r
 149         char use_timer;\r
 150         char tx_dma_used;\r
 151         /* timer to poll activity on rx dma */\r
 152         struct timer_list       rx_timer;\r
 153         int                     rx_timeout;\r
 154 \r
 155 };\r
 156 \r
 157 struct uart_rk_port {\r
 158         struct uart_port        port;\r
 159         struct platform_device  *pdev;\r
 160         struct clk              *clk;\r
 161         unsigned int            tx_loadsz;      /* transmit fifo load size */\r
 162         unsigned char           ier;\r
 163         unsigned char           lcr;\r
 164         unsigned char           mcr;\r
 165         unsigned char           iir;\r
 166 \r
 167         /*\r
 168          * Some bits in registers are cleared on a read, so they must\r
 169          * be saved whenever the register is read but the bits will not\r
 170          * be immediately processed.\r
 171          */\r
 172 #define LSR_SAVE_FLAGS UART_LSR_BRK_ERROR_BITS\r
 173         unsigned char           lsr_saved_flags;\r
 174 #if 0\r
 175 #define MSR_SAVE_FLAGS UART_MSR_ANY_DELTA\r
 176         unsigned char           msr_saved_flags;\r
 177 #endif\r
 178 \r
 179         char                    name[12];\r
 180         char                    fifo[32];\r
 181         char                    fifo_size;\r
 182         unsigned long           port_activity;\r
 183         struct work_struct uart_work;\r
 184         struct work_struct uart_work_rx;\r
 185         struct workqueue_struct *uart_wq;\r
 186         struct rk29_uart_dma_t *prk29_uart_dma_t;\r
 187 };\r
 188 \r
 189 static void serial_rk_release_dma_tx(struct uart_port *port);\r
 190 static int serial_rk_start_tx_dma(struct uart_port *port);\r
 191 static void serial_rk_rx_timeout(unsigned long uart);\r
 192 static void serial_rk_release_dma_rx(struct uart_port *port);\r
 193 static int serial_rk_start_rx_dma(struct uart_port *port);\r
 194 static int serial_rk_startup(struct uart_port *port);\r
 195 static inline unsigned int serial_in(struct uart_rk_port *up, int offset)\r
 196 {\r
 197         offset = offset << 2;\r
 198         return readb(up->port.membase + offset);\r
 199 }\r
 200 \r
 201 /* Save the LCR value so it can be re-written when a Busy Detect IRQ occurs. */\r
 202 static inline void dwapb_save_out_value(struct uart_rk_port *up, int offset,\r
 203                                         unsigned char value)\r
 204 {\r
 205         if (offset == UART_LCR)\r
 206                 up->lcr = value;\r
 207 }\r
 208 \r
 209 /* Read the IER to ensure any interrupt is cleared before returning from ISR. */\r
 210 static inline void dwapb_check_clear_ier(struct uart_rk_port *up, int offset)\r
 211 {\r
 212         if (offset == UART_TX || offset == UART_IER)\r
 213                 serial_in(up, UART_IER);\r
 214 }\r
 215 \r
 216 static inline void serial_out(struct uart_rk_port *up, int offset, unsigned char value)\r
 217 {\r
 218         dwapb_save_out_value(up, offset, value);\r
 219         writeb(value, up->port.membase + (offset << 2));\r
 220         dwapb_check_clear_ier(up, offset);\r
 221 }\r
 222 \r
 223 /* Uart divisor latch read */\r
 224 static inline int serial_dl_read(struct uart_rk_port *up)\r
 225 {\r
 226         return serial_in(up, UART_DLL) | serial_in(up, UART_DLM) << 8;\r
 227 }\r
 228 \r
 229 /* Uart divisor latch write */\r
 230 static inline void serial_dl_write(struct uart_rk_port *up, unsigned int value)\r
 231 {\r
 232         serial_out(up, UART_DLL, value & 0xff);\r
 233         serial_out(up, UART_DLM, value >> 8 & 0xff);\r
 234 }\r
 235 \r
 236 static void serial_lcr_write(struct uart_rk_port *up, unsigned char value)\r
 237 {\r
 238         unsigned int tmout = 10000;\r
 239 \r
 240         for (;;) {\r
 241                 unsigned char lcr;\r
 242                 serial_out(up, UART_LCR, value);\r
 243                 lcr = serial_in(up, UART_LCR);\r
 244                 if (lcr == value)\r
 245                         break;\r
 246                 /* Read the USR to clear any busy interrupts */\r
 247                 serial_in(up, UART_USR);\r
 248                 serial_in(up, UART_RX);\r
 249                 if (--tmout == 0)\r
 250                         break;\r
 251                 udelay(1);\r
 252         }\r
 253 }\r
 254 \r
 255 static inline void serial_rk_enable_ier_thri(struct uart_rk_port *up)\r
 256 {\r
 257         if (!(up->ier & UART_IER_THRI)) {\r
 258                 up->ier |= UART_IER_THRI;\r
 259                 serial_out(up, UART_IER, up->ier);\r
 260         }\r
 261 }\r
 262 \r
 263 \r
 264 static inline void serial_rk_disable_ier_thri(struct uart_rk_port *up)\r
 265 {\r
 266         if (up->ier & UART_IER_THRI) {\r
 267                 up->ier &= ~UART_IER_THRI;\r
 268                 serial_out(up, UART_IER, up->ier);\r
 269         }\r
 270 }\r
 271 \r
 272 /*\r
 273  * FIFO support.\r
 274  */\r
 275 static void serial_rk_clear_fifos(struct uart_rk_port *up)\r
 276 {\r
 277         serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);\r
 278         serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |\r
 279                        UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);\r
 280         serial_out(up, UART_FCR, 0);\r
 281 }\r
 282 \r
 283 static inline void __stop_tx(struct uart_rk_port *p)\r
 284 {\r
 285         if (p->ier & UART_IER_THRI) {\r
 286                 p->ier &= ~UART_IER_THRI;\r
 287                 serial_out(p, UART_IER, p->ier);\r
 288         }\r
 289 }\r
 290 \r
 291 static void serial_rk_stop_tx(struct uart_port *port)\r
 292 {\r
 293         struct uart_rk_port *up =\r
 294                 container_of(port, struct uart_rk_port, port);\r
 295         struct rk29_uart_dma_t *prk29_uart_dma_t = up->prk29_uart_dma_t;\r
 296 \r
 297         if(OPEN_DMA == prk29_uart_dma_t->use_dma){\r
 298                 serial_rk_release_dma_tx(port);\r
 299         }\r
 300         __stop_tx(up);\r
 301 }\r
 302 \r
 303 \r
 304 static void serial_rk_start_tx(struct uart_port *port)\r
 305 {\r
 306         struct uart_rk_port *up =\r
 307                 container_of(port, struct uart_rk_port, port);\r
 308         if(0 == serial_rk_start_tx_dma(port)){\r
 309                 serial_rk_enable_ier_thri(up);\r
 310         }\r
 311 }\r
 312 \r
 313 \r
 314 static void serial_rk_stop_rx(struct uart_port *port)\r
 315 {\r
 316         struct uart_rk_port *up =\r
 317                 container_of(port, struct uart_rk_port, port);\r
 318         struct rk29_uart_dma_t *prk29_uart_dma_t = up->prk29_uart_dma_t;\r
 319 \r
 320         if(OPEN_DMA == prk29_uart_dma_t->use_dma){\r
 321                 serial_rk_release_dma_rx(port);\r
 322         }\r
 323         up->ier &= ~UART_IER_RLSI;\r
 324         up->port.read_status_mask &= ~UART_LSR_DR;\r
 325         serial_out(up, UART_IER, up->ier);\r
 326 }\r
 327 \r
 328 \r
 329 static void serial_rk_enable_ms(struct uart_port *port)\r
 330 {\r
 331         /* no MSR capabilities */\r
 332 #if 0\r
 333         struct uart_rk_port *up =\r
 334                 container_of(port, struct uart_rk_port, port);\r
 335 \r
 336         dev_dbg(port->dev, "%s\n", __func__);\r
 337         up->ier |= UART_IER_MSI;\r
 338         serial_out(up, UART_IER, up->ier);\r
 339 #endif\r
 340 }\r
 341 \r
 342 \r
 343 /*\r
 344  * Start transmitting by dma.\r
 345  */\r
 346 #define DMA_SERIAL_BUFFER_SIZE     UART_XMIT_SIZE\r
 347 \r
 348 /* added by hhb@rock-chips.com  for uart dma transfer*/\r
 349 static struct rk29_uart_dma_t rk29_uart_ports_dma_t[] = {\r
 350                 {UART0_USE_DMA, 0, DMACH_UART0_RX, DMACH_UART0_TX},\r
 351                 {UART1_USE_DMA, 0, DMACH_UART1_RX, DMACH_UART1_TX},\r
 352                 {UART2_USE_DMA, 0, DMACH_UART2_RX, DMACH_UART2_TX},\r
 353                 {UART3_USE_DMA, 0, DMACH_UART3_RX, DMACH_UART3_TX},\r
 354 };\r
 355 \r
 356 \r
 357 /* DMAC PL330 add by hhb@rock-chips.com */\r
 358 static struct rk29_dma_client rk29_uart_dma_client = {\r
 359         .name = "rk29xx-uart-dma",\r
 360 };\r
 361 \r
 362 /*TX*/\r
 363 \r
 364 static void serial_rk_release_dma_tx(struct uart_port *port)\r
 365 {\r
 366         struct uart_rk_port *up =\r
 367                         container_of(port, struct uart_rk_port, port);\r
 368         struct rk29_uart_dma_t *prk29_uart_dma_t = up->prk29_uart_dma_t;\r
 369         if(!port){\r
 370                 return;\r
 371         }\r
 372         if(prk29_uart_dma_t && prk29_uart_dma_t->tx_dma_inited) {\r
 373                 rk29_dma_free(prk29_uart_dma_t->tx_dmach, &rk29_uart_dma_client);\r
 374                 prk29_uart_dma_t->tx_dma_inited = 0;\r
 375         }\r
 376 }\r
 377 \r
 378 /*this function will be called every time after rk29_dma_enqueue() be invoked*/\r
 379 static void serial_rk_dma_txcb(void *buf, int size, enum rk29_dma_buffresult result) {\r
 380         struct uart_port *port = buf;\r
 381         struct uart_rk_port *up = container_of(port, struct uart_rk_port, port);\r
 382         struct circ_buf *xmit = &port->state->xmit;\r
 383 \r
 384         if(result != RK29_RES_OK){\r
 385                 return;\r
 386         }\r
 387 \r
 388         port->icount.tx += size;\r
 389         xmit->tail = (xmit->tail + size) & (UART_XMIT_SIZE - 1);\r
 390 \r
 391         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)\r
 392                 uart_write_wakeup(&up->port);\r
 393         spin_lock(&(up->prk29_uart_dma_t->tx_lock));\r
 394         up->prk29_uart_dma_t->tx_dma_used = 0;\r
 395         spin_unlock(&(up->prk29_uart_dma_t->tx_lock));\r
 396         if (!uart_circ_empty(xmit)) {\r
 397                 serial_rk_start_tx_dma(port);\r
 398         }\r
 399 \r
 400         up->port_activity = jiffies;\r
 401 //      dev_info(up->port.dev, "s:%d\n", size);\r
 402 }\r
 403 \r
 404 static int serial_rk_init_dma_tx(struct uart_port *port) {\r
 405 \r
 406         struct uart_rk_port *up =\r
 407                                 container_of(port, struct uart_rk_port, port);\r
 408         struct rk29_uart_dma_t *prk29_uart_dma_t = up->prk29_uart_dma_t;\r
 409         if(!port || !prk29_uart_dma_t){\r
 410                 dev_info(up->port.dev, "serial_rk_init_dma_tx fail\n");\r
 411                 return -1;\r
 412         }\r
 413 \r
 414         if(prk29_uart_dma_t->tx_dma_inited) {\r
 415                 return 0;\r
 416         }\r
 417 \r
 418         if (rk29_dma_request(prk29_uart_dma_t->tx_dmach, &rk29_uart_dma_client, NULL) == -EBUSY) {\r
 419                 dev_info(up->port.dev, "rk29_dma_request tx fail\n");\r
 420                 return -1;\r
 421         }\r
 422 \r
 423         if (rk29_dma_set_buffdone_fn(prk29_uart_dma_t->tx_dmach, serial_rk_dma_txcb)) {\r
 424                 dev_info(up->port.dev, "rk29_dma_set_buffdone_fn tx fail\n");\r
 425                 return -1;\r
 426         }\r
 427         if (rk29_dma_devconfig(prk29_uart_dma_t->tx_dmach, RK29_DMASRC_MEM, (unsigned long)(port->iobase + UART_TX))) {\r
 428                 dev_info(up->port.dev, "rk29_dma_devconfig tx fail\n");\r
 429                 return -1;\r
 430         }\r
 431         if (rk29_dma_config(prk29_uart_dma_t->tx_dmach, 1, 1)) {\r
 432                 dev_info(up->port.dev, "rk29_dma_config tx fail\n");\r
 433                 return -1;\r
 434         }\r
 435 \r
 436         prk29_uart_dma_t->tx_dma_inited = 1;\r
 437         dev_info(up->port.dev, "serial_rk_init_dma_tx sucess\n");\r
 438         return 0;\r
 439 \r
 440 }\r
 441 \r
 442 static int serial_rk_start_tx_dma(struct uart_port *port)\r
 443 {\r
 444 \r
 445         struct circ_buf *xmit = &port->state->xmit;\r
 446         struct uart_rk_port *up = container_of(port, struct uart_rk_port, port);\r
 447         struct rk29_uart_dma_t *prk29_uart_dma_t = up->prk29_uart_dma_t;\r
 448 \r
 449         if(0 == prk29_uart_dma_t->use_dma){\r
 450                 return CLOSE_DMA;\r
 451         }\r
 452 \r
 453         if(-1 == serial_rk_init_dma_tx(port)){\r
 454                 goto err_out;\r
 455         }\r
 456 \r
 457         if (1 == prk29_uart_dma_t->tx_dma_used){\r
 458                 return 1;\r
 459         }\r
 460         if(!uart_circ_empty(xmit)){\r
 461                 if (rk29_dma_enqueue(prk29_uart_dma_t->tx_dmach, port,\r
 462                                 prk29_uart_dma_t->tx_phy_addr + xmit->tail,\r
 463                                 CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE))) {\r
 464                         goto err_out;\r
 465                 }\r
 466         }\r
 467         rk29_dma_ctrl(prk29_uart_dma_t->tx_dmach, RK29_DMAOP_START);\r
 468         spin_lock(&(prk29_uart_dma_t->tx_lock));\r
 469         up->prk29_uart_dma_t->tx_dma_used = 1;\r
 470         spin_unlock(&(prk29_uart_dma_t->tx_lock));\r
 471 \r
 472         return 1;\r
 473 err_out:\r
 474         dev_info(up->port.dev, "-serial_rk_start_tx_dma-error-\n");\r
 475         return -1;\r
 476 \r
 477 }\r
 478 \r
 479 \r
 480 \r
 481 /*RX*/\r
 482 static void serial_rk_dma_rxcb(void *buf, int size, enum rk29_dma_buffresult result) {\r
 483 \r
 484 //      printk("^\n");\r
 485 \r
 486 }\r
 487 \r
 488 static void serial_rk_release_dma_rx(struct uart_port *port)\r
 489 {\r
 490         struct uart_rk_port *up =\r
 491                                 container_of(port, struct uart_rk_port, port);\r
 492         struct rk29_uart_dma_t *prk29_uart_dma_t = up->prk29_uart_dma_t;\r
 493         if(!port){\r
 494                 return;\r
 495         }\r
 496         if(prk29_uart_dma_t && prk29_uart_dma_t->rx_dma_inited) {\r
 497                 del_timer(&prk29_uart_dma_t->rx_timer);\r
 498                 rk29_dma_free(prk29_uart_dma_t->rx_dmach, &rk29_uart_dma_client);\r
 499                 prk29_uart_dma_t->rb_pre_pos = 0;\r
 500                 prk29_uart_dma_t->rx_dma_inited = 0;\r
 501                 prk29_uart_dma_t->rx_dma_start = 0;\r
 502         }\r
 503 }\r
 504 \r
 505 \r
 506 static int serial_rk_init_dma_rx(struct uart_port *port) {\r
 507 \r
 508         struct uart_rk_port *up =\r
 509                                 container_of(port, struct uart_rk_port, port);\r
 510         struct rk29_uart_dma_t *prk29_uart_dma_t = up->prk29_uart_dma_t;\r
 511         if(!port || !prk29_uart_dma_t){\r
 512                 dev_info(up->port.dev, "serial_rk_init_dma_rx: port fail\n");\r
 513                 return -1;\r
 514         }\r
 515         if(prk29_uart_dma_t->rx_dma_inited) {\r
 516                 return 0;\r
 517         }\r
 518 \r
 519         if (rk29_dma_request(prk29_uart_dma_t->rx_dmach, &rk29_uart_dma_client, NULL) == -EBUSY) {\r
 520                 dev_info(up->port.dev, "rk29_dma_request fail rx \n");\r
 521                 return -1;\r
 522         }\r
 523 \r
 524         if (rk29_dma_set_buffdone_fn(prk29_uart_dma_t->rx_dmach, serial_rk_dma_rxcb)) {\r
 525                 dev_info(up->port.dev, "rk29_dma_set_buffdone_fn rx fail\n");\r
 526                 return -1;\r
 527         }\r
 528         if (rk29_dma_devconfig(prk29_uart_dma_t->rx_dmach, RK29_DMASRC_HW, (unsigned long)(port->iobase + UART_RX))) {\r
 529                 dev_info(up->port.dev, "rk29_dma_devconfig rx fail\n");\r
 530                 return -1;\r
 531         }\r
 532 \r
 533         if (rk29_dma_config(prk29_uart_dma_t->rx_dmach, 1, 1)) {\r
 534                 dev_info(up->port.dev, "rk29_dma_config rx fail\n");\r
 535                 return -1;\r
 536         }\r
 537 \r
 538         rk29_dma_setflags(prk29_uart_dma_t->rx_dmach, RK29_DMAF_CIRCULAR);\r
 539 \r
 540         prk29_uart_dma_t->rx_dma_inited = 1;\r
 541         dev_info(up->port.dev, "serial_rk_init_dma_rx sucess\n");\r
 542         return 0;\r
 543 \r
 544 }\r
 545 \r
 546 static int serial_rk_start_rx_dma(struct uart_port *port)\r
 547 {\r
 548         struct uart_rk_port *up =\r
 549                                 container_of(port, struct uart_rk_port, port);\r
 550         struct rk29_uart_dma_t *prk29_uart_dma_t = up->prk29_uart_dma_t;\r
 551         if(0 == prk29_uart_dma_t->use_dma){\r
 552                 return 0;\r
 553         }\r
 554 \r
 555         if(prk29_uart_dma_t->rx_dma_start == 1){\r
 556                 return 0;\r
 557         }\r
 558 \r
 559         if(-1 == serial_rk_init_dma_rx(port)){\r
 560                 dev_info(up->port.dev, "*******serial_rk_init_dma_rx*******error*******\n");\r
 561                 return -1;\r
 562         }\r
 563 \r
 564         if (rk29_dma_enqueue(prk29_uart_dma_t->rx_dmach, (void *)up, prk29_uart_dma_t->rx_phy_addr,\r
 565                         prk29_uart_dma_t->rx_buffer_size/2)) {\r
 566                 dev_info(up->port.dev, "*******rk29_dma_enqueue fail*****\n");\r
 567                 return -1;\r
 568         }\r
 569 \r
 570         if (rk29_dma_enqueue(prk29_uart_dma_t->rx_dmach, (void *)up,\r
 571                         prk29_uart_dma_t->rx_phy_addr+prk29_uart_dma_t->rx_buffer_size/2,\r
 572                 prk29_uart_dma_t->rx_buffer_size/2)) {\r
 573                 dev_info(up->port.dev, "*******rk29_dma_enqueue fail*****\n");\r
 574                 return -1;\r
 575         }\r
 576 \r
 577         rk29_dma_ctrl(prk29_uart_dma_t->rx_dmach, RK29_DMAOP_START);\r
 578         prk29_uart_dma_t->rx_dma_start = 1;\r
 579         if(prk29_uart_dma_t->use_timer == 1){\r
 580                 mod_timer(&prk29_uart_dma_t->rx_timer, jiffies +\r
 581                                 msecs_to_jiffies(prk29_uart_dma_t->rx_timeout));\r
 582         }\r
 583         up->port_activity = jiffies;\r
 584         return 1;\r
 585 }\r
 586 \r
 587 static void serial_rk_update_rb_addr(struct uart_rk_port *up){\r
 588         dma_addr_t current_pos = 0;\r
 589         dma_addr_t rx_current_pos = 0;\r
 590         struct rk29_uart_dma_t *prk29_uart_dma_t = up->prk29_uart_dma_t;\r
 591         spin_lock(&(up->prk29_uart_dma_t->rx_lock));\r
 592         rk29_dma_getposition(prk29_uart_dma_t->rx_dmach, &current_pos, &rx_current_pos);\r
 593 \r
 594         prk29_uart_dma_t->rb_cur_pos = (rx_current_pos - prk29_uart_dma_t->rx_phy_addr);\r
 595         prk29_uart_dma_t->rx_size = CIRC_CNT(prk29_uart_dma_t->rb_cur_pos,\r
 596                         prk29_uart_dma_t->rb_pre_pos, prk29_uart_dma_t->rx_buffer_size);\r
 597 \r
 598         spin_unlock(&(up->prk29_uart_dma_t->rx_lock));\r
 599 }\r
 600 \r
 601 static void serial_rk_report_dma_rx(unsigned long uart)\r
 602 {\r
 603         struct uart_rk_port *up = (struct uart_rk_port *)uart;\r
 604         struct rk29_uart_dma_t *prk29_uart_dma_t = up->prk29_uart_dma_t;\r
 605         if(prk29_uart_dma_t->use_timer == 1){\r
 606                 serial_rk_update_rb_addr(up);\r
 607         }\r
 608         if(prk29_uart_dma_t->rx_size > 0) {\r
 609                 spin_lock(&(up->prk29_uart_dma_t->rx_lock));\r
 610 \r
 611                 if(prk29_uart_dma_t->rb_cur_pos > prk29_uart_dma_t->rb_pre_pos){\r
 612                         tty_insert_flip_string(up->port.state->port.tty, prk29_uart_dma_t->rx_buffer\r
 613                                         + prk29_uart_dma_t->rb_pre_pos, prk29_uart_dma_t->rx_size);\r
 614                         tty_flip_buffer_push(up->port.state->port.tty);\r
 615                 }\r
 616                 else if(prk29_uart_dma_t->rb_cur_pos < prk29_uart_dma_t->rb_pre_pos){\r
 617 \r
 618                         tty_insert_flip_string(up->port.state->port.tty, prk29_uart_dma_t->rx_buffer\r
 619                                         + prk29_uart_dma_t->rb_pre_pos, CIRC_CNT_TO_END(prk29_uart_dma_t->rb_cur_pos,\r
 620                                         prk29_uart_dma_t->rb_pre_pos, prk29_uart_dma_t->rx_buffer_size));\r
 621                         tty_flip_buffer_push(up->port.state->port.tty);\r
 622 \r
 623                         if(prk29_uart_dma_t->rb_cur_pos != 0){\r
 624                                 tty_insert_flip_string(up->port.state->port.tty, prk29_uart_dma_t->rx_buffer,\r
 625                                                 prk29_uart_dma_t->rb_cur_pos);\r
 626                                 tty_flip_buffer_push(up->port.state->port.tty);\r
 627                         }\r
 628                 }\r
 629 \r
 630                 prk29_uart_dma_t->rb_pre_pos = (prk29_uart_dma_t->rb_pre_pos + prk29_uart_dma_t->rx_size)\r
 631                                 & (prk29_uart_dma_t->rx_buffer_size - 1);\r
 632                 up->port.icount.rx += prk29_uart_dma_t->rx_size;\r
 633                 spin_unlock(&(up->prk29_uart_dma_t->rx_lock));\r
 634                 prk29_uart_dma_t->rx_timeout = 7;\r
 635                 up->port_activity = jiffies;\r
 636         }\r
 637 \r
 638 \r
 639 #if 1\r
 640         if (jiffies_to_msecs(jiffies - up->port_activity) < RX_TIMEOUT) {\r
 641                 if(prk29_uart_dma_t->use_timer == 1){\r
 642                         mod_timer(&prk29_uart_dma_t->rx_timer, jiffies + msecs_to_jiffies(prk29_uart_dma_t->rx_timeout));\r
 643                 }\r
 644         } else {\r
 645 \r
 646 #if 1\r
 647 \r
 648 \r
 649                 prk29_uart_dma_t->rx_timeout = 20;\r
 650                 mod_timer(&prk29_uart_dma_t->rx_timer, jiffies + msecs_to_jiffies(prk29_uart_dma_t->rx_timeout));\r
 651 #else\r
 652 //              serial_out(up, 0x2a, 0x01);\r
 653                 serial_rk_release_dma_rx(&up->port);\r
 654                 serial_out(up, 0x2a, 0x01);\r
 655                 up->ier |= (UART_IER_RDI | UART_IER_RLSI);\r
 656                 serial_out(up, UART_IER, up->ier);\r
 657 //              serial_out(up, 0x22, 0x01);\r
 658                 dev_info(up->port.dev, "*****enable recv int*****\n");\r
 659 \r
 660                 //serial_rk_start_rx_dma(&up->port);\r
 661 #endif\r
 662         }\r
 663 \r
 664 \r
 665 #else\r
 666         if(prk29_uart_dma_t->use_timer == 1){\r
 667                 mod_timer(&prk29_uart_dma_t->rx_timer, jiffies + msecs_to_jiffies(prk29_uart_dma_t->rx_timeout));\r
 668         }\r
 669 #endif\r
 670 \r
 671 }\r
 672 \r
 673 static void serial_rk_rx_timeout(unsigned long uart)\r
 674 {\r
 675         struct uart_rk_port *up = (struct uart_rk_port *)uart;\r
 676 \r
 677         //serial_rk_report_dma_rx(up);\r
 678         queue_work(up->uart_wq, &up->uart_work);\r
 679 }\r
 680 \r
 681 static void serial_rk_report_revdata_workfunc(struct work_struct *work)\r
 682 {\r
 683         struct uart_rk_port *up =\r
 684                                 container_of(work, struct uart_rk_port, uart_work);\r
 685         serial_rk_report_dma_rx((unsigned long)up);\r
 686         spin_lock(&(up->prk29_uart_dma_t->rx_lock));\r
 687 \r
 688         if(up->prk29_uart_dma_t->use_timer == 1){\r
 689 \r
 690         }else{\r
 691                 tty_insert_flip_string(up->port.state->port.tty, up->fifo, up->fifo_size);\r
 692                 tty_flip_buffer_push(up->port.state->port.tty);\r
 693                 up->port.icount.rx += up->fifo_size;\r
 694         }\r
 695 \r
 696         spin_unlock(&(up->prk29_uart_dma_t->rx_lock));\r
 697 \r
 698 }\r
 699 \r
 700 \r
 701 static void serial_rk_start_dma_rx(struct work_struct *work)\r
 702 {\r
 703         struct uart_rk_port *up =\r
 704                                         container_of(work, struct uart_rk_port, uart_work_rx);\r
 705         serial_rk_start_rx_dma(&up->port);\r
 706 }\r
 707 \r
 708 \r
 709 \r
 710 static void\r
 711 receive_chars(struct uart_rk_port *up, unsigned int *status)\r
 712 {\r
 713         struct tty_struct *tty = up->port.state->port.tty;\r
 714         struct uart_port *port = &up->port;\r
 715         unsigned char ch, lsr = *status;\r
 716         int max_count = 256;\r
 717         char flag;\r
 718 \r
 719         if(DBG_PORT == port->line) {\r
 720                 DBG("RX:");\r
 721         }\r
 722 \r
 723         do {\r
 724                 if (likely(lsr & UART_LSR_DR))\r
 725                         ch = serial_in(up, UART_RX);\r
 726                 else\r
 727                         /*\r
 728                          * Intel 82571 has a Serial Over Lan device that will\r
 729                          * set UART_LSR_BI without setting UART_LSR_DR when\r
 730                          * it receives a break. To avoid reading from the\r
 731                          * receive buffer without UART_LSR_DR bit set, we\r
 732                          * just force the read character to be 0\r
 733                          */\r
 734                         ch = 0;\r
 735 \r
 736                 flag = TTY_NORMAL;\r
 737                 up->port.icount.rx++;\r
 738 \r
 739                 lsr |= up->lsr_saved_flags;\r
 740                 up->lsr_saved_flags = 0;\r
 741 \r
 742                 if (unlikely(lsr & UART_LSR_BRK_ERROR_BITS)) {\r
 743                         /*\r
 744                          * For statistics only\r
 745                          */\r
 746                         if (lsr & UART_LSR_BI) {\r
 747                                 lsr &= ~(UART_LSR_FE | UART_LSR_PE);\r
 748                                 up->port.icount.brk++;\r
 749                                 /*\r
 750                                  * We do the SysRQ and SAK checking\r
 751                                  * here because otherwise the break\r
 752                                  * may get masked by ignore_status_mask\r
 753                                  * or read_status_mask.\r
 754                                  */\r
 755                                 if (uart_handle_break(&up->port))\r
 756                                         goto ignore_char;\r
 757                         } else if (lsr & UART_LSR_PE)\r
 758                                 up->port.icount.parity++;\r
 759                         else if (lsr & UART_LSR_FE)\r
 760                                 up->port.icount.frame++;\r
 761                         if (lsr & UART_LSR_OE)\r
 762                                 up->port.icount.overrun++;\r
 763 \r
 764 \r
 765                         /*\r
 766                          * Mask off conditions which should be ignored.\r
 767                          */\r
 768                         lsr &= up->port.read_status_mask;\r
 769 \r
 770                         if (lsr & UART_LSR_BI) {\r
 771                                 DEBUG_INTR("handling break....");\r
 772                                 flag = TTY_BREAK;\r
 773                         } else if (lsr & UART_LSR_PE)\r
 774                                 flag = TTY_PARITY;\r
 775                         else if (lsr & UART_LSR_FE)\r
 776                                 flag = TTY_FRAME;\r
 777                 }\r
 778                 if (uart_handle_sysrq_char(&up->port, ch))\r
 779                         goto ignore_char;\r
 780 \r
 781                 uart_insert_char(&up->port, lsr, UART_LSR_OE, ch, flag);\r
 782                 if(DBG_PORT == port->line) {\r
 783                         DBG("0x%x, ", ch);\r
 784                 }\r
 785 ignore_char:\r
 786                 lsr = serial_in(up, UART_LSR);\r
 787         } while ((lsr & (UART_LSR_DR | UART_LSR_BI)) && (max_count-- > 0));\r
 788         spin_unlock(&up->port.lock);\r
 789         tty_flip_buffer_push(tty);\r
 790         spin_lock(&up->port.lock);\r
 791         *status = lsr;\r
 792 \r
 793         if(DBG_PORT == port->line) {\r
 794                 DBG("\n");\r
 795         }\r
 796 \r
 797 }\r
 798 \r
 799 static void transmit_chars(struct uart_rk_port *up)\r
 800 {\r
 801         struct circ_buf *xmit = &up->port.state->xmit;\r
 802         struct uart_port *port = &up->port;\r
 803         int count;\r
 804 \r
 805         if (up->port.x_char) {\r
 806                 serial_out(up, UART_TX, up->port.x_char);\r
 807                 up->port.icount.tx++;\r
 808                 up->port.x_char = 0;\r
 809                 return;\r
 810         }\r
 811         if (uart_tx_stopped(&up->port)) {\r
 812                 __stop_tx(up);\r
 813                 return;\r
 814         }\r
 815         if (uart_circ_empty(xmit)) {\r
 816                 __stop_tx(up);\r
 817                 return;\r
 818         }\r
 819 \r
 820         if(DBG_PORT == port->line) {\r
 821                 DBG("TX:");\r
 822         }\r
 823 \r
 824         count = up->tx_loadsz;\r
 825         do {\r
 826                 serial_out(up, UART_TX, xmit->buf[xmit->tail]);\r
 827                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);\r
 828                 up->port.icount.tx++;\r
 829                 if(DBG_PORT == port->line) {\r
 830                         DBG("0x%x, ", xmit->buf[xmit->tail]);\r
 831                 }\r
 832                 if (uart_circ_empty(xmit))\r
 833                         break;\r
 834         } while (--count > 0);\r
 835 \r
 836         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)\r
 837                 uart_write_wakeup(&up->port);\r
 838 \r
 839         if(DBG_PORT == port->line) {\r
 840                 DBG("\n");\r
 841         }\r
 842 \r
 843         DEBUG_INTR("THRE...");\r
 844 \r
 845         if (uart_circ_empty(xmit))\r
 846                 __stop_tx(up);\r
 847 }\r
 848 \r
 849 static unsigned int check_modem_status(struct uart_rk_port *up)\r
 850 {\r
 851         unsigned int status = serial_in(up, UART_MSR);\r
 852 \r
 853 #if 0\r
 854         status |= up->msr_saved_flags;\r
 855         up->msr_saved_flags = 0;\r
 856         if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI &&\r
 857             up->port.state != NULL) {\r
 858                 if (status & UART_MSR_TERI)\r
 859                         up->port.icount.rng++;\r
 860                 if (status & UART_MSR_DDSR)\r
 861                         up->port.icount.dsr++;\r
 862                 if (status & UART_MSR_DDCD)\r
 863                         uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);\r
 864                 if (status & UART_MSR_DCTS)\r
 865                         uart_handle_cts_change(&up->port, status & UART_MSR_CTS);\r
 866 \r
 867                 wake_up_interruptible(&up->port.state->port.delta_msr_wait);\r
 868         }\r
 869 #endif\r
 870 \r
 871         return status;\r
 872 }\r
 873 \r
 874 \r
 875 /*\r
 876  * This handles the interrupt from one port.\r
 877  */\r
 878 static void serial_rk_handle_port(struct uart_rk_port *up)\r
 879 {\r
 880         unsigned int status;\r
 881         unsigned long flags;\r
 882         spin_lock_irqsave(&up->port.lock, flags);\r
 883 \r
 884         status = serial_in(up, UART_LSR);\r
 885 \r
 886         DEBUG_INTR("status = %x...", status);\r
 887 \r
 888         if(up->prk29_uart_dma_t->use_dma == 1) {\r
 889 \r
 890                 if(up->iir & UART_IIR_RLSI){\r
 891 \r
 892                         if (status & (UART_LSR_DR | UART_LSR_BI)) {\r
 893                                 up->port_activity = jiffies;\r
 894                                 up->ier &= ~UART_IER_RLSI;\r
 895                                 up->ier &= ~UART_IER_RDI;\r
 896                                 serial_out(up, UART_IER, up->ier);\r
 897                                 //receive_chars(up, &status);\r
 898                                 //mod_timer(&up->prk29_uart_dma_t->rx_timer, jiffies +\r
 899                                                                 //msecs_to_jiffies(up->prk29_uart_dma_t->rx_timeout));\r
 900                                 if(serial_rk_start_rx_dma(&up->port) == -1){\r
 901                                         receive_chars(up, &status);\r
 902                                 }\r
 903                         }\r
 904                 }\r
 905 \r
 906 /*\r
 907                 if (status & UART_LSR_THRE) {\r
 908                         transmit_chars(up);\r
 909                 }\r
 910 */\r
 911 \r
 912         }else {   //dma mode disable\r
 913 \r
 914                 if (status & (UART_LSR_DR | UART_LSR_BI)) {\r
 915                         receive_chars(up, &status);\r
 916                 }\r
 917                 check_modem_status(up);\r
 918                 if (status & UART_LSR_THRE) {\r
 919                         transmit_chars(up);\r
 920                 }\r
 921         }\r
 922 \r
 923         spin_unlock_irqrestore(&up->port.lock, flags);\r
 924 }\r
 925 \r
 926 /*\r
 927  * This is the serial driver's interrupt routine.\r
 928  */\r
 929 \r
 930 static irqreturn_t serial_rk_interrupt(int irq, void *dev_id)\r
 931 {\r
 932         struct uart_rk_port *up = dev_id;\r
 933         int handled = 0;\r
 934         unsigned int iir;\r
 935 \r
 936         iir = serial_in(up, UART_IIR);\r
 937         DEBUG_INTR("%s(%d) iir = 0x%02x ", __func__, irq, iir);\r
 938         up->iir = iir;\r
 939 \r
 940         if (!(iir & UART_IIR_NO_INT)) {\r
 941                 serial_rk_handle_port(up);\r
 942                 handled = 1;\r
 943         } else if ((iir & UART_IIR_BUSY) == UART_IIR_BUSY) {\r
 944                 /* The DesignWare APB UART has an Busy Detect (0x07)\r
 945                  * interrupt meaning an LCR write attempt occured while the\r
 946                  * UART was busy. The interrupt must be cleared by reading\r
 947                  * the UART status register (USR) and the LCR re-written. */\r
 948                 serial_in(up, UART_USR);\r
 949                 serial_out(up, UART_LCR, up->lcr);\r
 950 \r
 951                 handled = 1;\r
 952                 DEBUG_INTR("busy ");\r
 953         }\r
 954         DEBUG_INTR("end(%d).\n", handled);\r
 955 \r
 956         return IRQ_RETVAL(handled);\r
 957 }\r
 958 \r
 959 static unsigned int serial_rk_tx_empty(struct uart_port *port)\r
 960 {\r
 961         struct uart_rk_port *up =\r
 962                 container_of(port, struct uart_rk_port, port);\r
 963         unsigned long flags;\r
 964         unsigned int lsr;\r
 965 \r
 966         dev_dbg(port->dev, "%s\n", __func__);\r
 967         spin_lock_irqsave(&up->port.lock, flags);\r
 968         lsr = serial_in(up, UART_LSR);\r
 969         up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;\r
 970         spin_unlock_irqrestore(&up->port.lock, flags);\r
 971 \r
 972         return (lsr & BOTH_EMPTY) == BOTH_EMPTY ? TIOCSER_TEMT : 0;\r
 973 }\r
 974 \r
 975 static unsigned int serial_rk_get_mctrl(struct uart_port *port)\r
 976 {\r
 977         struct uart_rk_port *up =\r
 978                 container_of(port, struct uart_rk_port, port);\r
 979         unsigned int status;\r
 980         unsigned int ret;\r
 981 \r
 982         status = check_modem_status(up);\r
 983 \r
 984         ret = 0;\r
 985         if (status & UART_MSR_DCD)\r
 986                 ret |= TIOCM_CAR;\r
 987         if (status & UART_MSR_RI)\r
 988                 ret |= TIOCM_RNG;\r
 989         if (status & UART_MSR_DSR)\r
 990                 ret |= TIOCM_DSR;\r
 991         if (status & UART_MSR_CTS)\r
 992                 ret |= TIOCM_CTS;\r
 993         dev_dbg(port->dev, "%s 0x%08x\n", __func__, ret);\r
 994         return ret;\r
 995 }\r
 996 \r
 997 static void serial_rk_set_mctrl(struct uart_port *port, unsigned int mctrl)\r
 998 {\r
 999         struct uart_rk_port *up =\r
1000                 container_of(port, struct uart_rk_port, port);\r
1001         unsigned char mcr = 0;\r
1002 \r
1003         dev_dbg(port->dev, "+%s\n", __func__);\r
1004         if (mctrl & TIOCM_RTS)\r
1005                 mcr |= UART_MCR_RTS;\r
1006         if (mctrl & TIOCM_DTR)\r
1007                 mcr |= UART_MCR_DTR;\r
1008         if (mctrl & TIOCM_OUT1)\r
1009                 mcr |= UART_MCR_OUT1;\r
1010         if (mctrl & TIOCM_OUT2)\r
1011                 mcr |= UART_MCR_OUT2;\r
1012         if (mctrl & TIOCM_LOOP)\r
1013                 mcr |= UART_MCR_LOOP;\r
1014 \r
1015         mcr |= up->mcr;\r
1016 \r
1017         serial_out(up, UART_MCR, mcr);\r
1018         dev_dbg(port->dev, "-%s mcr: 0x%02x\n", __func__, mcr);\r
1019 }\r
1020 \r
1021 static void serial_rk_break_ctl(struct uart_port *port, int break_state)\r
1022 {\r
1023         struct uart_rk_port *up =\r
1024                 container_of(port, struct uart_rk_port, port);\r
1025         unsigned long flags;\r
1026 \r
1027         dev_dbg(port->dev, "+%s\n", __func__);\r
1028         spin_lock_irqsave(&up->port.lock, flags);\r
1029         if (break_state == -1)\r
1030                 up->lcr |= UART_LCR_SBC;\r
1031         else\r
1032                 up->lcr &= ~UART_LCR_SBC;\r
1033         serial_lcr_write(up, up->lcr);\r
1034         spin_unlock_irqrestore(&up->port.lock, flags);\r
1035         dev_dbg(port->dev, "-%s lcr: 0x%02x\n", __func__, up->lcr);\r
1036 }\r
1037 \r
1038 /*\r
1039  *      Wait for transmitter & holding register to empty\r
1040  */\r
1041 static void wait_for_xmitr(struct uart_rk_port *up, int bits)\r
1042 {\r
1043         unsigned int status, tmout = 10000;\r
1044 \r
1045         /* Wait up to 10ms for the character(s) to be sent. */\r
1046         for (;;) {\r
1047                 status = serial_in(up, UART_LSR);\r
1048 \r
1049                 up->lsr_saved_flags |= status & LSR_SAVE_FLAGS;\r
1050 \r
1051                 if ((status & bits) == bits)\r
1052                         break;\r
1053                 if (--tmout == 0)\r
1054                         break;\r
1055                 udelay(1);\r
1056         }\r
1057 }\r
1058 \r
1059 #ifdef CONFIG_CONSOLE_POLL\r
1060 /*\r
1061  * Console polling routines for writing and reading from the uart while\r
1062  * in an interrupt or debug context.\r
1063  */\r
1064 \r
1065 static int serial_rk_get_poll_char(struct uart_port *port)\r
1066 {\r
1067         struct uart_rk_port *up =\r
1068                 container_of(port, struct uart_rk_port, port);\r
1069         unsigned char lsr = serial_in(up, UART_LSR);\r
1070 \r
1071         while (!(lsr & UART_LSR_DR))\r
1072                 lsr = serial_in(up, UART_LSR);\r
1073 \r
1074         return serial_in(up, UART_RX);\r
1075 }\r
1076 \r
1077 static void serial_rk_put_poll_char(struct uart_port *port,\r
1078                          unsigned char c)\r
1079 {\r
1080         unsigned int ier;\r
1081         struct uart_rk_port *up =\r
1082                 container_of(port, struct uart_rk_port, port);\r
1083 \r
1084         /*\r
1085          *      First save the IER then disable the interrupts\r
1086          */\r
1087         ier = serial_in(up, UART_IER);\r
1088         serial_out(up, UART_IER, 0);\r
1089 \r
1090         wait_for_xmitr(up, BOTH_EMPTY);\r
1091         /*\r
1092          *      Send the character out.\r
1093          *      If a LF, also do CR...\r
1094          */\r
1095         serial_out(up, UART_TX, c);\r
1096         if (c == 10) {\r
1097                 wait_for_xmitr(up, BOTH_EMPTY);\r
1098                 serial_out(up, UART_TX, 13);\r
1099         }\r
1100 \r
1101         /*\r
1102          *      Finally, wait for transmitter to become empty\r
1103          *      and restore the IER\r
1104          */\r
1105         wait_for_xmitr(up, BOTH_EMPTY);\r
1106         serial_out(up, UART_IER, ier);\r
1107 }\r
1108 \r
1109 #endif /* CONFIG_CONSOLE_POLL */\r
1110 \r
1111 static int serial_rk_startup(struct uart_port *port)\r
1112 {\r
1113         struct uart_rk_port *up =\r
1114                 container_of(port, struct uart_rk_port, port);\r
1115         unsigned long flags;\r
1116         int retval;\r
1117 \r
1118 \r
1119         dev_dbg(port->dev, "%s\n", __func__);\r
1120 \r
1121         /*\r
1122          * Allocate the IRQ\r
1123          */\r
1124         retval = request_irq(up->port.irq, serial_rk_interrupt, up->port.irqflags,\r
1125                                 up->name, up);\r
1126         if (retval)\r
1127                 return retval;\r
1128 \r
1129         up->mcr = 0;\r
1130 \r
1131         /*\r
1132          * Clear the FIFO buffers and disable them.\r
1133          * (they will be reenabled in set_termios())\r
1134          */\r
1135         serial_rk_clear_fifos(up);\r
1136 \r
1137         /*\r
1138          * Clear the interrupt registers.\r
1139          */\r
1140         (void) serial_in(up, UART_LSR);\r
1141         (void) serial_in(up, UART_RX);\r
1142         (void) serial_in(up, UART_IIR);\r
1143         (void) serial_in(up, UART_MSR);\r
1144 \r
1145         /*\r
1146          * Now, initialize the UART\r
1147          */\r
1148         serial_lcr_write(up, UART_LCR_WLEN8);\r
1149 \r
1150         spin_lock_irqsave(&up->port.lock, flags);\r
1151 \r
1152         /*\r
1153          * Most PC uarts need OUT2 raised to enable interrupts.\r
1154          */\r
1155         up->port.mctrl |= TIOCM_OUT2;\r
1156 \r
1157         serial_rk_set_mctrl(&up->port, up->port.mctrl);\r
1158 \r
1159         spin_unlock_irqrestore(&up->port.lock, flags);\r
1160 \r
1161         /*\r
1162          * Clear the interrupt registers again for luck, and clear the\r
1163          * saved flags to avoid getting false values from polling\r
1164          * routines or the previous session.\r
1165          */\r
1166         serial_in(up, UART_LSR);\r
1167         serial_in(up, UART_RX);\r
1168         serial_in(up, UART_IIR);\r
1169         serial_in(up, UART_MSR);\r
1170         up->lsr_saved_flags = 0;\r
1171 #if 0\r
1172         up->msr_saved_flags = 0;\r
1173 #endif\r
1174 \r
1175 \r
1176         if (1 == up->prk29_uart_dma_t->use_dma) {\r
1177 \r
1178                 if(up->port.state->xmit.buf != up->prk29_uart_dma_t->tx_buffer){\r
1179                         free_page((unsigned long)up->port.state->xmit.buf);\r
1180                         up->port.state->xmit.buf = up->prk29_uart_dma_t->tx_buffer;\r
1181                 }\r
1182 \r
1183 #if 1\r
1184                 serial_rk_start_rx_dma(&up->port);\r
1185 #else\r
1186                 up->ier |= UART_IER_RDI;\r
1187                 up->ier |= UART_IER_RLSI;\r
1188                 serial_out(up, UART_IER, up->ier);\r
1189 #endif\r
1190                 up->port_activity = jiffies;\r
1191 \r
1192         }else{\r
1193                 up->ier |= UART_IER_RDI;\r
1194                 up->ier |= UART_IER_RLSI;\r
1195                 serial_out(up, UART_IER, up->ier);\r
1196         }\r
1197 \r
1198         /*\r
1199          * Finally, enable interrupts.  Note: Modem status interrupts\r
1200          * are set via set_termios(), which will be occurring imminently\r
1201          * anyway, so we don't enable them here.\r
1202          */\r
1203 \r
1204         return 0;\r
1205 }\r
1206 \r
1207 \r
1208 static void serial_rk_shutdown(struct uart_port *port)\r
1209 {\r
1210         struct uart_rk_port *up =\r
1211                 container_of(port, struct uart_rk_port, port);\r
1212         unsigned long flags;\r
1213 \r
1214         dev_dbg(port->dev, "%s\n", __func__);\r
1215         /*\r
1216          * Disable interrupts from this port\r
1217          */\r
1218         up->ier = 0;\r
1219         serial_out(up, UART_IER, 0);\r
1220 \r
1221         spin_lock_irqsave(&up->port.lock, flags);\r
1222         up->port.mctrl &= ~TIOCM_OUT2;\r
1223         serial_rk_set_mctrl(&up->port, up->port.mctrl);\r
1224         spin_unlock_irqrestore(&up->port.lock, flags);\r
1225 \r
1226         /*\r
1227          * Disable break condition and FIFOs\r
1228          */\r
1229         serial_lcr_write(up, serial_in(up, UART_LCR) & ~UART_LCR_SBC);\r
1230         serial_rk_clear_fifos(up);\r
1231 \r
1232         /*\r
1233          * Read data port to reset things, and then free the irq\r
1234          */\r
1235         (void) serial_in(up, UART_RX);\r
1236 \r
1237         free_irq(up->port.irq, up);\r
1238 }\r
1239 \r
1240 static void\r
1241 serial_rk_set_termios(struct uart_port *port, struct ktermios *termios,\r
1242                       struct ktermios *old)\r
1243 {\r
1244         struct uart_rk_port *up =\r
1245                 container_of(port, struct uart_rk_port, port);\r
1246         unsigned char cval, fcr = 0;\r
1247         unsigned long flags;\r
1248         unsigned int baud, quot;\r
1249 \r
1250         dev_dbg(port->dev, "+%s\n", __func__);\r
1251 \r
1252         switch (termios->c_cflag & CSIZE) {\r
1253         case CS5:\r
1254                 cval = UART_LCR_WLEN5;\r
1255                 break;\r
1256         case CS6:\r
1257                 cval = UART_LCR_WLEN6;\r
1258                 break;\r
1259         case CS7:\r
1260                 cval = UART_LCR_WLEN7;\r
1261                 break;\r
1262         default:\r
1263         case CS8:\r
1264                 cval = UART_LCR_WLEN8;\r
1265                 break;\r
1266         }\r
1267 \r
1268         if (termios->c_cflag & CSTOPB){\r
1269                 cval |= UART_LCR_STOP;\r
1270         }\r
1271         if (termios->c_cflag & PARENB){\r
1272                 cval |= UART_LCR_PARITY;\r
1273         }\r
1274         if (!(termios->c_cflag & PARODD)){\r
1275                 cval |= UART_LCR_EPAR;\r
1276         }\r
1277 #ifdef CMSPAR\r
1278         if (termios->c_cflag & CMSPAR)\r
1279                 cval |= UART_LCR_SPAR;\r
1280 #endif\r
1281 \r
1282         /*\r
1283          * Ask the core to calculate the divisor for us.\r
1284          */\r
1285         baud = uart_get_baud_rate(port, termios, old,\r
1286                                   port->uartclk / 16 / 0xffff,\r
1287                                   port->uartclk / 16);\r
1288 \r
1289         quot = uart_get_divisor(port, baud);\r
1290 \r
1291         if (baud < 2400){\r
1292                 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;\r
1293         }\r
1294         else{\r
1295                 //added by hhb@rock-chips.com\r
1296                 if(up->prk29_uart_dma_t->use_timer == 1){\r
1297                         fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_00 | UART_FCR_T_TRIG_01;\r
1298                 }\r
1299                 else{\r
1300                         fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10 | UART_FCR_T_TRIG_01;\r
1301                 }\r
1302         }\r
1303 \r
1304         /*\r
1305          * MCR-based auto flow control.  When AFE is enabled, RTS will be\r
1306          * deasserted when the receive FIFO contains more characters than\r
1307          * the trigger, or the MCR RTS bit is cleared.  In the case where\r
1308          * the remote UART is not using CTS auto flow control, we must\r
1309          * have sufficient FIFO entries for the latency of the remote\r
1310          * UART to respond.  IOW, at least 32 bytes of FIFO.\r
1311          */\r
1312         up->mcr &= ~UART_MCR_AFE;\r
1313         if (termios->c_cflag & CRTSCTS){\r
1314                 up->mcr |= UART_MCR_AFE;\r
1315         }\r
1316 \r
1317         /*\r
1318          * Ok, we're now changing the port state.  Do it with\r
1319          * interrupts disabled.\r
1320          */\r
1321         spin_lock_irqsave(&up->port.lock, flags);\r
1322 \r
1323         /*\r
1324          * Update the per-port timeout.\r
1325          */\r
1326         uart_update_timeout(port, termios->c_cflag, baud);\r
1327 \r
1328         up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;\r
1329         if (termios->c_iflag & INPCK)\r
1330                 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;\r
1331         if (termios->c_iflag & (BRKINT | PARMRK))\r
1332                 up->port.read_status_mask |= UART_LSR_BI;\r
1333 \r
1334         /*\r
1335          * Characteres to ignore\r
1336          */\r
1337         up->port.ignore_status_mask = 0;\r
1338         if (termios->c_iflag & IGNPAR)\r
1339                 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;\r
1340         if (termios->c_iflag & IGNBRK) {\r
1341                 up->port.ignore_status_mask |= UART_LSR_BI;\r
1342                 /*\r
1343                  * If we're ignoring parity and break indicators,\r
1344                  * ignore overruns too (for real raw support).\r
1345                  */\r
1346                 if (termios->c_iflag & IGNPAR)\r
1347                         up->port.ignore_status_mask |= UART_LSR_OE;\r
1348         }\r
1349 \r
1350         /*\r
1351          * ignore all characters if CREAD is not set\r
1352          */\r
1353         if ((termios->c_cflag & CREAD) == 0)\r
1354                 up->port.ignore_status_mask |= UART_LSR_DR;\r
1355 \r
1356         /*\r
1357          * CTS flow control flag and modem status interrupts\r
1358          */\r
1359         up->ier &= ~UART_IER_MSI;\r
1360 #if 0\r
1361         if (UART_ENABLE_MS(&up->port, termios->c_cflag))\r
1362                 up->ier |= UART_IER_MSI;\r
1363 #endif\r
1364 \r
1365         serial_out(up, UART_IER, up->ier);\r
1366 \r
1367         serial_lcr_write(up, cval | UART_LCR_DLAB);/* set DLAB */\r
1368 \r
1369         serial_dl_write(up, quot);\r
1370 \r
1371         serial_lcr_write(up, cval);             /* reset DLAB */\r
1372         up->lcr = cval;                         /* Save LCR */\r
1373 \r
1374         serial_out(up, UART_FCR, fcr);          /* set fcr */\r
1375 //      fcr |= UART_FCR_DMA_SELECT;\r
1376 //      serial_out(up, UART_FCR, fcr);          /* set fcr */\r
1377         serial_rk_set_mctrl(&up->port, up->port.mctrl);\r
1378 \r
1379         spin_unlock_irqrestore(&up->port.lock, flags);\r
1380         /* Don't rewrite B0 */\r
1381         if (tty_termios_baud_rate(termios))\r
1382                 tty_termios_encode_baud_rate(termios, baud, baud);\r
1383         dev_dbg(port->dev, "-%s baud %d\n", __func__, baud);\r
1384 }\r
1385 \r
1386 #if 0\r
1387 static void\r
1388 serial_rk_set_ldisc(struct uart_port *port, int new)\r
1389 {\r
1390         if (new == N_PPS) {\r
1391                 port->flags |= UPF_HARDPPS_CD;\r
1392                 serial_rk_enable_ms(port);\r
1393         } else\r
1394                 port->flags &= ~UPF_HARDPPS_CD;\r
1395 }\r
1396 #endif\r
1397 \r
1398 static void\r
1399 serial_rk_pm(struct uart_port *port, unsigned int state,\r
1400               unsigned int oldstate)\r
1401 {\r
1402         struct uart_rk_port *up =\r
1403                 container_of(port, struct uart_rk_port, port);\r
1404 \r
1405         dev_dbg(port->dev, "%s: %s\n", __func__, state ? "disable" : "enable");\r
1406         if (state)\r
1407                 clk_disable(up->clk);\r
1408         else\r
1409                 clk_enable(up->clk);\r
1410 }\r
1411 \r
1412 static void serial_rk_release_port(struct uart_port *port)\r
1413 {\r
1414         dev_dbg(port->dev, "%s\n", __func__);\r
1415 }\r
1416 \r
1417 static int serial_rk_request_port(struct uart_port *port)\r
1418 {\r
1419         dev_dbg(port->dev, "%s\n", __func__);\r
1420         return 0;\r
1421 }\r
1422 \r
1423 static void serial_rk_config_port(struct uart_port *port, int flags)\r
1424 {\r
1425         dev_dbg(port->dev, "%s\n", __func__);\r
1426         port->type = PORT_RK;\r
1427 }\r
1428 \r
1429 static int\r
1430 serial_rk_verify_port(struct uart_port *port, struct serial_struct *ser)\r
1431 {\r
1432         /* we don't want the core code to modify any port params */\r
1433         dev_dbg(port->dev, "%s\n", __func__);\r
1434         return -EINVAL;\r
1435 }\r
1436 \r
1437 static const char *\r
1438 serial_rk_type(struct uart_port *port)\r
1439 {\r
1440         struct uart_rk_port *up =\r
1441                 container_of(port, struct uart_rk_port, port);\r
1442 \r
1443         dev_dbg(port->dev, "%s: %s\n", __func__, up->name);\r
1444         return up->name;\r
1445 }\r
1446 \r
1447 static struct uart_ops serial_rk_pops = {\r
1448         .tx_empty       = serial_rk_tx_empty,\r
1449         .set_mctrl      = serial_rk_set_mctrl,\r
1450         .get_mctrl      = serial_rk_get_mctrl,\r
1451         .stop_tx        = serial_rk_stop_tx,\r
1452         .start_tx       = serial_rk_start_tx,\r
1453         .stop_rx        = serial_rk_stop_rx,\r
1454         .enable_ms      = serial_rk_enable_ms,\r
1455         .break_ctl      = serial_rk_break_ctl,\r
1456         .startup        = serial_rk_startup,\r
1457         .shutdown       = serial_rk_shutdown,\r
1458         .set_termios    = serial_rk_set_termios,\r
1459 #if 0\r
1460         .set_ldisc      = serial_rk_set_ldisc,\r
1461 #endif\r
1462         .pm             = serial_rk_pm,\r
1463         .type           = serial_rk_type,\r
1464         .release_port   = serial_rk_release_port,\r
1465         .request_port   = serial_rk_request_port,\r
1466         .config_port    = serial_rk_config_port,\r
1467         .verify_port    = serial_rk_verify_port,\r
1468 #ifdef CONFIG_CONSOLE_POLL\r
1469         .poll_get_char = serial_rk_get_poll_char,\r
1470         .poll_put_char = serial_rk_put_poll_char,\r
1471 #endif\r
1472 };\r
1473 \r
1474 #ifdef CONFIG_SERIAL_RK_CONSOLE\r
1475 \r
1476 static struct uart_rk_port *serial_rk_console_ports[UART_NR];\r
1477 \r
1478 static void serial_rk_console_putchar(struct uart_port *port, int ch)\r
1479 {\r
1480         struct uart_rk_port *up =\r
1481                 container_of(port, struct uart_rk_port, port);\r
1482 \r
1483         wait_for_xmitr(up, UART_LSR_THRE);\r
1484         serial_out(up, UART_TX, ch);\r
1485 }\r
1486 \r
1487 /*\r
1488  *      Print a string to the serial port trying not to disturb\r
1489  *      any possible real use of the port...\r
1490  *\r
1491  *      The console_lock must be held when we get here.\r
1492  */\r
1493 static void\r
1494 serial_rk_console_write(struct console *co, const char *s, unsigned int count)\r
1495 {\r
1496         struct uart_rk_port *up = serial_rk_console_ports[co->index];\r
1497         unsigned long flags;\r
1498         unsigned int ier;\r
1499         int locked = 1;\r
1500 \r
1501         touch_nmi_watchdog();\r
1502 \r
1503         local_irq_save(flags);\r
1504         if (up->port.sysrq) {\r
1505                 /* serial_rk_handle_port() already took the lock */\r
1506                 locked = 0;\r
1507         } else if (oops_in_progress) {\r
1508                 locked = spin_trylock(&up->port.lock);\r
1509         } else\r
1510                 spin_lock(&up->port.lock);\r
1511 \r
1512         /*\r
1513          *      First save the IER then disable the interrupts\r
1514          */\r
1515         ier = serial_in(up, UART_IER);\r
1516 \r
1517         serial_out(up, UART_IER, 0);\r
1518 \r
1519         uart_console_write(&up->port, s, count, serial_rk_console_putchar);\r
1520 \r
1521         /*\r
1522          *      Finally, wait for transmitter to become empty\r
1523          *      and restore the IER\r
1524          */\r
1525         wait_for_xmitr(up, BOTH_EMPTY);\r
1526         serial_out(up, UART_IER, ier);\r
1527 \r
1528 #if 0\r
1529         /*\r
1530          *      The receive handling will happen properly because the\r
1531          *      receive ready bit will still be set; it is not cleared\r
1532          *      on read.  However, modem control will not, we must\r
1533          *      call it if we have saved something in the saved flags\r
1534          *      while processing with interrupts off.\r
1535          */\r
1536         if (up->msr_saved_flags)\r
1537                 check_modem_status(up);\r
1538 #endif\r
1539 \r
1540         if (locked)\r
1541                 spin_unlock(&up->port.lock);\r
1542         local_irq_restore(flags);\r
1543 }\r
1544 \r
1545 static int __init serial_rk_console_setup(struct console *co, char *options)\r
1546 {\r
1547         struct uart_rk_port *up;\r
1548         int baud = 115200;\r
1549         int bits = 8;\r
1550         int parity = 'n';\r
1551         int flow = 'n';\r
1552 \r
1553         if (unlikely(co->index >= UART_NR || co->index < 0))\r
1554                 return -ENODEV;\r
1555 \r
1556         if (serial_rk_console_ports[co->index] == NULL)\r
1557                 return -ENODEV;\r
1558         up = serial_rk_console_ports[co->index];\r
1559 \r
1560         if (options)\r
1561                 uart_parse_options(options, &baud, &parity, &bits, &flow);\r
1562 \r
1563         return uart_set_options(&up->port, co, baud, parity, bits, flow);\r
1564 }\r
1565 \r
1566 static struct console serial_rk_console = {\r
1567         .name           = "ttyS",\r
1568         .write          = serial_rk_console_write,\r
1569         .device         = uart_console_device,\r
1570         .setup          = serial_rk_console_setup,\r
1571         .flags          = CON_PRINTBUFFER | CON_ANYTIME,\r
1572         .index          = -1,\r
1573         .data           = &serial_rk_reg,\r
1574 };\r
1575 \r
1576 static void serial_rk_add_console_port(struct uart_rk_port *up)\r
1577 {\r
1578         serial_rk_console_ports[up->pdev->id] = up;\r
1579 }\r
1580 \r
1581 #define SERIAL_CONSOLE  &serial_rk_console\r
1582 #else\r
1583 #define SERIAL_CONSOLE  NULL\r
1584 \r
1585 static inline void serial_rk_add_console_port(struct uart_rk_port *up)\r
1586 {}\r
1587 \r
1588 #endif\r
1589 \r
1590 static struct uart_driver serial_rk_reg = {\r
1591         .owner                  = THIS_MODULE,\r
1592         .driver_name            = "rk29_serial",\r
1593         .dev_name               = "ttyS",\r
1594         .major                  = TTY_MAJOR,\r
1595         .minor                  = 64,\r
1596         .cons                   = SERIAL_CONSOLE,\r
1597         .nr                     = UART_NR,\r
1598 };\r
1599 \r
1600 static int __devinit serial_rk_probe(struct platform_device *pdev)\r
1601 {\r
1602         struct uart_rk_port     *up;\r
1603         struct resource         *mem;\r
1604         int irq;\r
1605         int ret = -ENOSPC;\r
1606         mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);\r
1607         if (!mem) {\r
1608                 dev_err(&pdev->dev, "no mem resource?\n");\r
1609                 return -ENODEV;\r
1610         }\r
1611 \r
1612         irq = platform_get_irq(pdev, 0);\r
1613         if (irq < 0) {\r
1614                 dev_err(&pdev->dev, "no irq resource?\n");\r
1615                 return irq;\r
1616         }\r
1617 \r
1618         if (!request_mem_region(mem->start, (mem->end - mem->start) + 1,\r
1619                                 pdev->dev.driver->name)) {\r
1620                 dev_err(&pdev->dev, "memory region already claimed\n");\r
1621                 return -EBUSY;\r
1622         }\r
1623 \r
1624         up = kzalloc(sizeof(*up), GFP_KERNEL);\r
1625         if (up == NULL) {\r
1626                 ret = -ENOMEM;\r
1627                 goto do_release_region;\r
1628         }\r
1629 \r
1630         sprintf(up->name, "rk29_serial.%d", pdev->id);\r
1631         up->pdev = pdev;\r
1632         up->clk = clk_get(&pdev->dev, "uart");\r
1633         if (unlikely(IS_ERR(up->clk))) {\r
1634                 ret = PTR_ERR(up->clk);\r
1635                 goto do_free;\r
1636         }\r
1637         up->tx_loadsz = 30;\r
1638         up->prk29_uart_dma_t = &rk29_uart_ports_dma_t[pdev->id];\r
1639         up->port.dev = &pdev->dev;\r
1640         up->port.type = PORT_RK;\r
1641         up->port.irq = irq;\r
1642         up->port.iotype = UPIO_DWAPB;\r
1643 \r
1644         up->port.regshift = 2;\r
1645         up->port.fifosize = 32;\r
1646         up->port.ops = &serial_rk_pops;\r
1647         up->port.line = pdev->id;\r
1648         up->port.iobase = mem->start;\r
1649         up->port.membase = ioremap_nocache(mem->start, mem->end - mem->start + 1);\r
1650         if (!up->port.membase) {\r
1651                 ret = -ENOMEM;\r
1652                 goto do_put_clk;\r
1653         }\r
1654         up->port.mapbase = mem->start;\r
1655         up->port.irqflags = 0;\r
1656         up->port.uartclk = clk_get_rate(up->clk);\r
1657 \r
1658         /* set dma config */\r
1659         if(1 == up->prk29_uart_dma_t->use_dma) {\r
1660                 pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);\r
1661 \r
1662                 //timer\r
1663                 up->prk29_uart_dma_t->use_timer = USE_TIMER;\r
1664                 up->prk29_uart_dma_t->rx_timer.function = serial_rk_rx_timeout;\r
1665                 up->prk29_uart_dma_t->rx_timer.data = (unsigned long)up;\r
1666                 up->prk29_uart_dma_t->rx_timeout = 7;\r
1667                 up->prk29_uart_dma_t->rx_timer.expires = jiffies + msecs_to_jiffies(up->prk29_uart_dma_t->rx_timeout);\r
1668                 init_timer(&up->prk29_uart_dma_t->rx_timer);\r
1669                 //tx buffer\r
1670                 up->prk29_uart_dma_t->tx_buffer_size = UART_XMIT_SIZE;\r
1671                 up->prk29_uart_dma_t->tx_buffer = dmam_alloc_coherent(up->port.dev, up->prk29_uart_dma_t->tx_buffer_size,\r
1672                                 &up->prk29_uart_dma_t->tx_phy_addr, DMA_MEMORY_MAP);\r
1673                 if(!up->prk29_uart_dma_t->tx_buffer){\r
1674                         dev_info(up->port.dev, "dmam_alloc_coherent dma_tx_buffer fail\n");\r
1675                 }\r
1676                 else{\r
1677                         dev_info(up->port.dev, "dma_tx_buffer 0x%08x\n", (unsigned) up->prk29_uart_dma_t->tx_buffer);\r
1678                         dev_info(up->port.dev, "dma_tx_phy 0x%08x\n", (unsigned) up->prk29_uart_dma_t->tx_phy_addr);\r
1679                 }\r
1680                 //rx buffer\r
1681                 up->prk29_uart_dma_t->rx_buffer_size = UART_XMIT_SIZE*32;\r
1682                 up->prk29_uart_dma_t->rx_buffer = dmam_alloc_coherent(up->port.dev, up->prk29_uart_dma_t->rx_buffer_size,\r
1683                                 &up->prk29_uart_dma_t->rx_phy_addr, DMA_MEMORY_MAP);\r
1684                 up->prk29_uart_dma_t->rb_pre_pos = 0;\r
1685                 if(!up->prk29_uart_dma_t->rx_buffer){\r
1686                         dev_info(up->port.dev, "dmam_alloc_coherent dma_rx_buffer fail\n");\r
1687                 }\r
1688                 else {\r
1689                         dev_info(up->port.dev, "dma_rx_buffer 0x%08x\n", (unsigned) up->prk29_uart_dma_t->rx_buffer);\r
1690                         dev_info(up->port.dev, "up 0x%08x\n", (unsigned)up->prk29_uart_dma_t);\r
1691                 }\r
1692 \r
1693                 // work queue\r
1694                 INIT_WORK(&up->uart_work, serial_rk_report_revdata_workfunc);\r
1695                 INIT_WORK(&up->uart_work_rx, serial_rk_start_dma_rx);\r
1696                 up->uart_wq = create_singlethread_workqueue("uart_workqueue");\r
1697                 up->prk29_uart_dma_t->rx_dma_start = 0;\r
1698                 spin_lock_init(&(up->prk29_uart_dma_t->tx_lock));\r
1699                 spin_lock_init(&(up->prk29_uart_dma_t->rx_lock));\r
1700                 serial_rk_init_dma_rx(&up->port);\r
1701                 serial_rk_init_dma_tx(&up->port);\r
1702                 up->ier |= THRE_MODE;                   // enable THRE interrupt mode\r
1703                 serial_out(up, UART_IER, up->ier);\r
1704         }\r
1705         clk_enable(up->clk);  // enable the config uart clock\r
1706 \r
1707         serial_rk_add_console_port(up);\r
1708         ret = uart_add_one_port(&serial_rk_reg, &up->port);\r
1709         if (ret != 0)\r
1710                 goto do_iounmap;\r
1711 \r
1712         platform_set_drvdata(pdev, up);\r
1713         dev_info(&pdev->dev, "membase 0x%08x\n", (unsigned) up->port.membase);\r
1714 \r
1715         return 0;\r
1716 \r
1717 do_iounmap:\r
1718         iounmap(up->port.membase);\r
1719         up->port.membase = NULL;\r
1720 do_put_clk:\r
1721         clk_put(up->clk);\r
1722 do_free:\r
1723         kfree(up);\r
1724 do_release_region:\r
1725         release_mem_region(mem->start, (mem->end - mem->start) + 1);\r
1726         return ret;\r
1727 }\r
1728 \r
1729 static int __devexit serial_rk_remove(struct platform_device *pdev)\r
1730 {\r
1731         struct uart_rk_port *up = platform_get_drvdata(pdev);\r
1732 \r
1733         platform_set_drvdata(pdev, NULL);\r
1734         if (up) {\r
1735                 struct resource *mem;\r
1736                 destroy_workqueue(up->uart_wq);\r
1737                 uart_remove_one_port(&serial_rk_reg, &up->port);\r
1738                 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);\r
1739                 iounmap(up->port.membase);\r
1740                 up->port.membase = NULL;\r
1741                 clk_put(up->clk);\r
1742                 kfree(up);\r
1743                 release_mem_region(mem->start, (mem->end - mem->start) + 1);\r
1744         }\r
1745 \r
1746         return 0;\r
1747 }\r
1748 \r
1749 static int serial_rk_suspend(struct platform_device *dev, pm_message_t state)\r
1750 {\r
1751         struct uart_rk_port *up = platform_get_drvdata(dev);\r
1752 \r
1753         if (up){\r
1754                 uart_suspend_port(&serial_rk_reg, &up->port);\r
1755                 if(up->port.line == BLUETOOTH_UART){\r
1756                         rk29_mux_api_set(GPIO2A7_UART2RTSN_NAME, GPIO2L_GPIO2A7);\r
1757                         gpio_request(RK29_PIN2_PA7, "uart_rts");\r
1758                         gpio_direction_output(RK29_PIN2_PA7, 0);\r
1759                         gpio_set_value(RK29_PIN2_PA7, GPIO_HIGH);\r
1760                 }else{\r
1761                         serial_out(up, UART_MCR, 0);\r
1762                 }\r
1763         }\r
1764         return 0;\r
1765 }\r
1766 \r
1767 \r
1768 static struct timer_list uart2_tl;\r
1769 static bool timer_init = false;\r
1770 static void timer_resume_uart2(unsigned long arg)\r
1771 {\r
1772         DBG("%s---\n", __FUNCTION__);\r
1773         gpio_set_value(RK29_PIN2_PA7, GPIO_LOW);\r
1774         rk29_mux_api_set(GPIO2A7_UART2RTSN_NAME, GPIO2L_UART2_RTS_N);\r
1775 }\r
1776 \r
1777 static int serial_rk_resume(struct platform_device *dev)\r
1778 {\r
1779         struct uart_rk_port *up = platform_get_drvdata(dev);\r
1780 \r
1781         if (up){\r
1782                 uart_resume_port(&serial_rk_reg, &up->port);\r
1783 \r
1784                 if(up->port.line == BLUETOOTH_UART){\r
1785                         if(!timer_init){\r
1786                                 init_timer(&uart2_tl);\r
1787                                 uart2_tl.expires = jiffies + msecs_to_jiffies(30);\r
1788                                 uart2_tl.function = timer_resume_uart2;\r
1789                                 add_timer(&uart2_tl);\r
1790                                 timer_init = true;\r
1791                         }\r
1792                         else{\r
1793                                 mod_timer(&uart2_tl,jiffies + msecs_to_jiffies(30));\r
1794                         }\r
1795                 }\r
1796         }\r
1797         return 0;\r
1798 }\r
1799 \r
1800 static struct platform_driver serial_rk_driver = {\r
1801         .probe          = serial_rk_probe,\r
1802         .remove         = __devexit_p(serial_rk_remove),\r
1803         .suspend        = serial_rk_suspend,\r
1804         .resume         = serial_rk_resume,\r
1805         .driver         = {\r
1806 #if defined(CONFIG_SERIAL_RK29)\r
1807                 .name   = "rk29_serial",\r
1808 #elif defined(CONFIG_SERIAL_RK2818)\r
1809                 .name   = "rk2818_serial",\r
1810 #else\r
1811                 .name   = "rk_serial",\r
1812 #endif\r
1813                 .owner  = THIS_MODULE,\r
1814         },\r
1815 };\r
1816 \r
1817 static int __init serial_rk_init(void)\r
1818 {\r
1819         int ret;\r
1820 \r
1821         ret = uart_register_driver(&serial_rk_reg);\r
1822         if (ret)\r
1823                 return ret;\r
1824 \r
1825         ret = platform_driver_register(&serial_rk_driver);\r
1826         if (ret != 0)\r
1827                 uart_unregister_driver(&serial_rk_reg);\r
1828 \r
1829         return ret;\r
1830 }\r
1831 \r
1832 static void __exit serial_rk_exit(void)\r
1833 {\r
1834         platform_driver_unregister(&serial_rk_driver);\r
1835         uart_unregister_driver(&serial_rk_reg);\r
1836 }\r
1837 \r
1838 module_init(serial_rk_init);\r
1839 module_exit(serial_rk_exit);\r
1840 \r
1841 MODULE_LICENSE("GPL");\r
1842 MODULE_DESCRIPTION("RK UART driver");\r
1843 \r