2 * linux/drivers/char/8250.c
4 * Driver for 8250/16550-type serial ports
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
8 * Copyright (C) 2001 Russell King.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * A note about mapbase / membase
17 * mapbase is the physical address of the IO port.
18 * membase is an 'ioremapped' cookie.
21 #if defined(CONFIG_SERIAL_8250_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
25 #include <linux/module.h>
26 #include <linux/moduleparam.h>
27 #include <linux/ioport.h>
28 #include <linux/init.h>
29 #include <linux/console.h>
30 #include <linux/sysrq.h>
31 #include <linux/delay.h>
32 #include <linux/platform_device.h>
33 #include <linux/tty.h>
34 #include <linux/tty_flip.h>
35 #include <linux/serial_reg.h>
36 #include <linux/serial_core.h>
37 #include <linux/serial.h>
38 #include <linux/serial_8250.h>
39 #include <linux/nmi.h>
40 #include <linux/mutex.h>
41 #include <linux/slab.h>
54 * share_irqs - whether we pass IRQF_SHARED to request_irq(). This option
55 * is unsafe when used on edge-triggered interrupts.
57 static unsigned int share_irqs = SERIAL8250_SHARE_IRQS;
59 static unsigned int nr_uarts = CONFIG_SERIAL_8250_RUNTIME_UARTS;
61 static struct uart_driver serial8250_reg;
63 static int serial_index(struct uart_port *port)
65 return (serial8250_reg.minor - 64) + port->line;
68 static unsigned int skip_txen_test; /* force skip of txen test at init time */
74 #define DEBUG_AUTOCONF(fmt...) printk(fmt)
76 #define DEBUG_AUTOCONF(fmt...) do { } while (0)
80 #define DEBUG_INTR(fmt...) printk(fmt)
82 #define DEBUG_INTR(fmt...) do { } while (0)
85 #define PASS_LIMIT 256
87 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
91 * We default to IRQ0 for the "no irq" hack. Some
92 * machine types want others as well - they're free
93 * to redefine this in their header file.
95 #define is_real_interrupt(irq) ((irq) != 0)
97 #ifdef CONFIG_SERIAL_8250_DETECT_IRQ
98 #define CONFIG_SERIAL_DETECT_IRQ 1
100 #ifdef CONFIG_SERIAL_8250_MANY_PORTS
101 #define CONFIG_SERIAL_MANY_PORTS 1
105 * HUB6 is always on. This will be removed once the header
106 * files have been cleaned.
108 #define CONFIG_HUB6 1
110 #include <asm/serial.h>
112 * SERIAL_PORT_DFNS tells us about built-in ports that have no
113 * standard enumeration mechanism. Platforms that can find all
114 * serial ports via mechanisms like ACPI or PCI need not supply it.
116 #ifndef SERIAL_PORT_DFNS
117 #define SERIAL_PORT_DFNS
120 static const struct old_serial_port old_serial_port[] = {
121 SERIAL_PORT_DFNS /* defined in asm/serial.h */
124 #define UART_NR CONFIG_SERIAL_8250_NR_UARTS
126 #ifdef CONFIG_SERIAL_8250_RSA
128 #define PORT_RSA_MAX 4
129 static unsigned long probe_rsa[PORT_RSA_MAX];
130 static unsigned int probe_rsa_count;
131 #endif /* CONFIG_SERIAL_8250_RSA */
133 struct uart_8250_port {
134 struct uart_port port;
135 struct timer_list timer; /* "no irq" timer */
136 struct list_head list; /* ports on this IRQ */
137 unsigned short capabilities; /* port capabilities */
138 unsigned short bugs; /* port bugs */
139 unsigned int tx_loadsz; /* transmit fifo load size */
144 unsigned char mcr_mask; /* mask of user bits */
145 unsigned char mcr_force; /* mask of forced bits */
146 unsigned char cur_iotype; /* Running I/O type */
149 * Some bits in registers are cleared on a read, so they must
150 * be saved whenever the register is read but the bits will not
151 * be immediately processed.
153 #define LSR_SAVE_FLAGS UART_LSR_BRK_ERROR_BITS
154 unsigned char lsr_saved_flags;
155 #define MSR_SAVE_FLAGS UART_MSR_ANY_DELTA
156 unsigned char msr_saved_flags;
159 * We provide a per-port pm hook.
161 void (*pm)(struct uart_port *port,
162 unsigned int state, unsigned int old);
166 struct hlist_node node;
168 spinlock_t lock; /* Protects list not the hash */
169 struct list_head *head;
172 #define NR_IRQ_HASH 32 /* Can be adjusted later */
173 static struct hlist_head irq_lists[NR_IRQ_HASH];
174 static DEFINE_MUTEX(hash_mutex); /* Used to walk the hash */
177 * Here we define the default xmit fifo size used for each type of UART.
179 static const struct serial8250_config uart_config[] = {
204 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
205 .flags = UART_CAP_FIFO,
216 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
222 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
224 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
230 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10 |
232 .flags = UART_CAP_FIFO | UART_CAP_SLEEP | UART_CAP_AFE,
240 .name = "16C950/954",
243 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
244 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
250 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
252 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
258 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
259 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
265 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_11,
266 .flags = UART_CAP_FIFO,
272 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
273 .flags = UART_CAP_FIFO | UART_NATSEMI,
279 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
280 .flags = UART_CAP_FIFO | UART_CAP_UUE,
286 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
287 .flags = UART_CAP_FIFO,
293 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
294 .flags = UART_CAP_FIFO,
300 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_00,
301 .flags = UART_CAP_FIFO | UART_CAP_AFE,
307 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
308 .flags = UART_CAP_FIFO | UART_CAP_AFE,
312 #if defined(CONFIG_MIPS_ALCHEMY)
314 /* Au1x00 UART hardware has a weird register layout */
315 static const u8 au_io_in_map[] = {
325 static const u8 au_io_out_map[] = {
333 /* sane hardware needs no mapping */
334 static inline int map_8250_in_reg(struct uart_port *p, int offset)
336 if (p->iotype != UPIO_AU)
338 return au_io_in_map[offset];
341 static inline int map_8250_out_reg(struct uart_port *p, int offset)
343 if (p->iotype != UPIO_AU)
345 return au_io_out_map[offset];
348 #elif defined(CONFIG_SERIAL_8250_RM9K)
372 static inline int map_8250_in_reg(struct uart_port *p, int offset)
374 if (p->iotype != UPIO_RM9000)
376 return regmap_in[offset];
379 static inline int map_8250_out_reg(struct uart_port *p, int offset)
381 if (p->iotype != UPIO_RM9000)
383 return regmap_out[offset];
388 /* sane hardware needs no mapping */
389 #define map_8250_in_reg(up, offset) (offset)
390 #define map_8250_out_reg(up, offset) (offset)
394 static unsigned int hub6_serial_in(struct uart_port *p, int offset)
396 offset = map_8250_in_reg(p, offset) << p->regshift;
397 outb(p->hub6 - 1 + offset, p->iobase);
398 return inb(p->iobase + 1);
401 static void hub6_serial_out(struct uart_port *p, int offset, int value)
403 offset = map_8250_out_reg(p, offset) << p->regshift;
404 outb(p->hub6 - 1 + offset, p->iobase);
405 outb(value, p->iobase + 1);
408 static unsigned int mem_serial_in(struct uart_port *p, int offset)
410 offset = map_8250_in_reg(p, offset) << p->regshift;
411 return readb(p->membase + offset);
414 static void mem_serial_out(struct uart_port *p, int offset, int value)
416 offset = map_8250_out_reg(p, offset) << p->regshift;
417 writeb(value, p->membase + offset);
420 static void mem32_serial_out(struct uart_port *p, int offset, int value)
422 offset = map_8250_out_reg(p, offset) << p->regshift;
423 writel(value, p->membase + offset);
426 static unsigned int mem32_serial_in(struct uart_port *p, int offset)
428 offset = map_8250_in_reg(p, offset) << p->regshift;
429 return readl(p->membase + offset);
432 static unsigned int au_serial_in(struct uart_port *p, int offset)
434 offset = map_8250_in_reg(p, offset) << p->regshift;
435 return __raw_readl(p->membase + offset);
438 static void au_serial_out(struct uart_port *p, int offset, int value)
440 offset = map_8250_out_reg(p, offset) << p->regshift;
441 __raw_writel(value, p->membase + offset);
444 static unsigned int tsi_serial_in(struct uart_port *p, int offset)
447 offset = map_8250_in_reg(p, offset) << p->regshift;
448 if (offset == UART_IIR) {
449 tmp = readl(p->membase + (UART_IIR & ~3));
450 return (tmp >> 16) & 0xff; /* UART_IIR % 4 == 2 */
452 return readb(p->membase + offset);
455 static void tsi_serial_out(struct uart_port *p, int offset, int value)
457 offset = map_8250_out_reg(p, offset) << p->regshift;
458 if (!((offset == UART_IER) && (value & UART_IER_UUE)))
459 writeb(value, p->membase + offset);
462 static void dwapb_serial_out(struct uart_port *p, int offset, int value)
464 int save_offset = offset;
465 offset = map_8250_out_reg(p, offset) << p->regshift;
466 /* Save the LCR value so it can be re-written when a
467 * Busy Detect interrupt occurs. */
468 if (save_offset == UART_LCR) {
469 struct uart_8250_port *up = (struct uart_8250_port *)p;
472 writeb(value, p->membase + offset);
473 /* Read the IER to ensure any interrupt is cleared before
474 * returning from ISR. */
475 if (save_offset == UART_TX || save_offset == UART_IER)
476 value = p->serial_in(p, UART_IER);
479 static unsigned int io_serial_in(struct uart_port *p, int offset)
481 offset = map_8250_in_reg(p, offset) << p->regshift;
482 return inb(p->iobase + offset);
485 static void io_serial_out(struct uart_port *p, int offset, int value)
487 offset = map_8250_out_reg(p, offset) << p->regshift;
488 outb(value, p->iobase + offset);
491 static void set_io_from_upio(struct uart_port *p)
493 struct uart_8250_port *up = (struct uart_8250_port *)p;
496 p->serial_in = hub6_serial_in;
497 p->serial_out = hub6_serial_out;
501 p->serial_in = mem_serial_in;
502 p->serial_out = mem_serial_out;
507 p->serial_in = mem32_serial_in;
508 p->serial_out = mem32_serial_out;
512 p->serial_in = au_serial_in;
513 p->serial_out = au_serial_out;
517 p->serial_in = tsi_serial_in;
518 p->serial_out = tsi_serial_out;
522 p->serial_in = mem_serial_in;
523 p->serial_out = dwapb_serial_out;
527 p->serial_in = io_serial_in;
528 p->serial_out = io_serial_out;
531 /* Remember loaded iotype */
532 up->cur_iotype = p->iotype;
536 serial_out_sync(struct uart_8250_port *up, int offset, int value)
538 struct uart_port *p = &up->port;
544 p->serial_out(p, offset, value);
545 p->serial_in(p, UART_LCR); /* safe, no side-effects */
548 p->serial_out(p, offset, value);
552 #define serial_in(up, offset) \
553 (up->port.serial_in(&(up)->port, (offset)))
554 #define serial_out(up, offset, value) \
555 (up->port.serial_out(&(up)->port, (offset), (value)))
557 * We used to support using pause I/O for certain machines. We
558 * haven't supported this for a while, but just in case it's badly
559 * needed for certain old 386 machines, I've left these #define's
562 #define serial_inp(up, offset) serial_in(up, offset)
563 #define serial_outp(up, offset, value) serial_out(up, offset, value)
565 /* Uart divisor latch read */
566 static inline int _serial_dl_read(struct uart_8250_port *up)
568 return serial_inp(up, UART_DLL) | serial_inp(up, UART_DLM) << 8;
571 /* Uart divisor latch write */
572 static inline void _serial_dl_write(struct uart_8250_port *up, int value)
574 serial_outp(up, UART_DLL, value & 0xff);
575 serial_outp(up, UART_DLM, value >> 8 & 0xff);
578 #if defined(CONFIG_MIPS_ALCHEMY)
579 /* Au1x00 haven't got a standard divisor latch */
580 static int serial_dl_read(struct uart_8250_port *up)
582 if (up->port.iotype == UPIO_AU)
583 return __raw_readl(up->port.membase + 0x28);
585 return _serial_dl_read(up);
588 static void serial_dl_write(struct uart_8250_port *up, int value)
590 if (up->port.iotype == UPIO_AU)
591 __raw_writel(value, up->port.membase + 0x28);
593 _serial_dl_write(up, value);
595 #elif defined(CONFIG_SERIAL_8250_RM9K)
596 static int serial_dl_read(struct uart_8250_port *up)
598 return (up->port.iotype == UPIO_RM9000) ?
599 (((__raw_readl(up->port.membase + 0x10) << 8) |
600 (__raw_readl(up->port.membase + 0x08) & 0xff)) & 0xffff) :
604 static void serial_dl_write(struct uart_8250_port *up, int value)
606 if (up->port.iotype == UPIO_RM9000) {
607 __raw_writel(value, up->port.membase + 0x08);
608 __raw_writel(value >> 8, up->port.membase + 0x10);
610 _serial_dl_write(up, value);
614 #define serial_dl_read(up) _serial_dl_read(up)
615 #define serial_dl_write(up, value) _serial_dl_write(up, value)
621 static void serial_icr_write(struct uart_8250_port *up, int offset, int value)
623 serial_out(up, UART_SCR, offset);
624 serial_out(up, UART_ICR, value);
627 static unsigned int serial_icr_read(struct uart_8250_port *up, int offset)
631 serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
632 serial_out(up, UART_SCR, offset);
633 value = serial_in(up, UART_ICR);
634 serial_icr_write(up, UART_ACR, up->acr);
642 static void serial8250_clear_fifos(struct uart_8250_port *p)
644 if (p->capabilities & UART_CAP_FIFO) {
645 serial_outp(p, UART_FCR, UART_FCR_ENABLE_FIFO);
646 serial_outp(p, UART_FCR, UART_FCR_ENABLE_FIFO |
647 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
648 serial_outp(p, UART_FCR, 0);
653 * IER sleep support. UARTs which have EFRs need the "extended
654 * capability" bit enabled. Note that on XR16C850s, we need to
655 * reset LCR to write to IER.
657 static void serial8250_set_sleep(struct uart_8250_port *p, int sleep)
659 if (p->capabilities & UART_CAP_SLEEP) {
660 if (p->capabilities & UART_CAP_EFR) {
661 serial_outp(p, UART_LCR, 0xBF);
662 serial_outp(p, UART_EFR, UART_EFR_ECB);
663 serial_outp(p, UART_LCR, 0);
665 serial_outp(p, UART_IER, sleep ? UART_IERX_SLEEP : 0);
666 if (p->capabilities & UART_CAP_EFR) {
667 serial_outp(p, UART_LCR, 0xBF);
668 serial_outp(p, UART_EFR, 0);
669 serial_outp(p, UART_LCR, 0);
674 #ifdef CONFIG_SERIAL_8250_RSA
676 * Attempts to turn on the RSA FIFO. Returns zero on failure.
677 * We set the port uart clock rate if we succeed.
679 static int __enable_rsa(struct uart_8250_port *up)
684 mode = serial_inp(up, UART_RSA_MSR);
685 result = mode & UART_RSA_MSR_FIFO;
688 serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
689 mode = serial_inp(up, UART_RSA_MSR);
690 result = mode & UART_RSA_MSR_FIFO;
694 up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
699 static void enable_rsa(struct uart_8250_port *up)
701 if (up->port.type == PORT_RSA) {
702 if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
703 spin_lock_irq(&up->port.lock);
705 spin_unlock_irq(&up->port.lock);
707 if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
708 serial_outp(up, UART_RSA_FRR, 0);
713 * Attempts to turn off the RSA FIFO. Returns zero on failure.
714 * It is unknown why interrupts were disabled in here. However,
715 * the caller is expected to preserve this behaviour by grabbing
716 * the spinlock before calling this function.
718 static void disable_rsa(struct uart_8250_port *up)
723 if (up->port.type == PORT_RSA &&
724 up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
725 spin_lock_irq(&up->port.lock);
727 mode = serial_inp(up, UART_RSA_MSR);
728 result = !(mode & UART_RSA_MSR_FIFO);
731 serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
732 mode = serial_inp(up, UART_RSA_MSR);
733 result = !(mode & UART_RSA_MSR_FIFO);
737 up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
738 spin_unlock_irq(&up->port.lock);
741 #endif /* CONFIG_SERIAL_8250_RSA */
744 * This is a quickie test to see how big the FIFO is.
745 * It doesn't work at all the time, more's the pity.
747 static int size_fifo(struct uart_8250_port *up)
749 unsigned char old_fcr, old_mcr, old_lcr;
750 unsigned short old_dl;
753 old_lcr = serial_inp(up, UART_LCR);
754 serial_outp(up, UART_LCR, 0);
755 old_fcr = serial_inp(up, UART_FCR);
756 old_mcr = serial_inp(up, UART_MCR);
757 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
758 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
759 serial_outp(up, UART_MCR, UART_MCR_LOOP);
760 serial_outp(up, UART_LCR, UART_LCR_DLAB);
761 old_dl = serial_dl_read(up);
762 serial_dl_write(up, 0x0001);
763 serial_outp(up, UART_LCR, 0x03);
764 for (count = 0; count < 256; count++)
765 serial_outp(up, UART_TX, count);
766 mdelay(20);/* FIXME - schedule_timeout */
767 for (count = 0; (serial_inp(up, UART_LSR) & UART_LSR_DR) &&
768 (count < 256); count++)
769 serial_inp(up, UART_RX);
770 serial_outp(up, UART_FCR, old_fcr);
771 serial_outp(up, UART_MCR, old_mcr);
772 serial_outp(up, UART_LCR, UART_LCR_DLAB);
773 serial_dl_write(up, old_dl);
774 serial_outp(up, UART_LCR, old_lcr);
780 * Read UART ID using the divisor method - set DLL and DLM to zero
781 * and the revision will be in DLL and device type in DLM. We
782 * preserve the device state across this.
784 static unsigned int autoconfig_read_divisor_id(struct uart_8250_port *p)
786 unsigned char old_dll, old_dlm, old_lcr;
789 old_lcr = serial_inp(p, UART_LCR);
790 serial_outp(p, UART_LCR, UART_LCR_DLAB);
792 old_dll = serial_inp(p, UART_DLL);
793 old_dlm = serial_inp(p, UART_DLM);
795 serial_outp(p, UART_DLL, 0);
796 serial_outp(p, UART_DLM, 0);
798 id = serial_inp(p, UART_DLL) | serial_inp(p, UART_DLM) << 8;
800 serial_outp(p, UART_DLL, old_dll);
801 serial_outp(p, UART_DLM, old_dlm);
802 serial_outp(p, UART_LCR, old_lcr);
808 * This is a helper routine to autodetect StarTech/Exar/Oxsemi UART's.
809 * When this function is called we know it is at least a StarTech
810 * 16650 V2, but it might be one of several StarTech UARTs, or one of
811 * its clones. (We treat the broken original StarTech 16650 V1 as a
812 * 16550, and why not? Startech doesn't seem to even acknowledge its
815 * What evil have men's minds wrought...
817 static void autoconfig_has_efr(struct uart_8250_port *up)
819 unsigned int id1, id2, id3, rev;
822 * Everything with an EFR has SLEEP
824 up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;
827 * First we check to see if it's an Oxford Semiconductor UART.
829 * If we have to do this here because some non-National
830 * Semiconductor clone chips lock up if you try writing to the
831 * LSR register (which serial_icr_read does)
835 * Check for Oxford Semiconductor 16C950.
837 * EFR [4] must be set else this test fails.
839 * This shouldn't be necessary, but Mike Hudson (Exoray@isys.ca)
840 * claims that it's needed for 952 dual UART's (which are not
841 * recommended for new designs).
844 serial_out(up, UART_LCR, 0xBF);
845 serial_out(up, UART_EFR, UART_EFR_ECB);
846 serial_out(up, UART_LCR, 0x00);
847 id1 = serial_icr_read(up, UART_ID1);
848 id2 = serial_icr_read(up, UART_ID2);
849 id3 = serial_icr_read(up, UART_ID3);
850 rev = serial_icr_read(up, UART_REV);
852 DEBUG_AUTOCONF("950id=%02x:%02x:%02x:%02x ", id1, id2, id3, rev);
854 if (id1 == 0x16 && id2 == 0xC9 &&
855 (id3 == 0x50 || id3 == 0x52 || id3 == 0x54)) {
856 up->port.type = PORT_16C950;
859 * Enable work around for the Oxford Semiconductor 952 rev B
860 * chip which causes it to seriously miscalculate baud rates
863 if (id3 == 0x52 && rev == 0x01)
864 up->bugs |= UART_BUG_QUOT;
869 * We check for a XR16C850 by setting DLL and DLM to 0, and then
870 * reading back DLL and DLM. The chip type depends on the DLM
872 * 0x10 - XR16C850 and the DLL contains the chip revision.
876 id1 = autoconfig_read_divisor_id(up);
877 DEBUG_AUTOCONF("850id=%04x ", id1);
880 if (id2 == 0x10 || id2 == 0x12 || id2 == 0x14) {
881 up->port.type = PORT_16850;
886 * It wasn't an XR16C850.
888 * We distinguish between the '654 and the '650 by counting
889 * how many bytes are in the FIFO. I'm using this for now,
890 * since that's the technique that was sent to me in the
891 * serial driver update, but I'm not convinced this works.
892 * I've had problems doing this in the past. -TYT
894 if (size_fifo(up) == 64)
895 up->port.type = PORT_16654;
897 up->port.type = PORT_16650V2;
901 * We detected a chip without a FIFO. Only two fall into
902 * this category - the original 8250 and the 16450. The
903 * 16450 has a scratch register (accessible with LCR=0)
905 static void autoconfig_8250(struct uart_8250_port *up)
907 unsigned char scratch, status1, status2;
909 up->port.type = PORT_8250;
911 scratch = serial_in(up, UART_SCR);
912 serial_outp(up, UART_SCR, 0xa5);
913 status1 = serial_in(up, UART_SCR);
914 serial_outp(up, UART_SCR, 0x5a);
915 status2 = serial_in(up, UART_SCR);
916 serial_outp(up, UART_SCR, scratch);
918 if (status1 == 0xa5 && status2 == 0x5a)
919 up->port.type = PORT_16450;
922 static int broken_efr(struct uart_8250_port *up)
925 * Exar ST16C2550 "A2" devices incorrectly detect as
926 * having an EFR, and report an ID of 0x0201. See
927 * http://www.exar.com/info.php?pdf=dan180_oct2004.pdf
929 if (autoconfig_read_divisor_id(up) == 0x0201 && size_fifo(up) == 16)
936 * We know that the chip has FIFOs. Does it have an EFR? The
937 * EFR is located in the same register position as the IIR and
938 * we know the top two bits of the IIR are currently set. The
939 * EFR should contain zero. Try to read the EFR.
941 static void autoconfig_16550a(struct uart_8250_port *up)
943 unsigned char status1, status2;
944 unsigned int iersave;
946 up->port.type = PORT_16550A;
947 up->capabilities |= UART_CAP_FIFO;
950 * Check for presence of the EFR when DLAB is set.
951 * Only ST16C650V1 UARTs pass this test.
953 serial_outp(up, UART_LCR, UART_LCR_DLAB);
954 if (serial_in(up, UART_EFR) == 0) {
955 serial_outp(up, UART_EFR, 0xA8);
956 if (serial_in(up, UART_EFR) != 0) {
957 DEBUG_AUTOCONF("EFRv1 ");
958 up->port.type = PORT_16650;
959 up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;
961 DEBUG_AUTOCONF("Motorola 8xxx DUART ");
963 serial_outp(up, UART_EFR, 0);
968 * Maybe it requires 0xbf to be written to the LCR.
969 * (other ST16C650V2 UARTs, TI16C752A, etc)
971 serial_outp(up, UART_LCR, 0xBF);
972 if (serial_in(up, UART_EFR) == 0 && !broken_efr(up)) {
973 DEBUG_AUTOCONF("EFRv2 ");
974 autoconfig_has_efr(up);
979 * Check for a National Semiconductor SuperIO chip.
980 * Attempt to switch to bank 2, read the value of the LOOP bit
981 * from EXCR1. Switch back to bank 0, change it in MCR. Then
982 * switch back to bank 2, read it from EXCR1 again and check
983 * it's changed. If so, set baud_base in EXCR2 to 921600. -- dwmw2
985 serial_outp(up, UART_LCR, 0);
986 status1 = serial_in(up, UART_MCR);
987 serial_outp(up, UART_LCR, 0xE0);
988 status2 = serial_in(up, 0x02); /* EXCR1 */
990 if (!((status2 ^ status1) & UART_MCR_LOOP)) {
991 serial_outp(up, UART_LCR, 0);
992 serial_outp(up, UART_MCR, status1 ^ UART_MCR_LOOP);
993 serial_outp(up, UART_LCR, 0xE0);
994 status2 = serial_in(up, 0x02); /* EXCR1 */
995 serial_outp(up, UART_LCR, 0);
996 serial_outp(up, UART_MCR, status1);
998 if ((status2 ^ status1) & UART_MCR_LOOP) {
1001 serial_outp(up, UART_LCR, 0xE0);
1003 quot = serial_dl_read(up);
1006 status1 = serial_in(up, 0x04); /* EXCR2 */
1007 status1 &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
1008 status1 |= 0x10; /* 1.625 divisor for baud_base --> 921600 */
1009 serial_outp(up, 0x04, status1);
1011 serial_dl_write(up, quot);
1013 serial_outp(up, UART_LCR, 0);
1015 up->port.uartclk = 921600*16;
1016 up->port.type = PORT_NS16550A;
1017 up->capabilities |= UART_NATSEMI;
1023 * No EFR. Try to detect a TI16750, which only sets bit 5 of
1024 * the IIR when 64 byte FIFO mode is enabled when DLAB is set.
1025 * Try setting it with and without DLAB set. Cheap clones
1026 * set bit 5 without DLAB set.
1028 serial_outp(up, UART_LCR, 0);
1029 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1030 status1 = serial_in(up, UART_IIR) >> 5;
1031 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1032 serial_outp(up, UART_LCR, UART_LCR_DLAB);
1033 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1034 status2 = serial_in(up, UART_IIR) >> 5;
1035 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1036 serial_outp(up, UART_LCR, 0);
1038 DEBUG_AUTOCONF("iir1=%d iir2=%d ", status1, status2);
1040 if (status1 == 6 && status2 == 7) {
1041 up->port.type = PORT_16750;
1042 up->capabilities |= UART_CAP_AFE | UART_CAP_SLEEP;
1047 * Try writing and reading the UART_IER_UUE bit (b6).
1048 * If it works, this is probably one of the Xscale platform's
1050 * We're going to explicitly set the UUE bit to 0 before
1051 * trying to write and read a 1 just to make sure it's not
1052 * already a 1 and maybe locked there before we even start start.
1054 iersave = serial_in(up, UART_IER);
1055 serial_outp(up, UART_IER, iersave & ~UART_IER_UUE);
1056 if (!(serial_in(up, UART_IER) & UART_IER_UUE)) {
1058 * OK it's in a known zero state, try writing and reading
1059 * without disturbing the current state of the other bits.
1061 serial_outp(up, UART_IER, iersave | UART_IER_UUE);
1062 if (serial_in(up, UART_IER) & UART_IER_UUE) {
1065 * We'll leave the UART_IER_UUE bit set to 1 (enabled).
1067 DEBUG_AUTOCONF("Xscale ");
1068 up->port.type = PORT_XSCALE;
1069 up->capabilities |= UART_CAP_UUE;
1074 * If we got here we couldn't force the IER_UUE bit to 0.
1075 * Log it and continue.
1077 DEBUG_AUTOCONF("Couldn't force IER_UUE to 0 ");
1079 serial_outp(up, UART_IER, iersave);
1082 * We distinguish between 16550A and U6 16550A by counting
1083 * how many bytes are in the FIFO.
1085 if (up->port.type == PORT_16550A && size_fifo(up) == 64) {
1086 up->port.type = PORT_U6_16550A;
1087 up->capabilities |= UART_CAP_AFE;
1092 * This routine is called by rs_init() to initialize a specific serial
1093 * port. It determines what type of UART chip this serial port is
1094 * using: 8250, 16450, 16550, 16550A. The important question is
1095 * whether or not this UART is a 16550A or not, since this will
1096 * determine whether or not we can use its FIFO features or not.
1098 static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
1100 unsigned char status1, scratch, scratch2, scratch3;
1101 unsigned char save_lcr, save_mcr;
1102 unsigned long flags;
1104 if (!up->port.iobase && !up->port.mapbase && !up->port.membase)
1107 DEBUG_AUTOCONF("ttyS%d: autoconf (0x%04lx, 0x%p): ",
1108 serial_index(&up->port), up->port.iobase, up->port.membase);
1111 * We really do need global IRQs disabled here - we're going to
1112 * be frobbing the chips IRQ enable register to see if it exists.
1114 spin_lock_irqsave(&up->port.lock, flags);
1116 up->capabilities = 0;
1119 if (!(up->port.flags & UPF_BUGGY_UART)) {
1121 * Do a simple existence test first; if we fail this,
1122 * there's no point trying anything else.
1124 * 0x80 is used as a nonsense port to prevent against
1125 * false positives due to ISA bus float. The
1126 * assumption is that 0x80 is a non-existent port;
1127 * which should be safe since include/asm/io.h also
1128 * makes this assumption.
1130 * Note: this is safe as long as MCR bit 4 is clear
1131 * and the device is in "PC" mode.
1133 scratch = serial_inp(up, UART_IER);
1134 serial_outp(up, UART_IER, 0);
1139 * Mask out IER[7:4] bits for test as some UARTs (e.g. TL
1140 * 16C754B) allow only to modify them if an EFR bit is set.
1142 scratch2 = serial_inp(up, UART_IER) & 0x0f;
1143 serial_outp(up, UART_IER, 0x0F);
1147 scratch3 = serial_inp(up, UART_IER) & 0x0f;
1148 serial_outp(up, UART_IER, scratch);
1149 if (scratch2 != 0 || scratch3 != 0x0F) {
1151 * We failed; there's nothing here
1153 DEBUG_AUTOCONF("IER test failed (%02x, %02x) ",
1154 scratch2, scratch3);
1159 save_mcr = serial_in(up, UART_MCR);
1160 save_lcr = serial_in(up, UART_LCR);
1163 * Check to see if a UART is really there. Certain broken
1164 * internal modems based on the Rockwell chipset fail this
1165 * test, because they apparently don't implement the loopback
1166 * test mode. So this test is skipped on the COM 1 through
1167 * COM 4 ports. This *should* be safe, since no board
1168 * manufacturer would be stupid enough to design a board
1169 * that conflicts with COM 1-4 --- we hope!
1171 if (!(up->port.flags & UPF_SKIP_TEST)) {
1172 serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);
1173 status1 = serial_inp(up, UART_MSR) & 0xF0;
1174 serial_outp(up, UART_MCR, save_mcr);
1175 if (status1 != 0x90) {
1176 DEBUG_AUTOCONF("LOOP test failed (%02x) ",
1183 * We're pretty sure there's a port here. Lets find out what
1184 * type of port it is. The IIR top two bits allows us to find
1185 * out if it's 8250 or 16450, 16550, 16550A or later. This
1186 * determines what we test for next.
1188 * We also initialise the EFR (if any) to zero for later. The
1189 * EFR occupies the same register location as the FCR and IIR.
1191 serial_outp(up, UART_LCR, 0xBF);
1192 serial_outp(up, UART_EFR, 0);
1193 serial_outp(up, UART_LCR, 0);
1195 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1196 scratch = serial_in(up, UART_IIR) >> 6;
1198 DEBUG_AUTOCONF("iir=%d ", scratch);
1202 autoconfig_8250(up);
1205 up->port.type = PORT_UNKNOWN;
1208 up->port.type = PORT_16550;
1211 autoconfig_16550a(up);
1215 #ifdef CONFIG_SERIAL_8250_RSA
1217 * Only probe for RSA ports if we got the region.
1219 if (up->port.type == PORT_16550A && probeflags & PROBE_RSA) {
1222 for (i = 0 ; i < probe_rsa_count; ++i) {
1223 if (probe_rsa[i] == up->port.iobase &&
1225 up->port.type = PORT_RSA;
1232 serial_outp(up, UART_LCR, save_lcr);
1234 if (up->capabilities != uart_config[up->port.type].flags) {
1236 "ttyS%d: detected caps %08x should be %08x\n",
1237 serial_index(&up->port), up->capabilities,
1238 uart_config[up->port.type].flags);
1241 up->port.fifosize = uart_config[up->port.type].fifo_size;
1242 up->capabilities = uart_config[up->port.type].flags;
1243 up->tx_loadsz = uart_config[up->port.type].tx_loadsz;
1245 if (up->port.type == PORT_UNKNOWN)
1251 #ifdef CONFIG_SERIAL_8250_RSA
1252 if (up->port.type == PORT_RSA)
1253 serial_outp(up, UART_RSA_FRR, 0);
1255 serial_outp(up, UART_MCR, save_mcr);
1256 serial8250_clear_fifos(up);
1257 serial_in(up, UART_RX);
1258 if (up->capabilities & UART_CAP_UUE)
1259 serial_outp(up, UART_IER, UART_IER_UUE);
1261 serial_outp(up, UART_IER, 0);
1264 spin_unlock_irqrestore(&up->port.lock, flags);
1265 DEBUG_AUTOCONF("type=%s\n", uart_config[up->port.type].name);
1268 static void autoconfig_irq(struct uart_8250_port *up)
1270 unsigned char save_mcr, save_ier;
1271 unsigned char save_ICP = 0;
1272 unsigned int ICP = 0;
1276 if (up->port.flags & UPF_FOURPORT) {
1277 ICP = (up->port.iobase & 0xfe0) | 0x1f;
1278 save_ICP = inb_p(ICP);
1283 /* forget possible initially masked and pending IRQ */
1284 probe_irq_off(probe_irq_on());
1285 save_mcr = serial_inp(up, UART_MCR);
1286 save_ier = serial_inp(up, UART_IER);
1287 serial_outp(up, UART_MCR, UART_MCR_OUT1 | UART_MCR_OUT2);
1289 irqs = probe_irq_on();
1290 serial_outp(up, UART_MCR, 0);
1292 if (up->port.flags & UPF_FOURPORT) {
1293 serial_outp(up, UART_MCR,
1294 UART_MCR_DTR | UART_MCR_RTS);
1296 serial_outp(up, UART_MCR,
1297 UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2);
1299 serial_outp(up, UART_IER, 0x0f); /* enable all intrs */
1300 (void)serial_inp(up, UART_LSR);
1301 (void)serial_inp(up, UART_RX);
1302 (void)serial_inp(up, UART_IIR);
1303 (void)serial_inp(up, UART_MSR);
1304 serial_outp(up, UART_TX, 0xFF);
1306 irq = probe_irq_off(irqs);
1308 serial_outp(up, UART_MCR, save_mcr);
1309 serial_outp(up, UART_IER, save_ier);
1311 if (up->port.flags & UPF_FOURPORT)
1312 outb_p(save_ICP, ICP);
1314 up->port.irq = (irq > 0) ? irq : 0;
1317 static inline void __stop_tx(struct uart_8250_port *p)
1319 if (p->ier & UART_IER_THRI) {
1320 p->ier &= ~UART_IER_THRI;
1321 serial_out(p, UART_IER, p->ier);
1325 static void serial8250_stop_tx(struct uart_port *port)
1327 struct uart_8250_port *up = (struct uart_8250_port *)port;
1332 * We really want to stop the transmitter from sending.
1334 if (up->port.type == PORT_16C950) {
1335 up->acr |= UART_ACR_TXDIS;
1336 serial_icr_write(up, UART_ACR, up->acr);
1340 static void transmit_chars(struct uart_8250_port *up);
1342 static void serial8250_start_tx(struct uart_port *port)
1344 struct uart_8250_port *up = (struct uart_8250_port *)port;
1346 if (!(up->ier & UART_IER_THRI)) {
1347 up->ier |= UART_IER_THRI;
1348 serial_out(up, UART_IER, up->ier);
1350 if (up->bugs & UART_BUG_TXEN) {
1352 lsr = serial_in(up, UART_LSR);
1353 up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
1354 if ((up->port.type == PORT_RM9000) ?
1355 (lsr & UART_LSR_THRE) :
1356 (lsr & UART_LSR_TEMT))
1362 * Re-enable the transmitter if we disabled it.
1364 if (up->port.type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {
1365 up->acr &= ~UART_ACR_TXDIS;
1366 serial_icr_write(up, UART_ACR, up->acr);
1370 static void serial8250_stop_rx(struct uart_port *port)
1372 struct uart_8250_port *up = (struct uart_8250_port *)port;
1374 up->ier &= ~UART_IER_RLSI;
1375 up->port.read_status_mask &= ~UART_LSR_DR;
1376 serial_out(up, UART_IER, up->ier);
1379 static void serial8250_enable_ms(struct uart_port *port)
1381 struct uart_8250_port *up = (struct uart_8250_port *)port;
1383 /* no MSR capabilities */
1384 if (up->bugs & UART_BUG_NOMSR)
1387 up->ier |= UART_IER_MSI;
1388 serial_out(up, UART_IER, up->ier);
1392 receive_chars(struct uart_8250_port *up, unsigned int *status)
1394 struct tty_struct *tty = up->port.state->port.tty;
1395 unsigned char ch, lsr = *status;
1396 int max_count = 256;
1400 if (likely(lsr & UART_LSR_DR))
1401 ch = serial_inp(up, UART_RX);
1404 * Intel 82571 has a Serial Over Lan device that will
1405 * set UART_LSR_BI without setting UART_LSR_DR when
1406 * it receives a break. To avoid reading from the
1407 * receive buffer without UART_LSR_DR bit set, we
1408 * just force the read character to be 0
1413 up->port.icount.rx++;
1415 lsr |= up->lsr_saved_flags;
1416 up->lsr_saved_flags = 0;
1418 if (unlikely(lsr & UART_LSR_BRK_ERROR_BITS)) {
1420 * For statistics only
1422 if (lsr & UART_LSR_BI) {
1423 lsr &= ~(UART_LSR_FE | UART_LSR_PE);
1424 up->port.icount.brk++;
1426 * We do the SysRQ and SAK checking
1427 * here because otherwise the break
1428 * may get masked by ignore_status_mask
1429 * or read_status_mask.
1431 if (uart_handle_break(&up->port))
1433 } else if (lsr & UART_LSR_PE)
1434 up->port.icount.parity++;
1435 else if (lsr & UART_LSR_FE)
1436 up->port.icount.frame++;
1437 if (lsr & UART_LSR_OE)
1438 up->port.icount.overrun++;
1441 * Mask off conditions which should be ignored.
1443 lsr &= up->port.read_status_mask;
1445 if (lsr & UART_LSR_BI) {
1446 DEBUG_INTR("handling break....");
1448 } else if (lsr & UART_LSR_PE)
1450 else if (lsr & UART_LSR_FE)
1453 if (uart_handle_sysrq_char(&up->port, ch))
1456 uart_insert_char(&up->port, lsr, UART_LSR_OE, ch, flag);
1459 lsr = serial_inp(up, UART_LSR);
1460 } while ((lsr & (UART_LSR_DR | UART_LSR_BI)) && (max_count-- > 0));
1461 spin_unlock(&up->port.lock);
1462 tty_flip_buffer_push(tty);
1463 spin_lock(&up->port.lock);
1467 static void transmit_chars(struct uart_8250_port *up)
1469 struct circ_buf *xmit = &up->port.state->xmit;
1472 if (up->port.x_char) {
1473 serial_outp(up, UART_TX, up->port.x_char);
1474 up->port.icount.tx++;
1475 up->port.x_char = 0;
1478 if (uart_tx_stopped(&up->port)) {
1479 serial8250_stop_tx(&up->port);
1482 if (uart_circ_empty(xmit)) {
1487 count = up->tx_loadsz;
1489 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
1490 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
1491 up->port.icount.tx++;
1492 if (uart_circ_empty(xmit))
1494 } while (--count > 0);
1496 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
1497 uart_write_wakeup(&up->port);
1499 DEBUG_INTR("THRE...");
1501 if (uart_circ_empty(xmit))
1505 static unsigned int check_modem_status(struct uart_8250_port *up)
1507 unsigned int status = serial_in(up, UART_MSR);
1509 status |= up->msr_saved_flags;
1510 up->msr_saved_flags = 0;
1511 if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI &&
1512 up->port.state != NULL) {
1513 if (status & UART_MSR_TERI)
1514 up->port.icount.rng++;
1515 if (status & UART_MSR_DDSR)
1516 up->port.icount.dsr++;
1517 if (status & UART_MSR_DDCD)
1518 uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
1519 if (status & UART_MSR_DCTS)
1520 uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
1522 wake_up_interruptible(&up->port.state->port.delta_msr_wait);
1529 * This handles the interrupt from one port.
1531 static void serial8250_handle_port(struct uart_8250_port *up)
1533 unsigned int status;
1534 unsigned long flags;
1536 spin_lock_irqsave(&up->port.lock, flags);
1538 status = serial_inp(up, UART_LSR);
1540 DEBUG_INTR("status = %x...", status);
1542 if (status & (UART_LSR_DR | UART_LSR_BI))
1543 receive_chars(up, &status);
1544 check_modem_status(up);
1545 if (status & UART_LSR_THRE)
1548 spin_unlock_irqrestore(&up->port.lock, flags);
1552 * This is the serial driver's interrupt routine.
1554 * Arjan thinks the old way was overly complex, so it got simplified.
1555 * Alan disagrees, saying that need the complexity to handle the weird
1556 * nature of ISA shared interrupts. (This is a special exception.)
1558 * In order to handle ISA shared interrupts properly, we need to check
1559 * that all ports have been serviced, and therefore the ISA interrupt
1560 * line has been de-asserted.
1562 * This means we need to loop through all ports. checking that they
1563 * don't have an interrupt pending.
1565 static irqreturn_t serial8250_interrupt(int irq, void *dev_id)
1567 struct irq_info *i = dev_id;
1568 struct list_head *l, *end = NULL;
1569 int pass_counter = 0, handled = 0;
1571 DEBUG_INTR("serial8250_interrupt(%d)...", irq);
1573 spin_lock(&i->lock);
1577 struct uart_8250_port *up;
1580 up = list_entry(l, struct uart_8250_port, list);
1582 iir = serial_in(up, UART_IIR);
1583 if (!(iir & UART_IIR_NO_INT)) {
1584 serial8250_handle_port(up);
1589 } else if (up->port.iotype == UPIO_DWAPB &&
1590 (iir & UART_IIR_BUSY) == UART_IIR_BUSY) {
1591 /* The DesignWare APB UART has an Busy Detect (0x07)
1592 * interrupt meaning an LCR write attempt occured while the
1593 * UART was busy. The interrupt must be cleared by reading
1594 * the UART status register (USR) and the LCR re-written. */
1595 unsigned int status;
1596 status = *(volatile u32 *)up->port.private_data;
1597 serial_out(up, UART_LCR, up->lcr);
1602 } else if (end == NULL)
1607 if (l == i->head && pass_counter++ > PASS_LIMIT) {
1608 /* If we hit this, we're dead. */
1609 printk(KERN_ERR "serial8250: too much work for "
1615 spin_unlock(&i->lock);
1617 DEBUG_INTR("end.\n");
1619 return IRQ_RETVAL(handled);
1623 * To support ISA shared interrupts, we need to have one interrupt
1624 * handler that ensures that the IRQ line has been deasserted
1625 * before returning. Failing to do this will result in the IRQ
1626 * line being stuck active, and, since ISA irqs are edge triggered,
1627 * no more IRQs will be seen.
1629 static void serial_do_unlink(struct irq_info *i, struct uart_8250_port *up)
1631 spin_lock_irq(&i->lock);
1633 if (!list_empty(i->head)) {
1634 if (i->head == &up->list)
1635 i->head = i->head->next;
1636 list_del(&up->list);
1638 BUG_ON(i->head != &up->list);
1641 spin_unlock_irq(&i->lock);
1642 /* List empty so throw away the hash node */
1643 if (i->head == NULL) {
1644 hlist_del(&i->node);
1649 static int serial_link_irq_chain(struct uart_8250_port *up)
1651 struct hlist_head *h;
1652 struct hlist_node *n;
1654 int ret, irq_flags = up->port.flags & UPF_SHARE_IRQ ? IRQF_SHARED : 0;
1656 mutex_lock(&hash_mutex);
1658 h = &irq_lists[up->port.irq % NR_IRQ_HASH];
1660 hlist_for_each(n, h) {
1661 i = hlist_entry(n, struct irq_info, node);
1662 if (i->irq == up->port.irq)
1667 i = kzalloc(sizeof(struct irq_info), GFP_KERNEL);
1669 mutex_unlock(&hash_mutex);
1672 spin_lock_init(&i->lock);
1673 i->irq = up->port.irq;
1674 hlist_add_head(&i->node, h);
1676 mutex_unlock(&hash_mutex);
1678 spin_lock_irq(&i->lock);
1681 list_add(&up->list, i->head);
1682 spin_unlock_irq(&i->lock);
1686 INIT_LIST_HEAD(&up->list);
1687 i->head = &up->list;
1688 spin_unlock_irq(&i->lock);
1689 irq_flags |= up->port.irqflags;
1690 ret = request_irq(up->port.irq, serial8250_interrupt,
1691 irq_flags, "serial", i);
1693 serial_do_unlink(i, up);
1699 static void serial_unlink_irq_chain(struct uart_8250_port *up)
1702 struct hlist_node *n;
1703 struct hlist_head *h;
1705 mutex_lock(&hash_mutex);
1707 h = &irq_lists[up->port.irq % NR_IRQ_HASH];
1709 hlist_for_each(n, h) {
1710 i = hlist_entry(n, struct irq_info, node);
1711 if (i->irq == up->port.irq)
1716 BUG_ON(i->head == NULL);
1718 if (list_empty(i->head))
1719 free_irq(up->port.irq, i);
1721 serial_do_unlink(i, up);
1722 mutex_unlock(&hash_mutex);
1725 /* Base timer interval for polling */
1726 static inline int poll_timeout(int timeout)
1728 return timeout > 6 ? (timeout / 2 - 2) : 1;
1732 * This function is used to handle ports that do not have an
1733 * interrupt. This doesn't work very well for 16450's, but gives
1734 * barely passable results for a 16550A. (Although at the expense
1735 * of much CPU overhead).
1737 static void serial8250_timeout(unsigned long data)
1739 struct uart_8250_port *up = (struct uart_8250_port *)data;
1742 iir = serial_in(up, UART_IIR);
1743 if (!(iir & UART_IIR_NO_INT))
1744 serial8250_handle_port(up);
1745 mod_timer(&up->timer, jiffies + poll_timeout(up->port.timeout));
1748 static void serial8250_backup_timeout(unsigned long data)
1750 struct uart_8250_port *up = (struct uart_8250_port *)data;
1751 unsigned int iir, ier = 0, lsr;
1752 unsigned long flags;
1755 * Must disable interrupts or else we risk racing with the interrupt
1758 if (is_real_interrupt(up->port.irq)) {
1759 ier = serial_in(up, UART_IER);
1760 serial_out(up, UART_IER, 0);
1763 iir = serial_in(up, UART_IIR);
1766 * This should be a safe test for anyone who doesn't trust the
1767 * IIR bits on their UART, but it's specifically designed for
1768 * the "Diva" UART used on the management processor on many HP
1769 * ia64 and parisc boxes.
1771 spin_lock_irqsave(&up->port.lock, flags);
1772 lsr = serial_in(up, UART_LSR);
1773 up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
1774 spin_unlock_irqrestore(&up->port.lock, flags);
1775 if ((iir & UART_IIR_NO_INT) && (up->ier & UART_IER_THRI) &&
1776 (!uart_circ_empty(&up->port.state->xmit) || up->port.x_char) &&
1777 (lsr & UART_LSR_THRE)) {
1778 iir &= ~(UART_IIR_ID | UART_IIR_NO_INT);
1779 iir |= UART_IIR_THRI;
1782 if (!(iir & UART_IIR_NO_INT))
1783 serial8250_handle_port(up);
1785 if (is_real_interrupt(up->port.irq))
1786 serial_out(up, UART_IER, ier);
1788 /* Standard timer interval plus 0.2s to keep the port running */
1789 mod_timer(&up->timer,
1790 jiffies + poll_timeout(up->port.timeout) + HZ / 5);
1793 static unsigned int serial8250_tx_empty(struct uart_port *port)
1795 struct uart_8250_port *up = (struct uart_8250_port *)port;
1796 unsigned long flags;
1799 spin_lock_irqsave(&up->port.lock, flags);
1800 lsr = serial_in(up, UART_LSR);
1801 up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
1802 spin_unlock_irqrestore(&up->port.lock, flags);
1804 return (lsr & BOTH_EMPTY) == BOTH_EMPTY ? TIOCSER_TEMT : 0;
1807 static unsigned int serial8250_get_mctrl(struct uart_port *port)
1809 struct uart_8250_port *up = (struct uart_8250_port *)port;
1810 unsigned int status;
1813 status = check_modem_status(up);
1816 if (status & UART_MSR_DCD)
1818 if (status & UART_MSR_RI)
1820 if (status & UART_MSR_DSR)
1822 if (status & UART_MSR_CTS)
1827 static void serial8250_set_mctrl(struct uart_port *port, unsigned int mctrl)
1829 struct uart_8250_port *up = (struct uart_8250_port *)port;
1830 unsigned char mcr = 0;
1832 if (mctrl & TIOCM_RTS)
1833 mcr |= UART_MCR_RTS;
1834 if (mctrl & TIOCM_DTR)
1835 mcr |= UART_MCR_DTR;
1836 if (mctrl & TIOCM_OUT1)
1837 mcr |= UART_MCR_OUT1;
1838 if (mctrl & TIOCM_OUT2)
1839 mcr |= UART_MCR_OUT2;
1840 if (mctrl & TIOCM_LOOP)
1841 mcr |= UART_MCR_LOOP;
1843 mcr = (mcr & up->mcr_mask) | up->mcr_force | up->mcr;
1845 serial_out(up, UART_MCR, mcr);
1848 static void serial8250_break_ctl(struct uart_port *port, int break_state)
1850 struct uart_8250_port *up = (struct uart_8250_port *)port;
1851 unsigned long flags;
1853 spin_lock_irqsave(&up->port.lock, flags);
1854 if (break_state == -1)
1855 up->lcr |= UART_LCR_SBC;
1857 up->lcr &= ~UART_LCR_SBC;
1858 serial_out(up, UART_LCR, up->lcr);
1859 spin_unlock_irqrestore(&up->port.lock, flags);
1863 * Wait for transmitter & holding register to empty
1865 static void wait_for_xmitr(struct uart_8250_port *up, int bits)
1867 unsigned int status, tmout = 10000;
1869 /* Wait up to 10ms for the character(s) to be sent. */
1871 status = serial_in(up, UART_LSR);
1873 up->lsr_saved_flags |= status & LSR_SAVE_FLAGS;
1875 if ((status & bits) == bits)
1882 /* Wait up to 1s for flow control if necessary */
1883 if (up->port.flags & UPF_CONS_FLOW) {
1885 for (tmout = 1000000; tmout; tmout--) {
1886 unsigned int msr = serial_in(up, UART_MSR);
1887 up->msr_saved_flags |= msr & MSR_SAVE_FLAGS;
1888 if (msr & UART_MSR_CTS)
1891 touch_nmi_watchdog();
1896 #ifdef CONFIG_CONSOLE_POLL
1898 * Console polling routines for writing and reading from the uart while
1899 * in an interrupt or debug context.
1902 static int serial8250_get_poll_char(struct uart_port *port)
1904 struct uart_8250_port *up = (struct uart_8250_port *)port;
1905 unsigned char lsr = serial_inp(up, UART_LSR);
1907 if (!(lsr & UART_LSR_DR))
1908 return NO_POLL_CHAR;
1910 return serial_inp(up, UART_RX);
1914 static void serial8250_put_poll_char(struct uart_port *port,
1918 struct uart_8250_port *up = (struct uart_8250_port *)port;
1921 * First save the IER then disable the interrupts
1923 ier = serial_in(up, UART_IER);
1924 if (up->capabilities & UART_CAP_UUE)
1925 serial_out(up, UART_IER, UART_IER_UUE);
1927 serial_out(up, UART_IER, 0);
1929 wait_for_xmitr(up, BOTH_EMPTY);
1931 * Send the character out.
1932 * If a LF, also do CR...
1934 serial_out(up, UART_TX, c);
1936 wait_for_xmitr(up, BOTH_EMPTY);
1937 serial_out(up, UART_TX, 13);
1941 * Finally, wait for transmitter to become empty
1942 * and restore the IER
1944 wait_for_xmitr(up, BOTH_EMPTY);
1945 serial_out(up, UART_IER, ier);
1948 #endif /* CONFIG_CONSOLE_POLL */
1950 static int serial8250_startup(struct uart_port *port)
1952 struct uart_8250_port *up = (struct uart_8250_port *)port;
1953 unsigned long flags;
1954 unsigned char lsr, iir;
1957 up->capabilities = uart_config[up->port.type].flags;
1960 if (up->port.iotype != up->cur_iotype)
1961 set_io_from_upio(port);
1963 if (up->port.type == PORT_16C950) {
1964 /* Wake up and initialize UART */
1966 serial_outp(up, UART_LCR, 0xBF);
1967 serial_outp(up, UART_EFR, UART_EFR_ECB);
1968 serial_outp(up, UART_IER, 0);
1969 serial_outp(up, UART_LCR, 0);
1970 serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
1971 serial_outp(up, UART_LCR, 0xBF);
1972 serial_outp(up, UART_EFR, UART_EFR_ECB);
1973 serial_outp(up, UART_LCR, 0);
1976 #ifdef CONFIG_SERIAL_8250_RSA
1978 * If this is an RSA port, see if we can kick it up to the
1979 * higher speed clock.
1985 * Clear the FIFO buffers and disable them.
1986 * (they will be reenabled in set_termios())
1988 serial8250_clear_fifos(up);
1991 * Clear the interrupt registers.
1993 (void) serial_inp(up, UART_LSR);
1994 (void) serial_inp(up, UART_RX);
1995 (void) serial_inp(up, UART_IIR);
1996 (void) serial_inp(up, UART_MSR);
1999 * At this point, there's no way the LSR could still be 0xff;
2000 * if it is, then bail out, because there's likely no UART
2003 if (!(up->port.flags & UPF_BUGGY_UART) &&
2004 (serial_inp(up, UART_LSR) == 0xff)) {
2005 printk(KERN_INFO "ttyS%d: LSR safety check engaged!\n",
2006 serial_index(&up->port));
2011 * For a XR16C850, we need to set the trigger levels
2013 if (up->port.type == PORT_16850) {
2016 serial_outp(up, UART_LCR, 0xbf);
2018 fctr = serial_inp(up, UART_FCTR) & ~(UART_FCTR_RX|UART_FCTR_TX);
2019 serial_outp(up, UART_FCTR, fctr | UART_FCTR_TRGD | UART_FCTR_RX);
2020 serial_outp(up, UART_TRG, UART_TRG_96);
2021 serial_outp(up, UART_FCTR, fctr | UART_FCTR_TRGD | UART_FCTR_TX);
2022 serial_outp(up, UART_TRG, UART_TRG_96);
2024 serial_outp(up, UART_LCR, 0);
2027 if (is_real_interrupt(up->port.irq)) {
2030 * Test for UARTs that do not reassert THRE when the
2031 * transmitter is idle and the interrupt has already
2032 * been cleared. Real 16550s should always reassert
2033 * this interrupt whenever the transmitter is idle and
2034 * the interrupt is enabled. Delays are necessary to
2035 * allow register changes to become visible.
2037 spin_lock_irqsave(&up->port.lock, flags);
2038 if (up->port.irqflags & IRQF_SHARED)
2039 disable_irq_nosync(up->port.irq);
2041 wait_for_xmitr(up, UART_LSR_THRE);
2042 serial_out_sync(up, UART_IER, UART_IER_THRI);
2043 udelay(1); /* allow THRE to set */
2044 iir1 = serial_in(up, UART_IIR);
2045 serial_out(up, UART_IER, 0);
2046 serial_out_sync(up, UART_IER, UART_IER_THRI);
2047 udelay(1); /* allow a working UART time to re-assert THRE */
2048 iir = serial_in(up, UART_IIR);
2049 serial_out(up, UART_IER, 0);
2051 if (up->port.irqflags & IRQF_SHARED)
2052 enable_irq(up->port.irq);
2053 spin_unlock_irqrestore(&up->port.lock, flags);
2056 * If the interrupt is not reasserted, setup a timer to
2057 * kick the UART on a regular basis.
2059 if (!(iir1 & UART_IIR_NO_INT) && (iir & UART_IIR_NO_INT)) {
2060 up->bugs |= UART_BUG_THRE;
2061 pr_debug("ttyS%d - using backup timer\n",
2062 serial_index(port));
2067 * The above check will only give an accurate result the first time
2068 * the port is opened so this value needs to be preserved.
2070 if (up->bugs & UART_BUG_THRE) {
2071 up->timer.function = serial8250_backup_timeout;
2072 up->timer.data = (unsigned long)up;
2073 mod_timer(&up->timer, jiffies +
2074 poll_timeout(up->port.timeout) + HZ / 5);
2078 * If the "interrupt" for this port doesn't correspond with any
2079 * hardware interrupt, we use a timer-based system. The original
2080 * driver used to do this with IRQ0.
2082 if (!is_real_interrupt(up->port.irq)) {
2083 up->timer.data = (unsigned long)up;
2084 mod_timer(&up->timer, jiffies + poll_timeout(up->port.timeout));
2086 retval = serial_link_irq_chain(up);
2092 * Now, initialize the UART
2094 serial_outp(up, UART_LCR, UART_LCR_WLEN8);
2096 spin_lock_irqsave(&up->port.lock, flags);
2097 if (up->port.flags & UPF_FOURPORT) {
2098 if (!is_real_interrupt(up->port.irq))
2099 up->port.mctrl |= TIOCM_OUT1;
2102 * Most PC uarts need OUT2 raised to enable interrupts.
2104 if (is_real_interrupt(up->port.irq))
2105 up->port.mctrl |= TIOCM_OUT2;
2107 serial8250_set_mctrl(&up->port, up->port.mctrl);
2109 /* Serial over Lan (SoL) hack:
2110 Intel 8257x Gigabit ethernet chips have a
2111 16550 emulation, to be used for Serial Over Lan.
2112 Those chips take a longer time than a normal
2113 serial device to signalize that a transmission
2114 data was queued. Due to that, the above test generally
2115 fails. One solution would be to delay the reading of
2116 iir. However, this is not reliable, since the timeout
2117 is variable. So, let's just don't test if we receive
2118 TX irq. This way, we'll never enable UART_BUG_TXEN.
2120 if (skip_txen_test || up->port.flags & UPF_NO_TXEN_TEST)
2121 goto dont_test_tx_en;
2124 * Do a quick test to see if we receive an
2125 * interrupt when we enable the TX irq.
2127 serial_outp(up, UART_IER, UART_IER_THRI);
2128 lsr = serial_in(up, UART_LSR);
2129 iir = serial_in(up, UART_IIR);
2130 serial_outp(up, UART_IER, 0);
2132 if (lsr & UART_LSR_TEMT && iir & UART_IIR_NO_INT) {
2133 if (!(up->bugs & UART_BUG_TXEN)) {
2134 up->bugs |= UART_BUG_TXEN;
2135 pr_debug("ttyS%d - enabling bad tx status workarounds\n",
2136 serial_index(port));
2139 up->bugs &= ~UART_BUG_TXEN;
2143 spin_unlock_irqrestore(&up->port.lock, flags);
2146 * Clear the interrupt registers again for luck, and clear the
2147 * saved flags to avoid getting false values from polling
2148 * routines or the previous session.
2150 serial_inp(up, UART_LSR);
2151 serial_inp(up, UART_RX);
2152 serial_inp(up, UART_IIR);
2153 serial_inp(up, UART_MSR);
2154 up->lsr_saved_flags = 0;
2155 up->msr_saved_flags = 0;
2158 * Finally, enable interrupts. Note: Modem status interrupts
2159 * are set via set_termios(), which will be occurring imminently
2160 * anyway, so we don't enable them here.
2162 up->ier = UART_IER_RLSI | UART_IER_RDI;
2163 serial_outp(up, UART_IER, up->ier);
2165 if (up->port.flags & UPF_FOURPORT) {
2168 * Enable interrupts on the AST Fourport board
2170 icp = (up->port.iobase & 0xfe0) | 0x01f;
2178 static void serial8250_shutdown(struct uart_port *port)
2180 struct uart_8250_port *up = (struct uart_8250_port *)port;
2181 unsigned long flags;
2184 * Disable interrupts from this port
2187 serial_outp(up, UART_IER, 0);
2189 spin_lock_irqsave(&up->port.lock, flags);
2190 if (up->port.flags & UPF_FOURPORT) {
2191 /* reset interrupts on the AST Fourport board */
2192 inb((up->port.iobase & 0xfe0) | 0x1f);
2193 up->port.mctrl |= TIOCM_OUT1;
2195 up->port.mctrl &= ~TIOCM_OUT2;
2197 serial8250_set_mctrl(&up->port, up->port.mctrl);
2198 spin_unlock_irqrestore(&up->port.lock, flags);
2201 * Disable break condition and FIFOs
2203 serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);
2204 serial8250_clear_fifos(up);
2206 #ifdef CONFIG_SERIAL_8250_RSA
2208 * Reset the RSA board back to 115kbps compat mode.
2214 * Read data port to reset things, and then unlink from
2217 (void) serial_in(up, UART_RX);
2219 del_timer_sync(&up->timer);
2220 up->timer.function = serial8250_timeout;
2221 if (is_real_interrupt(up->port.irq))
2222 serial_unlink_irq_chain(up);
2225 static unsigned int serial8250_get_divisor(struct uart_port *port, unsigned int baud)
2230 * Handle magic divisors for baud rates above baud_base on
2231 * SMSC SuperIO chips.
2233 if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
2234 baud == (port->uartclk/4))
2236 else if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
2237 baud == (port->uartclk/8))
2240 quot = uart_get_divisor(port, baud);
2246 serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios,
2247 struct ktermios *old)
2249 struct uart_8250_port *up = (struct uart_8250_port *)port;
2250 unsigned char cval, fcr = 0;
2251 unsigned long flags;
2252 unsigned int baud, quot;
2254 switch (termios->c_cflag & CSIZE) {
2256 cval = UART_LCR_WLEN5;
2259 cval = UART_LCR_WLEN6;
2262 cval = UART_LCR_WLEN7;
2266 cval = UART_LCR_WLEN8;
2270 if (termios->c_cflag & CSTOPB)
2271 cval |= UART_LCR_STOP;
2272 if (termios->c_cflag & PARENB)
2273 cval |= UART_LCR_PARITY;
2274 if (!(termios->c_cflag & PARODD))
2275 cval |= UART_LCR_EPAR;
2277 if (termios->c_cflag & CMSPAR)
2278 cval |= UART_LCR_SPAR;
2282 * Ask the core to calculate the divisor for us.
2284 baud = uart_get_baud_rate(port, termios, old,
2285 port->uartclk / 16 / 0xffff,
2286 port->uartclk / 16);
2287 quot = serial8250_get_divisor(port, baud);
2290 * Oxford Semi 952 rev B workaround
2292 if (up->bugs & UART_BUG_QUOT && (quot & 0xff) == 0)
2295 if (up->capabilities & UART_CAP_FIFO && up->port.fifosize > 1) {
2297 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;
2299 fcr = uart_config[up->port.type].fcr;
2303 * MCR-based auto flow control. When AFE is enabled, RTS will be
2304 * deasserted when the receive FIFO contains more characters than
2305 * the trigger, or the MCR RTS bit is cleared. In the case where
2306 * the remote UART is not using CTS auto flow control, we must
2307 * have sufficient FIFO entries for the latency of the remote
2308 * UART to respond. IOW, at least 32 bytes of FIFO.
2310 if (up->capabilities & UART_CAP_AFE && up->port.fifosize >= 32) {
2311 up->mcr &= ~UART_MCR_AFE;
2312 if (termios->c_cflag & CRTSCTS)
2313 up->mcr |= UART_MCR_AFE;
2317 * Ok, we're now changing the port state. Do it with
2318 * interrupts disabled.
2320 spin_lock_irqsave(&up->port.lock, flags);
2323 * Update the per-port timeout.
2325 uart_update_timeout(port, termios->c_cflag, baud);
2327 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
2328 if (termios->c_iflag & INPCK)
2329 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
2330 if (termios->c_iflag & (BRKINT | PARMRK))
2331 up->port.read_status_mask |= UART_LSR_BI;
2334 * Characteres to ignore
2336 up->port.ignore_status_mask = 0;
2337 if (termios->c_iflag & IGNPAR)
2338 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
2339 if (termios->c_iflag & IGNBRK) {
2340 up->port.ignore_status_mask |= UART_LSR_BI;
2342 * If we're ignoring parity and break indicators,
2343 * ignore overruns too (for real raw support).
2345 if (termios->c_iflag & IGNPAR)
2346 up->port.ignore_status_mask |= UART_LSR_OE;
2350 * ignore all characters if CREAD is not set
2352 if ((termios->c_cflag & CREAD) == 0)
2353 up->port.ignore_status_mask |= UART_LSR_DR;
2356 * CTS flow control flag and modem status interrupts
2358 up->ier &= ~UART_IER_MSI;
2359 if (!(up->bugs & UART_BUG_NOMSR) &&
2360 UART_ENABLE_MS(&up->port, termios->c_cflag))
2361 up->ier |= UART_IER_MSI;
2362 if (up->capabilities & UART_CAP_UUE)
2363 up->ier |= UART_IER_UUE | UART_IER_RTOIE;
2365 serial_out(up, UART_IER, up->ier);
2367 if (up->capabilities & UART_CAP_EFR) {
2368 unsigned char efr = 0;
2370 * TI16C752/Startech hardware flow control. FIXME:
2371 * - TI16C752 requires control thresholds to be set.
2372 * - UART_MCR_RTS is ineffective if auto-RTS mode is enabled.
2374 if (termios->c_cflag & CRTSCTS)
2375 efr |= UART_EFR_CTS;
2377 serial_outp(up, UART_LCR, 0xBF);
2378 serial_outp(up, UART_EFR, efr);
2381 #ifdef CONFIG_ARCH_OMAP
2382 /* Workaround to enable 115200 baud on OMAP1510 internal ports */
2383 if (cpu_is_omap1510() && is_omap_port(up)) {
2384 if (baud == 115200) {
2386 serial_out(up, UART_OMAP_OSC_12M_SEL, 1);
2388 serial_out(up, UART_OMAP_OSC_12M_SEL, 0);
2392 if (up->capabilities & UART_NATSEMI) {
2393 /* Switch to bank 2 not bank 1, to avoid resetting EXCR2 */
2394 serial_outp(up, UART_LCR, 0xe0);
2396 serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
2399 serial_dl_write(up, quot);
2402 * LCR DLAB must be set to enable 64-byte FIFO mode. If the FCR
2403 * is written without DLAB set, this mode will be disabled.
2405 if (up->port.type == PORT_16750)
2406 serial_outp(up, UART_FCR, fcr);
2408 serial_outp(up, UART_LCR, cval); /* reset DLAB */
2409 up->lcr = cval; /* Save LCR */
2410 if (up->port.type != PORT_16750) {
2411 if (fcr & UART_FCR_ENABLE_FIFO) {
2412 /* emulated UARTs (Lucent Venus 167x) need two steps */
2413 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
2415 serial_outp(up, UART_FCR, fcr); /* set fcr */
2417 serial8250_set_mctrl(&up->port, up->port.mctrl);
2418 spin_unlock_irqrestore(&up->port.lock, flags);
2419 /* Don't rewrite B0 */
2420 if (tty_termios_baud_rate(termios))
2421 tty_termios_encode_baud_rate(termios, baud, baud);
2423 EXPORT_SYMBOL(serial8250_do_set_termios);
2426 serial8250_set_termios(struct uart_port *port, struct ktermios *termios,
2427 struct ktermios *old)
2429 if (port->set_termios)
2430 port->set_termios(port, termios, old);
2432 serial8250_do_set_termios(port, termios, old);
2436 serial8250_set_ldisc(struct uart_port *port, int new)
2439 port->flags |= UPF_HARDPPS_CD;
2440 serial8250_enable_ms(port);
2442 port->flags &= ~UPF_HARDPPS_CD;
2446 serial8250_pm(struct uart_port *port, unsigned int state,
2447 unsigned int oldstate)
2449 struct uart_8250_port *p = (struct uart_8250_port *)port;
2451 serial8250_set_sleep(p, state != 0);
2454 p->pm(port, state, oldstate);
2457 static unsigned int serial8250_port_size(struct uart_8250_port *pt)
2459 if (pt->port.iotype == UPIO_AU)
2461 #ifdef CONFIG_ARCH_OMAP
2462 if (is_omap_port(pt))
2463 return 0x16 << pt->port.regshift;
2465 return 8 << pt->port.regshift;
2469 * Resource handling.
2471 static int serial8250_request_std_resource(struct uart_8250_port *up)
2473 unsigned int size = serial8250_port_size(up);
2476 switch (up->port.iotype) {
2482 if (!up->port.mapbase)
2485 if (!request_mem_region(up->port.mapbase, size, "serial")) {
2490 if (up->port.flags & UPF_IOREMAP) {
2491 up->port.membase = ioremap_nocache(up->port.mapbase,
2493 if (!up->port.membase) {
2494 release_mem_region(up->port.mapbase, size);
2502 if (!request_region(up->port.iobase, size, "serial"))
2509 static void serial8250_release_std_resource(struct uart_8250_port *up)
2511 unsigned int size = serial8250_port_size(up);
2513 switch (up->port.iotype) {
2519 if (!up->port.mapbase)
2522 if (up->port.flags & UPF_IOREMAP) {
2523 iounmap(up->port.membase);
2524 up->port.membase = NULL;
2527 release_mem_region(up->port.mapbase, size);
2532 release_region(up->port.iobase, size);
2537 static int serial8250_request_rsa_resource(struct uart_8250_port *up)
2539 unsigned long start = UART_RSA_BASE << up->port.regshift;
2540 unsigned int size = 8 << up->port.regshift;
2543 switch (up->port.iotype) {
2546 start += up->port.iobase;
2547 if (request_region(start, size, "serial-rsa"))
2557 static void serial8250_release_rsa_resource(struct uart_8250_port *up)
2559 unsigned long offset = UART_RSA_BASE << up->port.regshift;
2560 unsigned int size = 8 << up->port.regshift;
2562 switch (up->port.iotype) {
2565 release_region(up->port.iobase + offset, size);
2570 static void serial8250_release_port(struct uart_port *port)
2572 struct uart_8250_port *up = (struct uart_8250_port *)port;
2574 serial8250_release_std_resource(up);
2575 if (up->port.type == PORT_RSA)
2576 serial8250_release_rsa_resource(up);
2579 static int serial8250_request_port(struct uart_port *port)
2581 struct uart_8250_port *up = (struct uart_8250_port *)port;
2584 ret = serial8250_request_std_resource(up);
2585 if (ret == 0 && up->port.type == PORT_RSA) {
2586 ret = serial8250_request_rsa_resource(up);
2588 serial8250_release_std_resource(up);
2594 static void serial8250_config_port(struct uart_port *port, int flags)
2596 struct uart_8250_port *up = (struct uart_8250_port *)port;
2597 int probeflags = PROBE_ANY;
2601 * Find the region that we can probe for. This in turn
2602 * tells us whether we can probe for the type of port.
2604 ret = serial8250_request_std_resource(up);
2608 ret = serial8250_request_rsa_resource(up);
2610 probeflags &= ~PROBE_RSA;
2612 if (up->port.iotype != up->cur_iotype)
2613 set_io_from_upio(port);
2615 if (flags & UART_CONFIG_TYPE)
2616 autoconfig(up, probeflags);
2618 /* if access method is AU, it is a 16550 with a quirk */
2619 if (up->port.type == PORT_16550A && up->port.iotype == UPIO_AU)
2620 up->bugs |= UART_BUG_NOMSR;
2622 if (up->port.type != PORT_UNKNOWN && flags & UART_CONFIG_IRQ)
2625 if (up->port.type != PORT_RSA && probeflags & PROBE_RSA)
2626 serial8250_release_rsa_resource(up);
2627 if (up->port.type == PORT_UNKNOWN)
2628 serial8250_release_std_resource(up);
2632 serial8250_verify_port(struct uart_port *port, struct serial_struct *ser)
2634 if (ser->irq >= nr_irqs || ser->irq < 0 ||
2635 ser->baud_base < 9600 || ser->type < PORT_UNKNOWN ||
2636 ser->type >= ARRAY_SIZE(uart_config) || ser->type == PORT_CIRRUS ||
2637 ser->type == PORT_STARTECH)
2643 serial8250_type(struct uart_port *port)
2645 int type = port->type;
2647 if (type >= ARRAY_SIZE(uart_config))
2649 return uart_config[type].name;
2652 static struct uart_ops serial8250_pops = {
2653 .tx_empty = serial8250_tx_empty,
2654 .set_mctrl = serial8250_set_mctrl,
2655 .get_mctrl = serial8250_get_mctrl,
2656 .stop_tx = serial8250_stop_tx,
2657 .start_tx = serial8250_start_tx,
2658 .stop_rx = serial8250_stop_rx,
2659 .enable_ms = serial8250_enable_ms,
2660 .break_ctl = serial8250_break_ctl,
2661 .startup = serial8250_startup,
2662 .shutdown = serial8250_shutdown,
2663 .set_termios = serial8250_set_termios,
2664 .set_ldisc = serial8250_set_ldisc,
2665 .pm = serial8250_pm,
2666 .type = serial8250_type,
2667 .release_port = serial8250_release_port,
2668 .request_port = serial8250_request_port,
2669 .config_port = serial8250_config_port,
2670 .verify_port = serial8250_verify_port,
2671 #ifdef CONFIG_CONSOLE_POLL
2672 .poll_get_char = serial8250_get_poll_char,
2673 .poll_put_char = serial8250_put_poll_char,
2677 static struct uart_8250_port serial8250_ports[UART_NR];
2679 static void __init serial8250_isa_init_ports(void)
2681 struct uart_8250_port *up;
2682 static int first = 1;
2689 for (i = 0; i < nr_uarts; i++) {
2690 struct uart_8250_port *up = &serial8250_ports[i];
2693 spin_lock_init(&up->port.lock);
2695 init_timer(&up->timer);
2696 up->timer.function = serial8250_timeout;
2699 * ALPHA_KLUDGE_MCR needs to be killed.
2701 up->mcr_mask = ~ALPHA_KLUDGE_MCR;
2702 up->mcr_force = ALPHA_KLUDGE_MCR;
2704 up->port.ops = &serial8250_pops;
2708 irqflag = IRQF_SHARED;
2710 for (i = 0, up = serial8250_ports;
2711 i < ARRAY_SIZE(old_serial_port) && i < nr_uarts;
2713 up->port.iobase = old_serial_port[i].port;
2714 up->port.irq = irq_canonicalize(old_serial_port[i].irq);
2715 up->port.irqflags = old_serial_port[i].irqflags;
2716 up->port.uartclk = old_serial_port[i].baud_base * 16;
2717 up->port.flags = old_serial_port[i].flags;
2718 up->port.hub6 = old_serial_port[i].hub6;
2719 up->port.membase = old_serial_port[i].iomem_base;
2720 up->port.iotype = old_serial_port[i].io_type;
2721 up->port.regshift = old_serial_port[i].iomem_reg_shift;
2722 set_io_from_upio(&up->port);
2723 up->port.irqflags |= irqflag;
2728 serial8250_init_fixed_type_port(struct uart_8250_port *up, unsigned int type)
2730 up->port.type = type;
2731 up->port.fifosize = uart_config[type].fifo_size;
2732 up->capabilities = uart_config[type].flags;
2733 up->tx_loadsz = uart_config[type].tx_loadsz;
2737 serial8250_register_ports(struct uart_driver *drv, struct device *dev)
2741 for (i = 0; i < nr_uarts; i++) {
2742 struct uart_8250_port *up = &serial8250_ports[i];
2743 up->cur_iotype = 0xFF;
2746 serial8250_isa_init_ports();
2748 for (i = 0; i < nr_uarts; i++) {
2749 struct uart_8250_port *up = &serial8250_ports[i];
2753 if (up->port.flags & UPF_FIXED_TYPE)
2754 serial8250_init_fixed_type_port(up, up->port.type);
2756 uart_add_one_port(drv, &up->port);
2760 #ifdef CONFIG_SERIAL_8250_CONSOLE
2762 static void serial8250_console_putchar(struct uart_port *port, int ch)
2764 struct uart_8250_port *up = (struct uart_8250_port *)port;
2766 wait_for_xmitr(up, UART_LSR_THRE);
2767 serial_out(up, UART_TX, ch);
2771 * Print a string to the serial port trying not to disturb
2772 * any possible real use of the port...
2774 * The console_lock must be held when we get here.
2777 serial8250_console_write(struct console *co, const char *s, unsigned int count)
2779 struct uart_8250_port *up = &serial8250_ports[co->index];
2780 unsigned long flags;
2784 touch_nmi_watchdog();
2786 local_irq_save(flags);
2787 if (up->port.sysrq) {
2788 /* serial8250_handle_port() already took the lock */
2790 } else if (oops_in_progress) {
2791 locked = spin_trylock(&up->port.lock);
2793 spin_lock(&up->port.lock);
2796 * First save the IER then disable the interrupts
2798 ier = serial_in(up, UART_IER);
2800 if (up->capabilities & UART_CAP_UUE)
2801 serial_out(up, UART_IER, UART_IER_UUE);
2803 serial_out(up, UART_IER, 0);
2805 uart_console_write(&up->port, s, count, serial8250_console_putchar);
2808 * Finally, wait for transmitter to become empty
2809 * and restore the IER
2811 wait_for_xmitr(up, BOTH_EMPTY);
2812 serial_out(up, UART_IER, ier);
2815 * The receive handling will happen properly because the
2816 * receive ready bit will still be set; it is not cleared
2817 * on read. However, modem control will not, we must
2818 * call it if we have saved something in the saved flags
2819 * while processing with interrupts off.
2821 if (up->msr_saved_flags)
2822 check_modem_status(up);
2825 spin_unlock(&up->port.lock);
2826 local_irq_restore(flags);
2829 static int __init serial8250_console_setup(struct console *co, char *options)
2831 struct uart_port *port;
2838 * Check whether an invalid uart number has been specified, and
2839 * if so, search for the first available port that does have
2842 if (co->index >= nr_uarts)
2844 port = &serial8250_ports[co->index].port;
2845 if (!port->iobase && !port->membase)
2849 uart_parse_options(options, &baud, &parity, &bits, &flow);
2851 return uart_set_options(port, co, baud, parity, bits, flow);
2854 static int serial8250_console_early_setup(void)
2856 return serial8250_find_port_for_earlycon();
2859 static struct console serial8250_console = {
2861 .write = serial8250_console_write,
2862 .device = uart_console_device,
2863 .setup = serial8250_console_setup,
2864 .early_setup = serial8250_console_early_setup,
2865 .flags = CON_PRINTBUFFER,
2867 .data = &serial8250_reg,
2870 static int __init serial8250_console_init(void)
2872 if (nr_uarts > UART_NR)
2875 serial8250_isa_init_ports();
2876 register_console(&serial8250_console);
2879 console_initcall(serial8250_console_init);
2881 int serial8250_find_port(struct uart_port *p)
2884 struct uart_port *port;
2886 for (line = 0; line < nr_uarts; line++) {
2887 port = &serial8250_ports[line].port;
2888 if (uart_match_port(p, port))
2894 #define SERIAL8250_CONSOLE &serial8250_console
2896 #define SERIAL8250_CONSOLE NULL
2899 static struct uart_driver serial8250_reg = {
2900 .owner = THIS_MODULE,
2901 .driver_name = "serial",
2905 .cons = SERIAL8250_CONSOLE,
2909 * early_serial_setup - early registration for 8250 ports
2911 * Setup an 8250 port structure prior to console initialisation. Use
2912 * after console initialisation will cause undefined behaviour.
2914 int __init early_serial_setup(struct uart_port *port)
2916 struct uart_port *p;
2918 if (port->line >= ARRAY_SIZE(serial8250_ports))
2921 serial8250_isa_init_ports();
2922 p = &serial8250_ports[port->line].port;
2923 p->iobase = port->iobase;
2924 p->membase = port->membase;
2926 p->irqflags = port->irqflags;
2927 p->uartclk = port->uartclk;
2928 p->fifosize = port->fifosize;
2929 p->regshift = port->regshift;
2930 p->iotype = port->iotype;
2931 p->flags = port->flags;
2932 p->mapbase = port->mapbase;
2933 p->private_data = port->private_data;
2934 p->type = port->type;
2935 p->line = port->line;
2937 set_io_from_upio(p);
2938 if (port->serial_in)
2939 p->serial_in = port->serial_in;
2940 if (port->serial_out)
2941 p->serial_out = port->serial_out;
2947 * serial8250_suspend_port - suspend one serial port
2948 * @line: serial line number
2950 * Suspend one serial port.
2952 void serial8250_suspend_port(int line)
2954 uart_suspend_port(&serial8250_reg, &serial8250_ports[line].port);
2958 * serial8250_resume_port - resume one serial port
2959 * @line: serial line number
2961 * Resume one serial port.
2963 void serial8250_resume_port(int line)
2965 struct uart_8250_port *up = &serial8250_ports[line];
2967 if (up->capabilities & UART_NATSEMI) {
2970 /* Ensure it's still in high speed mode */
2971 serial_outp(up, UART_LCR, 0xE0);
2973 tmp = serial_in(up, 0x04); /* EXCR2 */
2974 tmp &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
2975 tmp |= 0x10; /* 1.625 divisor for baud_base --> 921600 */
2976 serial_outp(up, 0x04, tmp);
2978 serial_outp(up, UART_LCR, 0);
2980 uart_resume_port(&serial8250_reg, &up->port);
2984 * Register a set of serial devices attached to a platform device. The
2985 * list is terminated with a zero flags entry, which means we expect
2986 * all entries to have at least UPF_BOOT_AUTOCONF set.
2988 static int __devinit serial8250_probe(struct platform_device *dev)
2990 struct plat_serial8250_port *p = dev->dev.platform_data;
2991 struct uart_port port;
2992 int ret, i, irqflag = 0;
2994 memset(&port, 0, sizeof(struct uart_port));
2997 irqflag = IRQF_SHARED;
2999 for (i = 0; p && p->flags != 0; p++, i++) {
3000 port.iobase = p->iobase;
3001 port.membase = p->membase;
3003 port.irqflags = p->irqflags;
3004 port.uartclk = p->uartclk;
3005 port.regshift = p->regshift;
3006 port.iotype = p->iotype;
3007 port.flags = p->flags;
3008 port.mapbase = p->mapbase;
3009 port.hub6 = p->hub6;
3010 port.private_data = p->private_data;
3011 port.type = p->type;
3012 port.serial_in = p->serial_in;
3013 port.serial_out = p->serial_out;
3014 port.set_termios = p->set_termios;
3015 port.dev = &dev->dev;
3016 port.irqflags |= irqflag;
3017 ret = serial8250_register_port(&port);
3019 dev_err(&dev->dev, "unable to register port at index %d "
3020 "(IO%lx MEM%llx IRQ%d): %d\n", i,
3021 p->iobase, (unsigned long long)p->mapbase,
3029 * Remove serial ports registered against a platform device.
3031 static int __devexit serial8250_remove(struct platform_device *dev)
3035 for (i = 0; i < nr_uarts; i++) {
3036 struct uart_8250_port *up = &serial8250_ports[i];
3038 if (up->port.dev == &dev->dev)
3039 serial8250_unregister_port(i);
3044 static int serial8250_suspend(struct platform_device *dev, pm_message_t state)
3048 for (i = 0; i < UART_NR; i++) {
3049 struct uart_8250_port *up = &serial8250_ports[i];
3051 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
3052 uart_suspend_port(&serial8250_reg, &up->port);
3058 static int serial8250_resume(struct platform_device *dev)
3062 for (i = 0; i < UART_NR; i++) {
3063 struct uart_8250_port *up = &serial8250_ports[i];
3065 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
3066 serial8250_resume_port(i);
3072 static struct platform_driver serial8250_isa_driver = {
3073 .probe = serial8250_probe,
3074 .remove = __devexit_p(serial8250_remove),
3075 .suspend = serial8250_suspend,
3076 .resume = serial8250_resume,
3078 .name = "serial8250",
3079 .owner = THIS_MODULE,
3084 * This "device" covers _all_ ISA 8250-compatible serial devices listed
3085 * in the table in include/asm/serial.h
3087 static struct platform_device *serial8250_isa_devs;
3090 * serial8250_register_port and serial8250_unregister_port allows for
3091 * 16x50 serial ports to be configured at run-time, to support PCMCIA
3092 * modems and PCI multiport cards.
3094 static DEFINE_MUTEX(serial_mutex);
3096 static struct uart_8250_port *serial8250_find_match_or_unused(struct uart_port *port)
3101 * First, find a port entry which matches.
3103 for (i = 0; i < nr_uarts; i++)
3104 if (uart_match_port(&serial8250_ports[i].port, port))
3105 return &serial8250_ports[i];
3108 * We didn't find a matching entry, so look for the first
3109 * free entry. We look for one which hasn't been previously
3110 * used (indicated by zero iobase).
3112 for (i = 0; i < nr_uarts; i++)
3113 if (serial8250_ports[i].port.type == PORT_UNKNOWN &&
3114 serial8250_ports[i].port.iobase == 0)
3115 return &serial8250_ports[i];
3118 * That also failed. Last resort is to find any entry which
3119 * doesn't have a real port associated with it.
3121 for (i = 0; i < nr_uarts; i++)
3122 if (serial8250_ports[i].port.type == PORT_UNKNOWN)
3123 return &serial8250_ports[i];
3129 * serial8250_register_port - register a serial port
3130 * @port: serial port template
3132 * Configure the serial port specified by the request. If the
3133 * port exists and is in use, it is hung up and unregistered
3136 * The port is then probed and if necessary the IRQ is autodetected
3137 * If this fails an error is returned.
3139 * On success the port is ready to use and the line number is returned.
3141 int serial8250_register_port(struct uart_port *port)
3143 struct uart_8250_port *uart;
3146 if (port->uartclk == 0)
3149 mutex_lock(&serial_mutex);
3151 uart = serial8250_find_match_or_unused(port);
3153 uart_remove_one_port(&serial8250_reg, &uart->port);
3155 uart->port.iobase = port->iobase;
3156 uart->port.membase = port->membase;
3157 uart->port.irq = port->irq;
3158 uart->port.irqflags = port->irqflags;
3159 uart->port.uartclk = port->uartclk;
3160 uart->port.fifosize = port->fifosize;
3161 uart->port.regshift = port->regshift;
3162 uart->port.iotype = port->iotype;
3163 uart->port.flags = port->flags | UPF_BOOT_AUTOCONF;
3164 uart->port.mapbase = port->mapbase;
3165 uart->port.private_data = port->private_data;
3167 uart->port.dev = port->dev;
3169 if (port->flags & UPF_FIXED_TYPE)
3170 serial8250_init_fixed_type_port(uart, port->type);
3172 set_io_from_upio(&uart->port);
3173 /* Possibly override default I/O functions. */
3174 if (port->serial_in)
3175 uart->port.serial_in = port->serial_in;
3176 if (port->serial_out)
3177 uart->port.serial_out = port->serial_out;
3178 /* Possibly override set_termios call */
3179 if (port->set_termios)
3180 uart->port.set_termios = port->set_termios;
3182 ret = uart_add_one_port(&serial8250_reg, &uart->port);
3184 ret = uart->port.line;
3186 mutex_unlock(&serial_mutex);
3190 EXPORT_SYMBOL(serial8250_register_port);
3193 * serial8250_unregister_port - remove a 16x50 serial port at runtime
3194 * @line: serial line number
3196 * Remove one serial port. This may not be called from interrupt
3197 * context. We hand the port back to the our control.
3199 void serial8250_unregister_port(int line)
3201 struct uart_8250_port *uart = &serial8250_ports[line];
3203 mutex_lock(&serial_mutex);
3204 uart_remove_one_port(&serial8250_reg, &uart->port);
3205 if (serial8250_isa_devs) {
3206 uart->port.flags &= ~UPF_BOOT_AUTOCONF;
3207 uart->port.type = PORT_UNKNOWN;
3208 uart->port.dev = &serial8250_isa_devs->dev;
3209 uart_add_one_port(&serial8250_reg, &uart->port);
3211 uart->port.dev = NULL;
3213 mutex_unlock(&serial_mutex);
3215 EXPORT_SYMBOL(serial8250_unregister_port);
3217 static int __init serial8250_init(void)
3221 if (nr_uarts > UART_NR)
3224 printk(KERN_INFO "Serial: 8250/16550 driver, "
3225 "%d ports, IRQ sharing %sabled\n", nr_uarts,
3226 share_irqs ? "en" : "dis");
3229 ret = sunserial_register_minors(&serial8250_reg, UART_NR);
3231 serial8250_reg.nr = UART_NR;
3232 ret = uart_register_driver(&serial8250_reg);
3237 serial8250_isa_devs = platform_device_alloc("serial8250",
3238 PLAT8250_DEV_LEGACY);
3239 if (!serial8250_isa_devs) {
3241 goto unreg_uart_drv;
3244 ret = platform_device_add(serial8250_isa_devs);
3248 serial8250_register_ports(&serial8250_reg, &serial8250_isa_devs->dev);
3250 ret = platform_driver_register(&serial8250_isa_driver);
3254 platform_device_del(serial8250_isa_devs);
3256 platform_device_put(serial8250_isa_devs);
3259 sunserial_unregister_minors(&serial8250_reg, UART_NR);
3261 uart_unregister_driver(&serial8250_reg);
3267 static void __exit serial8250_exit(void)
3269 struct platform_device *isa_dev = serial8250_isa_devs;
3272 * This tells serial8250_unregister_port() not to re-register
3273 * the ports (thereby making serial8250_isa_driver permanently
3276 serial8250_isa_devs = NULL;
3278 platform_driver_unregister(&serial8250_isa_driver);
3279 platform_device_unregister(isa_dev);
3282 sunserial_unregister_minors(&serial8250_reg, UART_NR);
3284 uart_unregister_driver(&serial8250_reg);
3288 module_init(serial8250_init);
3289 module_exit(serial8250_exit);
3291 EXPORT_SYMBOL(serial8250_suspend_port);
3292 EXPORT_SYMBOL(serial8250_resume_port);
3294 MODULE_LICENSE("GPL");
3295 MODULE_DESCRIPTION("Generic 8250/16x50 serial driver");
3297 module_param(share_irqs, uint, 0644);
3298 MODULE_PARM_DESC(share_irqs, "Share IRQs with other non-8250/16x50 devices"
3301 module_param(nr_uarts, uint, 0644);
3302 MODULE_PARM_DESC(nr_uarts, "Maximum number of UARTs supported. (1-" __MODULE_STRING(CONFIG_SERIAL_8250_NR_UARTS) ")");
3304 module_param(skip_txen_test, uint, 0644);
3305 MODULE_PARM_DESC(skip_txen_test, "Skip checking for the TXEN bug at init time");
3307 #ifdef CONFIG_SERIAL_8250_RSA
3308 module_param_array(probe_rsa, ulong, &probe_rsa_count, 0444);
3309 MODULE_PARM_DESC(probe_rsa, "Probe I/O ports for RSA");
3311 MODULE_ALIAS_CHARDEV_MAJOR(TTY_MAJOR);